V4L/DVB (13238): v4l2_subdev: rename tuner s_standby operation to core s_power
[safe/jmp/linux-2.6] / drivers / media / video / cx23885 / cx23885-dvb.c
1 /*
2  *  Driver for the Conexant CX23885 PCIe bridge
3  *
4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *
15  *  GNU General Public License for more details.
16  *
17  *  You should have received a copy of the GNU General Public License
18  *  along with this program; if not, write to the Free Software
19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/device.h>
25 #include <linux/fs.h>
26 #include <linux/kthread.h>
27 #include <linux/file.h>
28 #include <linux/suspend.h>
29
30 #include "cx23885.h"
31 #include <media/v4l2-common.h>
32
33 #include "dvb_ca_en50221.h"
34 #include "s5h1409.h"
35 #include "s5h1411.h"
36 #include "mt2131.h"
37 #include "tda8290.h"
38 #include "tda18271.h"
39 #include "lgdt330x.h"
40 #include "xc5000.h"
41 #include "tda10048.h"
42 #include "tuner-xc2028.h"
43 #include "tuner-simple.h"
44 #include "dib7000p.h"
45 #include "dibx000_common.h"
46 #include "zl10353.h"
47 #include "stv0900.h"
48 #include "stv0900_reg.h"
49 #include "stv6110.h"
50 #include "lnbh24.h"
51 #include "cx24116.h"
52 #include "cimax2.h"
53 #include "lgs8gxx.h"
54 #include "netup-eeprom.h"
55 #include "netup-init.h"
56 #include "lgdt3305.h"
57
58 static unsigned int debug;
59
60 #define dprintk(level, fmt, arg...)\
61         do { if (debug >= level)\
62                 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
63         } while (0)
64
65 /* ------------------------------------------------------------------ */
66
67 static unsigned int alt_tuner;
68 module_param(alt_tuner, int, 0644);
69 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
70
71 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
72
73 /* ------------------------------------------------------------------ */
74
75 static int dvb_buf_setup(struct videobuf_queue *q,
76                          unsigned int *count, unsigned int *size)
77 {
78         struct cx23885_tsport *port = q->priv_data;
79
80         port->ts_packet_size  = 188 * 4;
81         port->ts_packet_count = 32;
82
83         *size  = port->ts_packet_size * port->ts_packet_count;
84         *count = 32;
85         return 0;
86 }
87
88 static int dvb_buf_prepare(struct videobuf_queue *q,
89                            struct videobuf_buffer *vb, enum v4l2_field field)
90 {
91         struct cx23885_tsport *port = q->priv_data;
92         return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
93 }
94
95 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
96 {
97         struct cx23885_tsport *port = q->priv_data;
98         cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
99 }
100
101 static void dvb_buf_release(struct videobuf_queue *q,
102                             struct videobuf_buffer *vb)
103 {
104         cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
105 }
106
107 static struct videobuf_queue_ops dvb_qops = {
108         .buf_setup    = dvb_buf_setup,
109         .buf_prepare  = dvb_buf_prepare,
110         .buf_queue    = dvb_buf_queue,
111         .buf_release  = dvb_buf_release,
112 };
113
114 static struct s5h1409_config hauppauge_generic_config = {
115         .demod_address = 0x32 >> 1,
116         .output_mode   = S5H1409_SERIAL_OUTPUT,
117         .gpio          = S5H1409_GPIO_ON,
118         .qam_if        = 44000,
119         .inversion     = S5H1409_INVERSION_OFF,
120         .status_mode   = S5H1409_DEMODLOCKING,
121         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
122 };
123
124 static struct tda10048_config hauppauge_hvr1200_config = {
125         .demod_address    = 0x10 >> 1,
126         .output_mode      = TDA10048_SERIAL_OUTPUT,
127         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
128         .inversion        = TDA10048_INVERSION_ON,
129         .dtv6_if_freq_khz = TDA10048_IF_3300,
130         .dtv7_if_freq_khz = TDA10048_IF_3800,
131         .dtv8_if_freq_khz = TDA10048_IF_4300,
132         .clk_freq_khz     = TDA10048_CLK_16000,
133 };
134
135 static struct tda10048_config hauppauge_hvr1210_config = {
136         .demod_address    = 0x10 >> 1,
137         .output_mode      = TDA10048_SERIAL_OUTPUT,
138         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
139         .inversion        = TDA10048_INVERSION_ON,
140         .dtv6_if_freq_khz = TDA10048_IF_3300,
141         .dtv7_if_freq_khz = TDA10048_IF_3500,
142         .dtv8_if_freq_khz = TDA10048_IF_4000,
143         .clk_freq_khz     = TDA10048_CLK_16000,
144 };
145
146 static struct s5h1409_config hauppauge_ezqam_config = {
147         .demod_address = 0x32 >> 1,
148         .output_mode   = S5H1409_SERIAL_OUTPUT,
149         .gpio          = S5H1409_GPIO_OFF,
150         .qam_if        = 4000,
151         .inversion     = S5H1409_INVERSION_ON,
152         .status_mode   = S5H1409_DEMODLOCKING,
153         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
154 };
155
156 static struct s5h1409_config hauppauge_hvr1800lp_config = {
157         .demod_address = 0x32 >> 1,
158         .output_mode   = S5H1409_SERIAL_OUTPUT,
159         .gpio          = S5H1409_GPIO_OFF,
160         .qam_if        = 44000,
161         .inversion     = S5H1409_INVERSION_OFF,
162         .status_mode   = S5H1409_DEMODLOCKING,
163         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
164 };
165
166 static struct s5h1409_config hauppauge_hvr1500_config = {
167         .demod_address = 0x32 >> 1,
168         .output_mode   = S5H1409_SERIAL_OUTPUT,
169         .gpio          = S5H1409_GPIO_OFF,
170         .inversion     = S5H1409_INVERSION_OFF,
171         .status_mode   = S5H1409_DEMODLOCKING,
172         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
173 };
174
175 static struct mt2131_config hauppauge_generic_tunerconfig = {
176         0x61
177 };
178
179 static struct lgdt330x_config fusionhdtv_5_express = {
180         .demod_address = 0x0e,
181         .demod_chip = LGDT3303,
182         .serial_mpeg = 0x40,
183 };
184
185 static struct s5h1409_config hauppauge_hvr1500q_config = {
186         .demod_address = 0x32 >> 1,
187         .output_mode   = S5H1409_SERIAL_OUTPUT,
188         .gpio          = S5H1409_GPIO_ON,
189         .qam_if        = 44000,
190         .inversion     = S5H1409_INVERSION_OFF,
191         .status_mode   = S5H1409_DEMODLOCKING,
192         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
193 };
194
195 static struct s5h1409_config dvico_s5h1409_config = {
196         .demod_address = 0x32 >> 1,
197         .output_mode   = S5H1409_SERIAL_OUTPUT,
198         .gpio          = S5H1409_GPIO_ON,
199         .qam_if        = 44000,
200         .inversion     = S5H1409_INVERSION_OFF,
201         .status_mode   = S5H1409_DEMODLOCKING,
202         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
203 };
204
205 static struct s5h1411_config dvico_s5h1411_config = {
206         .output_mode   = S5H1411_SERIAL_OUTPUT,
207         .gpio          = S5H1411_GPIO_ON,
208         .qam_if        = S5H1411_IF_44000,
209         .vsb_if        = S5H1411_IF_44000,
210         .inversion     = S5H1411_INVERSION_OFF,
211         .status_mode   = S5H1411_DEMODLOCKING,
212         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
213 };
214
215 static struct s5h1411_config hcw_s5h1411_config = {
216         .output_mode   = S5H1411_SERIAL_OUTPUT,
217         .gpio          = S5H1411_GPIO_OFF,
218         .vsb_if        = S5H1411_IF_44000,
219         .qam_if        = S5H1411_IF_4000,
220         .inversion     = S5H1411_INVERSION_ON,
221         .status_mode   = S5H1411_DEMODLOCKING,
222         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
223 };
224
225 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
226         .i2c_address      = 0x61,
227         .if_khz           = 5380,
228 };
229
230 static struct xc5000_config dvico_xc5000_tunerconfig = {
231         .i2c_address      = 0x64,
232         .if_khz           = 5380,
233 };
234
235 static struct tda829x_config tda829x_no_probe = {
236         .probe_tuner = TDA829X_DONT_PROBE,
237 };
238
239 static struct tda18271_std_map hauppauge_tda18271_std_map = {
240         .atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
241                       .if_lvl = 6, .rfagc_top = 0x37 },
242         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
243                       .if_lvl = 6, .rfagc_top = 0x37 },
244 };
245
246 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
247         .dvbt_6   = { .if_freq = 3300, .agc_mode = 3, .std = 4,
248                       .if_lvl = 1, .rfagc_top = 0x37, },
249         .dvbt_7   = { .if_freq = 3800, .agc_mode = 3, .std = 5,
250                       .if_lvl = 1, .rfagc_top = 0x37, },
251         .dvbt_8   = { .if_freq = 4300, .agc_mode = 3, .std = 6,
252                       .if_lvl = 1, .rfagc_top = 0x37, },
253 };
254
255 static struct tda18271_config hauppauge_tda18271_config = {
256         .std_map = &hauppauge_tda18271_std_map,
257         .gate    = TDA18271_GATE_ANALOG,
258         .output_opt = TDA18271_OUTPUT_LT_OFF,
259 };
260
261 static struct tda18271_config hauppauge_hvr1200_tuner_config = {
262         .std_map = &hauppauge_hvr1200_tda18271_std_map,
263         .gate    = TDA18271_GATE_ANALOG,
264         .output_opt = TDA18271_OUTPUT_LT_OFF,
265 };
266
267 static struct tda18271_config hauppauge_hvr1210_tuner_config = {
268         .gate    = TDA18271_GATE_DIGITAL,
269         .output_opt = TDA18271_OUTPUT_LT_OFF,
270 };
271
272 static struct tda18271_std_map hauppauge_hvr127x_std_map = {
273         .atsc_6   = { .if_freq = 3250, .agc_mode = 3, .std = 4,
274                       .if_lvl = 1, .rfagc_top = 0x58 },
275         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 5,
276                       .if_lvl = 1, .rfagc_top = 0x58 },
277 };
278
279 static struct tda18271_config hauppauge_hvr127x_config = {
280         .std_map = &hauppauge_hvr127x_std_map,
281         .output_opt = TDA18271_OUTPUT_LT_OFF,
282 };
283
284 static struct lgdt3305_config hauppauge_lgdt3305_config = {
285         .i2c_addr           = 0x0e,
286         .mpeg_mode          = LGDT3305_MPEG_SERIAL,
287         .tpclk_edge         = LGDT3305_TPCLK_FALLING_EDGE,
288         .tpvalid_polarity   = LGDT3305_TP_VALID_HIGH,
289         .deny_i2c_rptr      = 1,
290         .spectral_inversion = 1,
291         .qam_if_khz         = 4000,
292         .vsb_if_khz         = 3250,
293 };
294
295 static struct dibx000_agc_config xc3028_agc_config = {
296         BAND_VHF | BAND_UHF,    /* band_caps */
297
298         /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
299          * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
300          * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
301          * P_agc_nb_est=2, P_agc_write=0
302          */
303         (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
304                 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
305
306         712,    /* inv_gain */
307         21,     /* time_stabiliz */
308
309         0,      /* alpha_level */
310         118,    /* thlock */
311
312         0,      /* wbd_inv */
313         2867,   /* wbd_ref */
314         0,      /* wbd_sel */
315         2,      /* wbd_alpha */
316
317         0,      /* agc1_max */
318         0,      /* agc1_min */
319         39718,  /* agc2_max */
320         9930,   /* agc2_min */
321         0,      /* agc1_pt1 */
322         0,      /* agc1_pt2 */
323         0,      /* agc1_pt3 */
324         0,      /* agc1_slope1 */
325         0,      /* agc1_slope2 */
326         0,      /* agc2_pt1 */
327         128,    /* agc2_pt2 */
328         29,     /* agc2_slope1 */
329         29,     /* agc2_slope2 */
330
331         17,     /* alpha_mant */
332         27,     /* alpha_exp */
333         23,     /* beta_mant */
334         51,     /* beta_exp */
335
336         1,      /* perform_agc_softsplit */
337 };
338
339 /* PLL Configuration for COFDM BW_MHz = 8.000000
340  * With external clock = 30.000000 */
341 static struct dibx000_bandwidth_config xc3028_bw_config = {
342         60000,  /* internal */
343         30000,  /* sampling */
344         1,      /* pll_cfg: prediv */
345         8,      /* pll_cfg: ratio */
346         3,      /* pll_cfg: range */
347         1,      /* pll_cfg: reset */
348         0,      /* pll_cfg: bypass */
349         0,      /* misc: refdiv */
350         0,      /* misc: bypclk_div */
351         1,      /* misc: IO_CLK_en_core */
352         1,      /* misc: ADClkSrc */
353         0,      /* misc: modulo */
354         (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
355         (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
356         20452225, /* timf */
357         30000000  /* xtal_hz */
358 };
359
360 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
361         .output_mpeg2_in_188_bytes = 1,
362         .hostbus_diversity = 1,
363         .tuner_is_baseband = 0,
364         .update_lna  = NULL,
365
366         .agc_config_count = 1,
367         .agc = &xc3028_agc_config,
368         .bw  = &xc3028_bw_config,
369
370         .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
371         .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
372         .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
373
374         .pwm_freq_div = 0,
375         .agc_control  = NULL,
376         .spur_protect = 0,
377
378         .output_mode = OUTMODE_MPEG2_SERIAL,
379 };
380
381 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
382         .demod_address = 0x0f,
383         .if2           = 45600,
384         .no_tuner      = 1,
385         .disable_i2c_gate_ctrl = 1,
386 };
387
388 static struct stv0900_reg stv0900_ts_regs[] = {
389         { R0900_TSGENERAL, 0x00 },
390         { R0900_P1_TSSPEED, 0x40 },
391         { R0900_P2_TSSPEED, 0x40 },
392         { R0900_P1_TSCFGM, 0xc0 },
393         { R0900_P2_TSCFGM, 0xc0 },
394         { R0900_P1_TSCFGH, 0xe0 },
395         { R0900_P2_TSCFGH, 0xe0 },
396         { R0900_P1_TSCFGL, 0x20 },
397         { R0900_P2_TSCFGL, 0x20 },
398         { 0xffff, 0xff }, /* terminate */
399 };
400
401 static struct stv0900_config netup_stv0900_config = {
402         .demod_address = 0x68,
403         .xtal = 8000000,
404         .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
405         .diseqc_mode = 2,/* 2/3 PWM */
406         .ts_config_regs = stv0900_ts_regs,
407         .tun1_maddress = 0,/* 0x60 */
408         .tun2_maddress = 3,/* 0x63 */
409         .tun1_adc = 1,/* 1 Vpp */
410         .tun2_adc = 1,/* 1 Vpp */
411 };
412
413 static struct stv6110_config netup_stv6110_tunerconfig_a = {
414         .i2c_address = 0x60,
415         .mclk = 16000000,
416         .clk_div = 1,
417 };
418
419 static struct stv6110_config netup_stv6110_tunerconfig_b = {
420         .i2c_address = 0x63,
421         .mclk = 16000000,
422         .clk_div = 1,
423 };
424
425 static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
426 {
427         struct cx23885_tsport *port = fe->dvb->priv;
428         struct cx23885_dev *dev = port->dev;
429
430         if (voltage == SEC_VOLTAGE_18)
431                 cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
432         else if (voltage == SEC_VOLTAGE_13)
433                 cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
434         else
435                 cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
436         return 0;
437 }
438
439 static struct cx24116_config tbs_cx24116_config = {
440         .demod_address = 0x05,
441 };
442
443 static struct cx24116_config tevii_cx24116_config = {
444         .demod_address = 0x55,
445 };
446
447 static struct cx24116_config dvbworld_cx24116_config = {
448         .demod_address = 0x05,
449 };
450
451 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
452         .prod = LGS8GXX_PROD_LGS8GL5,
453         .demod_address = 0x19,
454         .serial_ts = 0,
455         .ts_clk_pol = 1,
456         .ts_clk_gated = 1,
457         .if_clk_freq = 30400, /* 30.4 MHz */
458         .if_freq = 5380, /* 5.38 MHz */
459         .if_neg_center = 1,
460         .ext_adc = 0,
461         .adc_signed = 0,
462         .if_neg_edge = 0,
463 };
464
465 static struct xc5000_config mygica_x8506_xc5000_config = {
466         .i2c_address = 0x61,
467         .if_khz = 5380,
468 };
469
470 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe,
471                                     struct dvb_frontend_parameters *param)
472 {
473         struct cx23885_tsport *port = fe->dvb->priv;
474         struct cx23885_dev *dev = port->dev;
475
476         switch (dev->board) {
477         case CX23885_BOARD_HAUPPAUGE_HVR1275:
478                 switch (param->u.vsb.modulation) {
479                 case VSB_8:
480                         cx23885_gpio_clear(dev, GPIO_5);
481                         break;
482                 case QAM_64:
483                 case QAM_256:
484                 default:
485                         cx23885_gpio_set(dev, GPIO_5);
486                         break;
487                 }
488                 break;
489         case CX23885_BOARD_MYGICA_X8506:
490         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
491                 /* Select Digital TV */
492                 cx23885_gpio_set(dev, GPIO_0);
493                 break;
494         }
495         return 0;
496 }
497
498 static int cx23885_dvb_fe_ioctl_override(struct dvb_frontend *fe,
499                                          unsigned int cmd, void *parg,
500                                          unsigned int stage)
501 {
502         int err = 0;
503
504         switch (stage) {
505         case DVB_FE_IOCTL_PRE:
506
507                 switch (cmd) {
508                 case FE_SET_FRONTEND:
509                         err = cx23885_dvb_set_frontend(fe,
510                                 (struct dvb_frontend_parameters *) parg);
511                         break;
512                 }
513                 break;
514
515         case DVB_FE_IOCTL_POST:
516                 /* no post-ioctl handling required */
517                 break;
518         }
519         return err;
520 };
521
522
523 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
524         .prod = LGS8GXX_PROD_LGS8G75,
525         .demod_address = 0x19,
526         .serial_ts = 0,
527         .ts_clk_pol = 1,
528         .ts_clk_gated = 1,
529         .if_clk_freq = 30400, /* 30.4 MHz */
530         .if_freq = 6500, /* 6.50 MHz */
531         .if_neg_center = 1,
532         .ext_adc = 0,
533         .adc_signed = 1,
534         .adc_vpp = 2, /* 1.6 Vpp */
535         .if_neg_edge = 1,
536 };
537
538 static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
539         .i2c_address = 0x61,
540         .if_khz = 6500,
541 };
542
543 static int dvb_register(struct cx23885_tsport *port)
544 {
545         struct cx23885_dev *dev = port->dev;
546         struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
547         struct videobuf_dvb_frontend *fe0;
548         int ret;
549
550         /* Get the first frontend */
551         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
552         if (!fe0)
553                 return -EINVAL;
554
555         /* init struct videobuf_dvb */
556         fe0->dvb.name = dev->name;
557
558         /* init frontend */
559         switch (dev->board) {
560         case CX23885_BOARD_HAUPPAUGE_HVR1250:
561                 i2c_bus = &dev->i2c_bus[0];
562                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
563                                                 &hauppauge_generic_config,
564                                                 &i2c_bus->i2c_adap);
565                 if (fe0->dvb.frontend != NULL) {
566                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
567                                    &i2c_bus->i2c_adap,
568                                    &hauppauge_generic_tunerconfig, 0);
569                 }
570                 break;
571         case CX23885_BOARD_HAUPPAUGE_HVR1270:
572         case CX23885_BOARD_HAUPPAUGE_HVR1275:
573                 i2c_bus = &dev->i2c_bus[0];
574                 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
575                                                &hauppauge_lgdt3305_config,
576                                                &i2c_bus->i2c_adap);
577                 if (fe0->dvb.frontend != NULL) {
578                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
579                                    0x60, &dev->i2c_bus[1].i2c_adap,
580                                    &hauppauge_hvr127x_config);
581                 }
582                 break;
583         case CX23885_BOARD_HAUPPAUGE_HVR1255:
584                 i2c_bus = &dev->i2c_bus[0];
585                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
586                                                &hcw_s5h1411_config,
587                                                &i2c_bus->i2c_adap);
588                 if (fe0->dvb.frontend != NULL) {
589                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
590                                    0x60, &dev->i2c_bus[1].i2c_adap,
591                                    &hauppauge_tda18271_config);
592                 }
593                 break;
594         case CX23885_BOARD_HAUPPAUGE_HVR1800:
595                 i2c_bus = &dev->i2c_bus[0];
596                 switch (alt_tuner) {
597                 case 1:
598                         fe0->dvb.frontend =
599                                 dvb_attach(s5h1409_attach,
600                                            &hauppauge_ezqam_config,
601                                            &i2c_bus->i2c_adap);
602                         if (fe0->dvb.frontend != NULL) {
603                                 dvb_attach(tda829x_attach, fe0->dvb.frontend,
604                                            &dev->i2c_bus[1].i2c_adap, 0x42,
605                                            &tda829x_no_probe);
606                                 dvb_attach(tda18271_attach, fe0->dvb.frontend,
607                                            0x60, &dev->i2c_bus[1].i2c_adap,
608                                            &hauppauge_tda18271_config);
609                         }
610                         break;
611                 case 0:
612                 default:
613                         fe0->dvb.frontend =
614                                 dvb_attach(s5h1409_attach,
615                                            &hauppauge_generic_config,
616                                            &i2c_bus->i2c_adap);
617                         if (fe0->dvb.frontend != NULL)
618                                 dvb_attach(mt2131_attach, fe0->dvb.frontend,
619                                            &i2c_bus->i2c_adap,
620                                            &hauppauge_generic_tunerconfig, 0);
621                         break;
622                 }
623                 break;
624         case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
625                 i2c_bus = &dev->i2c_bus[0];
626                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
627                                                 &hauppauge_hvr1800lp_config,
628                                                 &i2c_bus->i2c_adap);
629                 if (fe0->dvb.frontend != NULL) {
630                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
631                                    &i2c_bus->i2c_adap,
632                                    &hauppauge_generic_tunerconfig, 0);
633                 }
634                 break;
635         case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
636                 i2c_bus = &dev->i2c_bus[0];
637                 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
638                                                 &fusionhdtv_5_express,
639                                                 &i2c_bus->i2c_adap);
640                 if (fe0->dvb.frontend != NULL) {
641                         dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
642                                    &i2c_bus->i2c_adap, 0x61,
643                                    TUNER_LG_TDVS_H06XF);
644                 }
645                 break;
646         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
647                 i2c_bus = &dev->i2c_bus[1];
648                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
649                                                 &hauppauge_hvr1500q_config,
650                                                 &dev->i2c_bus[0].i2c_adap);
651                 if (fe0->dvb.frontend != NULL)
652                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
653                                    &i2c_bus->i2c_adap,
654                                    &hauppauge_hvr1500q_tunerconfig);
655                 break;
656         case CX23885_BOARD_HAUPPAUGE_HVR1500:
657                 i2c_bus = &dev->i2c_bus[1];
658                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
659                                                 &hauppauge_hvr1500_config,
660                                                 &dev->i2c_bus[0].i2c_adap);
661                 if (fe0->dvb.frontend != NULL) {
662                         struct dvb_frontend *fe;
663                         struct xc2028_config cfg = {
664                                 .i2c_adap  = &i2c_bus->i2c_adap,
665                                 .i2c_addr  = 0x61,
666                         };
667                         static struct xc2028_ctrl ctl = {
668                                 .fname       = XC2028_DEFAULT_FIRMWARE,
669                                 .max_len     = 64,
670                                 .demod       = XC3028_FE_OREN538,
671                         };
672
673                         fe = dvb_attach(xc2028_attach,
674                                         fe0->dvb.frontend, &cfg);
675                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
676                                 fe->ops.tuner_ops.set_config(fe, &ctl);
677                 }
678                 break;
679         case CX23885_BOARD_HAUPPAUGE_HVR1200:
680         case CX23885_BOARD_HAUPPAUGE_HVR1700:
681                 i2c_bus = &dev->i2c_bus[0];
682                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
683                         &hauppauge_hvr1200_config,
684                         &i2c_bus->i2c_adap);
685                 if (fe0->dvb.frontend != NULL) {
686                         dvb_attach(tda829x_attach, fe0->dvb.frontend,
687                                 &dev->i2c_bus[1].i2c_adap, 0x42,
688                                 &tda829x_no_probe);
689                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
690                                 0x60, &dev->i2c_bus[1].i2c_adap,
691                                 &hauppauge_hvr1200_tuner_config);
692                 }
693                 break;
694         case CX23885_BOARD_HAUPPAUGE_HVR1210:
695                 i2c_bus = &dev->i2c_bus[0];
696                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
697                         &hauppauge_hvr1210_config,
698                         &i2c_bus->i2c_adap);
699                 if (fe0->dvb.frontend != NULL) {
700                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
701                                 0x60, &dev->i2c_bus[1].i2c_adap,
702                                 &hauppauge_hvr1210_tuner_config);
703                 }
704                 break;
705         case CX23885_BOARD_HAUPPAUGE_HVR1400:
706                 i2c_bus = &dev->i2c_bus[0];
707                 fe0->dvb.frontend = dvb_attach(dib7000p_attach,
708                         &i2c_bus->i2c_adap,
709                         0x12, &hauppauge_hvr1400_dib7000_config);
710                 if (fe0->dvb.frontend != NULL) {
711                         struct dvb_frontend *fe;
712                         struct xc2028_config cfg = {
713                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
714                                 .i2c_addr  = 0x64,
715                         };
716                         static struct xc2028_ctrl ctl = {
717                                 .fname   = XC3028L_DEFAULT_FIRMWARE,
718                                 .max_len = 64,
719                                 .demod   = 5000,
720                                 /* This is true for all demods with
721                                         v36 firmware? */
722                                 .type    = XC2028_D2633,
723                         };
724
725                         fe = dvb_attach(xc2028_attach,
726                                         fe0->dvb.frontend, &cfg);
727                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
728                                 fe->ops.tuner_ops.set_config(fe, &ctl);
729                 }
730                 break;
731         case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
732                 i2c_bus = &dev->i2c_bus[port->nr - 1];
733
734                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
735                                                 &dvico_s5h1409_config,
736                                                 &i2c_bus->i2c_adap);
737                 if (fe0->dvb.frontend == NULL)
738                         fe0->dvb.frontend = dvb_attach(s5h1411_attach,
739                                                         &dvico_s5h1411_config,
740                                                         &i2c_bus->i2c_adap);
741                 if (fe0->dvb.frontend != NULL)
742                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
743                                    &i2c_bus->i2c_adap,
744                                    &dvico_xc5000_tunerconfig);
745                 break;
746         case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
747                 i2c_bus = &dev->i2c_bus[port->nr - 1];
748
749                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
750                                                &dvico_fusionhdtv_xc3028,
751                                                &i2c_bus->i2c_adap);
752                 if (fe0->dvb.frontend != NULL) {
753                         struct dvb_frontend      *fe;
754                         struct xc2028_config      cfg = {
755                                 .i2c_adap  = &i2c_bus->i2c_adap,
756                                 .i2c_addr  = 0x61,
757                         };
758                         static struct xc2028_ctrl ctl = {
759                                 .fname       = XC2028_DEFAULT_FIRMWARE,
760                                 .max_len     = 64,
761                                 .demod       = XC3028_FE_ZARLINK456,
762                         };
763
764                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
765                                         &cfg);
766                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
767                                 fe->ops.tuner_ops.set_config(fe, &ctl);
768                 }
769                 break;
770         }
771         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
772         case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
773         case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
774                 i2c_bus = &dev->i2c_bus[0];
775
776                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
777                         &dvico_fusionhdtv_xc3028,
778                         &i2c_bus->i2c_adap);
779                 if (fe0->dvb.frontend != NULL) {
780                         struct dvb_frontend      *fe;
781                         struct xc2028_config      cfg = {
782                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
783                                 .i2c_addr  = 0x61,
784                         };
785                         static struct xc2028_ctrl ctl = {
786                                 .fname       = XC2028_DEFAULT_FIRMWARE,
787                                 .max_len     = 64,
788                                 .demod       = XC3028_FE_ZARLINK456,
789                         };
790
791                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
792                                 &cfg);
793                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
794                                 fe->ops.tuner_ops.set_config(fe, &ctl);
795                 }
796                 break;
797         case CX23885_BOARD_TBS_6920:
798                 i2c_bus = &dev->i2c_bus[0];
799
800                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
801                         &tbs_cx24116_config,
802                         &i2c_bus->i2c_adap);
803                 if (fe0->dvb.frontend != NULL)
804                         fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
805
806                 break;
807         case CX23885_BOARD_TEVII_S470:
808                 i2c_bus = &dev->i2c_bus[1];
809
810                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
811                         &tevii_cx24116_config,
812                         &i2c_bus->i2c_adap);
813                 if (fe0->dvb.frontend != NULL)
814                         fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
815
816                 break;
817         case CX23885_BOARD_DVBWORLD_2005:
818                 i2c_bus = &dev->i2c_bus[1];
819
820                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
821                         &dvbworld_cx24116_config,
822                         &i2c_bus->i2c_adap);
823                 break;
824         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
825                 i2c_bus = &dev->i2c_bus[0];
826                 switch (port->nr) {
827                 /* port B */
828                 case 1:
829                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
830                                                         &netup_stv0900_config,
831                                                         &i2c_bus->i2c_adap, 0);
832                         if (fe0->dvb.frontend != NULL) {
833                                 if (dvb_attach(stv6110_attach,
834                                                 fe0->dvb.frontend,
835                                                 &netup_stv6110_tunerconfig_a,
836                                                 &i2c_bus->i2c_adap)) {
837                                         if (!dvb_attach(lnbh24_attach,
838                                                         fe0->dvb.frontend,
839                                                         &i2c_bus->i2c_adap,
840                                                         LNBH24_PCL,
841                                                         LNBH24_TTX, 0x09))
842                                                 printk(KERN_ERR
843                                                         "No LNBH24 found!\n");
844
845                                 }
846                         }
847                         break;
848                 /* port C */
849                 case 2:
850                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
851                                                         &netup_stv0900_config,
852                                                         &i2c_bus->i2c_adap, 1);
853                         if (fe0->dvb.frontend != NULL) {
854                                 if (dvb_attach(stv6110_attach,
855                                                 fe0->dvb.frontend,
856                                                 &netup_stv6110_tunerconfig_b,
857                                                 &i2c_bus->i2c_adap)) {
858                                         if (!dvb_attach(lnbh24_attach,
859                                                         fe0->dvb.frontend,
860                                                         &i2c_bus->i2c_adap,
861                                                         LNBH24_PCL,
862                                                         LNBH24_TTX, 0x0a))
863                                                 printk(KERN_ERR
864                                                         "No LNBH24 found!\n");
865
866                                 }
867                         }
868                         break;
869                 }
870                 break;
871         case CX23885_BOARD_MYGICA_X8506:
872                 i2c_bus = &dev->i2c_bus[0];
873                 i2c_bus2 = &dev->i2c_bus[1];
874                 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
875                         &mygica_x8506_lgs8gl5_config,
876                         &i2c_bus->i2c_adap);
877                 if (fe0->dvb.frontend != NULL) {
878                         dvb_attach(xc5000_attach,
879                                 fe0->dvb.frontend,
880                                 &i2c_bus2->i2c_adap,
881                                 &mygica_x8506_xc5000_config);
882                 }
883                 break;
884         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
885                 i2c_bus = &dev->i2c_bus[0];
886                 i2c_bus2 = &dev->i2c_bus[1];
887                 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
888                         &magicpro_prohdtve2_lgs8g75_config,
889                         &i2c_bus->i2c_adap);
890                 if (fe0->dvb.frontend != NULL) {
891                         dvb_attach(xc5000_attach,
892                                 fe0->dvb.frontend,
893                                 &i2c_bus2->i2c_adap,
894                                 &magicpro_prohdtve2_xc5000_config);
895                 }
896                 break;
897         case CX23885_BOARD_HAUPPAUGE_HVR1850:
898                 i2c_bus = &dev->i2c_bus[0];
899                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
900                         &hcw_s5h1411_config,
901                         &i2c_bus->i2c_adap);
902                 if (fe0->dvb.frontend != NULL)
903                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
904                                 0x60, &dev->i2c_bus[0].i2c_adap,
905                                 &hauppauge_tda18271_config);
906                 break;
907
908         default:
909                 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
910                         " isn't supported yet\n",
911                        dev->name);
912                 break;
913         }
914         if (NULL == fe0->dvb.frontend) {
915                 printk(KERN_ERR "%s: frontend initialization failed\n",
916                         dev->name);
917                 return -1;
918         }
919         /* define general-purpose callback pointer */
920         fe0->dvb.frontend->callback = cx23885_tuner_callback;
921
922         /* Put the analog decoder in standby to keep it quiet */
923         call_all(dev, core, s_power, 0);
924
925         if (fe0->dvb.frontend->ops.analog_ops.standby)
926                 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
927
928         /* register everything */
929         ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
930                                         &dev->pci->dev, adapter_nr, 0,
931                                         cx23885_dvb_fe_ioctl_override);
932
933         /* init CI & MAC */
934         switch (dev->board) {
935         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
936                 static struct netup_card_info cinfo;
937
938                 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
939                 memcpy(port->frontends.adapter.proposed_mac,
940                                 cinfo.port[port->nr - 1].mac, 6);
941                 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC="
942                         "%02X:%02X:%02X:%02X:%02X:%02X\n",
943                         port->nr,
944                         port->frontends.adapter.proposed_mac[0],
945                         port->frontends.adapter.proposed_mac[1],
946                         port->frontends.adapter.proposed_mac[2],
947                         port->frontends.adapter.proposed_mac[3],
948                         port->frontends.adapter.proposed_mac[4],
949                         port->frontends.adapter.proposed_mac[5]);
950
951                 netup_ci_init(port);
952                 break;
953                 }
954         }
955
956         return ret;
957 }
958
959 int cx23885_dvb_register(struct cx23885_tsport *port)
960 {
961
962         struct videobuf_dvb_frontend *fe0;
963         struct cx23885_dev *dev = port->dev;
964         int err, i;
965
966         /* Here we need to allocate the correct number of frontends,
967          * as reflected in the cards struct. The reality is that currrently
968          * no cx23885 boards support this - yet. But, if we don't modify this
969          * code then the second frontend would never be allocated (later)
970          * and fail with error before the attach in dvb_register().
971          * Without these changes we risk an OOPS later. The changes here
972          * are for safety, and should provide a good foundation for the
973          * future addition of any multi-frontend cx23885 based boards.
974          */
975         printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
976                 port->num_frontends);
977
978         for (i = 1; i <= port->num_frontends; i++) {
979                 if (videobuf_dvb_alloc_frontend(
980                         &port->frontends, i) == NULL) {
981                         printk(KERN_ERR "%s() failed to alloc\n", __func__);
982                         return -ENOMEM;
983                 }
984
985                 fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
986                 if (!fe0)
987                         err = -EINVAL;
988
989                 dprintk(1, "%s\n", __func__);
990                 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
991                         dev->board,
992                         dev->name,
993                         dev->pci_bus,
994                         dev->pci_slot);
995
996                 err = -ENODEV;
997
998                 /* dvb stuff */
999                 /* We have to init the queue for each frontend on a port. */
1000                 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
1001                 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
1002                             &dev->pci->dev, &port->slock,
1003                             V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
1004                             sizeof(struct cx23885_buffer), port);
1005         }
1006         err = dvb_register(port);
1007         if (err != 0)
1008                 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
1009                         __func__, err);
1010
1011         return err;
1012 }
1013
1014 int cx23885_dvb_unregister(struct cx23885_tsport *port)
1015 {
1016         struct videobuf_dvb_frontend *fe0;
1017
1018         /* FIXME: in an error condition where the we have
1019          * an expected number of frontends (attach problem)
1020          * then this might not clean up correctly, if 1
1021          * is invalid.
1022          * This comment only applies to future boards IF they
1023          * implement MFE support.
1024          */
1025         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
1026         if (fe0->dvb.frontend)
1027                 videobuf_dvb_unregister_bus(&port->frontends);
1028
1029         switch (port->dev->board) {
1030         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1031                 netup_ci_exit(port);
1032                 break;
1033         }
1034
1035         return 0;
1036 }
1037