2 * cx18 driver PCI memory mapped IO access routines
4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
5 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
23 #include "cx18-driver.h"
27 void cx18_memcpy_fromio(struct cx18 *cx, void *to,
28 const void __iomem *from, unsigned int len)
30 /* Align reads on the CX23418's addresses */
31 if ((len > 0) && ((unsigned)from & 1)) {
32 *((u8 *)to) = cx18_readb(cx, from);
37 if ((len > 1) && ((unsigned)from & 2)) {
38 *((u16 *)to) = cx18_raw_readw(cx, from);
44 *((u32 *)to) = cx18_raw_readl(cx, from);
50 *((u16 *)to) = cx18_raw_readw(cx, from);
56 *((u8 *)to) = cx18_readb(cx, from);
59 void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count)
61 u16 val2 = val | (val << 8);
62 u32 val4 = val2 | (val2 << 16);
64 /* Align writes on the CX23418's addresses */
65 if ((count > 0) && ((unsigned)addr & 1)) {
66 cx18_writeb(cx, (u8) val, addr);
70 if ((count > 1) && ((unsigned)addr & 2)) {
71 cx18_writew(cx, val2, addr);
76 cx18_writel(cx, val4, addr);
81 cx18_writew(cx, val2, addr);
86 cx18_writeb(cx, (u8) val, addr);
89 void cx18_sw1_irq_enable(struct cx18 *cx, u32 val)
92 cx18_write_reg(cx, val, SW1_INT_STATUS);
93 r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI);
94 cx18_write_reg(cx, r | val, SW1_INT_ENABLE_PCI);
97 void cx18_sw1_irq_disable(struct cx18 *cx, u32 val)
100 r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI);
101 cx18_write_reg(cx, r & ~val, SW1_INT_ENABLE_PCI);
104 void cx18_sw2_irq_enable(struct cx18 *cx, u32 val)
107 cx18_write_reg(cx, val, SW2_INT_STATUS);
108 r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI);
109 cx18_write_reg(cx, r | val, SW2_INT_ENABLE_PCI);
112 void cx18_sw2_irq_disable(struct cx18 *cx, u32 val)
115 r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI);
116 cx18_write_reg(cx, r & ~val, SW2_INT_ENABLE_PCI);
119 void cx18_setup_page(struct cx18 *cx, u32 addr)
122 val = cx18_read_reg(cx, 0xD000F8);
123 val = (val & ~0x1f00) | ((addr >> 17) & 0x1f00);
124 cx18_write_reg(cx, val, 0xD000F8);
127 /* Tries to recover from the CX23418 responding improperly on the PCI bus */
128 int cx18_pci_try_recover(struct cx18 *cx)
132 pci_read_config_word(cx->dev, PCI_STATUS, &status);
133 pci_write_config_word(cx->dev, PCI_STATUS, status);