2 * cx18 driver PCI memory mapped IO access routines
4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
5 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
23 #include "cx18-driver.h"
27 void cx18_memcpy_fromio(struct cx18 *cx, void *to,
28 const void __iomem *from, unsigned int len)
33 /* Align reads on the CX23418's addresses */
34 if ((len > 0) && ((unsigned long) src & 1)) {
35 *dst = cx18_readb(cx, src);
40 if ((len > 1) && ((unsigned long) src & 2)) {
41 *((u16 *)dst) = cx18_raw_readw(cx, src);
47 *((u32 *)dst) = cx18_raw_readl(cx, src);
53 *((u16 *)dst) = cx18_raw_readw(cx, src);
59 *dst = cx18_readb(cx, src);
62 void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count)
65 u16 val2 = val | (val << 8);
66 u32 val4 = val2 | (val2 << 16);
68 /* Align writes on the CX23418's addresses */
69 if ((count > 0) && ((unsigned long)dst & 1)) {
70 cx18_writeb(cx, (u8) val, dst);
74 if ((count > 1) && ((unsigned long)dst & 2)) {
75 cx18_writew(cx, val2, dst);
80 cx18_writel(cx, val4, dst);
85 cx18_writew(cx, val2, dst);
90 cx18_writeb(cx, (u8) val, dst);
93 void cx18_sw1_irq_enable(struct cx18 *cx, u32 val)
96 cx18_write_reg(cx, val, SW1_INT_STATUS);
97 r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI);
98 cx18_write_reg(cx, r | val, SW1_INT_ENABLE_PCI);
101 void cx18_sw1_irq_disable(struct cx18 *cx, u32 val)
104 r = cx18_read_reg(cx, SW1_INT_ENABLE_PCI);
105 cx18_write_reg(cx, r & ~val, SW1_INT_ENABLE_PCI);
108 void cx18_sw2_irq_enable(struct cx18 *cx, u32 val)
111 cx18_write_reg(cx, val, SW2_INT_STATUS);
112 r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI);
113 cx18_write_reg(cx, r | val, SW2_INT_ENABLE_PCI);
116 void cx18_sw2_irq_disable(struct cx18 *cx, u32 val)
119 r = cx18_read_reg(cx, SW2_INT_ENABLE_PCI);
120 cx18_write_reg(cx, r & ~val, SW2_INT_ENABLE_PCI);
123 void cx18_setup_page(struct cx18 *cx, u32 addr)
126 val = cx18_read_reg(cx, 0xD000F8);
127 val = (val & ~0x1f00) | ((addr >> 17) & 0x1f00);
128 cx18_write_reg(cx, val, 0xD000F8);
131 /* Tries to recover from the CX23418 responding improperly on the PCI bus */
132 int cx18_pci_try_recover(struct cx18 *cx)
136 pci_read_config_word(cx->dev, PCI_STATUS, &status);
137 pci_write_config_word(cx->dev, PCI_STATUS, status);