fc87dfa96597be97b4d209b42ed607a34e2af5b9
[safe/jmp/linux-2.6] / drivers / media / dvb / frontends / stv090x.c
1 /*
2         STV0900/0903 Multistandard Broadcast Frontend driver
3         Copyright (C) Manu Abraham <abraham.manu@gmail.com>
4
5         Copyright (C) ST Microelectronics
6
7         This program is free software; you can redistribute it and/or modify
8         it under the terms of the GNU General Public License as published by
9         the Free Software Foundation; either version 2 of the License, or
10         (at your option) any later version.
11
12         This program is distributed in the hope that it will be useful,
13         but WITHOUT ANY WARRANTY; without even the implied warranty of
14         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15         GNU General Public License for more details.
16
17         You should have received a copy of the GNU General Public License
18         along with this program; if not, write to the Free Software
19         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/mutex.h>
27
28 #include <linux/dvb/frontend.h>
29 #include "dvb_frontend.h"
30
31 #include "stv6110x.h" /* for demodulator internal modes */
32
33 #include "stv090x_reg.h"
34 #include "stv090x.h"
35 #include "stv090x_priv.h"
36
37 static unsigned int verbose;
38 module_param(verbose, int, 0644);
39
40 struct mutex demod_lock;
41
42 /* DVBS1 and DSS C/N Lookup table */
43 static const struct stv090x_tab stv090x_s1cn_tab[] = {
44         {   0, 8917 }, /*  0.0dB */
45         {   5, 8801 }, /*  0.5dB */
46         {  10, 8667 }, /*  1.0dB */
47         {  15, 8522 }, /*  1.5dB */
48         {  20, 8355 }, /*  2.0dB */
49         {  25, 8175 }, /*  2.5dB */
50         {  30, 7979 }, /*  3.0dB */
51         {  35, 7763 }, /*  3.5dB */
52         {  40, 7530 }, /*  4.0dB */
53         {  45, 7282 }, /*  4.5dB */
54         {  50, 7026 }, /*  5.0dB */
55         {  55, 6781 }, /*  5.5dB */
56         {  60, 6514 }, /*  6.0dB */
57         {  65, 6241 }, /*  6.5dB */
58         {  70, 5965 }, /*  7.0dB */
59         {  75, 5690 }, /*  7.5dB */
60         {  80, 5424 }, /*  8.0dB */
61         {  85, 5161 }, /*  8.5dB */
62         {  90, 4902 }, /*  9.0dB */
63         {  95, 4654 }, /*  9.5dB */
64         { 100, 4417 }, /* 10.0dB */
65         { 105, 4186 }, /* 10.5dB */
66         { 110, 3968 }, /* 11.0dB */
67         { 115, 3757 }, /* 11.5dB */
68         { 120, 3558 }, /* 12.0dB */
69         { 125, 3366 }, /* 12.5dB */
70         { 130, 3185 }, /* 13.0dB */
71         { 135, 3012 }, /* 13.5dB */
72         { 140, 2850 }, /* 14.0dB */
73         { 145, 2698 }, /* 14.5dB */
74         { 150, 2550 }, /* 15.0dB */
75         { 160, 2283 }, /* 16.0dB */
76         { 170, 2042 }, /* 17.0dB */
77         { 180, 1827 }, /* 18.0dB */
78         { 190, 1636 }, /* 19.0dB */
79         { 200, 1466 }, /* 20.0dB */
80         { 210, 1315 }, /* 21.0dB */
81         { 220, 1181 }, /* 22.0dB */
82         { 230, 1064 }, /* 23.0dB */
83         { 240,  960 }, /* 24.0dB */
84         { 250,  869 }, /* 25.0dB */
85         { 260,  792 }, /* 26.0dB */
86         { 270,  724 }, /* 27.0dB */
87         { 280,  665 }, /* 28.0dB */
88         { 290,  616 }, /* 29.0dB */
89         { 300,  573 }, /* 30.0dB */
90         { 310,  537 }, /* 31.0dB */
91         { 320,  507 }, /* 32.0dB */
92         { 330,  483 }, /* 33.0dB */
93         { 400,  398 }, /* 40.0dB */
94         { 450,  381 }, /* 45.0dB */
95         { 500,  377 }  /* 50.0dB */
96 };
97
98 /* DVBS2 C/N Lookup table */
99 static const struct stv090x_tab stv090x_s2cn_tab[] = {
100         { -30, 13348 }, /* -3.0dB */
101         { -20, 12640 }, /* -2d.0B */
102         { -10, 11883 }, /* -1.0dB */
103         {   0, 11101 }, /* -0.0dB */
104         {   5, 10718 }, /*  0.5dB */
105         {  10, 10339 }, /*  1.0dB */
106         {  15,  9947 }, /*  1.5dB */
107         {  20,  9552 }, /*  2.0dB */
108         {  25,  9183 }, /*  2.5dB */
109         {  30,  8799 }, /*  3.0dB */
110         {  35,  8422 }, /*  3.5dB */
111         {  40,  8062 }, /*  4.0dB */
112         {  45,  7707 }, /*  4.5dB */
113         {  50,  7353 }, /*  5.0dB */
114         {  55,  7025 }, /*  5.5dB */
115         {  60,  6684 }, /*  6.0dB */
116         {  65,  6331 }, /*  6.5dB */
117         {  70,  6036 }, /*  7.0dB */
118         {  75,  5727 }, /*  7.5dB */
119         {  80,  5437 }, /*  8.0dB */
120         {  85,  5164 }, /*  8.5dB */
121         {  90,  4902 }, /*  9.0dB */
122         {  95,  4653 }, /*  9.5dB */
123         { 100,  4408 }, /* 10.0dB */
124         { 105,  4187 }, /* 10.5dB */
125         { 110,  3961 }, /* 11.0dB */
126         { 115,  3751 }, /* 11.5dB */
127         { 120,  3558 }, /* 12.0dB */
128         { 125,  3368 }, /* 12.5dB */
129         { 130,  3191 }, /* 13.0dB */
130         { 135,  3017 }, /* 13.5dB */
131         { 140,  2862 }, /* 14.0dB */
132         { 145,  2710 }, /* 14.5dB */
133         { 150,  2565 }, /* 15.0dB */
134         { 160,  2300 }, /* 16.0dB */
135         { 170,  2058 }, /* 17.0dB */
136         { 180,  1849 }, /* 18.0dB */
137         { 190,  1663 }, /* 19.0dB */
138         { 200,  1495 }, /* 20.0dB */
139         { 210,  1349 }, /* 21.0dB */
140         { 220,  1222 }, /* 22.0dB */
141         { 230,  1110 }, /* 23.0dB */
142         { 240,  1011 }, /* 24.0dB */
143         { 250,   925 }, /* 25.0dB */
144         { 260,   853 }, /* 26.0dB */
145         { 270,   789 }, /* 27.0dB */
146         { 280,   734 }, /* 28.0dB */
147         { 290,   690 }, /* 29.0dB */
148         { 300,   650 }, /* 30.0dB */
149         { 310,   619 }, /* 31.0dB */
150         { 320,   593 }, /* 32.0dB */
151         { 330,   571 }, /* 33.0dB */
152         { 400,   498 }, /* 40.0dB */
153         { 450,   484 }, /* 45.0dB */
154         { 500,   481 }  /* 50.0dB */
155 };
156
157 /* RF level C/N lookup table */
158 static const struct stv090x_tab stv090x_rf_tab[] = {
159         {  -5, 0xcaa1 }, /*  -5dBm */
160         { -10, 0xc229 }, /* -10dBm */
161         { -15, 0xbb08 }, /* -15dBm */
162         { -20, 0xb4bc }, /* -20dBm */
163         { -25, 0xad5a }, /* -25dBm */
164         { -30, 0xa298 }, /* -30dBm */
165         { -35, 0x98a8 }, /* -35dBm */
166         { -40, 0x8389 }, /* -40dBm */
167         { -45, 0x59be }, /* -45dBm */
168         { -50, 0x3a14 }, /* -50dBm */
169         { -55, 0x2d11 }, /* -55dBm */
170         { -60, 0x210d }, /* -60dBm */
171         { -65, 0xa14f }, /* -65dBm */
172         { -70, 0x07aa }  /* -70dBm */
173 };
174
175
176 static struct stv090x_reg stv0900_initval[] = {
177
178         { STV090x_OUTCFG,               0x00 },
179         { STV090x_MODECFG,              0xff },
180         { STV090x_AGCRF1CFG,            0x11 },
181         { STV090x_AGCRF2CFG,            0x13 },
182         { STV090x_TSGENERAL1X,          0x14 },
183         { STV090x_TSTTNR2,              0x21 },
184         { STV090x_TSTTNR4,              0x21 },
185         { STV090x_P2_DISTXCTL,          0x22 },
186         { STV090x_P2_F22TX,             0xc0 },
187         { STV090x_P2_F22RX,             0xc0 },
188         { STV090x_P2_DISRXCTL,          0x00 },
189         { STV090x_P2_DMDCFGMD,          0xF9 },
190         { STV090x_P2_DEMOD,             0x08 },
191         { STV090x_P2_DMDCFG3,           0xc4 },
192         { STV090x_P2_CARFREQ,           0xed },
193         { STV090x_P2_LDT,               0xd0 },
194         { STV090x_P2_LDT2,              0xb8 },
195         { STV090x_P2_TMGCFG,            0xd2 },
196         { STV090x_P2_TMGTHRISE,         0x20 },
197         { STV090x_P1_TMGCFG,            0xd2 },
198
199         { STV090x_P2_TMGTHFALL,         0x00 },
200         { STV090x_P2_FECSPY,            0x88 },
201         { STV090x_P2_FSPYDATA,          0x3a },
202         { STV090x_P2_FBERCPT4,          0x00 },
203         { STV090x_P2_FSPYBER,           0x10 },
204         { STV090x_P2_ERRCTRL1,          0x35 },
205         { STV090x_P2_ERRCTRL2,          0xc1 },
206         { STV090x_P2_CFRICFG,           0xf8 },
207         { STV090x_P2_NOSCFG,            0x1c },
208         { STV090x_P2_DMDTOM,            0x20 },
209         { STV090x_P2_CORRELMANT,        0x70 },
210         { STV090x_P2_CORRELABS,         0x88 },
211         { STV090x_P2_AGC2O,             0x5b },
212         { STV090x_P2_AGC2REF,           0x38 },
213         { STV090x_P2_CARCFG,            0xe4 },
214         { STV090x_P2_ACLC,              0x1A },
215         { STV090x_P2_BCLC,              0x09 },
216         { STV090x_P2_CARHDR,            0x08 },
217         { STV090x_P2_KREFTMG,           0xc1 },
218         { STV090x_P2_SFRUPRATIO,        0xf0 },
219         { STV090x_P2_SFRLOWRATIO,       0x70 },
220         { STV090x_P2_SFRSTEP,           0x58 },
221         { STV090x_P2_TMGCFG2,           0x01 },
222         { STV090x_P2_CAR2CFG,           0x26 },
223         { STV090x_P2_BCLC2S2Q,          0x86 },
224         { STV090x_P2_BCLC2S28,          0x86 },
225         { STV090x_P2_SMAPCOEF7,         0x77 },
226         { STV090x_P2_SMAPCOEF6,         0x85 },
227         { STV090x_P2_SMAPCOEF5,         0x77 },
228         { STV090x_P2_TSCFGL,            0x20 },
229         { STV090x_P2_DMDCFG2,           0x3b },
230         { STV090x_P2_MODCODLST0,        0xff },
231         { STV090x_P2_MODCODLST1,        0xff },
232         { STV090x_P2_MODCODLST2,        0xff },
233         { STV090x_P2_MODCODLST3,        0xff },
234         { STV090x_P2_MODCODLST4,        0xff },
235         { STV090x_P2_MODCODLST5,        0xff },
236         { STV090x_P2_MODCODLST6,        0xff },
237         { STV090x_P2_MODCODLST7,        0xcc },
238         { STV090x_P2_MODCODLST8,        0xcc },
239         { STV090x_P2_MODCODLST9,        0xcc },
240         { STV090x_P2_MODCODLSTA,        0xcc },
241         { STV090x_P2_MODCODLSTB,        0xcc },
242         { STV090x_P2_MODCODLSTC,        0xcc },
243         { STV090x_P2_MODCODLSTD,        0xcc },
244         { STV090x_P2_MODCODLSTE,        0xcc },
245         { STV090x_P2_MODCODLSTF,        0xcf },
246         { STV090x_P1_DISTXCTL,          0x22 },
247         { STV090x_P1_F22TX,             0xc0 },
248         { STV090x_P1_F22RX,             0xc0 },
249         { STV090x_P1_DISRXCTL,          0x00 },
250         { STV090x_P1_DMDCFGMD,          0xf9 },
251         { STV090x_P1_DEMOD,             0x08 },
252         { STV090x_P1_DMDCFG3,           0xc4 },
253         { STV090x_P1_DMDTOM,            0x20 },
254         { STV090x_P1_CARFREQ,           0xed },
255         { STV090x_P1_LDT,               0xd0 },
256         { STV090x_P1_LDT2,              0xb8 },
257         { STV090x_P1_TMGCFG,            0xd2 },
258         { STV090x_P1_TMGTHRISE,         0x20 },
259         { STV090x_P1_TMGTHFALL,         0x00 },
260         { STV090x_P1_SFRUPRATIO,        0xf0 },
261         { STV090x_P1_SFRLOWRATIO,       0x70 },
262         { STV090x_P1_TSCFGL,            0x20 },
263         { STV090x_P1_FECSPY,            0x88 },
264         { STV090x_P1_FSPYDATA,          0x3a },
265         { STV090x_P1_FBERCPT4,          0x00 },
266         { STV090x_P1_FSPYBER,           0x10 },
267         { STV090x_P1_ERRCTRL1,          0x35 },
268         { STV090x_P1_ERRCTRL2,          0xc1 },
269         { STV090x_P1_CFRICFG,           0xf8 },
270         { STV090x_P1_NOSCFG,            0x1c },
271         { STV090x_P1_CORRELMANT,        0x70 },
272         { STV090x_P1_CORRELABS,         0x88 },
273         { STV090x_P1_AGC2O,             0x5b },
274         { STV090x_P1_AGC2REF,           0x38 },
275         { STV090x_P1_CARCFG,            0xe4 },
276         { STV090x_P1_ACLC,              0x1A },
277         { STV090x_P1_BCLC,              0x09 },
278         { STV090x_P1_CARHDR,            0x08 },
279         { STV090x_P1_KREFTMG,           0xc1 },
280         { STV090x_P1_SFRSTEP,           0x58 },
281         { STV090x_P1_TMGCFG2,           0x01 },
282         { STV090x_P1_CAR2CFG,           0x26 },
283         { STV090x_P1_BCLC2S2Q,          0x86 },
284         { STV090x_P1_BCLC2S28,          0x86 },
285         { STV090x_P1_SMAPCOEF7,         0x77 },
286         { STV090x_P1_SMAPCOEF6,         0x85 },
287         { STV090x_P1_SMAPCOEF5,         0x77 },
288         { STV090x_P1_DMDCFG2,           0x3b },
289         { STV090x_P1_MODCODLST0,        0xff },
290         { STV090x_P1_MODCODLST1,        0xff },
291         { STV090x_P1_MODCODLST2,        0xff },
292         { STV090x_P1_MODCODLST3,        0xff },
293         { STV090x_P1_MODCODLST4,        0xff },
294         { STV090x_P1_MODCODLST5,        0xff },
295         { STV090x_P1_MODCODLST6,        0xff },
296         { STV090x_P1_MODCODLST7,        0xcc },
297         { STV090x_P1_MODCODLST8,        0xcc },
298         { STV090x_P1_MODCODLST9,        0xcc },
299         { STV090x_P1_MODCODLSTA,        0xcc },
300         { STV090x_P1_MODCODLSTB,        0xcc },
301         { STV090x_P1_MODCODLSTC,        0xcc },
302         { STV090x_P1_MODCODLSTD,        0xcc },
303         { STV090x_P1_MODCODLSTE,        0xcc },
304         { STV090x_P1_MODCODLSTF,        0xcf },
305         { STV090x_GENCFG,               0x1d },
306         { STV090x_NBITER_NF4,           0x37 },
307         { STV090x_NBITER_NF5,           0x29 },
308         { STV090x_NBITER_NF6,           0x37 },
309         { STV090x_NBITER_NF7,           0x33 },
310         { STV090x_NBITER_NF8,           0x31 },
311         { STV090x_NBITER_NF9,           0x2f },
312         { STV090x_NBITER_NF10,          0x39 },
313         { STV090x_NBITER_NF11,          0x3a },
314         { STV090x_NBITER_NF12,          0x29 },
315         { STV090x_NBITER_NF13,          0x37 },
316         { STV090x_NBITER_NF14,          0x33 },
317         { STV090x_NBITER_NF15,          0x2f },
318         { STV090x_NBITER_NF16,          0x39 },
319         { STV090x_NBITER_NF17,          0x3a },
320         { STV090x_NBITERNOERR,          0x04 },
321         { STV090x_GAINLLR_NF4,          0x0C },
322         { STV090x_GAINLLR_NF5,          0x0F },
323         { STV090x_GAINLLR_NF6,          0x11 },
324         { STV090x_GAINLLR_NF7,          0x14 },
325         { STV090x_GAINLLR_NF8,          0x17 },
326         { STV090x_GAINLLR_NF9,          0x19 },
327         { STV090x_GAINLLR_NF10,         0x20 },
328         { STV090x_GAINLLR_NF11,         0x21 },
329         { STV090x_GAINLLR_NF12,         0x0D },
330         { STV090x_GAINLLR_NF13,         0x0F },
331         { STV090x_GAINLLR_NF14,         0x13 },
332         { STV090x_GAINLLR_NF15,         0x1A },
333         { STV090x_GAINLLR_NF16,         0x1F },
334         { STV090x_GAINLLR_NF17,         0x21 },
335         { STV090x_RCCFGH,               0x20 },
336         { STV090x_P1_FECM,              0x01 }, /* disable DSS modes */
337         { STV090x_P2_FECM,              0x01 }, /* disable DSS modes */
338         { STV090x_P1_PRVIT,             0x2F }, /* disable PR 6/7 */
339         { STV090x_P2_PRVIT,             0x2F }, /* disable PR 6/7 */
340 };
341
342 static struct stv090x_reg stv0903_initval[] = {
343         { STV090x_OUTCFG,               0x00 },
344         { STV090x_AGCRF1CFG,            0x11 },
345         { STV090x_STOPCLK1,             0x48 },
346         { STV090x_STOPCLK2,             0x14 },
347         { STV090x_TSTTNR1,              0x27 },
348         { STV090x_TSTTNR2,              0x21 },
349         { STV090x_P1_DISTXCTL,          0x22 },
350         { STV090x_P1_F22TX,             0xc0 },
351         { STV090x_P1_F22RX,             0xc0 },
352         { STV090x_P1_DISRXCTL,          0x00 },
353         { STV090x_P1_DMDCFGMD,          0xF9 },
354         { STV090x_P1_DEMOD,             0x08 },
355         { STV090x_P1_DMDCFG3,           0xc4 },
356         { STV090x_P1_CARFREQ,           0xed },
357         { STV090x_P1_TNRCFG2,           0x82 },
358         { STV090x_P1_LDT,               0xd0 },
359         { STV090x_P1_LDT2,              0xb8 },
360         { STV090x_P1_TMGCFG,            0xd2 },
361         { STV090x_P1_TMGTHRISE,         0x20 },
362         { STV090x_P1_TMGTHFALL,         0x00 },
363         { STV090x_P1_SFRUPRATIO,        0xf0 },
364         { STV090x_P1_SFRLOWRATIO,       0x70 },
365         { STV090x_P1_TSCFGL,            0x20 },
366         { STV090x_P1_FECSPY,            0x88 },
367         { STV090x_P1_FSPYDATA,          0x3a },
368         { STV090x_P1_FBERCPT4,          0x00 },
369         { STV090x_P1_FSPYBER,           0x10 },
370         { STV090x_P1_ERRCTRL1,          0x35 },
371         { STV090x_P1_ERRCTRL2,          0xc1 },
372         { STV090x_P1_CFRICFG,           0xf8 },
373         { STV090x_P1_NOSCFG,            0x1c },
374         { STV090x_P1_DMDTOM,            0x20 },
375         { STV090x_P1_CORRELMANT,        0x70 },
376         { STV090x_P1_CORRELABS,         0x88 },
377         { STV090x_P1_AGC2O,             0x5b },
378         { STV090x_P1_AGC2REF,           0x38 },
379         { STV090x_P1_CARCFG,            0xe4 },
380         { STV090x_P1_ACLC,              0x1A },
381         { STV090x_P1_BCLC,              0x09 },
382         { STV090x_P1_CARHDR,            0x08 },
383         { STV090x_P1_KREFTMG,           0xc1 },
384         { STV090x_P1_SFRSTEP,           0x58 },
385         { STV090x_P1_TMGCFG2,           0x01 },
386         { STV090x_P1_CAR2CFG,           0x26 },
387         { STV090x_P1_BCLC2S2Q,          0x86 },
388         { STV090x_P1_BCLC2S28,          0x86 },
389         { STV090x_P1_SMAPCOEF7,         0x77 },
390         { STV090x_P1_SMAPCOEF6,         0x85 },
391         { STV090x_P1_SMAPCOEF5,         0x77 },
392         { STV090x_P1_DMDCFG2,           0x3b },
393         { STV090x_P1_MODCODLST0,        0xff },
394         { STV090x_P1_MODCODLST1,        0xff },
395         { STV090x_P1_MODCODLST2,        0xff },
396         { STV090x_P1_MODCODLST3,        0xff },
397         { STV090x_P1_MODCODLST4,        0xff },
398         { STV090x_P1_MODCODLST5,        0xff },
399         { STV090x_P1_MODCODLST6,        0xff },
400         { STV090x_P1_MODCODLST7,        0xcc },
401         { STV090x_P1_MODCODLST8,        0xcc },
402         { STV090x_P1_MODCODLST9,        0xcc },
403         { STV090x_P1_MODCODLSTA,        0xcc },
404         { STV090x_P1_MODCODLSTB,        0xcc },
405         { STV090x_P1_MODCODLSTC,        0xcc },
406         { STV090x_P1_MODCODLSTD,        0xcc },
407         { STV090x_P1_MODCODLSTE,        0xcc },
408         { STV090x_P1_MODCODLSTF,        0xcf },
409         { STV090x_GENCFG,               0x1c },
410         { STV090x_NBITER_NF4,           0x37 },
411         { STV090x_NBITER_NF5,           0x29 },
412         { STV090x_NBITER_NF6,           0x37 },
413         { STV090x_NBITER_NF7,           0x33 },
414         { STV090x_NBITER_NF8,           0x31 },
415         { STV090x_NBITER_NF9,           0x2f },
416         { STV090x_NBITER_NF10,          0x39 },
417         { STV090x_NBITER_NF11,          0x3a },
418         { STV090x_NBITER_NF12,          0x29 },
419         { STV090x_NBITER_NF13,          0x37 },
420         { STV090x_NBITER_NF14,          0x33 },
421         { STV090x_NBITER_NF15,          0x2f },
422         { STV090x_NBITER_NF16,          0x39 },
423         { STV090x_NBITER_NF17,          0x3a },
424         { STV090x_NBITERNOERR,          0x04 },
425         { STV090x_GAINLLR_NF4,          0x0C },
426         { STV090x_GAINLLR_NF5,          0x0F },
427         { STV090x_GAINLLR_NF6,          0x11 },
428         { STV090x_GAINLLR_NF7,          0x14 },
429         { STV090x_GAINLLR_NF8,          0x17 },
430         { STV090x_GAINLLR_NF9,          0x19 },
431         { STV090x_GAINLLR_NF10,         0x20 },
432         { STV090x_GAINLLR_NF11,         0x21 },
433         { STV090x_GAINLLR_NF12,         0x0D },
434         { STV090x_GAINLLR_NF13,         0x0F },
435         { STV090x_GAINLLR_NF14,         0x13 },
436         { STV090x_GAINLLR_NF15,         0x1A },
437         { STV090x_GAINLLR_NF16,         0x1F },
438         { STV090x_GAINLLR_NF17,         0x21 },
439         { STV090x_RCCFGH,               0x20 },
440         { STV090x_P1_FECM,              0x01 }, /*disable the DSS mode */
441         { STV090x_P1_PRVIT,             0x2f }  /*disable puncture rate 6/7*/
442 };
443
444 static struct stv090x_reg stv0900_cut20_val[] = {
445
446         { STV090x_P2_DMDCFG3,           0xe8 },
447         { STV090x_P2_DMDCFG4,           0x10 },
448         { STV090x_P2_CARFREQ,           0x38 },
449         { STV090x_P2_CARHDR,            0x20 },
450         { STV090x_P2_KREFTMG,           0x5a },
451         { STV090x_P2_SMAPCOEF7,         0x06 },
452         { STV090x_P2_SMAPCOEF6,         0x00 },
453         { STV090x_P2_SMAPCOEF5,         0x04 },
454         { STV090x_P2_NOSCFG,            0x0c },
455         { STV090x_P1_DMDCFG3,           0xe8 },
456         { STV090x_P1_DMDCFG4,           0x10 },
457         { STV090x_P1_CARFREQ,           0x38 },
458         { STV090x_P1_CARHDR,            0x20 },
459         { STV090x_P1_KREFTMG,           0x5a },
460         { STV090x_P1_SMAPCOEF7,         0x06 },
461         { STV090x_P1_SMAPCOEF6,         0x00 },
462         { STV090x_P1_SMAPCOEF5,         0x04 },
463         { STV090x_P1_NOSCFG,            0x0c },
464         { STV090x_GAINLLR_NF4,          0x21 },
465         { STV090x_GAINLLR_NF5,          0x21 },
466         { STV090x_GAINLLR_NF6,          0x20 },
467         { STV090x_GAINLLR_NF7,          0x1F },
468         { STV090x_GAINLLR_NF8,          0x1E },
469         { STV090x_GAINLLR_NF9,          0x1E },
470         { STV090x_GAINLLR_NF10,         0x1D },
471         { STV090x_GAINLLR_NF11,         0x1B },
472         { STV090x_GAINLLR_NF12,         0x20 },
473         { STV090x_GAINLLR_NF13,         0x20 },
474         { STV090x_GAINLLR_NF14,         0x20 },
475         { STV090x_GAINLLR_NF15,         0x20 },
476         { STV090x_GAINLLR_NF16,         0x20 },
477         { STV090x_GAINLLR_NF17,         0x21 },
478 };
479
480 static struct stv090x_reg stv0903_cut20_val[] = {
481         { STV090x_P1_DMDCFG3,           0xe8 },
482         { STV090x_P1_DMDCFG4,           0x10 },
483         { STV090x_P1_CARFREQ,           0x38 },
484         { STV090x_P1_CARHDR,            0x20 },
485         { STV090x_P1_KREFTMG,           0x5a },
486         { STV090x_P1_SMAPCOEF7,         0x06 },
487         { STV090x_P1_SMAPCOEF6,         0x00 },
488         { STV090x_P1_SMAPCOEF5,         0x04 },
489         { STV090x_P1_NOSCFG,            0x0c },
490         { STV090x_GAINLLR_NF4,          0x21 },
491         { STV090x_GAINLLR_NF5,          0x21 },
492         { STV090x_GAINLLR_NF6,          0x20 },
493         { STV090x_GAINLLR_NF7,          0x1F },
494         { STV090x_GAINLLR_NF8,          0x1E },
495         { STV090x_GAINLLR_NF9,          0x1E },
496         { STV090x_GAINLLR_NF10,         0x1D },
497         { STV090x_GAINLLR_NF11,         0x1B },
498         { STV090x_GAINLLR_NF12,         0x20 },
499         { STV090x_GAINLLR_NF13,         0x20 },
500         { STV090x_GAINLLR_NF14,         0x20 },
501         { STV090x_GAINLLR_NF15,         0x20 },
502         { STV090x_GAINLLR_NF16,         0x20 },
503         { STV090x_GAINLLR_NF17,         0x21 }
504 };
505
506 /* Cut 1.x Long Frame Tracking CR loop */
507 static struct stv090x_long_frame_crloop stv090x_s2_crl[] = {
508         /* MODCOD     2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
509         { STV090x_QPSK_12,  0x1c, 0x0d, 0x1b, 0x2c, 0x3a, 0x1c, 0x2a, 0x3b, 0x2a, 0x1b },
510         { STV090x_QPSK_35,  0x2c, 0x0d, 0x2b, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b, 0x2a, 0x0b },
511         { STV090x_QPSK_23,  0x2c, 0x0d, 0x2b, 0x2c, 0x0b, 0x0c, 0x3a, 0x1b, 0x2a, 0x3a },
512         { STV090x_QPSK_34,  0x3c, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
513         { STV090x_QPSK_45,  0x3c, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
514         { STV090x_QPSK_56,  0x0d, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
515         { STV090x_QPSK_89,  0x0d, 0x0d, 0x3b, 0x1c, 0x1b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
516         { STV090x_QPSK_910, 0x1d, 0x0d, 0x3b, 0x1c, 0x1b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
517         { STV090x_8PSK_35,  0x29, 0x3b, 0x09, 0x2b, 0x38, 0x0b, 0x18, 0x1a, 0x08, 0x0a },
518         { STV090x_8PSK_23,  0x0a, 0x3b, 0x29, 0x2b, 0x19, 0x0b, 0x38, 0x1a, 0x18, 0x0a },
519         { STV090x_8PSK_34,  0x3a, 0x3b, 0x2a, 0x2b, 0x39, 0x0b, 0x19, 0x1a, 0x38, 0x0a },
520         { STV090x_8PSK_56,  0x1b, 0x3b, 0x0b, 0x2b, 0x1a, 0x0b, 0x39, 0x1a, 0x19, 0x0a },
521         { STV090x_8PSK_89,  0x3b, 0x3b, 0x0b, 0x2b, 0x2a, 0x0b, 0x39, 0x1a, 0x29, 0x39 },
522         { STV090x_8PSK_910, 0x3b, 0x3b, 0x0b, 0x2b, 0x2a, 0x0b, 0x39, 0x1a, 0x29, 0x39 }
523 };
524
525 /* Cut 2.0 Long Frame Tracking CR loop */
526 static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
527         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
528         { STV090x_QPSK_12,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
529         { STV090x_QPSK_35,  0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
530         { STV090x_QPSK_23,  0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
531         { STV090x_QPSK_34,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
532         { STV090x_QPSK_45,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
533         { STV090x_QPSK_56,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
534         { STV090x_QPSK_89,  0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
535         { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
536         { STV090x_8PSK_35,  0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
537         { STV090x_8PSK_23,  0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
538         { STV090x_8PSK_34,  0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
539         { STV090x_8PSK_56,  0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
540         { STV090x_8PSK_89,  0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
541         { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
542 };
543
544
545 /* Cut 2.0 Long Frame Tracking CR Loop */
546 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
547         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
548         { STV090x_16APSK_23,  0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
549         { STV090x_16APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
550         { STV090x_16APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
551         { STV090x_16APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
552         { STV090x_16APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
553         { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
554         { STV090x_32APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
555         { STV090x_32APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
556         { STV090x_32APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
557         { STV090x_32APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
558         { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
559 };
560
561
562 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
563         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
564         { STV090x_QPSK_14,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
565         { STV090x_QPSK_13,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
566         { STV090x_QPSK_25,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
567 };
568
569
570 /* Cut 1.2 & 2.0 Short Frame Tracking CR Loop */
571 static struct stv090x_short_frame_crloop stv090x_s2_short_crl[] = {
572         /* MODCOD  2M_cut1.2 2M_cut2.0 5M_cut1.2 5M_cut2.0 10M_cut1.2 10M_cut2.0 20M_cut1.2 20M_cut2.0 30M_cut1.2 30M_cut2.0 */
573         { STV090x_QPSK,   0x3c, 0x2f, 0x2b, 0x2e, 0x0b, 0x0e, 0x3a, 0x0e, 0x2a, 0x3d },
574         { STV090x_8PSK,   0x0b, 0x3e, 0x2a, 0x0e, 0x0a, 0x2d, 0x19, 0x0d, 0x09, 0x3c },
575         { STV090x_16APSK, 0x1b, 0x1e, 0x1b, 0x1e, 0x1b, 0x1e, 0x3a, 0x3d, 0x2a, 0x2d },
576         { STV090x_32APSK, 0x1b, 0x1e, 0x1b, 0x1e, 0x1b, 0x1e, 0x3a, 0x3d, 0x2a, 0x2d }
577 };
578
579
580 static inline s32 comp2(s32 __x, s32 __width)
581 {
582         if (__width == 32)
583                 return __x;
584         else
585                 return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
586 }
587
588 static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
589 {
590         const struct stv090x_config *config = state->config;
591         int ret;
592
593         u8 b0[] = { reg >> 8, reg & 0xff };
594         u8 buf;
595
596         struct i2c_msg msg[] = {
597                 { .addr = config->address, .flags       = 0,            .buf = b0,   .len = 2 },
598                 { .addr = config->address, .flags       = I2C_M_RD,     .buf = &buf, .len = 1 }
599         };
600
601         ret = i2c_transfer(state->i2c, msg, 2);
602         if (ret != 2) {
603                 if (ret != -ERESTARTSYS)
604                         dprintk(FE_ERROR, 1,
605                                 "Read error, Reg=[0x%02x], Status=%d",
606                                 reg, ret);
607
608                 return ret < 0 ? ret : -EREMOTEIO;
609         }
610         if (unlikely(*state->verbose >= FE_DEBUGREG))
611                 dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
612                         reg, buf);
613
614         return (unsigned int) buf;
615 }
616
617 static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
618 {
619         const struct stv090x_config *config = state->config;
620         int ret;
621         u8 buf[2 + count];
622         struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
623
624         buf[0] = reg >> 8;
625         buf[1] = reg & 0xff;
626         memcpy(&buf[2], data, count);
627
628         if (unlikely(*state->verbose >= FE_DEBUGREG)) {
629                 int i;
630
631                 printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
632                 for (i = 0; i < count; i++)
633                         printk(" %02x", data[i]);
634                 printk("\n");
635         }
636
637         ret = i2c_transfer(state->i2c, &i2c_msg, 1);
638         if (ret != 1) {
639                 if (ret != -ERESTARTSYS)
640                         dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
641                                 reg, data[0], count, ret);
642                 return ret < 0 ? ret : -EREMOTEIO;
643         }
644
645         return 0;
646 }
647
648 static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
649 {
650         return stv090x_write_regs(state, reg, &data, 1);
651 }
652
653 static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
654 {
655         struct stv090x_state *state = fe->demodulator_priv;
656         u32 reg;
657
658         reg = STV090x_READ_DEMOD(state, I2CRPT);
659         if (enable) {
660                 dprintk(FE_DEBUG, 1, "Enable Gate");
661                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
662                 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
663                         goto err;
664
665         } else {
666                 dprintk(FE_DEBUG, 1, "Disable Gate");
667                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
668                 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
669                         goto err;
670         }
671         return 0;
672 err:
673         dprintk(FE_ERROR, 1, "I/O error");
674         return -1;
675 }
676
677 static void stv090x_get_lock_tmg(struct stv090x_state *state)
678 {
679         switch (state->algo) {
680         case STV090x_BLIND_SEARCH:
681                 dprintk(FE_DEBUG, 1, "Blind Search");
682                 if (state->srate <= 1500000) {  /*10Msps< SR <=15Msps*/
683                         state->DemodTimeout = 1500;
684                         state->FecTimeout = 400;
685                 } else if (state->srate <= 5000000) {  /*10Msps< SR <=15Msps*/
686                         state->DemodTimeout = 1000;
687                         state->FecTimeout = 300;
688                 } else {  /*SR >20Msps*/
689                         state->DemodTimeout = 700;
690                         state->FecTimeout = 100;
691                 }
692                 break;
693
694         case STV090x_COLD_SEARCH:
695         case STV090x_WARM_SEARCH:
696         default:
697                 dprintk(FE_DEBUG, 1, "Normal Search");
698                 if (state->srate <= 1000000) {  /*SR <=1Msps*/
699                         state->DemodTimeout = 4500;
700                         state->FecTimeout = 1700;
701                 } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
702                         state->DemodTimeout = 2500;
703                         state->FecTimeout = 1100;
704                 } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
705                         state->DemodTimeout = 1000;
706                         state->FecTimeout = 550;
707                 } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
708                         state->DemodTimeout = 700;
709                         state->FecTimeout = 250;
710                 } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
711                         state->DemodTimeout = 400;
712                         state->FecTimeout = 130;
713                 } else {   /*SR >20Msps*/
714                         state->DemodTimeout = 300;
715                         state->FecTimeout = 100;
716                 }
717                 break;
718         }
719
720         if (state->algo == STV090x_WARM_SEARCH)
721                 state->DemodTimeout /= 2;
722 }
723
724 static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
725 {
726         u32 sym;
727
728         if (srate > 60000000) {
729                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
730                 sym /= (state->mclk >> 12);
731         } else if (srate > 6000000) {
732                 sym  = (srate << 6);
733                 sym /= (state->mclk >> 10);
734         } else {
735                 sym  = (srate << 9);
736                 sym /= (state->mclk >> 7);
737         }
738
739         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
740                 goto err;
741         if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
742                 goto err;
743
744         return 0;
745 err:
746         dprintk(FE_ERROR, 1, "I/O error");
747         return -1;
748 }
749
750 static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
751 {
752         u32 sym;
753
754         srate = 105 * (srate / 100);
755         if (srate > 60000000) {
756                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
757                 sym /= (state->mclk >> 12);
758         } else if (srate > 6000000) {
759                 sym  = (srate << 6);
760                 sym /= (state->mclk >> 10);
761         } else {
762                 sym  = (srate << 9);
763                 sym /= (state->mclk >> 7);
764         }
765
766         if (sym < 0x7fff) {
767                 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
768                         goto err;
769                 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
770                         goto err;
771         } else {
772                 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
773                         goto err;
774                 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
775                         goto err;
776         }
777
778         return 0;
779 err:
780         dprintk(FE_ERROR, 1, "I/O error");
781         return -1;
782 }
783
784 static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
785 {
786         u32 sym;
787
788         srate = 95 * (srate / 100);
789         if (srate > 60000000) {
790                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
791                 sym /= (state->mclk >> 12);
792         } else if (srate > 6000000) {
793                 sym  = (srate << 6);
794                 sym /= (state->mclk >> 10);
795         } else {
796                 sym  = (srate << 9);
797                 sym /= (state->mclk >> 7);
798         }
799
800         if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0xff)) < 0) /* MSB */
801                 goto err;
802         if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
803                 goto err;
804         return 0;
805 err:
806         dprintk(FE_ERROR, 1, "I/O error");
807         return -1;
808 }
809
810 static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
811 {
812         u32 ro;
813
814         switch (rolloff) {
815         case STV090x_RO_20:
816                 ro = 20;
817                 break;
818         case STV090x_RO_25:
819                 ro = 25;
820                 break;
821         case STV090x_RO_35:
822         default:
823                 ro = 35;
824                 break;
825         }
826
827         return srate + (srate * ro) / 100;
828 }
829
830 static int stv090x_set_vit_thacq(struct stv090x_state *state)
831 {
832         if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
833                 goto err;
834         if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
835                 goto err;
836         if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
837                 goto err;
838         if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
839                 goto err;
840         if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
841                 goto err;
842         if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
843                 goto err;
844         return 0;
845 err:
846         dprintk(FE_ERROR, 1, "I/O error");
847         return -1;
848 }
849
850 static int stv090x_set_vit_thtracq(struct stv090x_state *state)
851 {
852         if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
853                 goto err;
854         if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
855                 goto err;
856         if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
857                 goto err;
858         if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
859                 goto err;
860         if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
861                 goto err;
862         if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
863                 goto err;
864         return 0;
865 err:
866         dprintk(FE_ERROR, 1, "I/O error");
867         return -1;
868 }
869
870 static int stv090x_set_viterbi(struct stv090x_state *state)
871 {
872         switch (state->search_mode) {
873         case STV090x_SEARCH_AUTO:
874                 if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
875                         goto err;
876                 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
877                         goto err;
878                 break;
879         case STV090x_SEARCH_DVBS1:
880                 if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
881                         goto err;
882                 switch (state->fec) {
883                 case STV090x_PR12:
884                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
885                                 goto err;
886                         break;
887
888                 case STV090x_PR23:
889                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
890                                 goto err;
891                         break;
892
893                 case STV090x_PR34:
894                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
895                                 goto err;
896                         break;
897
898                 case STV090x_PR56:
899                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
900                                 goto err;
901                         break;
902
903                 case STV090x_PR78:
904                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
905                                 goto err;
906                         break;
907
908                 default:
909                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
910                                 goto err;
911                         break;
912                 }
913                 break;
914         case STV090x_SEARCH_DSS:
915                 if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
916                         goto err;
917                 switch (state->fec) {
918                 case STV090x_PR12:
919                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
920                                 goto err;
921                         break;
922
923                 case STV090x_PR23:
924                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
925                                 goto err;
926                         break;
927
928                 case STV090x_PR67:
929                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
930                                 goto err;
931                         break;
932
933                 default:
934                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
935                                 goto err;
936                         break;
937                 }
938                 break;
939         default:
940                 break;
941         }
942         return 0;
943 err:
944         dprintk(FE_ERROR, 1, "I/O error");
945         return -1;
946 }
947
948 static int stv090x_stop_modcod(struct stv090x_state *state)
949 {
950         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
951                 goto err;
952         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
953                 goto err;
954         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
955                 goto err;
956         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
957                 goto err;
958         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
959                 goto err;
960         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
961                 goto err;
962         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
963                 goto err;
964         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
965                 goto err;
966         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
967                 goto err;
968         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
969                 goto err;
970         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
971                 goto err;
972         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
973                 goto err;
974         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
975                 goto err;
976         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
977                 goto err;
978         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
979                 goto err;
980         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
981                 goto err;
982         return 0;
983 err:
984         dprintk(FE_ERROR, 1, "I/O error");
985         return -1;
986 }
987
988 static int stv090x_activate_modcod(struct stv090x_state *state)
989 {
990         u32 matype, modcod, f_mod, index;
991
992         if (state->dev_ver <= 0x11) {
993                 msleep(5);
994                 modcod = STV090x_READ_DEMOD(state, PLHMODCOD);
995                 matype = modcod & 0x03;
996                 modcod = (modcod & 0x7f) >> 2;
997                 index = STV090x_ADDR_OFFST(state, MODCODLSTF) - (modcod / 2);
998
999                 switch (matype) {
1000                 default:
1001                 case 0:
1002                         f_mod = 14;
1003                         break;
1004                 case 1:
1005                         f_mod = 13;
1006                         break;
1007                 case 2:
1008                         f_mod = 11;
1009                         break;
1010                 case 3:
1011                         f_mod = 7;
1012                         break;
1013                 }
1014                 if (matype <= 1) {
1015                         if (modcod % 2) {
1016                                 if (stv090x_write_reg(state, index, 0xf0 | f_mod) < 0)
1017                                         goto err;
1018                         } else {
1019                                 if (stv090x_write_reg(state, index, (f_mod << 4) | 0x0f) < 0)
1020                                         goto err;
1021                         }
1022                 }
1023         } else if (state->dev_ver >= 0x12) {
1024                         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1025                                 goto err;
1026                         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
1027                                 goto err;
1028                         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
1029                                 goto err;
1030                         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
1031                                 goto err;
1032                         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
1033                                 goto err;
1034                         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
1035                                 goto err;
1036                         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
1037                                 goto err;
1038                         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
1039                                 goto err;
1040                         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
1041                                 goto err;
1042                         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
1043                                 goto err;
1044                         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
1045                                 goto err;
1046                         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
1047                                 goto err;
1048                         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
1049                                 goto err;
1050                         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
1051                                 goto err;
1052                         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
1053                                 goto err;
1054                         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
1055                                 goto err;
1056         }
1057         return 0;
1058 err:
1059         dprintk(FE_ERROR, 1, "I/O error");
1060         return -1;
1061 }
1062
1063 static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1064 {
1065         u32 reg;
1066
1067         switch (state->demod) {
1068         case STV090x_DEMODULATOR_0:
1069                 mutex_lock(&demod_lock);
1070                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1071                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1072                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1073                         goto err;
1074                 mutex_unlock(&demod_lock);
1075                 break;
1076
1077         case STV090x_DEMODULATOR_1:
1078                 mutex_lock(&demod_lock);
1079                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1080                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1081                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1082                         goto err;
1083                 mutex_unlock(&demod_lock);
1084                 break;
1085
1086         default:
1087                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
1088                 break;
1089         }
1090         return 0;
1091 err:
1092         mutex_unlock(&demod_lock);
1093         dprintk(FE_ERROR, 1, "I/O error");
1094         return -1;
1095 }
1096
1097 static int stv090x_delivery_search(struct stv090x_state *state)
1098 {
1099         u32 reg;
1100
1101         switch (state->search_mode) {
1102         case STV090x_SEARCH_DVBS1:
1103         case STV090x_SEARCH_DSS:
1104                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1105                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1106                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1107                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1108                         goto err;
1109
1110                 /* Activate Viterbi decoder in legacy search, do not use FRESVIT1, might impact VITERBI2 */
1111                 if (stv090x_vitclk_ctl(state, 0) < 0)
1112                         goto err;
1113
1114                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1115                         goto err;
1116                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1117                         goto err;
1118                 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
1119                         goto err;
1120
1121                 stv090x_set_vit_thacq(state);
1122                 stv090x_set_viterbi(state);
1123                 break;
1124
1125         case STV090x_SEARCH_DVBS2:
1126                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1127                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1128                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1129                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1130                         goto err;
1131                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1132                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1133                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1134                         goto err;
1135
1136                 if (stv090x_vitclk_ctl(state, 1) < 0)
1137                         goto err;
1138
1139                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
1140                         goto err;
1141                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1142                         goto err;
1143                 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1144                         goto err;
1145
1146                 if (state->demod_mode != STV090x_SINGLE) {
1147                         if (state->dev_ver <= 0x11) /* 900 in dual TS mode */
1148                                 stv090x_stop_modcod(state);
1149                         else
1150                                 stv090x_activate_modcod(state);
1151                 }
1152                 break;
1153
1154         case STV090x_SEARCH_AUTO:
1155         default:
1156                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1157                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1158                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1159                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1160                         goto err;
1161                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1162                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1163                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1164                         goto err;
1165
1166                 if (stv090x_vitclk_ctl(state, 0) < 0)
1167                         goto err;
1168
1169                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1170                         goto err;
1171                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1172                         goto err;
1173                 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1174                         goto err;
1175
1176                 if (state->demod_mode != STV090x_SINGLE) {
1177                         if (state->dev_ver <= 0x11) /* 900 in dual TS mode */
1178                                 stv090x_stop_modcod(state);
1179                         else
1180                                 stv090x_activate_modcod(state);
1181                 }
1182                 stv090x_set_vit_thacq(state);
1183                 stv090x_set_viterbi(state);
1184                 break;
1185         }
1186         return 0;
1187 err:
1188         dprintk(FE_ERROR, 1, "I/O error");
1189         return -1;
1190 }
1191
1192 static int stv090x_start_search(struct stv090x_state *state)
1193 {
1194         u32 reg;
1195
1196         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1197         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
1198         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1199                 goto err;
1200
1201         if (state->dev_ver == 0x10) {
1202                 if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0xaa) < 0)
1203                         goto err;
1204         }
1205         if (state->dev_ver < 0x20) {
1206                 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x55) < 0)
1207                         goto err;
1208         }
1209         if (state->srate <= 5000000) {
1210                 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1211                         goto err;
1212                 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
1213                         goto err;
1214                 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0xff) < 0)
1215                         goto err;
1216                 if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
1217                         goto err;
1218                 if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
1219                         goto err;
1220
1221                 /*enlarge the timing bandwith for Low SR*/
1222                 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
1223                         goto err;
1224         } else {
1225                 /* If the symbol rate is >5 Msps
1226                 Set The carrier search up and low to auto mode */
1227                 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1228                         goto err;
1229                 /*reduce the timing bandwith for high SR*/
1230                 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1231                         goto err;
1232         }
1233         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
1234                 goto err;
1235         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1236                 goto err;
1237
1238         if (state->dev_ver >= 0x20) {
1239                 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1240                         goto err;
1241                 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1242                         goto err;
1243
1244                 if ((state->search_mode == STV090x_DVBS1)       ||
1245                         (state->search_mode == STV090x_DSS)     ||
1246                         (state->search_mode == STV090x_SEARCH_AUTO)) {
1247
1248                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1249                                 goto err;
1250                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
1251                                 goto err;
1252                 }
1253         }
1254
1255         if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
1256                 goto err;
1257         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
1258                 goto err;
1259         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
1260                 goto err;
1261
1262         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1263         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1264         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1265         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1266                 goto err;
1267         reg = STV090x_READ_DEMOD(state, DMDCFG2);
1268         STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
1269         if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
1270                 goto err;
1271
1272         if (state->dev_ver >= 0x20) { /*Frequency offset detector setting*/
1273                 if (state->srate < 10000000) {
1274                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
1275                                 goto err;
1276                 } else {
1277                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
1278                                 goto err;
1279                 }
1280         } else {
1281                 if (state->srate < 10000000) {
1282                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
1283                                 goto err;
1284                 } else {
1285                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1286                                 goto err;
1287                 }
1288         }
1289
1290         switch (state->algo) {
1291         case STV090x_WARM_SEARCH:/*The symbol rate and the exact carrier Frequency are known */
1292                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1293                         goto err;
1294                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
1295                         goto err;
1296                 break;
1297
1298         case STV090x_COLD_SEARCH:/*The symbol rate is known*/
1299                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1300                         goto err;
1301                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1302                         goto err;
1303                 break;
1304
1305         default:
1306                 break;
1307         }
1308         return 0;
1309 err:
1310         dprintk(FE_ERROR, 1, "I/O error");
1311         return -1;
1312 }
1313
1314 static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1315 {
1316         u32 agc2_min = 0, agc2 = 0, freq_init, freq_step, reg;
1317         s32 i, j, steps, dir;
1318
1319         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1320                 goto err;
1321         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1322         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1323         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 1);
1324         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1325                 goto err;
1326
1327         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
1328                 goto err;
1329         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1330                 goto err;
1331         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
1332                 goto err;
1333         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1334                 goto err;
1335         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
1336                 goto err;
1337         stv090x_set_srate(state, 1000000);
1338
1339         steps  = -1 + state->search_range / 1000000;
1340         steps /= 2;
1341         steps  = (2 * steps) + 1;
1342         if (steps < 0)
1343                 steps = 1;
1344
1345         dir = 1;
1346         freq_step = (1000000 * 256) / (state->mclk / 256);
1347         freq_init = 0;
1348
1349         for (i = 0; i < steps; i++) {
1350                 if (dir > 0)
1351                         freq_init = freq_init + (freq_step * i);
1352                 else
1353                         freq_init = freq_init - (freq_step * i);
1354
1355                 dir = -1;
1356
1357                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
1358                         goto err;
1359                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
1360                         goto err;
1361                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
1362                         goto err;
1363                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
1364                         goto err;
1365                 msleep(10);
1366                 for (j = 0; j < 10; j++) {
1367                         agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
1368                         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1369                 }
1370                 agc2 /= 10;
1371                 agc2_min = 0xffff;
1372                 if (agc2 < 0xffff)
1373                         agc2_min = agc2;
1374         }
1375
1376         return agc2_min;
1377 err:
1378         dprintk(FE_ERROR, 1, "I/O error");
1379         return -1;
1380 }
1381
1382 static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
1383 {
1384         u8 r3, r2, r1, r0;
1385         s32 srate, int_1, int_2, tmp_1, tmp_2;
1386
1387         r3 = STV090x_READ_DEMOD(state, SFR3);
1388         r2 = STV090x_READ_DEMOD(state, SFR2);
1389         r1 = STV090x_READ_DEMOD(state, SFR1);
1390         r0 = STV090x_READ_DEMOD(state, SFR0);
1391
1392         srate = ((r3 << 24) | (r2 << 16) | (r1 <<  8) | r0);
1393
1394         int_1 = clk >> 16;
1395         int_2 = srate >> 16;
1396
1397         tmp_1 = clk % 0x10000;
1398         tmp_2 = srate % 0x10000;
1399
1400         srate = (int_1 * int_2) +
1401                 ((int_1 * tmp_2) >> 16) +
1402                 ((int_2 * tmp_1) >> 16);
1403
1404         return srate;
1405 }
1406
1407 static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1408 {
1409         struct dvb_frontend *fe = &state->frontend;
1410
1411         int tmg_lock = 0, i;
1412         s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
1413         u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
1414
1415         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1416         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
1417         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1418                 goto err;
1419         if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
1420                 goto err;
1421         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
1422                 goto err;
1423         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
1424                 goto err;
1425         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1426         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1427         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 1);
1428         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1429                 goto err;
1430
1431         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
1432                 goto err;
1433         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1434                 goto err;
1435         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
1436                 goto err;
1437         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1438                 goto err;
1439         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
1440                 goto err;
1441         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0)
1442                 goto err;
1443
1444         if (state->dev_ver >= 0x20) {
1445                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
1446                         goto err;
1447                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
1448                         goto err;
1449         } else {
1450                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1451                         goto err;
1452                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x73) < 0)
1453                         goto err;
1454         }
1455
1456         if (state->srate <= 2000000)
1457                 car_step = 1000;
1458         else if (state->srate <= 5000000)
1459                 car_step = 2000;
1460         else if (state->srate <= 12000000)
1461                 car_step = 3000;
1462         else
1463                 car_step = 5000;
1464
1465         steps  = -1 + ((state->search_range / 1000) / car_step);
1466         steps /= 2;
1467         steps  = (2 * steps) + 1;
1468         if (steps < 0)
1469                 steps = 1;
1470         else if (steps > 10) {
1471                 steps = 11;
1472                 car_step = (state->search_range / 1000) / 10;
1473         }
1474         cur_step = 0;
1475         dir = 1;
1476         freq = state->frequency;
1477
1478         while ((!tmg_lock) && (cur_step < steps)) {
1479                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
1480                         goto err;
1481                 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1482                 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x00); /* trigger acquisition */
1483                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1484                         goto err;
1485                 msleep(50);
1486                 for (i = 0; i < 10; i++) {
1487                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1488                         if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1489                                 tmg_cpt++;
1490                         agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
1491                         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1492                 }
1493                 agc2 /= 10;
1494                 srate_coarse = stv090x_get_srate(state, state->mclk);
1495                 cur_step++;
1496                 dir *= -1;
1497                 if ((tmg_cpt >= 5) && (agc2 < 0x1f00) && (srate_coarse < 55000000) && (srate_coarse > 850000))
1498                         tmg_lock = 1;
1499                 else if (cur_step < steps) {
1500                         if (dir > 0)
1501                                 freq += cur_step * car_step;
1502                         else
1503                                 freq -= cur_step * car_step;
1504
1505                         /* Setup tuner */
1506                         stv090x_i2c_gate_ctrl(fe, 1);
1507
1508                         if (state->config->tuner_set_frequency)
1509                                 state->config->tuner_set_frequency(fe, state->frequency);
1510
1511                         if (state->config->tuner_set_bandwidth)
1512                                 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
1513
1514                         stv090x_i2c_gate_ctrl(fe, 0);
1515                         msleep(50);
1516                         stv090x_i2c_gate_ctrl(fe, 1);
1517
1518                         if (state->config->tuner_get_status)
1519                                 state->config->tuner_get_status(fe, &reg);
1520
1521                         if (reg)
1522                                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1523                         else
1524                                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1525
1526                         stv090x_i2c_gate_ctrl(fe, 0);
1527
1528                 }
1529         }
1530         if (!tmg_lock)
1531                 srate_coarse = 0;
1532         else
1533                 srate_coarse = stv090x_get_srate(state, state->mclk);
1534
1535         return srate_coarse;
1536 err:
1537         dprintk(FE_ERROR, 1, "I/O error");
1538         return -1;
1539 }
1540
1541 static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1542 {
1543         u32 srate_coarse, freq_coarse, sym, reg;
1544
1545         srate_coarse = stv090x_get_srate(state, state->mclk);
1546         freq_coarse  = STV090x_READ_DEMOD(state, CFR2) << 8;
1547         freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1548         sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1549
1550         if (sym < state->srate)
1551                 srate_coarse = 0;
1552         else {
1553                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
1554                         goto err;
1555                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0)
1556                         goto err;
1557                 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1558                         goto err;
1559                 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1560                         goto err;
1561                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
1562                         goto err;
1563                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1564                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
1565                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1566                         goto err;
1567
1568                 if (state->dev_ver >= 0x20) {
1569                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
1570                                 goto err;
1571                 } else {
1572                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1573                                 goto err;
1574                 }
1575
1576                 if (srate_coarse > 3000000) {
1577                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1578                         sym  = (sym / 1000) * 65536;
1579                         sym /= (state->mclk / 1000);
1580                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1581                                 goto err;
1582                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1583                                 goto err;
1584                         sym  = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1585                         sym  = (sym / 1000) * 65536;
1586                         sym /= (state->mclk / 1000);
1587                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1588                                 goto err;
1589                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1590                                 goto err;
1591                         sym  = (srate_coarse / 1000) * 65536;
1592                         sym /= (state->mclk / 1000);
1593                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1594                                 goto err;
1595                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1596                                 goto err;
1597                 } else {
1598                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1599                         sym  = (sym / 100) * 65536;
1600                         sym /= (state->mclk / 100);
1601                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1602                                 goto err;
1603                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1604                                 goto err;
1605                         sym  = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1606                         sym  = (sym / 100) * 65536;
1607                         sym /= (state->mclk / 100);
1608                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1609                                 goto err;
1610                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1611                                 goto err;
1612                         sym  = (srate_coarse / 100) * 65536;
1613                         sym /= (state->mclk / 100);
1614                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1615                                 goto err;
1616                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1617                                 goto err;
1618                 }
1619                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
1620                         goto err;
1621                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
1622                         goto err;
1623                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
1624                         goto err;
1625                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
1626                         goto err;
1627         }
1628
1629         return srate_coarse;
1630
1631 err:
1632         dprintk(FE_ERROR, 1, "I/O error");
1633         return -1;
1634 }
1635
1636 static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
1637 {
1638         s32 timer = 0, lock = 0;
1639         u32 reg;
1640         u8 stat;
1641
1642         while ((timer < timeout) && (!lock)) {
1643                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
1644                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
1645
1646                 switch (stat) {
1647                 case 0: /* searching */
1648                 case 1: /* first PLH detected */
1649                 default:
1650                         dprintk(FE_DEBUG, 1, "Demodulator searching ..");
1651                         lock = 0;
1652                         break;
1653                 case 2: /* DVB-S2 mode */
1654                 case 3: /* DVB-S1/legacy mode */
1655                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1656                         lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
1657                         break;
1658                 }
1659
1660                 if (!lock)
1661                         msleep(10);
1662                 else
1663                         dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
1664
1665                 timer += 10;
1666         }
1667         return lock;
1668 }
1669
1670 static int stv090x_blind_search(struct stv090x_state *state)
1671 {
1672         u32 agc2, reg, srate_coarse;
1673         s32 timeout_dmd = 500, cpt_fail, agc2_ovflw, i;
1674         u8 k_ref, k_max, k_min;
1675         int coarse_fail, lock;
1676
1677         if (state->dev_ver < 0x20) {
1678                 k_max = 233;
1679                 k_min = 143;
1680         } else {
1681                 k_max = 120;
1682                 k_min = 30;
1683         }
1684
1685         agc2 = stv090x_get_agc2_min_level(state);
1686
1687         if (agc2 > STV090x_SEARCH_AGC2_TH) {
1688                 lock = 0;
1689         } else {
1690                 if (state->dev_ver == 0x10) {
1691                         if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0xaa) < 0)
1692                                 goto err;
1693                 }
1694                 if (state->dev_ver < 0x20) {
1695                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x55) < 0)
1696                                 goto err;
1697                 }
1698
1699                 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1700                         goto err;
1701                 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1702                         goto err;
1703                 if (state->dev_ver >= 0x20) {
1704                         if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1705                                 goto err;
1706                         if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1707                                 goto err;
1708                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1709                                 goto err;
1710                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
1711                                 goto err;
1712                 }
1713
1714                 k_ref = k_max;
1715                 do {
1716                         if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
1717                                 goto err;
1718                         if (stv090x_srate_srch_coarse(state) != 0) {
1719                                 srate_coarse = stv090x_srate_srch_fine(state);
1720                                 if (srate_coarse != 0) {
1721                                         stv090x_get_lock_tmg(state);
1722                                         lock = stv090x_get_dmdlock(state, timeout_dmd);
1723                                 } else {
1724                                         lock = 0;
1725                                 }
1726                         } else {
1727                                 cpt_fail = 0;
1728                                 agc2_ovflw = 0;
1729                                 for (i = 0; i < 10; i++) {
1730                                         agc2  = STV090x_READ_DEMOD(state, AGC2I1) << 8;
1731                                         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1732                                         if (agc2 >= 0xff00)
1733                                                 agc2_ovflw++;
1734                                         reg = STV090x_READ_DEMOD(state, DSTATUS2);
1735                                         if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
1736                                             (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
1737
1738                                                 cpt_fail++;
1739                                 }
1740                                 if ((cpt_fail > 7) || (agc2_ovflw > 7))
1741                                         coarse_fail = 1;
1742
1743                                 lock = 0;
1744                         }
1745                         k_ref -= 30;
1746                 } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
1747         }
1748
1749         return lock;
1750
1751 err:
1752         dprintk(FE_ERROR, 1, "I/O error");
1753         return -1;
1754 }
1755
1756 static int stv090x_chk_tmg(struct stv090x_state *state)
1757 {
1758         u32 reg;
1759         s32 tmg_cpt, i;
1760         u8 freq, tmg_thh, tmg_thl;
1761         int tmg_lock;
1762
1763         freq = STV090x_READ_DEMOD(state, CARFREQ);
1764         tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
1765         tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
1766         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1767                 goto err;
1768         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1769                 goto err;
1770
1771         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1772         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
1773         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1774                 goto err;
1775         if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
1776                 goto err;
1777
1778         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
1779                 goto err;
1780         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
1781                 goto err;
1782
1783         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
1784                 goto err;
1785         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1786                 goto err;
1787         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
1788                 goto err;
1789
1790         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
1791                 goto err;
1792         msleep(10);
1793
1794         for (i = 0; i < 10; i++) {
1795                 reg = STV090x_READ_DEMOD(state, DSTATUS);
1796                 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1797                         tmg_cpt++;
1798                 msleep(1);
1799         }
1800         if (tmg_cpt >= 3)
1801                 tmg_lock = 1;
1802
1803         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1804                 goto err;
1805         if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
1806                 goto err;
1807         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
1808                 goto err;
1809
1810         if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
1811                 goto err;
1812         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
1813                 goto err;
1814         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
1815                 goto err;
1816
1817         return  tmg_lock;
1818
1819 err:
1820         dprintk(FE_ERROR, 1, "I/O error");
1821         return -1;
1822 }
1823
1824 static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
1825 {
1826         struct dvb_frontend *fe = &state->frontend;
1827
1828         u32 reg;
1829         s32 car_step, steps, cur_step, dir, freq, timeout_lock;
1830         int lock = 0;
1831
1832         if (state->srate >= 10000000)
1833                 timeout_lock = timeout_dmd / 3;
1834         else
1835                 timeout_lock = timeout_dmd / 2;
1836
1837         lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
1838         if (!lock) {
1839                 if (state->srate >= 10000000) {
1840                         if (stv090x_chk_tmg(state)) {
1841                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1842                                         goto err;
1843                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1844                                         goto err;
1845                                 lock = stv090x_get_dmdlock(state, timeout_dmd);
1846                         } else {
1847                                 lock = 0;
1848                         }
1849                 } else {
1850                         if (state->srate <= 4000000)
1851                                 car_step = 1000;
1852                         else if (state->srate <= 7000000)
1853                                 car_step = 2000;
1854                         else if (state->srate <= 10000000)
1855                                 car_step = 3000;
1856                         else
1857                                 car_step = 5000;
1858
1859                         steps  = (state->search_range / 1000) / car_step;
1860                         steps /= 2;
1861                         steps  = 2 * (steps + 1);
1862                         if (steps < 0)
1863                                 steps = 2;
1864                         else if (steps > 12)
1865                                 steps = 12;
1866
1867                         cur_step = 1;
1868                         dir = 1;
1869
1870                         if (!lock) {
1871                                 freq = state->frequency;
1872                                 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
1873                                 while ((cur_step <= steps) && (!lock)) {
1874                                         if (dir > 0)
1875                                                 freq += cur_step * car_step;
1876                                         else
1877                                                 freq -= cur_step * car_step;
1878
1879                                         /* Setup tuner */
1880                                         stv090x_i2c_gate_ctrl(fe, 1);
1881
1882                                         if (state->config->tuner_set_frequency)
1883                                                 state->config->tuner_set_frequency(fe, state->frequency);
1884
1885                                         if (state->config->tuner_set_bandwidth)
1886                                                 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
1887
1888                                         stv090x_i2c_gate_ctrl(fe, 0);
1889
1890                                         msleep(50);
1891
1892                                         stv090x_i2c_gate_ctrl(fe, 1);
1893
1894                                         if (state->config->tuner_get_status)
1895                                                 state->config->tuner_get_status(fe, &reg);
1896
1897                                         if (reg)
1898                                                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1899                                         else
1900                                                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1901
1902                                         stv090x_i2c_gate_ctrl(fe, 0);
1903
1904                                         STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
1905                                         if (state->delsys == STV090x_DVBS2) {
1906                                                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1907                                                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1908                                                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1909                                                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1910                                                         goto err;
1911                                                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1912                                                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1913                                                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1914                                                         goto err;
1915                                         }
1916                                         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
1917                                                 goto err;
1918                                         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1919                                                 goto err;
1920                                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1921                                                 goto err;
1922                                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1923                                                 goto err;
1924                                         lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
1925
1926                                         dir *= -1;
1927                                         cur_step++;
1928                                 }
1929                         }
1930                 }
1931         }
1932
1933         return lock;
1934
1935 err:
1936         dprintk(FE_ERROR, 1, "I/O error");
1937         return -1;
1938 }
1939
1940 static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
1941 {
1942         s32 timeout, inc, steps_max, srate, car_max;
1943
1944         srate = state->srate;
1945         car_max = state->search_range / 1000;
1946         car_max += car_max / 10;
1947         car_max  = 65536 * (car_max / 2);
1948         car_max /= (state->mclk / 1000);
1949
1950         if (car_max > 0x4000)
1951                 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
1952
1953         inc  = srate;
1954         inc /= state->mclk / 1000;
1955         inc *= 256;
1956         inc *= 256;
1957         inc /= 1000;
1958
1959         switch (state->search_mode) {
1960         case STV090x_SEARCH_DVBS1:
1961         case STV090x_SEARCH_DSS:
1962                 inc *= 3; /* freq step = 3% of srate */
1963                 timeout = 20;
1964                 break;
1965
1966         case STV090x_SEARCH_DVBS2:
1967                 inc *= 4;
1968                 timeout = 25;
1969                 break;
1970
1971         case STV090x_SEARCH_AUTO:
1972         default:
1973                 inc *= 3;
1974                 timeout = 25;
1975                 break;
1976         }
1977         inc /= 100;
1978         if ((inc > car_max) || (inc < 0))
1979                 inc = car_max / 2; /* increment <= 1/8 Mclk */
1980
1981         timeout *= 27500; /* 27.5 Msps reference */
1982         if (srate > 0)
1983                 timeout /= (srate / 1000);
1984
1985         if ((timeout > 100) || (timeout < 0))
1986                 timeout = 100;
1987
1988         steps_max = (car_max / inc) + 1; /* min steps = 3 */
1989         if ((steps_max > 100) || (steps_max < 0)) {
1990                 steps_max = 100; /* max steps <= 100 */
1991                 inc = car_max / steps_max;
1992         }
1993         *freq_inc = inc;
1994         *timeout_sw = timeout;
1995         *steps = steps_max;
1996
1997         return 0;
1998 }
1999
2000 static int stv090x_chk_signal(struct stv090x_state *state)
2001 {
2002         s32 offst_car, agc2, car_max;
2003         int no_signal;
2004
2005         offst_car  = STV090x_READ_DEMOD(state, CFR2) << 8;
2006         offst_car |= STV090x_READ_DEMOD(state, CFR1);
2007         offst_car = comp2(offst_car, 16);
2008
2009         agc2  = STV090x_READ_DEMOD(state, AGC2I1) << 8;
2010         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
2011         car_max = state->search_range / 1000;
2012
2013         car_max += (car_max / 10); /* 10% margin */
2014         car_max  = (65536 * car_max / 2);
2015         car_max /= state->mclk / 1000;
2016
2017         if (car_max > 0x4000)
2018                 car_max = 0x4000;
2019
2020         if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
2021                 no_signal = 1;
2022                 dprintk(FE_DEBUG, 1, "No Signal");
2023         } else {
2024                 no_signal = 0;
2025                 dprintk(FE_DEBUG, 1, "Found Signal");
2026         }
2027
2028         return no_signal;
2029 }
2030
2031 static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
2032 {
2033         int no_signal, lock = 0;
2034         s32 cpt_step, offst_freq, car_max;
2035         u32 reg;
2036
2037         car_max  = state->search_range / 1000;
2038         car_max += (car_max / 10);
2039         car_max  = (65536 * car_max / 2);
2040         car_max /= (state->mclk / 1000);
2041         if (car_max > 0x4000)
2042                 car_max = 0x4000;
2043
2044         if (zigzag)
2045                 offst_freq = 0;
2046         else
2047                 offst_freq = -car_max + inc;
2048
2049         cpt_step = 0;
2050         do {
2051                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2052                         goto err;
2053                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
2054                         goto err;
2055                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
2056                         goto err;
2057                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2058                         goto err;
2059
2060                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2061                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
2062                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2063                         goto err;
2064
2065                 if (state->dev_ver == 0x12) {
2066                         reg = STV090x_READ_DEMOD(state, TSCFGH);
2067                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x1);
2068                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2069                                 goto err;
2070                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x0);
2071                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2072                                 goto err;
2073                 }
2074
2075                 if (zigzag) {
2076                         if (offst_freq >= 0)
2077                                 offst_freq = -offst_freq - 2 * inc;
2078                         else
2079                                 offst_freq = -offst_freq;
2080                 } else {
2081                         offst_freq += 2 * inc;
2082                 }
2083
2084                 cpt_step++;
2085
2086                 lock = stv090x_get_dmdlock(state, timeout);
2087                 no_signal = stv090x_chk_signal(state);
2088
2089         } while ((!lock) &&
2090                  (!no_signal) &&
2091                   ((offst_freq - inc) < car_max) &&
2092                   ((offst_freq + inc) > -car_max) &&
2093                   (cpt_step < steps_max));
2094
2095         reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2096         STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
2097         if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2098                         goto err;
2099
2100         return lock;
2101 err:
2102         dprintk(FE_ERROR, 1, "I/O error");
2103         return -1;
2104 }
2105
2106 static int stv090x_sw_algo(struct stv090x_state *state)
2107 {
2108         int no_signal, zigzag, lock = 0;
2109         u32 reg;
2110
2111         s32 dvbs2_fly_wheel;
2112         s32 inc, timeout_step, trials, steps_max;
2113
2114         stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max); /* get params */
2115
2116         switch (state->search_mode) {
2117         case STV090x_SEARCH_DVBS1:
2118         case STV090x_SEARCH_DSS:
2119                 /* accelerate the frequency detector */
2120                 if (state->dev_ver >= 0x20) {
2121                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2122                                 goto err;
2123                 } else {
2124                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
2125                                 goto err;
2126                 }
2127                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
2128                         goto err;
2129                 zigzag = 0;
2130                 break;
2131
2132         case STV090x_SEARCH_DVBS2:
2133                 if (state->dev_ver >= 0x20) {
2134                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2135                                 goto err;
2136                 } else {
2137                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0)
2138                                 goto err;
2139                 }
2140                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2141                         goto err;
2142                 zigzag = 1;
2143                 break;
2144
2145         case STV090x_SEARCH_AUTO:
2146         default:
2147                 /* accelerate the frequency detector */
2148                 if (state->dev_ver >= 0x20) {
2149                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2150                                 goto err;
2151                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2152                                 goto err;
2153                 } else {
2154                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
2155                                 goto err;
2156                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0)
2157                                 goto err;
2158                 }
2159                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
2160                         goto err;
2161                 zigzag = 0;
2162                 break;
2163         }
2164
2165         trials = 0;
2166         do {
2167                 lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
2168                 no_signal = stv090x_chk_signal(state);
2169                 trials++;
2170
2171                 /*run the SW search 2 times maximum*/
2172                 if (lock || no_signal || (trials == 2)) {
2173                         /*Check if the demod is not losing lock in DVBS2*/
2174                         if (state->dev_ver >= 0x20) {
2175                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2176                                         goto err;
2177                                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
2178                                         goto err;
2179                         } else {
2180                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
2181                                         goto err;
2182                                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x88) < 0)
2183                                         goto err;
2184                         }
2185
2186                         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2187                         if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
2188                                 /*Check if the demod is not losing lock in DVBS2*/
2189                                 msleep(timeout_step);
2190                                 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2191                                 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2192                                 if (dvbs2_fly_wheel < 0xd) {     /*if correct frames is decrementing */
2193                                         msleep(timeout_step);
2194                                         reg = STV090x_READ_DEMOD(state, DMDFLYW);
2195                                         dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2196                                 }
2197                                 if (dvbs2_fly_wheel < 0xd) {
2198                                         /*FALSE lock, The demod is loosing lock */
2199                                         lock = 0;
2200                                         if (trials < 2) {
2201                                                 if (state->dev_ver >= 0x20) {
2202                                                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2203                                                                 goto err;
2204                                                 } else {
2205                                                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0)
2206                                                                 goto err;
2207                                                 }
2208                                                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2209                                                         goto err;
2210                                         }
2211                                 }
2212                         }
2213                 }
2214         } while ((!lock) && (trials < 2) && (!no_signal));
2215
2216         return lock;
2217 err:
2218         dprintk(FE_ERROR, 1, "I/O error");
2219         return -1;
2220 }
2221
2222 static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
2223 {
2224         u32 reg;
2225         enum stv090x_delsys delsys;
2226
2227         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2228         if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
2229                 delsys = STV090x_DVBS2;
2230         else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
2231                 reg = STV090x_READ_DEMOD(state, FECM);
2232                 if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
2233                         delsys = STV090x_DSS;
2234                 else
2235                         delsys = STV090x_DVBS1;
2236         } else {
2237                 delsys = STV090x_ERROR;
2238         }
2239
2240         return delsys;
2241 }
2242
2243 /* in Hz */
2244 static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2245 {
2246         s32 derot, int_1, int_2, tmp_1, tmp_2;
2247
2248         derot  = STV090x_READ_DEMOD(state, CFR2) << 16;
2249         derot |= STV090x_READ_DEMOD(state, CFR1) <<  8;
2250         derot |= STV090x_READ_DEMOD(state, CFR0);
2251
2252         derot = comp2(derot, 24);
2253         int_1 = state->mclk >> 12;
2254         int_2 = derot >> 12;
2255
2256         /* carrier_frequency = MasterClock * Reg / 2^24 */
2257         tmp_1 = state->mclk % 0x1000;
2258         tmp_2 = derot % 0x1000;
2259
2260         derot = (int_1 * int_2) +
2261                 ((int_1 * tmp_2) >> 12) +
2262                 ((int_1 * tmp_1) >> 12);
2263
2264         return derot;
2265 }
2266
2267 static int stv090x_get_viterbi(struct stv090x_state *state)
2268 {
2269         u32 reg, rate;
2270
2271         reg = STV090x_READ_DEMOD(state, VITCURPUN);
2272         rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
2273
2274         switch (rate) {
2275         case 13:
2276                 state->fec = STV090x_PR12;
2277                 break;
2278
2279         case 18:
2280                 state->fec = STV090x_PR23;
2281                 break;
2282
2283         case 21:
2284                 state->fec = STV090x_PR34;
2285                 break;
2286
2287         case 24:
2288                 state->fec = STV090x_PR56;
2289                 break;
2290
2291         case 25:
2292                 state->fec = STV090x_PR67;
2293                 break;
2294
2295         case 26:
2296                 state->fec = STV090x_PR78;
2297                 break;
2298
2299         default:
2300                 state->fec = STV090x_PRERR;
2301                 break;
2302         }
2303
2304         return 0;
2305 }
2306
2307 static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
2308 {
2309         struct dvb_frontend *fe = &state->frontend;
2310
2311         u8 tmg;
2312         u32 reg;
2313         s32 i = 0, offst_freq;
2314
2315         msleep(5);
2316
2317         if (state->algo == STV090x_BLIND_SEARCH) {
2318                 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2319                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
2320                 while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
2321                         tmg = STV090x_READ_DEMOD(state, TMGREG2);
2322                         msleep(5);
2323                         i += 5;
2324                 }
2325         }
2326         state->delsys = stv090x_get_std(state);
2327
2328         stv090x_i2c_gate_ctrl(fe, 1);
2329
2330         if (state->config->tuner_get_frequency)
2331                 state->config->tuner_get_frequency(fe, &state->frequency);
2332
2333         stv090x_i2c_gate_ctrl(fe, 0);
2334
2335         offst_freq = stv090x_get_car_freq(state, state->mclk) / 1000;
2336         state->frequency += offst_freq;
2337         stv090x_get_viterbi(state);
2338         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2339         state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2340         state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2341         state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
2342         reg = STV090x_READ_DEMOD(state, TMGOBS);
2343         state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2344         reg = STV090x_READ_DEMOD(state, FECM);
2345         state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
2346
2347         if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
2348
2349                 stv090x_i2c_gate_ctrl(fe, 1);
2350
2351                 if (state->config->tuner_get_frequency)
2352                         state->config->tuner_get_frequency(fe, &state->frequency);
2353
2354                 stv090x_i2c_gate_ctrl(fe, 0);
2355
2356                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2357                         return STV090x_RANGEOK;
2358                 else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
2359                         return STV090x_RANGEOK;
2360                 else
2361                         return STV090x_OUTOFRANGE; /* Out of Range */
2362         } else {
2363                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2364                         return STV090x_RANGEOK;
2365                 else
2366                         return STV090x_OUTOFRANGE;
2367         }
2368
2369         return STV090x_OUTOFRANGE;
2370 }
2371
2372 static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
2373 {
2374         s32 offst_tmg;
2375
2376         offst_tmg  = STV090x_READ_DEMOD(state, TMGREG2) << 16;
2377         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) <<  8;
2378         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
2379
2380         offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
2381         if (!offst_tmg)
2382                 offst_tmg = 1;
2383
2384         offst_tmg  = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
2385         offst_tmg /= 320;
2386
2387         return offst_tmg;
2388 }
2389
2390 static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
2391 {
2392         u8 aclc = 0x29;
2393         s32 i;
2394         struct stv090x_long_frame_crloop *car_loop;
2395
2396         if (state->dev_ver <= 0x12)
2397                 car_loop = stv090x_s2_crl;
2398         else if (state->dev_ver == 0x20)
2399                 car_loop = stv090x_s2_crl_cut20;
2400         else
2401                 car_loop = stv090x_s2_crl;
2402
2403
2404         if (modcod < STV090x_QPSK_12) {
2405                 i = 0;
2406                 while ((i < 3) && (modcod != stv090x_s2_lowqpsk_crl_cut20[i].modcod))
2407                         i++;
2408
2409                 if (i >= 3)
2410                         i = 2;
2411
2412         } else {
2413                 i = 0;
2414                 while ((i < 14) && (modcod != car_loop[i].modcod))
2415                         i++;
2416
2417                 if (i >= 14) {
2418                         i = 0;
2419                         while ((i < 11) && (modcod != stv090x_s2_lowqpsk_crl_cut20[i].modcod))
2420                                 i++;
2421
2422                         if (i >= 11)
2423                                 i = 10;
2424                 }
2425         }
2426
2427         if (modcod <= STV090x_QPSK_25) {
2428                 if (pilots) {
2429                         if (state->srate <= 3000000)
2430                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_2;
2431                         else if (state->srate <= 7000000)
2432                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_5;
2433                         else if (state->srate <= 15000000)
2434                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_10;
2435                         else if (state->srate <= 25000000)
2436                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_20;
2437                         else
2438                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_30;
2439                 } else {
2440                         if (state->srate <= 3000000)
2441                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_2;
2442                         else if (state->srate <= 7000000)
2443                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_5;
2444                         else if (state->srate <= 15000000)
2445                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_10;
2446                         else if (state->srate <= 25000000)
2447                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_20;
2448                         else
2449                                 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_30;
2450                 }
2451
2452         } else if (modcod <= STV090x_8PSK_910) {
2453                 if (pilots) {
2454                         if (state->srate <= 3000000)
2455                                 aclc = car_loop[i].crl_pilots_on_2;
2456                         else if (state->srate <= 7000000)
2457                                 aclc = car_loop[i].crl_pilots_on_5;
2458                         else if (state->srate <= 15000000)
2459                                 aclc = car_loop[i].crl_pilots_on_10;
2460                         else if (state->srate <= 25000000)
2461                                 aclc = car_loop[i].crl_pilots_on_20;
2462                         else
2463                                 aclc = car_loop[i].crl_pilots_on_30;
2464                 } else {
2465                         if (state->srate <= 3000000)
2466                                 aclc = car_loop[i].crl_pilots_off_2;
2467                         else if (state->srate <= 7000000)
2468                                 aclc = car_loop[i].crl_pilots_off_5;
2469                         else if (state->srate <= 15000000)
2470                                 aclc = car_loop[i].crl_pilots_off_10;
2471                         else if (state->srate <= 25000000)
2472                                 aclc = car_loop[i].crl_pilots_off_20;
2473                         else
2474                                 aclc = car_loop[i].crl_pilots_off_30;
2475                 }
2476         } else { /* 16APSK and 32APSK */
2477                 if (state->srate <= 3000000)
2478                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_2;
2479                 else if (state->srate <= 7000000)
2480                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_5;
2481                 else if (state->srate <= 15000000)
2482                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_10;
2483                 else if (state->srate <= 25000000)
2484                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_20;
2485                 else
2486                         aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_30;
2487         }
2488
2489         return aclc;
2490 }
2491
2492 static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2493 {
2494         s32 index = 0;
2495         u8 aclc = 0x0b;
2496
2497         switch (state->modulation) {
2498         case STV090x_QPSK:
2499         default:
2500                 index = 0;
2501                 break;
2502         case STV090x_8PSK:
2503                 index = 1;
2504                 break;
2505         case STV090x_16APSK:
2506                 index = 2;
2507                 break;
2508         case STV090x_32APSK:
2509                 index = 3;
2510                 break;
2511         }
2512
2513         switch (state->dev_ver) {
2514         case 0x20:
2515                 if (state->srate <= 3000000)
2516                         aclc = stv090x_s2_short_crl[index].crl_cut20_2;
2517                 else if (state->srate <= 7000000)
2518                         aclc = stv090x_s2_short_crl[index].crl_cut20_5;
2519                 else if (state->srate <= 15000000)
2520                         aclc = stv090x_s2_short_crl[index].crl_cut20_10;
2521                 else if (state->srate <= 25000000)
2522                         aclc = stv090x_s2_short_crl[index].crl_cut20_20;
2523                 else
2524                         aclc = stv090x_s2_short_crl[index].crl_cut20_30;
2525                 break;
2526
2527         case 0x12:
2528         default:
2529                 if (state->srate <= 3000000)
2530                         aclc = stv090x_s2_short_crl[index].crl_cut12_2;
2531                 else if (state->srate <= 7000000)
2532                         aclc = stv090x_s2_short_crl[index].crl_cut12_5;
2533                 else if (state->srate <= 15000000)
2534                         aclc = stv090x_s2_short_crl[index].crl_cut12_10;
2535                 else if (state->srate <= 25000000)
2536                         aclc = stv090x_s2_short_crl[index].crl_cut12_20;
2537                 else
2538                         aclc = stv090x_s2_short_crl[index].crl_cut12_30;
2539                 break;
2540         }
2541
2542         return aclc;
2543 }
2544
2545 static int stv090x_optimize_track(struct stv090x_state *state)
2546 {
2547         struct dvb_frontend *fe = &state->frontend;
2548
2549         enum stv090x_rolloff rolloff;
2550         enum stv090x_modcod modcod;
2551
2552         s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2553         u32 reg;
2554
2555         srate  = stv090x_get_srate(state, state->mclk);
2556         srate += stv090x_get_tmgoffst(state, srate);
2557
2558         switch (state->delsys) {
2559         case STV090x_DVBS1:
2560         case STV090x_DSS:
2561                 if (state->algo == STV090x_SEARCH_AUTO) {
2562                         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2563                         STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2564                         STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2565                         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2566                                 goto err;
2567                 }
2568                 reg = STV090x_READ_DEMOD(state, DEMOD);
2569                 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
2570                 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x01);
2571                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2572                         goto err;
2573                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
2574                         goto err;
2575                 break;
2576
2577         case STV090x_DVBS2:
2578                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2579                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
2580                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2581                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2582                         goto err;
2583                 if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
2584                         goto err;
2585                 if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
2586                         goto err;
2587                 if (state->frame_len == STV090x_LONG_FRAME) {
2588                         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2589                         modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2590                         pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2591                         aclc = stv090x_optimize_carloop(state, modcod, pilots);
2592                         if (modcod <= STV090x_QPSK_910) {
2593                                 STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
2594                         } else if (modcod <= STV090x_8PSK_910) {
2595                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2596                                         goto err;
2597                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2598                                         goto err;
2599                         }
2600                         if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
2601                                 if (modcod <= STV090x_16APSK_910) {
2602                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2603                                                 goto err;
2604                                         if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2605                                                 goto err;
2606                                 } else {
2607                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2608                                                 goto err;
2609                                         if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2610                                                 goto err;
2611                                 }
2612                         }
2613                 } else {
2614                         /*Carrier loop setting for short frame*/
2615                         aclc = stv090x_optimize_carloop_short(state);
2616                         if (state->modulation == STV090x_QPSK) {
2617                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
2618                                         goto err;
2619                         } else if (state->modulation == STV090x_8PSK) {
2620                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2621                                         goto err;
2622                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2623                                         goto err;
2624                         } else if (state->modulation == STV090x_16APSK) {
2625                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2626                                         goto err;
2627                                 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2628                                         goto err;
2629                         } else if (state->modulation == STV090x_32APSK)  {
2630                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2631                                         goto err;
2632                                 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2633                                         goto err;
2634                         }
2635                 }
2636                 if (state->dev_ver <= 0x11) {
2637                         if (state->demod_mode != STV090x_SINGLE)
2638                                 stv090x_activate_modcod(state); /* link to LDPC after demod LOCK */
2639                 }
2640                 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
2641                 break;
2642
2643         case STV090x_UNKNOWN:
2644         default:
2645                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2646                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2647                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2648                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2649                         goto err;
2650                 break;
2651         }
2652
2653         f_1 = STV090x_READ_DEMOD(state, CFR2);
2654         f_0 = STV090x_READ_DEMOD(state, CFR1);
2655         reg = STV090x_READ_DEMOD(state, TMGOBS);
2656         rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2657
2658         if (state->algo == STV090x_BLIND_SEARCH) {
2659                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
2660                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2661                 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
2662                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
2663                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2664                         goto err;
2665                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0)
2666                         goto err;
2667                 stv090x_set_srate(state, srate);
2668                 stv090x_set_max_srate(state, state->mclk, srate);
2669                 stv090x_set_min_srate(state, state->mclk, srate);
2670                 blind_tune = 1;
2671         }
2672
2673         if (state->dev_ver >= 0x20) {
2674                 if ((state->search_mode == STV090x_SEARCH_DVBS1)        ||
2675                     (state->search_mode == STV090x_SEARCH_DSS)          ||
2676                     (state->search_mode == STV090x_SEARCH_AUTO)) {
2677
2678                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
2679                                 goto err;
2680                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
2681                                 goto err;
2682                 }
2683         }
2684
2685         if (state->dev_ver < 0x20) {
2686                 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x08) < 0)
2687                         goto err;
2688         }
2689         if (state->dev_ver == 0x10) {
2690                 if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0x0a) < 0)
2691                         goto err;
2692         }
2693
2694         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2695                 goto err;
2696
2697         if ((state->dev_ver >= 0x20) || (blind_tune == 1) || (state->srate < 10000000)) {
2698
2699                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2700                         goto err;
2701                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2702                         goto err;
2703                 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
2704
2705                 if ((state->dev_ver >= 0x20) || (blind_tune == 1)) {
2706
2707                         if (state->algo != STV090x_WARM_SEARCH) {
2708
2709                                 stv090x_i2c_gate_ctrl(fe, 1);
2710
2711                                 if (state->config->tuner_set_bandwidth)
2712                                         state->config->tuner_set_bandwidth(fe, state->tuner_bw);
2713
2714                                 stv090x_i2c_gate_ctrl(fe, 0);
2715
2716                         }
2717                 }
2718                 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
2719                         msleep(50); /* blind search: wait 50ms for SR stabilization */
2720                 else
2721                         msleep(5);
2722
2723                 stv090x_get_lock_tmg(state);
2724
2725                 if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
2726                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2727                                 goto err;
2728                         if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2729                                 goto err;
2730                         if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2731                                 goto err;
2732                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2733                                 goto err;
2734
2735                         i = 0;
2736
2737                         while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
2738
2739                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2740                                         goto err;
2741                                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2742                                         goto err;
2743                                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2744                                         goto err;
2745                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2746                                         goto err;
2747                                 i++;
2748                         }
2749                 }
2750
2751         }
2752
2753         if (state->dev_ver >= 0x20) {
2754                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2755                         goto err;
2756         }
2757         if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
2758                 stv090x_set_vit_thtracq(state);
2759
2760         return 0;
2761 err:
2762         dprintk(FE_ERROR, 1, "I/O error");
2763         return -1;
2764 }
2765
2766 static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
2767 {
2768         s32 timer = 0, lock = 0, stat;
2769         u32 reg;
2770
2771         while ((timer < timeout) && (!lock)) {
2772                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2773                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
2774
2775                 switch (stat) {
2776                 case 0: /* searching */
2777                 case 1: /* first PLH detected */
2778                 default:
2779                         lock = 0;
2780                         break;
2781
2782                 case 2: /* DVB-S2 mode */
2783                         reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
2784                         lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
2785                         break;
2786
2787                 case 3: /* DVB-S1/legacy mode */
2788                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
2789                         lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
2790                         break;
2791                 }
2792                 if (!lock) {
2793                         msleep(10);
2794                         timer += 10;
2795                 }
2796         }
2797         return lock;
2798 }
2799
2800 static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
2801 {
2802         u32 reg;
2803         s32 timer = 0;
2804         int lock;
2805
2806         lock = stv090x_get_dmdlock(state, timeout_dmd);
2807         if (lock)
2808                 lock = stv090x_get_feclock(state, timeout_fec);
2809
2810         if (lock) {
2811                 lock = 0;
2812
2813                 while ((timer < timeout_fec) && (!lock)) {
2814                         reg = STV090x_READ_DEMOD(state, TSSTATUS);
2815                         lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
2816                         msleep(1);
2817                         timer++;
2818                 }
2819         }
2820
2821         return lock;
2822 }
2823
2824 static int stv090x_set_s2rolloff(struct stv090x_state *state)
2825 {
2826         s32 rolloff;
2827         u32 reg;
2828
2829         if (state->dev_ver == 0x10) {
2830                 reg = STV090x_READ_DEMOD(state, DEMOD);
2831                 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x01);
2832                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2833                         goto err;
2834                 rolloff = STV090x_READ_DEMOD(state, MATSTR1) & 0x03;
2835                 reg = STV090x_READ_DEMOD(state, DEMOD);
2836                 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, reg);
2837                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2838                         goto err;
2839         } else {
2840                 reg = STV090x_READ_DEMOD(state, DEMOD);
2841                 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x00);
2842                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2843                         goto err;
2844         }
2845         return 0;
2846 err:
2847         dprintk(FE_ERROR, 1, "I/O error");
2848         return -1;
2849 }
2850
2851 static enum stv090x_signal_state stv090x_acq_fixs1(struct stv090x_state *state)
2852 {
2853         s32 srate, f_1, f_2;
2854         enum stv090x_signal_state signal_state = STV090x_NODATA;
2855         u32 reg;
2856         int lock;
2857
2858         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2859         if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) { /* DVB-S mode */
2860                 srate  = stv090x_get_srate(state, state->mclk);
2861                 srate += stv090x_get_tmgoffst(state, state->srate);
2862
2863                 if (state->algo == STV090x_BLIND_SEARCH)
2864                         stv090x_set_srate(state, state->srate);
2865
2866                 stv090x_get_lock_tmg(state);
2867
2868                 f_1 = STV090x_READ_DEMOD(state, CFR2);
2869                 f_2 = STV090x_READ_DEMOD(state, CFR1);
2870
2871                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2872                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
2873                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2874                         goto err;
2875
2876                 reg = STV090x_READ_DEMOD(state, DEMOD);
2877                 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, STV090x_IQ_SWAP);
2878                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2879                         goto err;
2880                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0) /* stop demod */
2881                         goto err;
2882                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2883                         goto err;
2884                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_2) < 0)
2885                         goto err;
2886                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* warm start trigger */
2887                         goto err;
2888
2889                 if (stv090x_get_lock(state, state->DemodTimeout, state->FecTimeout)) {
2890                         lock = 1;
2891                         stv090x_get_sig_params(state);
2892                         stv090x_optimize_track(state);
2893                 } else {
2894                         reg = STV090x_READ_DEMOD(state, DEMOD);
2895                         STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, STV090x_IQ_NORMAL);
2896                         if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2897                                 goto err;
2898                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2899                                 goto err;
2900                         if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2901                                 goto err;
2902                         if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_2) < 0)
2903                                 goto err;
2904                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* warm start trigger */
2905                                 goto err;
2906                         if (stv090x_get_lock(state, state->DemodTimeout, state->FecTimeout)) {
2907                                 lock = 1;
2908                                 signal_state = stv090x_get_sig_params(state);
2909                                 stv090x_optimize_track(state);
2910                         }
2911                 }
2912         } else {
2913                 lock = 0;
2914         }
2915
2916         return signal_state;
2917
2918 err:
2919         dprintk(FE_ERROR, 1, "I/O error");
2920         return -1;
2921 }
2922
2923 static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
2924 {
2925         struct dvb_frontend *fe = &state->frontend;
2926         enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
2927         u32 reg;
2928         s32 timeout_dmd = 500, timeout_fec = 50;
2929         int lock = 0, low_sr = 0, no_signal = 0;
2930
2931         reg = STV090x_READ_DEMOD(state, TSCFGH);
2932         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
2933         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2934                 goto err;
2935
2936         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
2937                 goto err;
2938
2939         if (state->dev_ver >= 0x20) {
2940                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) /* cut 2.0 */
2941                         goto err;
2942         } else {
2943                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x88) < 0) /* cut 1.x */
2944                         goto err;
2945         }
2946
2947         stv090x_get_lock_tmg(state);
2948
2949         if (state->algo == STV090x_BLIND_SEARCH) {
2950                 state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
2951                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x00) < 0) /* wider srate scan */
2952                         goto err;
2953                 stv090x_set_srate(state, 1000000); /* inital srate = 1Msps */
2954         } else {
2955                 /* known srate */
2956                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
2957                         goto err;
2958                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
2959                         goto err;
2960
2961                 if (state->srate >= 10000000) {
2962                         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0) /* High SR */
2963                                 goto err;
2964                 } else {
2965                         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0) /* Low SR */
2966                                 goto err;
2967                 }
2968
2969                 if (state->dev_ver >= 0x20) {
2970                         if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
2971                                 goto err;
2972                         if (state->algo == STV090x_COLD_SEARCH)
2973                                 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
2974                         else if (state->algo == STV090x_WARM_SEARCH)
2975                                 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
2976                 } else {
2977                         if (STV090x_WRITE_DEMOD(state, KREFTMG, 0xc1) < 0)
2978                                 goto err;
2979                         state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
2980                 }
2981                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0) /* narrow srate scan */
2982                         goto err;
2983                 stv090x_set_srate(state, state->srate);
2984                 stv090x_set_max_srate(state, state->mclk, state->srate);
2985                 stv090x_set_min_srate(state, state->mclk, state->srate);
2986
2987                 if (state->srate >= 10000000)
2988                         low_sr = 0;
2989                 else
2990                         low_sr = 1;
2991         }
2992
2993         /* Setup tuner */
2994         stv090x_i2c_gate_ctrl(fe, 1);
2995
2996         if (state->config->tuner_set_bbgain)
2997                 state->config->tuner_set_bbgain(fe, 10); /* 10dB */
2998
2999         if (state->config->tuner_set_frequency)
3000                 state->config->tuner_set_frequency(fe, state->frequency);
3001
3002         if (state->config->tuner_set_bandwidth)
3003                 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
3004
3005         stv090x_i2c_gate_ctrl(fe, 0);
3006
3007         msleep(50);
3008
3009         stv090x_i2c_gate_ctrl(fe, 1);
3010
3011         if (state->config->tuner_get_status)
3012                 state->config->tuner_get_status(fe, &reg);
3013
3014         if (reg)
3015                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
3016         else
3017                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
3018
3019         stv090x_i2c_gate_ctrl(fe, 0);
3020
3021         reg = STV090x_READ_DEMOD(state, DEMOD);
3022         STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
3023         STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 1);
3024         if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3025                 goto err;
3026         stv090x_delivery_search(state);
3027         if (state->algo != STV090x_BLIND_SEARCH)
3028                 stv090x_start_search(state);
3029
3030         if (state->dev_ver == 0x12) {
3031                 reg = STV090x_READ_DEMOD(state, TSCFGH);
3032                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3033                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3034                         goto err;
3035                 msleep(3);
3036                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3037                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3038                         goto err;
3039                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3040                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3041                         goto err;
3042         }
3043
3044         if (state->algo == STV090x_BLIND_SEARCH)
3045                 lock = stv090x_blind_search(state);
3046         else if (state->algo == STV090x_COLD_SEARCH)
3047                 lock = stv090x_get_coldlock(state, timeout_dmd);
3048         else if (state->algo == STV090x_WARM_SEARCH)
3049                 lock = stv090x_get_dmdlock(state, timeout_dmd);
3050
3051         if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
3052                 if (!low_sr) {
3053                         if (stv090x_chk_tmg(state))
3054                                 lock = stv090x_sw_algo(state);
3055                 }
3056         }
3057
3058         if (lock)
3059                 signal_state = stv090x_get_sig_params(state);
3060
3061         if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3062                 stv090x_optimize_track(state);
3063                 if (state->dev_ver <= 0x11) { /*workaround for dual DVBS1 cut 1.1 and 1.0 only*/
3064                         if (stv090x_get_std(state) == STV090x_DVBS1) {
3065                                 msleep(20);
3066                                 reg = STV090x_READ_DEMOD(state, TSCFGH);
3067                                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3068                                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3069                                         goto err;
3070                         } else {
3071                                 reg = STV090x_READ_DEMOD(state, TSCFGH);
3072                                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3073                                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3074                                         goto err;
3075                                 msleep(3);
3076                                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3077                                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3078                                         goto err;
3079                                 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3080                                 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3081                                         goto err;
3082                         }
3083                 } else if (state->dev_ver == 0x20) { /*cut 2.0 :release TS reset after demod lock and TrackingOptimization*/
3084                         reg = STV090x_READ_DEMOD(state, TSCFGH);
3085                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3086                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3087                                 goto err;
3088                         msleep(3);
3089                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3090                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3091                                 goto err;
3092
3093                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3094                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3095                                 goto err;
3096                 }
3097
3098                 if (stv090x_get_lock(state, timeout_fec, timeout_fec)) {
3099                         lock = 1;
3100                         if (state->delsys == STV090x_DVBS2) {
3101                                 stv090x_set_s2rolloff(state);
3102                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, 0x40) < 0)
3103                                         goto err;
3104                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, 0x00) < 0) /* RESET counter */
3105                                         goto err;
3106                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
3107                                         goto err;
3108                         } else {
3109                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
3110                                         goto err;
3111                         }
3112                         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
3113                                 goto err;
3114                         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3115                                 goto err;
3116                 } else {
3117                         lock = 0;
3118                         signal_state = STV090x_NODATA;
3119                         no_signal = stv090x_chk_signal(state);
3120                 }
3121         }
3122         if ((signal_state == STV090x_NODATA) && (!no_signal)) {
3123                 if (state->dev_ver <= 0x11) {
3124                         reg = STV090x_READ_DEMOD(state, DMDSTATE);
3125                         if (((STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD)) == STV090x_DVBS1) && (state->inversion == INVERSION_AUTO))
3126                                 signal_state = stv090x_acq_fixs1(state);
3127                 }
3128         }
3129         return signal_state;
3130
3131 err:
3132         dprintk(FE_ERROR, 1, "I/O error");
3133         return -1;
3134 }
3135
3136 static enum dvbfe_search stv090x_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
3137 {
3138         struct stv090x_state *state = fe->demodulator_priv;
3139         struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3140
3141         state->delsys = props->delivery_system;
3142         state->frequency = p->frequency;
3143         state->srate = p->u.qpsk.symbol_rate;
3144         state->search_mode = STV090x_SEARCH_AUTO;
3145         state->algo = STV090x_COLD_SEARCH;
3146         state->fec = STV090x_PRERR;
3147         state->search_range = 2000000;
3148
3149         if (stv090x_algo(state) == STV090x_RANGEOK) {
3150                 dprintk(FE_DEBUG, 1, "Search success!");
3151                 return DVBFE_ALGO_SEARCH_SUCCESS;
3152         } else {
3153                 dprintk(FE_DEBUG, 1, "Search failed!");
3154                 return DVBFE_ALGO_SEARCH_FAILED;
3155         }
3156
3157         return DVBFE_ALGO_SEARCH_ERROR;
3158 }
3159
3160 /* FIXME! */
3161 static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3162 {
3163         struct stv090x_state *state = fe->demodulator_priv;
3164         u32 reg;
3165         u8 search_state;
3166
3167         reg = STV090x_READ_DEMOD(state, DMDSTATE);
3168         search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3169
3170         switch (search_state) {
3171         case 0: /* searching */
3172         case 1: /* first PLH detected */
3173         default:
3174                 dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
3175                 *status = 0;
3176                 break;
3177
3178         case 2: /* DVB-S2 mode */
3179                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
3180                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3181                 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3182                         reg = STV090x_READ_DEMOD(state, TSSTATUS);
3183                         if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3184                                 *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3185                         }
3186                 }
3187                 break;
3188
3189         case 3: /* DVB-S1/legacy mode */
3190                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
3191                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3192                 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3193                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3194                         if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3195                                 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3196                                 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3197                                         *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3198                                 }
3199                         }
3200                 }
3201                 break;
3202         }
3203
3204         return 0;
3205 }
3206
3207 static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
3208 {
3209         struct stv090x_state *state = fe->demodulator_priv;
3210
3211         s32 count_4, count_3, count_2, count_1, count_0, count;
3212         u32 reg, h, m, l;
3213         enum fe_status status;
3214
3215         stv090x_read_status(fe, &status);
3216         if (!(status & FE_HAS_LOCK)) {
3217                 *per = 1 << 23; /* Max PER */
3218         } else {
3219                 /* Counter 2 */
3220                 reg = STV090x_READ_DEMOD(state, ERRCNT22);
3221                 h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
3222
3223                 reg = STV090x_READ_DEMOD(state, ERRCNT21);
3224                 m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
3225
3226                 reg = STV090x_READ_DEMOD(state, ERRCNT20);
3227                 l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
3228
3229                 *per = ((h << 16) | (m << 8) | l);
3230
3231                 count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
3232                 count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
3233                 count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
3234                 count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
3235                 count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
3236
3237                 if ((!count_4) && (!count_3)) {
3238                         count  = (count_2 & 0xff) << 16;
3239                         count |= (count_1 & 0xff) <<  8;
3240                         count |=  count_0 & 0xff;
3241                 } else {
3242                         count = 1 << 24;
3243                 }
3244                 if (count == 0)
3245                         *per = 1;
3246         }
3247         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
3248                 goto err;
3249         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3250                 goto err;
3251
3252         return 0;
3253 err:
3254         dprintk(FE_ERROR, 1, "I/O error");
3255         return -1;
3256 }
3257
3258 static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
3259 {
3260         int res = 0;
3261         int min = 0, med;
3262
3263         if (val < tab[min].read)
3264                 res = tab[min].real;
3265         else if (val >= tab[max].read)
3266                 res = tab[max].real;
3267         else {
3268                 while ((max - min) > 1) {
3269                         med = (max + min) / 2;
3270                         if (val >= tab[min].read && val < tab[med].read)
3271                                 max = med;
3272                         else
3273                                 min = med;
3274                 }
3275                 res = ((val - tab[min].read) *
3276                        (tab[max].real - tab[min].real) /
3277                        (tab[max].read - tab[min].read)) +
3278                         tab[min].real;
3279         }
3280
3281         return res;
3282 }
3283
3284 static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3285 {
3286         struct stv090x_state *state = fe->demodulator_priv;
3287         u32 reg;
3288         s32 agc;
3289
3290         reg = STV090x_READ_DEMOD(state, AGCIQIN1);
3291         agc = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3292
3293         *strength = stv090x_table_lookup(stv090x_rf_tab, ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
3294         if (agc > stv090x_rf_tab[0].read)
3295                 *strength = 5;
3296         else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
3297                 *strength = -100;
3298
3299         return 0;
3300 }
3301
3302 static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
3303 {
3304         struct stv090x_state *state = fe->demodulator_priv;
3305         u32 reg_0, reg_1, reg, i;
3306         s32 val_0, val_1, val = 0;
3307         u8 lock_f;
3308
3309         switch (state->delsys) {
3310         case STV090x_DVBS2:
3311                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3312                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3313                 if (lock_f) {
3314                         msleep(5);
3315                         for (i = 0; i < 16; i++) {
3316                                 reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
3317                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3318                                 reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
3319                                 val_0 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3320                                 val  += MAKEWORD16(val_1, val_0);
3321                                 msleep(1);
3322                         }
3323                         val /= 16;
3324                         *cnr = stv090x_table_lookup(stv090x_s2cn_tab, ARRAY_SIZE(stv090x_s2cn_tab) - 1, val);
3325                         if (val < stv090x_s2cn_tab[ARRAY_SIZE(stv090x_s2cn_tab) - 1].read)
3326                                 *cnr = 1000;
3327                 }
3328                 break;
3329
3330         case STV090x_DVBS1:
3331         case STV090x_DSS:
3332                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3333                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3334                 if (lock_f) {
3335                         msleep(5);
3336                         for (i = 0; i < 16; i++) {
3337                                 reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
3338                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3339                                 reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
3340                                 val_0 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3341                                 val  += MAKEWORD16(val_1, val_0);
3342                                 msleep(1);
3343                         }
3344                         val /= 16;
3345                         *cnr = stv090x_table_lookup(stv090x_s1cn_tab, ARRAY_SIZE(stv090x_s1cn_tab) - 1, val);
3346                         if (val < stv090x_s2cn_tab[ARRAY_SIZE(stv090x_s1cn_tab) - 1].read)
3347                                 *cnr = 1000;
3348                 }
3349                 break;
3350         default:
3351                 break;
3352         }
3353
3354         return 0;
3355 }
3356
3357 static int stv090x_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
3358 {
3359         struct stv090x_state *state = fe->demodulator_priv;
3360         u32 reg;
3361
3362         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3363         switch (tone) {
3364         case SEC_TONE_ON:
3365                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3366                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3367                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3368                         goto err;
3369                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3370                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3371                         goto err;
3372                 break;
3373
3374         case SEC_TONE_OFF:
3375                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3376                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3377                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3378                         goto err;
3379                 break;
3380         default:
3381                 return -EINVAL;
3382         }
3383
3384         return 0;
3385 err:
3386         dprintk(FE_ERROR, 1, "I/O error");
3387         return -1;
3388 }
3389
3390
3391 static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
3392 {
3393         return DVBFE_ALGO_CUSTOM;
3394 }
3395
3396 static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
3397 {
3398         struct stv090x_state *state = fe->demodulator_priv;
3399         u32 reg, idle = 0, fifo_full = 1;
3400         int i;
3401
3402         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3403
3404         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 2);
3405         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3406         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3407                 goto err;
3408         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3409         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3410                 goto err;
3411
3412         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3413         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3414                 goto err;
3415
3416         for (i = 0; i < cmd->msg_len; i++) {
3417
3418                 while (fifo_full) {
3419                         reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3420                         fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3421                 }
3422
3423                 if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
3424                         goto err;
3425         }
3426         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3427         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3428         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3429                 goto err;
3430
3431         i = 0;
3432
3433         while ((!idle) && (i < 10)) {
3434                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3435                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3436                 msleep(10);
3437                 i++;
3438         }
3439
3440         return 0;
3441 err:
3442         dprintk(FE_ERROR, 1, "I/O error");
3443         return -1;
3444 }
3445
3446 static int stv090x_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
3447 {
3448         struct stv090x_state *state = fe->demodulator_priv;
3449         u32 reg, idle = 0, fifo_full = 1;
3450         u8 mode, value;
3451         int i;
3452
3453         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3454
3455         if (burst == SEC_MINI_A) {
3456                 mode = 3;
3457                 value = 0x00;
3458         } else {
3459                 mode = 2;
3460                 value = 0xFF;
3461         }
3462
3463         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
3464         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3465         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3466                 goto err;
3467         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3468         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3469                 goto err;
3470
3471         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3472         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3473                 goto err;
3474
3475         while (fifo_full) {
3476                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3477                 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3478         }
3479
3480         if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
3481                 goto err;
3482
3483         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3484         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3485         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3486                 goto err;
3487
3488         i = 0;
3489
3490         while ((!idle) && (i < 10)) {
3491                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3492                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3493                 msleep(10);
3494                 i++;
3495         }
3496
3497         return 0;
3498 err:
3499         dprintk(FE_ERROR, 1, "I/O error");
3500         return -1;
3501 }
3502
3503 static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
3504 {
3505         struct stv090x_state *state = fe->demodulator_priv;
3506         u32 reg = 0, i = 0, rx_end = 0;
3507
3508         while ((rx_end != 1) && (i < 10)) {
3509                 msleep(10);
3510                 i++;
3511                 reg = STV090x_READ_DEMOD(state, DISRX_ST0);
3512                 rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
3513         }
3514
3515         if (rx_end) {
3516                 reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
3517                 for (i = 0; i < reply->msg_len; i++)
3518                         reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
3519         }
3520
3521         return 0;
3522 }
3523
3524 static int stv090x_sleep(struct dvb_frontend *fe)
3525 {
3526         struct stv090x_state *state = fe->demodulator_priv;
3527         u32 reg;
3528
3529         dprintk(FE_DEBUG, 1, "Set %s to sleep",
3530                 state->device == STV0900 ? "STV0900" : "STV0903");
3531
3532         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3533         STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
3534         if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3535                 goto err;
3536
3537         reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3538         STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
3539         if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3540                 goto err;
3541
3542         return 0;
3543 err:
3544         dprintk(FE_ERROR, 1, "I/O error");
3545         return -1;
3546 }
3547
3548 static int stv090x_wakeup(struct dvb_frontend *fe)
3549 {
3550         struct stv090x_state *state = fe->demodulator_priv;
3551         u32 reg;
3552
3553         dprintk(FE_DEBUG, 1, "Wake %s from standby",
3554                 state->device == STV0900 ? "STV0900" : "STV0903");
3555
3556         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3557         STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
3558         if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3559                 goto err;
3560
3561         reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3562         STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
3563         if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3564                 goto err;
3565
3566         return 0;
3567 err:
3568         dprintk(FE_ERROR, 1, "I/O error");
3569         return -1;
3570 }
3571
3572 static void stv090x_release(struct dvb_frontend *fe)
3573 {
3574         struct stv090x_state *state = fe->demodulator_priv;
3575
3576         kfree(state);
3577 }
3578
3579 static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
3580 {
3581         u32 reg;
3582
3583         switch (ldpc_mode) {
3584         case STV090x_DUAL:
3585         default:
3586                 reg = stv090x_read_reg(state, STV090x_GENCFG);
3587                 if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
3588                         /* follow LDPC default state */
3589                         if (stv090x_write_reg(state, STV090x_GENCFG, reg) < 0)
3590                                 goto err;
3591                         state->demod_mode = STV090x_DUAL;
3592                         reg = stv090x_read_reg(state, STV090x_TSTRES0);
3593                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3594                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3595                                 goto err;
3596                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3597                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3598                                 goto err;
3599                 }
3600                 break;
3601
3602         case STV090x_SINGLE:
3603                 if (state->demod == STV090x_DEMODULATOR_1) {
3604                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
3605                                 goto err;
3606                 } else {
3607                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
3608                                 goto err;
3609                 }
3610
3611                 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3612                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3613                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3614                         goto err;
3615                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3616                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3617                         goto err;
3618
3619                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3620                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
3621                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3622                         goto err;
3623                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
3624                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3625                         goto err;
3626                 break;
3627         }
3628
3629         return 0;
3630 err:
3631         dprintk(FE_ERROR, 1, "I/O error");
3632         return -1;
3633 }
3634
3635 /* return (Hz), clk in Hz*/
3636 static u32 stv090x_get_mclk(struct stv090x_state *state)
3637 {
3638         const struct stv090x_config *config = state->config;
3639         u32 div, reg;
3640         u8 ratio;
3641
3642         div = stv090x_read_reg(state, STV090x_NCOARSE);
3643         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3644         ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
3645
3646         return (div + 1) * config->xtal / ratio; /* kHz */
3647 }
3648
3649 static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
3650 {
3651         const struct stv090x_config *config = state->config;
3652         u32 reg, div, clk_sel;
3653
3654         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3655         clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
3656
3657         div = ((clk_sel * mclk) / config->xtal) - 1;
3658
3659         reg = stv090x_read_reg(state, STV090x_NCOARSE);
3660         STV090x_SETFIELD(reg, M_DIV_FIELD, div);
3661         if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
3662                 goto err;
3663
3664         state->mclk = stv090x_get_mclk(state);
3665
3666         /*Set the DiseqC frequency to 22KHz */
3667         div = state->mclk / 704000;
3668         if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
3669                 goto err;
3670         if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
3671                 goto err;
3672
3673         return 0;
3674 err:
3675         dprintk(FE_ERROR, 1, "I/O error");
3676         return -1;
3677 }
3678
3679 static int stv090x_set_tspath(struct stv090x_state *state)
3680 {
3681         u32 reg;
3682
3683         if (state->dev_ver >= 0x20) {
3684                 switch (state->config->ts1_mode) {
3685                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3686                 case STV090x_TSMODE_DVBCI:
3687                         switch (state->config->ts2_mode) {
3688                         case STV090x_TSMODE_SERIAL_PUNCTURED:
3689                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3690                         default:
3691                                 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
3692                                 break;
3693
3694                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3695                         case STV090x_TSMODE_DVBCI:
3696                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
3697                                         goto err;
3698                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3699                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3700                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3701                                         goto err;
3702                                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
3703                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3704                                 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
3705                                         goto err;
3706                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
3707                                         goto err;
3708                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
3709                                         goto err;
3710                                 break;
3711                         }
3712                         break;
3713
3714                 case STV090x_TSMODE_SERIAL_PUNCTURED:
3715                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3716                 default:
3717                         switch (state->config->ts2_mode) {
3718                         case STV090x_TSMODE_SERIAL_PUNCTURED:
3719                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3720                         default:
3721                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
3722                                         goto err;
3723                                 break;
3724
3725                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3726                         case STV090x_TSMODE_DVBCI:
3727                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
3728                                         goto err;
3729                                 break;
3730                         }
3731                         break;
3732                 }
3733         } else {
3734                 switch (state->config->ts1_mode) {
3735                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3736                 case STV090x_TSMODE_DVBCI:
3737                         switch (state->config->ts2_mode) {
3738                         case STV090x_TSMODE_SERIAL_PUNCTURED:
3739                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3740                         default:
3741                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
3742                                 break;
3743
3744                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3745                         case STV090x_TSMODE_DVBCI:
3746                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
3747                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3748                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3749                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3750                                         goto err;
3751                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3752                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
3753                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3754                                         goto err;
3755                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
3756                                         goto err;
3757                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
3758                                         goto err;
3759                                 break;
3760                         }
3761                         break;
3762
3763                 case STV090x_TSMODE_SERIAL_PUNCTURED:
3764                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3765                 default:
3766                         switch (state->config->ts2_mode) {
3767                         case STV090x_TSMODE_SERIAL_PUNCTURED:
3768                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3769                         default:
3770                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
3771                                 break;
3772
3773                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3774                         case STV090x_TSMODE_DVBCI:
3775                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
3776                                 break;
3777                         }
3778                         break;
3779                 }
3780         }
3781
3782         switch (state->config->ts1_mode) {
3783         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3784                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3785                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3786                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3787                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3788                         goto err;
3789                 break;
3790
3791         case STV090x_TSMODE_DVBCI:
3792                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3793                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3794                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3795                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3796                         goto err;
3797                 break;
3798
3799         case STV090x_TSMODE_SERIAL_PUNCTURED:
3800                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3801                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3802                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3803                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3804                         goto err;
3805                 break;
3806
3807         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3808                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3809                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3810                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3811                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3812                         goto err;
3813                 break;
3814
3815         default:
3816                 break;
3817         }
3818
3819         switch (state->config->ts2_mode) {
3820         case STV090x_TSMODE_PARALLEL_PUNCTURED:
3821                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
3822                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3823                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3824                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3825                         goto err;
3826                 break;
3827
3828         case STV090x_TSMODE_DVBCI:
3829                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
3830                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3831                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3832                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3833                         goto err;
3834                 break;
3835
3836         case STV090x_TSMODE_SERIAL_PUNCTURED:
3837                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
3838                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3839                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3840                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3841                         goto err;
3842                 break;
3843
3844         case STV090x_TSMODE_SERIAL_CONTINUOUS:
3845                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
3846                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3847                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3848                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3849                         goto err;
3850                 break;
3851
3852         default:
3853                 break;
3854         }
3855         reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
3856         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
3857         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3858                 goto err;
3859         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
3860         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3861                 goto err;
3862
3863         reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3864         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
3865         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3866                 goto err;
3867         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
3868         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3869                 goto err;
3870
3871         return 0;
3872 err:
3873         dprintk(FE_ERROR, 1, "I/O error");
3874         return -1;
3875 }
3876
3877 static int stv090x_init(struct dvb_frontend *fe)
3878 {
3879         struct stv090x_state *state = fe->demodulator_priv;
3880         const struct stv090x_config *config = state->config;
3881         u32 reg;
3882
3883         if (stv090x_wakeup(fe) < 0) {
3884                 dprintk(FE_ERROR, 1, "Error waking device");
3885                 goto err;
3886         }
3887
3888         stv090x_ldpc_mode(state, state->demod_mode);
3889
3890         reg = STV090x_READ_DEMOD(state, TNRCFG2);
3891         STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
3892         if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
3893                 goto err;
3894         reg = STV090x_READ_DEMOD(state, DEMOD);
3895         STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
3896         if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3897                 goto err;
3898
3899         stv090x_i2c_gate_ctrl(fe, 1);
3900
3901         if (config->tuner_set_mode)
3902                 config->tuner_set_mode(fe, TUNER_WAKE);
3903         if (config->tuner_init)
3904                 config->tuner_init(fe);
3905
3906         stv090x_i2c_gate_ctrl(fe, 0);
3907
3908         stv090x_set_tspath(state);
3909
3910         return 0;
3911 err:
3912         dprintk(FE_ERROR, 1, "I/O error");
3913         return -1;
3914 }
3915
3916 static int stv090x_setup(struct dvb_frontend *fe)
3917 {
3918         struct stv090x_state *state = fe->demodulator_priv;
3919         const struct stv090x_config *config = state->config;
3920         const struct stv090x_reg *stv090x_initval = NULL;
3921         const struct stv090x_reg *stv090x_cut20_val = NULL;
3922         unsigned long t1_size = 0, t2_size = 0;
3923         u32 reg = 0;
3924
3925         int i;
3926
3927         if (state->device == STV0900) {
3928                 dprintk(FE_DEBUG, 1, "Initializing STV0900");
3929                 stv090x_initval = stv0900_initval;
3930                 t1_size = ARRAY_SIZE(stv0900_initval);
3931                 stv090x_cut20_val = stv0900_cut20_val;
3932                 t2_size = ARRAY_SIZE(stv0900_cut20_val);
3933         } else if (state->device == STV0903) {
3934                 dprintk(FE_DEBUG, 1, "Initializing STV0903");
3935                 stv090x_initval = stv0903_initval;
3936                 t1_size = ARRAY_SIZE(stv0903_initval);
3937                 stv090x_cut20_val = stv0903_cut20_val;
3938                 t2_size = ARRAY_SIZE(stv0903_cut20_val);
3939         }
3940
3941         /* STV090x init */
3942         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Stop Demod */
3943                 goto err;
3944
3945         msleep(5);
3946
3947         if (STV090x_WRITE_DEMOD(state, TNRCFG, 0x6c) < 0) /* check register ! (No Tuner Mode) */
3948                 goto err;
3949
3950         STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
3951         if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0) /* repeater OFF */
3952                 goto err;
3953
3954         if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
3955                 goto err;
3956         msleep(5);
3957         if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
3958                 goto err;
3959         if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
3960                 goto err;
3961         msleep(5);
3962
3963         /* write initval */
3964         dprintk(FE_DEBUG, 1, "Setting up initial values");
3965         for (i = 0; i < t1_size; i++) {
3966                 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
3967                         goto err;
3968         }
3969
3970         state->dev_ver = stv090x_read_reg(state, STV090x_MID);
3971         if (state->dev_ver >= 0x20) {
3972                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
3973                         goto err;
3974
3975                 /* write cut20_val*/
3976                 dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
3977                 for (i = 0; i < t2_size; i++) {
3978                         if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
3979                                 goto err;
3980                 }
3981         }
3982
3983         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
3984                 goto err;
3985         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
3986                 goto err;
3987
3988         stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
3989         msleep(5);
3990         if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0)
3991                 goto err;
3992         stv090x_get_mclk(state);
3993
3994         return 0;
3995 err:
3996         dprintk(FE_ERROR, 1, "I/O error");
3997         return -1;
3998 }
3999
4000 static struct dvb_frontend_ops stv090x_ops = {
4001
4002         .info = {
4003                 .name                   = "STV090x Multistandard",
4004                 .type                   = FE_QPSK,
4005                 .frequency_min          = 950000,
4006                 .frequency_max          = 2150000,
4007                 .frequency_stepsize     = 0,
4008                 .frequency_tolerance    = 0,
4009                 .symbol_rate_min        = 1000000,
4010                 .symbol_rate_max        = 45000000,
4011                 .caps                   = FE_CAN_INVERSION_AUTO |
4012                                           FE_CAN_FEC_AUTO       |
4013                                           FE_CAN_QPSK           |
4014                                           FE_CAN_2G_MODULATION
4015         },
4016
4017         .release                        = stv090x_release,
4018         .init                           = stv090x_init,
4019
4020         .sleep                          = stv090x_sleep,
4021         .get_frontend_algo              = stv090x_frontend_algo,
4022
4023         .i2c_gate_ctrl                  = stv090x_i2c_gate_ctrl,
4024
4025         .diseqc_send_master_cmd         = stv090x_send_diseqc_msg,
4026         .diseqc_send_burst              = stv090x_send_diseqc_burst,
4027         .diseqc_recv_slave_reply        = stv090x_recv_slave_reply,
4028         .set_tone                       = stv090x_set_tone,
4029
4030         .search                         = stv090x_search,
4031         .read_status                    = stv090x_read_status,
4032         .read_ber                       = stv090x_read_per,
4033         .read_signal_strength           = stv090x_read_signal_strength,
4034         .read_snr                       = stv090x_read_cnr
4035 };
4036
4037
4038 struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
4039                                     struct i2c_adapter *i2c,
4040                                     enum stv090x_demodulator demod)
4041 {
4042         struct stv090x_state *state = NULL;
4043
4044         state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
4045         if (state == NULL)
4046                 goto error;
4047
4048         state->verbose                          = &verbose;
4049         state->config                           = config;
4050         state->i2c                              = i2c;
4051         state->frontend.ops                     = stv090x_ops;
4052         state->frontend.demodulator_priv        = state;
4053         state->demod                            = demod;
4054         state->demod_mode                       = config->demod_mode; /* Single or Dual mode */
4055         state->device                           = config->device;
4056         state->rolloff                          = STV090x_RO_35; /* default */
4057
4058         if (state->demod == STV090x_DEMODULATOR_0)
4059                 mutex_init(&demod_lock);
4060
4061         if (stv090x_sleep(&state->frontend) < 0) {
4062                 dprintk(FE_ERROR, 1, "Error putting device to sleep");
4063                 goto error;
4064         }
4065
4066         if (stv090x_setup(&state->frontend) < 0) {
4067                 dprintk(FE_ERROR, 1, "Error setting up device");
4068                 goto error;
4069         }
4070         if (stv090x_wakeup(&state->frontend) < 0) {
4071                 dprintk(FE_ERROR, 1, "Error waking device");
4072                 goto error;
4073         }
4074
4075         dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x\n",
4076                state->device == STV0900 ? "STV0900" : "STV0903",
4077                demod,
4078                state->dev_ver);
4079
4080         return &state->frontend;
4081
4082 error:
4083         kfree(state);
4084         return NULL;
4085 }
4086 EXPORT_SYMBOL(stv090x_attach);
4087 MODULE_PARM_DESC(verbose, "Set Verbosity level");
4088 MODULE_AUTHOR("Manu Abraham");
4089 MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
4090 MODULE_LICENSE("GPL");