SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include "kvm_vmx.h"
  21 #include <linux/module.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <linux/profile.h>
  25 #include <asm/io.h>
  26 #include <asm/desc.h>
  27
  28 #include "segment_descriptor.h"
  29
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  36
  37 #ifdef CONFIG_X86_64
  38 #define HOST_IS_64 1
  39 #else
  40 #define HOST_IS_64 0
  41 #endif
  42
  43 static struct vmcs_descriptor {
  44         int size;
  45         int order;
  46         u32 revision_id;
  47 } vmcs_descriptor;
  48
  49 #define VMX_SEGMENT_FIELD(seg)                                  \
  50         [VCPU_SREG_##seg] = {                                   \
  51                 .selector = GUEST_##seg##_SELECTOR,             \
  52                 .base = GUEST_##seg##_BASE,                     \
  53                 .limit = GUEST_##seg##_LIMIT,                   \
  54                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  55         }
  56
  57 static struct kvm_vmx_segment_field {
  58         unsigned selector;
  59         unsigned base;
  60         unsigned limit;
  61         unsigned ar_bytes;
  62 } kvm_vmx_segment_fields[] = {
  63         VMX_SEGMENT_FIELD(CS),
  64         VMX_SEGMENT_FIELD(DS),
  65         VMX_SEGMENT_FIELD(ES),
  66         VMX_SEGMENT_FIELD(FS),
  67         VMX_SEGMENT_FIELD(GS),
  68         VMX_SEGMENT_FIELD(SS),
  69         VMX_SEGMENT_FIELD(TR),
  70         VMX_SEGMENT_FIELD(LDTR),
  71 };
  72
  73 static const u32 vmx_msr_index[] = {
  74 #ifdef CONFIG_X86_64
  75         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  76 #endif
  77         MSR_EFER, MSR_K6_STAR,
  78 };
  79 #define NR_VMX_MSR (sizeof(vmx_msr_index) / sizeof(*vmx_msr_index))
  80
  81 static inline int is_page_fault(u32 intr_info)
  82 {
  83         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
  84                              INTR_INFO_VALID_MASK)) ==
  85                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
  86 }
  87
  88 static inline int is_external_interrupt(u32 intr_info)
  89 {
  90         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
  91                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
  92 }
  93
  94 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
  95 {
  96         int i;
  97
  98         for (i = 0; i < vcpu->nmsrs; ++i)
  99                 if (vcpu->guest_msrs[i].index == msr)
 100                         return &vcpu->guest_msrs[i];
 101         return NULL;
 102 }
 103
 104 static void vmcs_clear(struct vmcs *vmcs)
 105 {
 106         u64 phys_addr = __pa(vmcs);
 107         u8 error;
 108
 109         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 110                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 111                       : "cc", "memory");
 112         if (error)
 113                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 114                        vmcs, phys_addr);
 115 }
 116
 117 static void __vcpu_clear(void *arg)
 118 {
 119         struct kvm_vcpu *vcpu = arg;
 120         int cpu = raw_smp_processor_id();
 121
 122         if (vcpu->cpu == cpu)
 123                 vmcs_clear(vcpu->vmcs);
 124         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 125                 per_cpu(current_vmcs, cpu) = NULL;
 126 }
 127
 128 static void vcpu_clear(struct kvm_vcpu *vcpu)
 129 {
 130         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
 131                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
 132         else
 133                 __vcpu_clear(vcpu);
 134         vcpu->launched = 0;
 135 }
 136
 137 static unsigned long vmcs_readl(unsigned long field)
 138 {
 139         unsigned long value;
 140
 141         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 142                       : "=a"(value) : "d"(field) : "cc");
 143         return value;
 144 }
 145
 146 static u16 vmcs_read16(unsigned long field)
 147 {
 148         return vmcs_readl(field);
 149 }
 150
 151 static u32 vmcs_read32(unsigned long field)
 152 {
 153         return vmcs_readl(field);
 154 }
 155
 156 static u64 vmcs_read64(unsigned long field)
 157 {
 158 #ifdef CONFIG_X86_64
 159         return vmcs_readl(field);
 160 #else
 161         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 162 #endif
 163 }
 164
 165 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 166 {
 167         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 168                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 169         dump_stack();
 170 }
 171
 172 static void vmcs_writel(unsigned long field, unsigned long value)
 173 {
 174         u8 error;
 175
 176         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 177                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 178         if (unlikely(error))
 179                 vmwrite_error(field, value);
 180 }
 181
 182 static void vmcs_write16(unsigned long field, u16 value)
 183 {
 184         vmcs_writel(field, value);
 185 }
 186
 187 static void vmcs_write32(unsigned long field, u32 value)
 188 {
 189         vmcs_writel(field, value);
 190 }
 191
 192 static void vmcs_write64(unsigned long field, u64 value)
 193 {
 194 #ifdef CONFIG_X86_64
 195         vmcs_writel(field, value);
 196 #else
 197         vmcs_writel(field, value);
 198         asm volatile ("");
 199         vmcs_writel(field+1, value >> 32);
 200 #endif
 201 }
 202
 203 /*
 204  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 205  * vcpu mutex is already taken.
 206  */
 207 static struct kvm_vcpu *vmx_vcpu_load(struct kvm_vcpu *vcpu)
 208 {
 209         u64 phys_addr = __pa(vcpu->vmcs);
 210         int cpu;
 211
 212         cpu = get_cpu();
 213
 214         if (vcpu->cpu != cpu)
 215                 vcpu_clear(vcpu);
 216
 217         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 218                 u8 error;
 219
 220                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 221                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 222                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 223                               : "cc");
 224                 if (error)
 225                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 226                                vcpu->vmcs, phys_addr);
 227         }
 228
 229         if (vcpu->cpu != cpu) {
 230                 struct descriptor_table dt;
 231                 unsigned long sysenter_esp;
 232
 233                 vcpu->cpu = cpu;
 234                 /*
 235                  * Linux uses per-cpu TSS and GDT, so set these when switching
 236                  * processors.
 237                  */
 238                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 239                 get_gdt(&dt);
 240                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 241
 242                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 243                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 244         }
 245         return vcpu;
 246 }
 247
 248 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 249 {
 250         put_cpu();
 251 }
 252
 253 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 254 {
 255         return vmcs_readl(GUEST_RFLAGS);
 256 }
 257
 258 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 259 {
 260         vmcs_writel(GUEST_RFLAGS, rflags);
 261 }
 262
 263 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 264 {
 265         unsigned long rip;
 266         u32 interruptibility;
 267
 268         rip = vmcs_readl(GUEST_RIP);
 269         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 270         vmcs_writel(GUEST_RIP, rip);
 271
 272         /*
 273          * We emulated an instruction, so temporary interrupt blocking
 274          * should be removed, if set.
 275          */
 276         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 277         if (interruptibility & 3)
 278                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 279                              interruptibility & ~3);
 280         vcpu->interrupt_window_open = 1;
 281 }
 282
 283 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 284 {
 285         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 286                vmcs_readl(GUEST_RIP));
 287         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 288         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 289                      GP_VECTOR |
 290                      INTR_TYPE_EXCEPTION |
 291                      INTR_INFO_DELIEVER_CODE_MASK |
 292                      INTR_INFO_VALID_MASK);
 293 }
 294
 295 /*
 296  * reads and returns guest's timestamp counter "register"
 297  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 298  */
 299 static u64 guest_read_tsc(void)
 300 {
 301         u64 host_tsc, tsc_offset;
 302
 303         rdtscll(host_tsc);
 304         tsc_offset = vmcs_read64(TSC_OFFSET);
 305         return host_tsc + tsc_offset;
 306 }
 307
 308 /*
 309  * writes 'guest_tsc' into guest's timestamp counter "register"
 310  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 311  */
 312 static void guest_write_tsc(u64 guest_tsc)
 313 {
 314         u64 host_tsc;
 315
 316         rdtscll(host_tsc);
 317         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 318 }
 319
 320 static void reload_tss(void)
 321 {
 322 #ifndef CONFIG_X86_64
 323
 324         /*
 325          * VT restores TR but not its size.  Useless.
 326          */
 327         struct descriptor_table gdt;
 328         struct segment_descriptor *descs;
 329
 330         get_gdt(&gdt);
 331         descs = (void *)gdt.base;
 332         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 333         load_TR_desc();
 334 #endif
 335 }
 336
 337 /*
 338  * Reads an msr value (of 'msr_index') into 'pdata'.
 339  * Returns 0 on success, non-0 otherwise.
 340  * Assumes vcpu_load() was already called.
 341  */
 342 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 343 {
 344         u64 data;
 345         struct vmx_msr_entry *msr;
 346
 347         if (!pdata) {
 348                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 349                 return -EINVAL;
 350         }
 351
 352         switch (msr_index) {
 353 #ifdef CONFIG_X86_64
 354         case MSR_FS_BASE:
 355                 data = vmcs_readl(GUEST_FS_BASE);
 356                 break;
 357         case MSR_GS_BASE:
 358                 data = vmcs_readl(GUEST_GS_BASE);
 359                 break;
 360         case MSR_EFER:
 361                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 362 #endif
 363         case MSR_IA32_TIME_STAMP_COUNTER:
 364                 data = guest_read_tsc();
 365                 break;
 366         case MSR_IA32_SYSENTER_CS:
 367                 data = vmcs_read32(GUEST_SYSENTER_CS);
 368                 break;
 369         case MSR_IA32_SYSENTER_EIP:
 370                 data = vmcs_read32(GUEST_SYSENTER_EIP);
 371                 break;
 372         case MSR_IA32_SYSENTER_ESP:
 373                 data = vmcs_read32(GUEST_SYSENTER_ESP);
 374                 break;
 375         default:
 376                 msr = find_msr_entry(vcpu, msr_index);
 377                 if (msr) {
 378                         data = msr->data;
 379                         break;
 380                 }
 381                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 382         }
 383
 384         *pdata = data;
 385         return 0;
 386 }
 387
 388 /*
 389  * Writes msr value into into the appropriate "register".
 390  * Returns 0 on success, non-0 otherwise.
 391  * Assumes vcpu_load() was already called.
 392  */
 393 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 394 {
 395         struct vmx_msr_entry *msr;
 396         switch (msr_index) {
 397 #ifdef CONFIG_X86_64
 398         case MSR_EFER:
 399                 return kvm_set_msr_common(vcpu, msr_index, data);
 400         case MSR_FS_BASE:
 401                 vmcs_writel(GUEST_FS_BASE, data);
 402                 break;
 403         case MSR_GS_BASE:
 404                 vmcs_writel(GUEST_GS_BASE, data);
 405                 break;
 406 #endif
 407         case MSR_IA32_SYSENTER_CS:
 408                 vmcs_write32(GUEST_SYSENTER_CS, data);
 409                 break;
 410         case MSR_IA32_SYSENTER_EIP:
 411                 vmcs_write32(GUEST_SYSENTER_EIP, data);
 412                 break;
 413         case MSR_IA32_SYSENTER_ESP:
 414                 vmcs_write32(GUEST_SYSENTER_ESP, data);
 415                 break;
 416         case MSR_IA32_TIME_STAMP_COUNTER: {
 417                 guest_write_tsc(data);
 418                 break;
 419         }
 420         default:
 421                 msr = find_msr_entry(vcpu, msr_index);
 422                 if (msr) {
 423                         msr->data = data;
 424                         break;
 425                 }
 426                 return kvm_set_msr_common(vcpu, msr_index, data);
 427                 msr->data = data;
 428                 break;
 429         }
 430
 431         return 0;
 432 }
 433
 434 /*
 435  * Sync the rsp and rip registers into the vcpu structure.  This allows
 436  * registers to be accessed by indexing vcpu->regs.
 437  */
 438 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 439 {
 440         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 441         vcpu->rip = vmcs_readl(GUEST_RIP);
 442 }
 443
 444 /*
 445  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 446  * modification.
 447  */
 448 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 449 {
 450         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 451         vmcs_writel(GUEST_RIP, vcpu->rip);
 452 }
 453
 454 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 455 {
 456         unsigned long dr7 = 0x400;
 457         u32 exception_bitmap;
 458         int old_singlestep;
 459
 460         exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
 461         old_singlestep = vcpu->guest_debug.singlestep;
 462
 463         vcpu->guest_debug.enabled = dbg->enabled;
 464         if (vcpu->guest_debug.enabled) {
 465                 int i;
 466
 467                 dr7 |= 0x200;  /* exact */
 468                 for (i = 0; i < 4; ++i) {
 469                         if (!dbg->breakpoints[i].enabled)
 470                                 continue;
 471                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 472                         dr7 |= 2 << (i*2);    /* global enable */
 473                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 474                 }
 475
 476                 exception_bitmap |= (1u << 1);  /* Trap debug exceptions */
 477
 478                 vcpu->guest_debug.singlestep = dbg->singlestep;
 479         } else {
 480                 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
 481                 vcpu->guest_debug.singlestep = 0;
 482         }
 483
 484         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 485                 unsigned long flags;
 486
 487                 flags = vmcs_readl(GUEST_RFLAGS);
 488                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 489                 vmcs_writel(GUEST_RFLAGS, flags);
 490         }
 491
 492         vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
 493         vmcs_writel(GUEST_DR7, dr7);
 494
 495         return 0;
 496 }
 497
 498 static __init int cpu_has_kvm_support(void)
 499 {
 500         unsigned long ecx = cpuid_ecx(1);
 501         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 502 }
 503
 504 static __init int vmx_disabled_by_bios(void)
 505 {
 506         u64 msr;
 507
 508         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 509         return (msr & 5) == 1; /* locked but not enabled */
 510 }
 511
 512 static __init void hardware_enable(void *garbage)
 513 {
 514         int cpu = raw_smp_processor_id();
 515         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 516         u64 old;
 517
 518         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 519         if ((old & 5) != 5)
 520                 /* enable and lock */
 521                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 522         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 523         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 524                       : "memory", "cc");
 525 }
 526
 527 static void hardware_disable(void *garbage)
 528 {
 529         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 530 }
 531
 532 static __init void setup_vmcs_descriptor(void)
 533 {
 534         u32 vmx_msr_low, vmx_msr_high;
 535
 536         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 537         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 538         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 539         vmcs_descriptor.revision_id = vmx_msr_low;
 540 }
 541
 542 static struct vmcs *alloc_vmcs_cpu(int cpu)
 543 {
 544         int node = cpu_to_node(cpu);
 545         struct page *pages;
 546         struct vmcs *vmcs;
 547
 548         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 549         if (!pages)
 550                 return NULL;
 551         vmcs = page_address(pages);
 552         memset(vmcs, 0, vmcs_descriptor.size);
 553         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 554         return vmcs;
 555 }
 556
 557 static struct vmcs *alloc_vmcs(void)
 558 {
 559         return alloc_vmcs_cpu(raw_smp_processor_id());
 560 }
 561
 562 static void free_vmcs(struct vmcs *vmcs)
 563 {
 564         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 565 }
 566
 567 static __exit void free_kvm_area(void)
 568 {
 569         int cpu;
 570
 571         for_each_online_cpu(cpu)
 572                 free_vmcs(per_cpu(vmxarea, cpu));
 573 }
 574
 575 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 576
 577 static __init int alloc_kvm_area(void)
 578 {
 579         int cpu;
 580
 581         for_each_online_cpu(cpu) {
 582                 struct vmcs *vmcs;
 583
 584                 vmcs = alloc_vmcs_cpu(cpu);
 585                 if (!vmcs) {
 586                         free_kvm_area();
 587                         return -ENOMEM;
 588                 }
 589
 590                 per_cpu(vmxarea, cpu) = vmcs;
 591         }
 592         return 0;
 593 }
 594
 595 static __init int hardware_setup(void)
 596 {
 597         setup_vmcs_descriptor();
 598         return alloc_kvm_area();
 599 }
 600
 601 static __exit void hardware_unsetup(void)
 602 {
 603         free_kvm_area();
 604 }
 605
 606 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 607 {
 608         if (vcpu->rmode.active)
 609                 vmcs_write32(EXCEPTION_BITMAP, ~0);
 610         else
 611                 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
 612 }
 613
 614 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 615 {
 616         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 617
 618         if (vmcs_readl(sf->base) == save->base) {
 619                 vmcs_write16(sf->selector, save->selector);
 620                 vmcs_writel(sf->base, save->base);
 621                 vmcs_write32(sf->limit, save->limit);
 622                 vmcs_write32(sf->ar_bytes, save->ar);
 623         } else {
 624                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 625                         << AR_DPL_SHIFT;
 626                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 627         }
 628 }
 629
 630 static void enter_pmode(struct kvm_vcpu *vcpu)
 631 {
 632         unsigned long flags;
 633
 634         vcpu->rmode.active = 0;
 635
 636         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 637         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 638         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 639
 640         flags = vmcs_readl(GUEST_RFLAGS);
 641         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 642         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 643         vmcs_writel(GUEST_RFLAGS, flags);
 644
 645         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 646                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 647
 648         update_exception_bitmap(vcpu);
 649
 650         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 651         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 652         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 653         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 654
 655         vmcs_write16(GUEST_SS_SELECTOR, 0);
 656         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 657
 658         vmcs_write16(GUEST_CS_SELECTOR,
 659                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 660         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 661 }
 662
 663 static int rmode_tss_base(struct kvm* kvm)
 664 {
 665         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 666         return base_gfn << PAGE_SHIFT;
 667 }
 668
 669 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 670 {
 671         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 672
 673         save->selector = vmcs_read16(sf->selector);
 674         save->base = vmcs_readl(sf->base);
 675         save->limit = vmcs_read32(sf->limit);
 676         save->ar = vmcs_read32(sf->ar_bytes);
 677         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 678         vmcs_write32(sf->limit, 0xffff);
 679         vmcs_write32(sf->ar_bytes, 0xf3);
 680 }
 681
 682 static void enter_rmode(struct kvm_vcpu *vcpu)
 683 {
 684         unsigned long flags;
 685
 686         vcpu->rmode.active = 1;
 687
 688         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 689         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 690
 691         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 692         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 693
 694         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 695         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 696
 697         flags = vmcs_readl(GUEST_RFLAGS);
 698         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 699
 700         flags |= IOPL_MASK | X86_EFLAGS_VM;
 701
 702         vmcs_writel(GUEST_RFLAGS, flags);
 703         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 704         update_exception_bitmap(vcpu);
 705
 706         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 707         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 708         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 709
 710         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 711         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
 712         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 713
 714         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 715         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 716         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 717         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 718 }
 719
 720 #ifdef CONFIG_X86_64
 721
 722 static void enter_lmode(struct kvm_vcpu *vcpu)
 723 {
 724         u32 guest_tr_ar;
 725
 726         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 727         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 728                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 729                        __FUNCTION__);
 730                 vmcs_write32(GUEST_TR_AR_BYTES,
 731                              (guest_tr_ar & ~AR_TYPE_MASK)
 732                              | AR_TYPE_BUSY_64_TSS);
 733         }
 734
 735         vcpu->shadow_efer |= EFER_LMA;
 736
 737         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 738         vmcs_write32(VM_ENTRY_CONTROLS,
 739                      vmcs_read32(VM_ENTRY_CONTROLS)
 740                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 741 }
 742
 743 static void exit_lmode(struct kvm_vcpu *vcpu)
 744 {
 745         vcpu->shadow_efer &= ~EFER_LMA;
 746
 747         vmcs_write32(VM_ENTRY_CONTROLS,
 748                      vmcs_read32(VM_ENTRY_CONTROLS)
 749                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 750 }
 751
 752 #endif
 753
 754 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
 755 {
 756         vcpu->cr0 &= KVM_GUEST_CR0_MASK;
 757         vcpu->cr0 |= vmcs_readl(GUEST_CR0) & ~KVM_GUEST_CR0_MASK;
 758
 759         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
 760         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
 761 }
 762
 763 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 764 {
 765         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
 766                 enter_pmode(vcpu);
 767
 768         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
 769                 enter_rmode(vcpu);
 770
 771 #ifdef CONFIG_X86_64
 772         if (vcpu->shadow_efer & EFER_LME) {
 773                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
 774                         enter_lmode(vcpu);
 775                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
 776                         exit_lmode(vcpu);
 777         }
 778 #endif
 779
 780         vmcs_writel(CR0_READ_SHADOW, cr0);
 781         vmcs_writel(GUEST_CR0,
 782                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 783         vcpu->cr0 = cr0;
 784 }
 785
 786 /*
 787  * Used when restoring the VM to avoid corrupting segment registers
 788  */
 789 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu *vcpu, unsigned long cr0)
 790 {
 791         vcpu->rmode.active = ((cr0 & CR0_PE_MASK) == 0);
 792         update_exception_bitmap(vcpu);
 793         vmcs_writel(CR0_READ_SHADOW, cr0);
 794         vmcs_writel(GUEST_CR0,
 795                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 796         vcpu->cr0 = cr0;
 797 }
 798
 799 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 800 {
 801         vmcs_writel(GUEST_CR3, cr3);
 802 }
 803
 804 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 805 {
 806         vmcs_writel(CR4_READ_SHADOW, cr4);
 807         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
 808                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
 809         vcpu->cr4 = cr4;
 810 }
 811
 812 #ifdef CONFIG_X86_64
 813
 814 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 815 {
 816         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
 817
 818         vcpu->shadow_efer = efer;
 819         if (efer & EFER_LMA) {
 820                 vmcs_write32(VM_ENTRY_CONTROLS,
 821                                      vmcs_read32(VM_ENTRY_CONTROLS) |
 822                                      VM_ENTRY_CONTROLS_IA32E_MASK);
 823                 msr->data = efer;
 824
 825         } else {
 826                 vmcs_write32(VM_ENTRY_CONTROLS,
 827                                      vmcs_read32(VM_ENTRY_CONTROLS) &
 828                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
 829
 830                 msr->data = efer & ~EFER_LME;
 831         }
 832 }
 833
 834 #endif
 835
 836 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 837 {
 838         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 839
 840         return vmcs_readl(sf->base);
 841 }
 842
 843 static void vmx_get_segment(struct kvm_vcpu *vcpu,
 844                             struct kvm_segment *var, int seg)
 845 {
 846         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 847         u32 ar;
 848
 849         var->base = vmcs_readl(sf->base);
 850         var->limit = vmcs_read32(sf->limit);
 851         var->selector = vmcs_read16(sf->selector);
 852         ar = vmcs_read32(sf->ar_bytes);
 853         if (ar & AR_UNUSABLE_MASK)
 854                 ar = 0;
 855         var->type = ar & 15;
 856         var->s = (ar >> 4) & 1;
 857         var->dpl = (ar >> 5) & 3;
 858         var->present = (ar >> 7) & 1;
 859         var->avl = (ar >> 12) & 1;
 860         var->l = (ar >> 13) & 1;
 861         var->db = (ar >> 14) & 1;
 862         var->g = (ar >> 15) & 1;
 863         var->unusable = (ar >> 16) & 1;
 864 }
 865
 866 static void vmx_set_segment(struct kvm_vcpu *vcpu,
 867                             struct kvm_segment *var, int seg)
 868 {
 869         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 870         u32 ar;
 871
 872         vmcs_writel(sf->base, var->base);
 873         vmcs_write32(sf->limit, var->limit);
 874         vmcs_write16(sf->selector, var->selector);
 875         if (var->unusable)
 876                 ar = 1 << 16;
 877         else {
 878                 ar = var->type & 15;
 879                 ar |= (var->s & 1) << 4;
 880                 ar |= (var->dpl & 3) << 5;
 881                 ar |= (var->present & 1) << 7;
 882                 ar |= (var->avl & 1) << 12;
 883                 ar |= (var->l & 1) << 13;
 884                 ar |= (var->db & 1) << 14;
 885                 ar |= (var->g & 1) << 15;
 886         }
 887         if (ar == 0) /* a 0 value means unusable */
 888                 ar = AR_UNUSABLE_MASK;
 889         vmcs_write32(sf->ar_bytes, ar);
 890 }
 891
 892 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 893 {
 894         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
 895
 896         *db = (ar >> 14) & 1;
 897         *l = (ar >> 13) & 1;
 898 }
 899
 900 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 901 {
 902         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
 903         dt->base = vmcs_readl(GUEST_IDTR_BASE);
 904 }
 905
 906 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 907 {
 908         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
 909         vmcs_writel(GUEST_IDTR_BASE, dt->base);
 910 }
 911
 912 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 913 {
 914         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
 915         dt->base = vmcs_readl(GUEST_GDTR_BASE);
 916 }
 917
 918 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 919 {
 920         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
 921         vmcs_writel(GUEST_GDTR_BASE, dt->base);
 922 }
 923
 924 static int init_rmode_tss(struct kvm* kvm)
 925 {
 926         struct page *p1, *p2, *p3;
 927         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
 928         char *page;
 929
 930         p1 = _gfn_to_page(kvm, fn++);
 931         p2 = _gfn_to_page(kvm, fn++);
 932         p3 = _gfn_to_page(kvm, fn);
 933
 934         if (!p1 || !p2 || !p3) {
 935                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
 936                 return 0;
 937         }
 938
 939         page = kmap_atomic(p1, KM_USER0);
 940         memset(page, 0, PAGE_SIZE);
 941         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
 942         kunmap_atomic(page, KM_USER0);
 943
 944         page = kmap_atomic(p2, KM_USER0);
 945         memset(page, 0, PAGE_SIZE);
 946         kunmap_atomic(page, KM_USER0);
 947
 948         page = kmap_atomic(p3, KM_USER0);
 949         memset(page, 0, PAGE_SIZE);
 950         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
 951         kunmap_atomic(page, KM_USER0);
 952
 953         return 1;
 954 }
 955
 956 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
 957 {
 958         u32 msr_high, msr_low;
 959
 960         rdmsr(msr, msr_low, msr_high);
 961
 962         val &= msr_high;
 963         val |= msr_low;
 964         vmcs_write32(vmcs_field, val);
 965 }
 966
 967 static void seg_setup(int seg)
 968 {
 969         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 970
 971         vmcs_write16(sf->selector, 0);
 972         vmcs_writel(sf->base, 0);
 973         vmcs_write32(sf->limit, 0xffff);
 974         vmcs_write32(sf->ar_bytes, 0x93);
 975 }
 976
 977 /*
 978  * Sets up the vmcs for emulated real mode.
 979  */
 980 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
 981 {
 982         u32 host_sysenter_cs;
 983         u32 junk;
 984         unsigned long a;
 985         struct descriptor_table dt;
 986         int i;
 987         int ret = 0;
 988         int nr_good_msrs;
 989         extern asmlinkage void kvm_vmx_return(void);
 990
 991         if (!init_rmode_tss(vcpu->kvm)) {
 992                 ret = -ENOMEM;
 993                 goto out;
 994         }
 995
 996         memset(vcpu->regs, 0, sizeof(vcpu->regs));
 997         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
 998         vcpu->cr8 = 0;
 999         vcpu->apic_base = 0xfee00000 |
1000                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1001                         MSR_IA32_APICBASE_ENABLE;
1002
1003         fx_init(vcpu);
1004
1005         /*
1006          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1007          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1008          */
1009         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1010         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1011         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1012         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1013
1014         seg_setup(VCPU_SREG_DS);
1015         seg_setup(VCPU_SREG_ES);
1016         seg_setup(VCPU_SREG_FS);
1017         seg_setup(VCPU_SREG_GS);
1018         seg_setup(VCPU_SREG_SS);
1019
1020         vmcs_write16(GUEST_TR_SELECTOR, 0);
1021         vmcs_writel(GUEST_TR_BASE, 0);
1022         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1023         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1024
1025         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1026         vmcs_writel(GUEST_LDTR_BASE, 0);
1027         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1028         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1029
1030         vmcs_write32(GUEST_SYSENTER_CS, 0);
1031         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1032         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1033
1034         vmcs_writel(GUEST_RFLAGS, 0x02);
1035         vmcs_writel(GUEST_RIP, 0xfff0);
1036         vmcs_writel(GUEST_RSP, 0);
1037
1038         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1039         vmcs_writel(GUEST_DR7, 0x400);
1040
1041         vmcs_writel(GUEST_GDTR_BASE, 0);
1042         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1043
1044         vmcs_writel(GUEST_IDTR_BASE, 0);
1045         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1046
1047         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1048         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1049         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1050
1051         /* I/O */
1052         vmcs_write64(IO_BITMAP_A, 0);
1053         vmcs_write64(IO_BITMAP_B, 0);
1054
1055         guest_write_tsc(0);
1056
1057         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1058
1059         /* Special registers */
1060         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1061
1062         /* Control */
1063         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1064                                PIN_BASED_VM_EXEC_CONTROL,
1065                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1066                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1067                         );
1068         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1069                                CPU_BASED_VM_EXEC_CONTROL,
1070                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1071                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1072                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1073                                | CPU_BASED_UNCOND_IO_EXITING   /* 20.6.2 */
1074                                | CPU_BASED_MOV_DR_EXITING
1075                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1076                         );
1077
1078         vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1079         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1080         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1081         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1082
1083         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1084         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1085         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1086
1087         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1088         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1089         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1090         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1091         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1092         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1093 #ifdef CONFIG_X86_64
1094         rdmsrl(MSR_FS_BASE, a);
1095         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1096         rdmsrl(MSR_GS_BASE, a);
1097         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1098 #else
1099         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1100         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1101 #endif
1102
1103         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1104
1105         get_idt(&dt);
1106         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1107
1108
1109         vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1110
1111         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1112         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1113         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1114         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1115         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1116         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1117
1118         for (i = 0; i < NR_VMX_MSR; ++i) {
1119                 u32 index = vmx_msr_index[i];
1120                 u32 data_low, data_high;
1121                 u64 data;
1122                 int j = vcpu->nmsrs;
1123
1124                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1125                         continue;
1126                 if (wrmsr_safe(index, data_low, data_high) < 0)
1127                         continue;
1128                 data = data_low | ((u64)data_high << 32);
1129                 vcpu->host_msrs[j].index = index;
1130                 vcpu->host_msrs[j].reserved = 0;
1131                 vcpu->host_msrs[j].data = data;
1132                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1133                 ++vcpu->nmsrs;
1134         }
1135         printk(KERN_DEBUG "kvm: msrs: %d\n", vcpu->nmsrs);
1136
1137         nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1138         vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1139                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1140         vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1141                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1142         vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1143                     virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
1144         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1145                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1146         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1147         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs);  /* 22.2.2 */
1148         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1149
1150
1151         /* 22.2.1, 20.8.1 */
1152         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1153                                VM_ENTRY_CONTROLS, 0);
1154         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1155
1156 #ifdef CONFIG_X86_64
1157         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1158         vmcs_writel(TPR_THRESHOLD, 0);
1159 #endif
1160
1161         vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1162         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1163
1164         vcpu->cr0 = 0x60000010;
1165         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1166         vmx_set_cr4(vcpu, 0);
1167 #ifdef CONFIG_X86_64
1168         vmx_set_efer(vcpu, 0);
1169 #endif
1170
1171         return 0;
1172
1173 out:
1174         return ret;
1175 }
1176
1177 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1178 {
1179         u16 ent[2];
1180         u16 cs;
1181         u16 ip;
1182         unsigned long flags;
1183         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1184         u16 sp =  vmcs_readl(GUEST_RSP);
1185         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1186
1187         if (sp > ss_limit || sp - 6 > sp) {
1188                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1189                             __FUNCTION__,
1190                             vmcs_readl(GUEST_RSP),
1191                             vmcs_readl(GUEST_SS_BASE),
1192                             vmcs_read32(GUEST_SS_LIMIT));
1193                 return;
1194         }
1195
1196         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1197                                                                 sizeof(ent)) {
1198                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1199                 return;
1200         }
1201
1202         flags =  vmcs_readl(GUEST_RFLAGS);
1203         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1204         ip =  vmcs_readl(GUEST_RIP);
1205
1206
1207         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1208             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1209             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1210                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1211                 return;
1212         }
1213
1214         vmcs_writel(GUEST_RFLAGS, flags &
1215                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1216         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1217         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1218         vmcs_writel(GUEST_RIP, ent[0]);
1219         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1220 }
1221
1222 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1223 {
1224         int word_index = __ffs(vcpu->irq_summary);
1225         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1226         int irq = word_index * BITS_PER_LONG + bit_index;
1227
1228         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1229         if (!vcpu->irq_pending[word_index])
1230                 clear_bit(word_index, &vcpu->irq_summary);
1231
1232         if (vcpu->rmode.active) {
1233                 inject_rmode_irq(vcpu, irq);
1234                 return;
1235         }
1236         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1237                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1238 }
1239
1240
1241 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1242                                        struct kvm_run *kvm_run)
1243 {
1244         u32 cpu_based_vm_exec_control;
1245
1246         vcpu->interrupt_window_open =
1247                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1248                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1249
1250         if (vcpu->interrupt_window_open &&
1251             vcpu->irq_summary &&
1252             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1253                 /*
1254                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1255                  */
1256                 kvm_do_inject_irq(vcpu);
1257
1258         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1259         if (!vcpu->interrupt_window_open &&
1260             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1261                 /*
1262                  * Interrupts blocked.  Wait for unblock.
1263                  */
1264                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1265         else
1266                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1267         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1268 }
1269
1270 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1271 {
1272         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1273
1274         set_debugreg(dbg->bp[0], 0);
1275         set_debugreg(dbg->bp[1], 1);
1276         set_debugreg(dbg->bp[2], 2);
1277         set_debugreg(dbg->bp[3], 3);
1278
1279         if (dbg->singlestep) {
1280                 unsigned long flags;
1281
1282                 flags = vmcs_readl(GUEST_RFLAGS);
1283                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1284                 vmcs_writel(GUEST_RFLAGS, flags);
1285         }
1286 }
1287
1288 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1289                                   int vec, u32 err_code)
1290 {
1291         if (!vcpu->rmode.active)
1292                 return 0;
1293
1294         if (vec == GP_VECTOR && err_code == 0)
1295                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1296                         return 1;
1297         return 0;
1298 }
1299
1300 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1301 {
1302         u32 intr_info, error_code;
1303         unsigned long cr2, rip;
1304         u32 vect_info;
1305         enum emulation_result er;
1306         int r;
1307
1308         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1309         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1310
1311         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1312                                                 !is_page_fault(intr_info)) {
1313                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1314                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1315         }
1316
1317         if (is_external_interrupt(vect_info)) {
1318                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1319                 set_bit(irq, vcpu->irq_pending);
1320                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1321         }
1322
1323         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1324                 asm ("int $2");
1325                 return 1;
1326         }
1327         error_code = 0;
1328         rip = vmcs_readl(GUEST_RIP);
1329         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1330                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1331         if (is_page_fault(intr_info)) {
1332                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1333
1334                 spin_lock(&vcpu->kvm->lock);
1335                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1336                 if (r < 0) {
1337                         spin_unlock(&vcpu->kvm->lock);
1338                         return r;
1339                 }
1340                 if (!r) {
1341                         spin_unlock(&vcpu->kvm->lock);
1342                         return 1;
1343                 }
1344
1345                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1346                 spin_unlock(&vcpu->kvm->lock);
1347
1348                 switch (er) {
1349                 case EMULATE_DONE:
1350                         return 1;
1351                 case EMULATE_DO_MMIO:
1352                         ++kvm_stat.mmio_exits;
1353                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1354                         return 0;
1355                  case EMULATE_FAIL:
1356                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1357                         break;
1358                 default:
1359                         BUG();
1360                 }
1361         }
1362
1363         if (vcpu->rmode.active &&
1364             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1365                                                                 error_code))
1366                 return 1;
1367
1368         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1369                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1370                 return 0;
1371         }
1372         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1373         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1374         kvm_run->ex.error_code = error_code;
1375         return 0;
1376 }
1377
1378 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1379                                      struct kvm_run *kvm_run)
1380 {
1381         ++kvm_stat.irq_exits;
1382         return 1;
1383 }
1384
1385 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1386 {
1387         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1388         return 0;
1389 }
1390
1391 static int get_io_count(struct kvm_vcpu *vcpu, u64 *count)
1392 {
1393         u64 inst;
1394         gva_t rip;
1395         int countr_size;
1396         int i, n;
1397
1398         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1399                 countr_size = 2;
1400         } else {
1401                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1402
1403                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1404                               (cs_ar & AR_DB_MASK) ? 4: 2;
1405         }
1406
1407         rip =  vmcs_readl(GUEST_RIP);
1408         if (countr_size != 8)
1409                 rip += vmcs_readl(GUEST_CS_BASE);
1410
1411         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1412
1413         for (i = 0; i < n; i++) {
1414                 switch (((u8*)&inst)[i]) {
1415                 case 0xf0:
1416                 case 0xf2:
1417                 case 0xf3:
1418                 case 0x2e:
1419                 case 0x36:
1420                 case 0x3e:
1421                 case 0x26:
1422                 case 0x64:
1423                 case 0x65:
1424                 case 0x66:
1425                         break;
1426                 case 0x67:
1427                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1428                 default:
1429                         goto done;
1430                 }
1431         }
1432         return 0;
1433 done:
1434         countr_size *= 8;
1435         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1436         return 1;
1437 }
1438
1439 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1440 {
1441         u64 exit_qualification;
1442
1443         ++kvm_stat.io_exits;
1444         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1445         kvm_run->exit_reason = KVM_EXIT_IO;
1446         if (exit_qualification & 8)
1447                 kvm_run->io.direction = KVM_EXIT_IO_IN;
1448         else
1449                 kvm_run->io.direction = KVM_EXIT_IO_OUT;
1450         kvm_run->io.size = (exit_qualification & 7) + 1;
1451         kvm_run->io.string = (exit_qualification & 16) != 0;
1452         kvm_run->io.string_down
1453                 = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1454         kvm_run->io.rep = (exit_qualification & 32) != 0;
1455         kvm_run->io.port = exit_qualification >> 16;
1456         if (kvm_run->io.string) {
1457                 if (!get_io_count(vcpu, &kvm_run->io.count))
1458                         return 1;
1459                 kvm_run->io.address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1460         } else
1461                 kvm_run->io.value = vcpu->regs[VCPU_REGS_RAX]; /* rax */
1462         return 0;
1463 }
1464
1465 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1466 {
1467         u64 exit_qualification;
1468         int cr;
1469         int reg;
1470
1471         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1472         cr = exit_qualification & 15;
1473         reg = (exit_qualification >> 8) & 15;
1474         switch ((exit_qualification >> 4) & 3) {
1475         case 0: /* mov to cr */
1476                 switch (cr) {
1477                 case 0:
1478                         vcpu_load_rsp_rip(vcpu);
1479                         set_cr0(vcpu, vcpu->regs[reg]);
1480                         skip_emulated_instruction(vcpu);
1481                         return 1;
1482                 case 3:
1483                         vcpu_load_rsp_rip(vcpu);
1484                         set_cr3(vcpu, vcpu->regs[reg]);
1485                         skip_emulated_instruction(vcpu);
1486                         return 1;
1487                 case 4:
1488                         vcpu_load_rsp_rip(vcpu);
1489                         set_cr4(vcpu, vcpu->regs[reg]);
1490                         skip_emulated_instruction(vcpu);
1491                         return 1;
1492                 case 8:
1493                         vcpu_load_rsp_rip(vcpu);
1494                         set_cr8(vcpu, vcpu->regs[reg]);
1495                         skip_emulated_instruction(vcpu);
1496                         return 1;
1497                 };
1498                 break;
1499         case 1: /*mov from cr*/
1500                 switch (cr) {
1501                 case 3:
1502                         vcpu_load_rsp_rip(vcpu);
1503                         vcpu->regs[reg] = vcpu->cr3;
1504                         vcpu_put_rsp_rip(vcpu);
1505                         skip_emulated_instruction(vcpu);
1506                         return 1;
1507                 case 8:
1508                         printk(KERN_DEBUG "handle_cr: read CR8 "
1509                                "cpu erratum AA15\n");
1510                         vcpu_load_rsp_rip(vcpu);
1511                         vcpu->regs[reg] = vcpu->cr8;
1512                         vcpu_put_rsp_rip(vcpu);
1513                         skip_emulated_instruction(vcpu);
1514                         return 1;
1515                 }
1516                 break;
1517         case 3: /* lmsw */
1518                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1519
1520                 skip_emulated_instruction(vcpu);
1521                 return 1;
1522         default:
1523                 break;
1524         }
1525         kvm_run->exit_reason = 0;
1526         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1527                (int)(exit_qualification >> 4) & 3, cr);
1528         return 0;
1529 }
1530
1531 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1532 {
1533         u64 exit_qualification;
1534         unsigned long val;
1535         int dr, reg;
1536
1537         /*
1538          * FIXME: this code assumes the host is debugging the guest.
1539          *        need to deal with guest debugging itself too.
1540          */
1541         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1542         dr = exit_qualification & 7;
1543         reg = (exit_qualification >> 8) & 15;
1544         vcpu_load_rsp_rip(vcpu);
1545         if (exit_qualification & 16) {
1546                 /* mov from dr */
1547                 switch (dr) {
1548                 case 6:
1549                         val = 0xffff0ff0;
1550                         break;
1551                 case 7:
1552                         val = 0x400;
1553                         break;
1554                 default:
1555                         val = 0;
1556                 }
1557                 vcpu->regs[reg] = val;
1558         } else {
1559                 /* mov to dr */
1560         }
1561         vcpu_put_rsp_rip(vcpu);
1562         skip_emulated_instruction(vcpu);
1563         return 1;
1564 }
1565
1566 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1567 {
1568         kvm_run->exit_reason = KVM_EXIT_CPUID;
1569         return 0;
1570 }
1571
1572 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1573 {
1574         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1575         u64 data;
1576
1577         if (vmx_get_msr(vcpu, ecx, &data)) {
1578                 vmx_inject_gp(vcpu, 0);
1579                 return 1;
1580         }
1581
1582         /* FIXME: handling of bits 32:63 of rax, rdx */
1583         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1584         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1585         skip_emulated_instruction(vcpu);
1586         return 1;
1587 }
1588
1589 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1590 {
1591         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1592         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1593                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1594
1595         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1596                 vmx_inject_gp(vcpu, 0);
1597                 return 1;
1598         }
1599
1600         skip_emulated_instruction(vcpu);
1601         return 1;
1602 }
1603
1604 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1605                               struct kvm_run *kvm_run)
1606 {
1607         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1608         kvm_run->cr8 = vcpu->cr8;
1609         kvm_run->apic_base = vcpu->apic_base;
1610         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1611                                                   vcpu->irq_summary == 0);
1612 }
1613
1614 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1615                                    struct kvm_run *kvm_run)
1616 {
1617         /*
1618          * If the user space waits to inject interrupts, exit as soon as
1619          * possible
1620          */
1621         if (kvm_run->request_interrupt_window &&
1622             !vcpu->irq_summary) {
1623                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1624                 ++kvm_stat.irq_window_exits;
1625                 return 0;
1626         }
1627         return 1;
1628 }
1629
1630 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1631 {
1632         skip_emulated_instruction(vcpu);
1633         if (vcpu->irq_summary)
1634                 return 1;
1635
1636         kvm_run->exit_reason = KVM_EXIT_HLT;
1637         ++kvm_stat.halt_exits;
1638         return 0;
1639 }
1640
1641 /*
1642  * The exit handlers return 1 if the exit was handled fully and guest execution
1643  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1644  * to be done to userspace and return 0.
1645  */
1646 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1647                                       struct kvm_run *kvm_run) = {
1648         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1649         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1650         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
1651         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1652         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1653         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1654         [EXIT_REASON_CPUID]                   = handle_cpuid,
1655         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1656         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1657         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1658         [EXIT_REASON_HLT]                     = handle_halt,
1659 };
1660
1661 static const int kvm_vmx_max_exit_handlers =
1662         sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1663
1664 /*
1665  * The guest has exited.  See if we can fix it or if we need userspace
1666  * assistance.
1667  */
1668 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1669 {
1670         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1671         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1672
1673         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1674                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1675                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1676                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1677         kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1678         if (exit_reason < kvm_vmx_max_exit_handlers
1679             && kvm_vmx_exit_handlers[exit_reason])
1680                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1681         else {
1682                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1683                 kvm_run->hw.hardware_exit_reason = exit_reason;
1684         }
1685         return 0;
1686 }
1687
1688 /*
1689  * Check if userspace requested an interrupt window, and that the
1690  * interrupt window is open.
1691  *
1692  * No need to exit to userspace if we already have an interrupt queued.
1693  */
1694 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1695                                           struct kvm_run *kvm_run)
1696 {
1697         return (!vcpu->irq_summary &&
1698                 kvm_run->request_interrupt_window &&
1699                 vcpu->interrupt_window_open &&
1700                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1701 }
1702
1703 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1704 {
1705         u8 fail;
1706         u16 fs_sel, gs_sel, ldt_sel;
1707         int fs_gs_ldt_reload_needed;
1708         int r;
1709
1710 again:
1711         /*
1712          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
1713          * allow segment selectors with cpl > 0 or ti == 1.
1714          */
1715         fs_sel = read_fs();
1716         gs_sel = read_gs();
1717         ldt_sel = read_ldt();
1718         fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1719         if (!fs_gs_ldt_reload_needed) {
1720                 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1721                 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1722         } else {
1723                 vmcs_write16(HOST_FS_SELECTOR, 0);
1724                 vmcs_write16(HOST_GS_SELECTOR, 0);
1725         }
1726
1727 #ifdef CONFIG_X86_64
1728         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1729         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1730 #else
1731         vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1732         vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1733 #endif
1734
1735         if (!vcpu->mmio_read_completed)
1736                 do_interrupt_requests(vcpu, kvm_run);
1737
1738         if (vcpu->guest_debug.enabled)
1739                 kvm_guest_debug_pre(vcpu);
1740
1741         fx_save(vcpu->host_fx_image);
1742         fx_restore(vcpu->guest_fx_image);
1743
1744         save_msrs(vcpu->host_msrs, vcpu->nmsrs);
1745         load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1746
1747         asm (
1748                 /* Store host registers */
1749                 "pushf \n\t"
1750 #ifdef CONFIG_X86_64
1751                 "push %%rax; push %%rbx; push %%rdx;"
1752                 "push %%rsi; push %%rdi; push %%rbp;"
1753                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1754                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1755                 "push %%rcx \n\t"
1756                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1757 #else
1758                 "pusha; push %%ecx \n\t"
1759                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1760 #endif
1761                 /* Check if vmlaunch of vmresume is needed */
1762                 "cmp $0, %1 \n\t"
1763                 /* Load guest registers.  Don't clobber flags. */
1764 #ifdef CONFIG_X86_64
1765                 "mov %c[cr2](%3), %%rax \n\t"
1766                 "mov %%rax, %%cr2 \n\t"
1767                 "mov %c[rax](%3), %%rax \n\t"
1768                 "mov %c[rbx](%3), %%rbx \n\t"
1769                 "mov %c[rdx](%3), %%rdx \n\t"
1770                 "mov %c[rsi](%3), %%rsi \n\t"
1771                 "mov %c[rdi](%3), %%rdi \n\t"
1772                 "mov %c[rbp](%3), %%rbp \n\t"
1773                 "mov %c[r8](%3),  %%r8  \n\t"
1774                 "mov %c[r9](%3),  %%r9  \n\t"
1775                 "mov %c[r10](%3), %%r10 \n\t"
1776                 "mov %c[r11](%3), %%r11 \n\t"
1777                 "mov %c[r12](%3), %%r12 \n\t"
1778                 "mov %c[r13](%3), %%r13 \n\t"
1779                 "mov %c[r14](%3), %%r14 \n\t"
1780                 "mov %c[r15](%3), %%r15 \n\t"
1781                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1782 #else
1783                 "mov %c[cr2](%3), %%eax \n\t"
1784                 "mov %%eax,   %%cr2 \n\t"
1785                 "mov %c[rax](%3), %%eax \n\t"
1786                 "mov %c[rbx](%3), %%ebx \n\t"
1787                 "mov %c[rdx](%3), %%edx \n\t"
1788                 "mov %c[rsi](%3), %%esi \n\t"
1789                 "mov %c[rdi](%3), %%edi \n\t"
1790                 "mov %c[rbp](%3), %%ebp \n\t"
1791                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1792 #endif
1793                 /* Enter guest mode */
1794                 "jne launched \n\t"
1795                 ASM_VMX_VMLAUNCH "\n\t"
1796                 "jmp kvm_vmx_return \n\t"
1797                 "launched: " ASM_VMX_VMRESUME "\n\t"
1798                 ".globl kvm_vmx_return \n\t"
1799                 "kvm_vmx_return: "
1800                 /* Save guest registers, load host registers, keep flags */
1801 #ifdef CONFIG_X86_64
1802                 "xchg %3,     (%%rsp) \n\t"
1803                 "mov %%rax, %c[rax](%3) \n\t"
1804                 "mov %%rbx, %c[rbx](%3) \n\t"
1805                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1806                 "mov %%rdx, %c[rdx](%3) \n\t"
1807                 "mov %%rsi, %c[rsi](%3) \n\t"
1808                 "mov %%rdi, %c[rdi](%3) \n\t"
1809                 "mov %%rbp, %c[rbp](%3) \n\t"
1810                 "mov %%r8,  %c[r8](%3) \n\t"
1811                 "mov %%r9,  %c[r9](%3) \n\t"
1812                 "mov %%r10, %c[r10](%3) \n\t"
1813                 "mov %%r11, %c[r11](%3) \n\t"
1814                 "mov %%r12, %c[r12](%3) \n\t"
1815                 "mov %%r13, %c[r13](%3) \n\t"
1816                 "mov %%r14, %c[r14](%3) \n\t"
1817                 "mov %%r15, %c[r15](%3) \n\t"
1818                 "mov %%cr2, %%rax   \n\t"
1819                 "mov %%rax, %c[cr2](%3) \n\t"
1820                 "mov (%%rsp), %3 \n\t"
1821
1822                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1823                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1824                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1825                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
1826 #else
1827                 "xchg %3, (%%esp) \n\t"
1828                 "mov %%eax, %c[rax](%3) \n\t"
1829                 "mov %%ebx, %c[rbx](%3) \n\t"
1830                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1831                 "mov %%edx, %c[rdx](%3) \n\t"
1832                 "mov %%esi, %c[rsi](%3) \n\t"
1833                 "mov %%edi, %c[rdi](%3) \n\t"
1834                 "mov %%ebp, %c[rbp](%3) \n\t"
1835                 "mov %%cr2, %%eax  \n\t"
1836                 "mov %%eax, %c[cr2](%3) \n\t"
1837                 "mov (%%esp), %3 \n\t"
1838
1839                 "pop %%ecx; popa \n\t"
1840 #endif
1841                 "setbe %0 \n\t"
1842                 "popf \n\t"
1843               : "=q" (fail)
1844               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1845                 "c"(vcpu),
1846                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1847                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1848                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1849                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1850                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1851                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1852                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1853 #ifdef CONFIG_X86_64
1854                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1855                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1856                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1857                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1858                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1859                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1860                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1861                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1862 #endif
1863                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1864               : "cc", "memory" );
1865
1866         ++kvm_stat.exits;
1867
1868         save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1869         load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1870
1871         fx_save(vcpu->guest_fx_image);
1872         fx_restore(vcpu->host_fx_image);
1873         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
1874
1875         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
1876
1877         /*
1878          * Profile KVM exit RIPs:
1879          */
1880         if (unlikely(prof_on == KVM_PROFILING))
1881                 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
1882
1883         kvm_run->exit_type = 0;
1884         if (fail) {
1885                 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1886                 kvm_run->exit_reason = vmcs_read32(VM_INSTRUCTION_ERROR);
1887                 r = 0;
1888         } else {
1889                 if (fs_gs_ldt_reload_needed) {
1890                         load_ldt(ldt_sel);
1891                         load_fs(fs_sel);
1892                         /*
1893                          * If we have to reload gs, we must take care to
1894                          * preserve our gs base.
1895                          */
1896                         local_irq_disable();
1897                         load_gs(gs_sel);
1898 #ifdef CONFIG_X86_64
1899                         wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1900 #endif
1901                         local_irq_enable();
1902
1903                         reload_tss();
1904                 }
1905                 vcpu->launched = 1;
1906                 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1907                 r = kvm_handle_exit(kvm_run, vcpu);
1908                 if (r > 0) {
1909                         /* Give scheduler a change to reschedule. */
1910                         if (signal_pending(current)) {
1911                                 ++kvm_stat.signal_exits;
1912                                 post_kvm_run_save(vcpu, kvm_run);
1913                                 return -EINTR;
1914                         }
1915
1916                         if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1917                                 ++kvm_stat.request_irq_exits;
1918                                 post_kvm_run_save(vcpu, kvm_run);
1919                                 return -EINTR;
1920                         }
1921
1922                         kvm_resched(vcpu);
1923                         goto again;
1924                 }
1925         }
1926
1927         post_kvm_run_save(vcpu, kvm_run);
1928         return r;
1929 }
1930
1931 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1932 {
1933         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1934 }
1935
1936 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1937                                   unsigned long addr,
1938                                   u32 err_code)
1939 {
1940         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1941
1942         ++kvm_stat.pf_guest;
1943
1944         if (is_page_fault(vect_info)) {
1945                 printk(KERN_DEBUG "inject_page_fault: "
1946                        "double fault 0x%lx @ 0x%lx\n",
1947                        addr, vmcs_readl(GUEST_RIP));
1948                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1949                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1950                              DF_VECTOR |
1951                              INTR_TYPE_EXCEPTION |
1952                              INTR_INFO_DELIEVER_CODE_MASK |
1953                              INTR_INFO_VALID_MASK);
1954                 return;
1955         }
1956         vcpu->cr2 = addr;
1957         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1958         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1959                      PF_VECTOR |
1960                      INTR_TYPE_EXCEPTION |
1961                      INTR_INFO_DELIEVER_CODE_MASK |
1962                      INTR_INFO_VALID_MASK);
1963
1964 }
1965
1966 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
1967 {
1968         if (vcpu->vmcs) {
1969                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
1970                 free_vmcs(vcpu->vmcs);
1971                 vcpu->vmcs = NULL;
1972         }
1973 }
1974
1975 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
1976 {
1977         vmx_free_vmcs(vcpu);
1978 }
1979
1980 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
1981 {
1982         struct vmcs *vmcs;
1983
1984         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1985         if (!vcpu->guest_msrs)
1986                 return -ENOMEM;
1987
1988         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1989         if (!vcpu->host_msrs)
1990                 goto out_free_guest_msrs;
1991
1992         vmcs = alloc_vmcs();
1993         if (!vmcs)
1994                 goto out_free_msrs;
1995
1996         vmcs_clear(vmcs);
1997         vcpu->vmcs = vmcs;
1998         vcpu->launched = 0;
1999
2000         return 0;
2001
2002 out_free_msrs:
2003         kfree(vcpu->host_msrs);
2004         vcpu->host_msrs = NULL;
2005
2006 out_free_guest_msrs:
2007         kfree(vcpu->guest_msrs);
2008         vcpu->guest_msrs = NULL;
2009
2010         return -ENOMEM;
2011 }
2012
2013 static struct kvm_arch_ops vmx_arch_ops = {
2014         .cpu_has_kvm_support = cpu_has_kvm_support,
2015         .disabled_by_bios = vmx_disabled_by_bios,
2016         .hardware_setup = hardware_setup,
2017         .hardware_unsetup = hardware_unsetup,
2018         .hardware_enable = hardware_enable,
2019         .hardware_disable = hardware_disable,
2020
2021         .vcpu_create = vmx_create_vcpu,
2022         .vcpu_free = vmx_free_vcpu,
2023
2024         .vcpu_load = vmx_vcpu_load,
2025         .vcpu_put = vmx_vcpu_put,
2026
2027         .set_guest_debug = set_guest_debug,
2028         .get_msr = vmx_get_msr,
2029         .set_msr = vmx_set_msr,
2030         .get_segment_base = vmx_get_segment_base,
2031         .get_segment = vmx_get_segment,
2032         .set_segment = vmx_set_segment,
2033         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2034         .decache_cr0_cr4_guest_bits = vmx_decache_cr0_cr4_guest_bits,
2035         .set_cr0 = vmx_set_cr0,
2036         .set_cr0_no_modeswitch = vmx_set_cr0_no_modeswitch,
2037         .set_cr3 = vmx_set_cr3,
2038         .set_cr4 = vmx_set_cr4,
2039 #ifdef CONFIG_X86_64
2040         .set_efer = vmx_set_efer,
2041 #endif
2042         .get_idt = vmx_get_idt,
2043         .set_idt = vmx_set_idt,
2044         .get_gdt = vmx_get_gdt,
2045         .set_gdt = vmx_set_gdt,
2046         .cache_regs = vcpu_load_rsp_rip,
2047         .decache_regs = vcpu_put_rsp_rip,
2048         .get_rflags = vmx_get_rflags,
2049         .set_rflags = vmx_set_rflags,
2050
2051         .tlb_flush = vmx_flush_tlb,
2052         .inject_page_fault = vmx_inject_page_fault,
2053
2054         .inject_gp = vmx_inject_gp,
2055
2056         .run = vmx_vcpu_run,
2057         .skip_emulated_instruction = skip_emulated_instruction,
2058         .vcpu_setup = vmx_vcpu_setup,
2059 };
2060
2061 static int __init vmx_init(void)
2062 {
2063         return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2064 }
2065
2066 static void __exit vmx_exit(void)
2067 {
2068         kvm_exit_arch();
2069 }
2070
2071 module_init(vmx_init)
2072 module_exit(vmx_exit)