SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include "kvm_vmx.h"
  21 #include <linux/module.h>
  22 #include <linux/kernel.h>
  23 #include <linux/mm.h>
  24 #include <linux/highmem.h>
  25 #include <linux/profile.h>
  26 #include <asm/io.h>
  27 #include <asm/desc.h>
  28
  29 #include "segment_descriptor.h"
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  36
  37 #ifdef CONFIG_X86_64
  38 #define HOST_IS_64 1
  39 #else
  40 #define HOST_IS_64 0
  41 #endif
  42
  43 static struct vmcs_descriptor {
  44         int size;
  45         int order;
  46         u32 revision_id;
  47 } vmcs_descriptor;
  48
  49 #define VMX_SEGMENT_FIELD(seg)                                  \
  50         [VCPU_SREG_##seg] = {                                   \
  51                 .selector = GUEST_##seg##_SELECTOR,             \
  52                 .base = GUEST_##seg##_BASE,                     \
  53                 .limit = GUEST_##seg##_LIMIT,                   \
  54                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  55         }
  56
  57 static struct kvm_vmx_segment_field {
  58         unsigned selector;
  59         unsigned base;
  60         unsigned limit;
  61         unsigned ar_bytes;
  62 } kvm_vmx_segment_fields[] = {
  63         VMX_SEGMENT_FIELD(CS),
  64         VMX_SEGMENT_FIELD(DS),
  65         VMX_SEGMENT_FIELD(ES),
  66         VMX_SEGMENT_FIELD(FS),
  67         VMX_SEGMENT_FIELD(GS),
  68         VMX_SEGMENT_FIELD(SS),
  69         VMX_SEGMENT_FIELD(TR),
  70         VMX_SEGMENT_FIELD(LDTR),
  71 };
  72
  73 static const u32 vmx_msr_index[] = {
  74 #ifdef CONFIG_X86_64
  75         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  76 #endif
  77         MSR_EFER, MSR_K6_STAR,
  78 };
  79 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
  80
  81 #ifdef CONFIG_X86_64
  82 static unsigned msr_offset_kernel_gs_base;
  83 #endif
  84
  85 static inline int is_page_fault(u32 intr_info)
  86 {
  87         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
  88                              INTR_INFO_VALID_MASK)) ==
  89                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
  90 }
  91
  92 static inline int is_external_interrupt(u32 intr_info)
  93 {
  94         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
  95                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
  96 }
  97
  98 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
  99 {
 100         int i;
 101
 102         for (i = 0; i < vcpu->nmsrs; ++i)
 103                 if (vcpu->guest_msrs[i].index == msr)
 104                         return &vcpu->guest_msrs[i];
 105         return NULL;
 106 }
 107
 108 static void vmcs_clear(struct vmcs *vmcs)
 109 {
 110         u64 phys_addr = __pa(vmcs);
 111         u8 error;
 112
 113         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 114                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 115                       : "cc", "memory");
 116         if (error)
 117                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 118                        vmcs, phys_addr);
 119 }
 120
 121 static void __vcpu_clear(void *arg)
 122 {
 123         struct kvm_vcpu *vcpu = arg;
 124         int cpu = raw_smp_processor_id();
 125
 126         if (vcpu->cpu == cpu)
 127                 vmcs_clear(vcpu->vmcs);
 128         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 129                 per_cpu(current_vmcs, cpu) = NULL;
 130 }
 131
 132 static void vcpu_clear(struct kvm_vcpu *vcpu)
 133 {
 134         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
 135                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
 136         else
 137                 __vcpu_clear(vcpu);
 138         vcpu->launched = 0;
 139 }
 140
 141 static unsigned long vmcs_readl(unsigned long field)
 142 {
 143         unsigned long value;
 144
 145         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 146                       : "=a"(value) : "d"(field) : "cc");
 147         return value;
 148 }
 149
 150 static u16 vmcs_read16(unsigned long field)
 151 {
 152         return vmcs_readl(field);
 153 }
 154
 155 static u32 vmcs_read32(unsigned long field)
 156 {
 157         return vmcs_readl(field);
 158 }
 159
 160 static u64 vmcs_read64(unsigned long field)
 161 {
 162 #ifdef CONFIG_X86_64
 163         return vmcs_readl(field);
 164 #else
 165         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 166 #endif
 167 }
 168
 169 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 170 {
 171         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 172                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 173         dump_stack();
 174 }
 175
 176 static void vmcs_writel(unsigned long field, unsigned long value)
 177 {
 178         u8 error;
 179
 180         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 181                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 182         if (unlikely(error))
 183                 vmwrite_error(field, value);
 184 }
 185
 186 static void vmcs_write16(unsigned long field, u16 value)
 187 {
 188         vmcs_writel(field, value);
 189 }
 190
 191 static void vmcs_write32(unsigned long field, u32 value)
 192 {
 193         vmcs_writel(field, value);
 194 }
 195
 196 static void vmcs_write64(unsigned long field, u64 value)
 197 {
 198 #ifdef CONFIG_X86_64
 199         vmcs_writel(field, value);
 200 #else
 201         vmcs_writel(field, value);
 202         asm volatile ("");
 203         vmcs_writel(field+1, value >> 32);
 204 #endif
 205 }
 206
 207 /*
 208  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 209  * vcpu mutex is already taken.
 210  */
 211 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
 212 {
 213         u64 phys_addr = __pa(vcpu->vmcs);
 214         int cpu;
 215
 216         cpu = get_cpu();
 217
 218         if (vcpu->cpu != cpu)
 219                 vcpu_clear(vcpu);
 220
 221         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 222                 u8 error;
 223
 224                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 225                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 226                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 227                               : "cc");
 228                 if (error)
 229                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 230                                vcpu->vmcs, phys_addr);
 231         }
 232
 233         if (vcpu->cpu != cpu) {
 234                 struct descriptor_table dt;
 235                 unsigned long sysenter_esp;
 236
 237                 vcpu->cpu = cpu;
 238                 /*
 239                  * Linux uses per-cpu TSS and GDT, so set these when switching
 240                  * processors.
 241                  */
 242                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 243                 get_gdt(&dt);
 244                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 245
 246                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 247                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 248         }
 249 }
 250
 251 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 252 {
 253         put_cpu();
 254 }
 255
 256 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 257 {
 258         vcpu_clear(vcpu);
 259 }
 260
 261 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 262 {
 263         return vmcs_readl(GUEST_RFLAGS);
 264 }
 265
 266 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 267 {
 268         vmcs_writel(GUEST_RFLAGS, rflags);
 269 }
 270
 271 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 272 {
 273         unsigned long rip;
 274         u32 interruptibility;
 275
 276         rip = vmcs_readl(GUEST_RIP);
 277         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 278         vmcs_writel(GUEST_RIP, rip);
 279
 280         /*
 281          * We emulated an instruction, so temporary interrupt blocking
 282          * should be removed, if set.
 283          */
 284         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 285         if (interruptibility & 3)
 286                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 287                              interruptibility & ~3);
 288         vcpu->interrupt_window_open = 1;
 289 }
 290
 291 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 292 {
 293         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 294                vmcs_readl(GUEST_RIP));
 295         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 296         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 297                      GP_VECTOR |
 298                      INTR_TYPE_EXCEPTION |
 299                      INTR_INFO_DELIEVER_CODE_MASK |
 300                      INTR_INFO_VALID_MASK);
 301 }
 302
 303 /*
 304  * reads and returns guest's timestamp counter "register"
 305  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 306  */
 307 static u64 guest_read_tsc(void)
 308 {
 309         u64 host_tsc, tsc_offset;
 310
 311         rdtscll(host_tsc);
 312         tsc_offset = vmcs_read64(TSC_OFFSET);
 313         return host_tsc + tsc_offset;
 314 }
 315
 316 /*
 317  * writes 'guest_tsc' into guest's timestamp counter "register"
 318  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 319  */
 320 static void guest_write_tsc(u64 guest_tsc)
 321 {
 322         u64 host_tsc;
 323
 324         rdtscll(host_tsc);
 325         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 326 }
 327
 328 static void reload_tss(void)
 329 {
 330 #ifndef CONFIG_X86_64
 331
 332         /*
 333          * VT restores TR but not its size.  Useless.
 334          */
 335         struct descriptor_table gdt;
 336         struct segment_descriptor *descs;
 337
 338         get_gdt(&gdt);
 339         descs = (void *)gdt.base;
 340         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 341         load_TR_desc();
 342 #endif
 343 }
 344
 345 /*
 346  * Reads an msr value (of 'msr_index') into 'pdata'.
 347  * Returns 0 on success, non-0 otherwise.
 348  * Assumes vcpu_load() was already called.
 349  */
 350 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 351 {
 352         u64 data;
 353         struct vmx_msr_entry *msr;
 354
 355         if (!pdata) {
 356                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 357                 return -EINVAL;
 358         }
 359
 360         switch (msr_index) {
 361 #ifdef CONFIG_X86_64
 362         case MSR_FS_BASE:
 363                 data = vmcs_readl(GUEST_FS_BASE);
 364                 break;
 365         case MSR_GS_BASE:
 366                 data = vmcs_readl(GUEST_GS_BASE);
 367                 break;
 368         case MSR_EFER:
 369                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 370 #endif
 371         case MSR_IA32_TIME_STAMP_COUNTER:
 372                 data = guest_read_tsc();
 373                 break;
 374         case MSR_IA32_SYSENTER_CS:
 375                 data = vmcs_read32(GUEST_SYSENTER_CS);
 376                 break;
 377         case MSR_IA32_SYSENTER_EIP:
 378                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 379                 break;
 380         case MSR_IA32_SYSENTER_ESP:
 381                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 382                 break;
 383         default:
 384                 msr = find_msr_entry(vcpu, msr_index);
 385                 if (msr) {
 386                         data = msr->data;
 387                         break;
 388                 }
 389                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 390         }
 391
 392         *pdata = data;
 393         return 0;
 394 }
 395
 396 /*
 397  * Writes msr value into into the appropriate "register".
 398  * Returns 0 on success, non-0 otherwise.
 399  * Assumes vcpu_load() was already called.
 400  */
 401 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 402 {
 403         struct vmx_msr_entry *msr;
 404         switch (msr_index) {
 405 #ifdef CONFIG_X86_64
 406         case MSR_EFER:
 407                 return kvm_set_msr_common(vcpu, msr_index, data);
 408         case MSR_FS_BASE:
 409                 vmcs_writel(GUEST_FS_BASE, data);
 410                 break;
 411         case MSR_GS_BASE:
 412                 vmcs_writel(GUEST_GS_BASE, data);
 413                 break;
 414 #endif
 415         case MSR_IA32_SYSENTER_CS:
 416                 vmcs_write32(GUEST_SYSENTER_CS, data);
 417                 break;
 418         case MSR_IA32_SYSENTER_EIP:
 419                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 420                 break;
 421         case MSR_IA32_SYSENTER_ESP:
 422                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 423                 break;
 424         case MSR_IA32_TIME_STAMP_COUNTER:
 425                 guest_write_tsc(data);
 426                 break;
 427         default:
 428                 msr = find_msr_entry(vcpu, msr_index);
 429                 if (msr) {
 430                         msr->data = data;
 431                         break;
 432                 }
 433                 return kvm_set_msr_common(vcpu, msr_index, data);
 434                 msr->data = data;
 435                 break;
 436         }
 437
 438         return 0;
 439 }
 440
 441 /*
 442  * Sync the rsp and rip registers into the vcpu structure.  This allows
 443  * registers to be accessed by indexing vcpu->regs.
 444  */
 445 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 446 {
 447         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 448         vcpu->rip = vmcs_readl(GUEST_RIP);
 449 }
 450
 451 /*
 452  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 453  * modification.
 454  */
 455 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 456 {
 457         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 458         vmcs_writel(GUEST_RIP, vcpu->rip);
 459 }
 460
 461 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 462 {
 463         unsigned long dr7 = 0x400;
 464         u32 exception_bitmap;
 465         int old_singlestep;
 466
 467         exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
 468         old_singlestep = vcpu->guest_debug.singlestep;
 469
 470         vcpu->guest_debug.enabled = dbg->enabled;
 471         if (vcpu->guest_debug.enabled) {
 472                 int i;
 473
 474                 dr7 |= 0x200;  /* exact */
 475                 for (i = 0; i < 4; ++i) {
 476                         if (!dbg->breakpoints[i].enabled)
 477                                 continue;
 478                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 479                         dr7 |= 2 << (i*2);    /* global enable */
 480                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 481                 }
 482
 483                 exception_bitmap |= (1u << 1);  /* Trap debug exceptions */
 484
 485                 vcpu->guest_debug.singlestep = dbg->singlestep;
 486         } else {
 487                 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
 488                 vcpu->guest_debug.singlestep = 0;
 489         }
 490
 491         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 492                 unsigned long flags;
 493
 494                 flags = vmcs_readl(GUEST_RFLAGS);
 495                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 496                 vmcs_writel(GUEST_RFLAGS, flags);
 497         }
 498
 499         vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
 500         vmcs_writel(GUEST_DR7, dr7);
 501
 502         return 0;
 503 }
 504
 505 static __init int cpu_has_kvm_support(void)
 506 {
 507         unsigned long ecx = cpuid_ecx(1);
 508         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 509 }
 510
 511 static __init int vmx_disabled_by_bios(void)
 512 {
 513         u64 msr;
 514
 515         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 516         return (msr & 5) == 1; /* locked but not enabled */
 517 }
 518
 519 static void hardware_enable(void *garbage)
 520 {
 521         int cpu = raw_smp_processor_id();
 522         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 523         u64 old;
 524
 525         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 526         if ((old & 5) != 5)
 527                 /* enable and lock */
 528                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 529         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 530         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 531                       : "memory", "cc");
 532 }
 533
 534 static void hardware_disable(void *garbage)
 535 {
 536         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 537 }
 538
 539 static __init void setup_vmcs_descriptor(void)
 540 {
 541         u32 vmx_msr_low, vmx_msr_high;
 542
 543         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 544         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 545         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 546         vmcs_descriptor.revision_id = vmx_msr_low;
 547 }
 548
 549 static struct vmcs *alloc_vmcs_cpu(int cpu)
 550 {
 551         int node = cpu_to_node(cpu);
 552         struct page *pages;
 553         struct vmcs *vmcs;
 554
 555         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 556         if (!pages)
 557                 return NULL;
 558         vmcs = page_address(pages);
 559         memset(vmcs, 0, vmcs_descriptor.size);
 560         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 561         return vmcs;
 562 }
 563
 564 static struct vmcs *alloc_vmcs(void)
 565 {
 566         return alloc_vmcs_cpu(raw_smp_processor_id());
 567 }
 568
 569 static void free_vmcs(struct vmcs *vmcs)
 570 {
 571         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 572 }
 573
 574 static __exit void free_kvm_area(void)
 575 {
 576         int cpu;
 577
 578         for_each_online_cpu(cpu)
 579                 free_vmcs(per_cpu(vmxarea, cpu));
 580 }
 581
 582 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 583
 584 static __init int alloc_kvm_area(void)
 585 {
 586         int cpu;
 587
 588         for_each_online_cpu(cpu) {
 589                 struct vmcs *vmcs;
 590
 591                 vmcs = alloc_vmcs_cpu(cpu);
 592                 if (!vmcs) {
 593                         free_kvm_area();
 594                         return -ENOMEM;
 595                 }
 596
 597                 per_cpu(vmxarea, cpu) = vmcs;
 598         }
 599         return 0;
 600 }
 601
 602 static __init int hardware_setup(void)
 603 {
 604         setup_vmcs_descriptor();
 605         return alloc_kvm_area();
 606 }
 607
 608 static __exit void hardware_unsetup(void)
 609 {
 610         free_kvm_area();
 611 }
 612
 613 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 614 {
 615         if (vcpu->rmode.active)
 616                 vmcs_write32(EXCEPTION_BITMAP, ~0);
 617         else
 618                 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
 619 }
 620
 621 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 622 {
 623         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 624
 625         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
 626                 vmcs_write16(sf->selector, save->selector);
 627                 vmcs_writel(sf->base, save->base);
 628                 vmcs_write32(sf->limit, save->limit);
 629                 vmcs_write32(sf->ar_bytes, save->ar);
 630         } else {
 631                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 632                         << AR_DPL_SHIFT;
 633                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 634         }
 635 }
 636
 637 static void enter_pmode(struct kvm_vcpu *vcpu)
 638 {
 639         unsigned long flags;
 640
 641         vcpu->rmode.active = 0;
 642
 643         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 644         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 645         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 646
 647         flags = vmcs_readl(GUEST_RFLAGS);
 648         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 649         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 650         vmcs_writel(GUEST_RFLAGS, flags);
 651
 652         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 653                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 654
 655         update_exception_bitmap(vcpu);
 656
 657         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 658         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 659         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 660         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 661
 662         vmcs_write16(GUEST_SS_SELECTOR, 0);
 663         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 664
 665         vmcs_write16(GUEST_CS_SELECTOR,
 666                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 667         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 668 }
 669
 670 static int rmode_tss_base(struct kvm* kvm)
 671 {
 672         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 673         return base_gfn << PAGE_SHIFT;
 674 }
 675
 676 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 677 {
 678         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 679
 680         save->selector = vmcs_read16(sf->selector);
 681         save->base = vmcs_readl(sf->base);
 682         save->limit = vmcs_read32(sf->limit);
 683         save->ar = vmcs_read32(sf->ar_bytes);
 684         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 685         vmcs_write32(sf->limit, 0xffff);
 686         vmcs_write32(sf->ar_bytes, 0xf3);
 687 }
 688
 689 static void enter_rmode(struct kvm_vcpu *vcpu)
 690 {
 691         unsigned long flags;
 692
 693         vcpu->rmode.active = 1;
 694
 695         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 696         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 697
 698         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 699         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 700
 701         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 702         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 703
 704         flags = vmcs_readl(GUEST_RFLAGS);
 705         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 706
 707         flags |= IOPL_MASK | X86_EFLAGS_VM;
 708
 709         vmcs_writel(GUEST_RFLAGS, flags);
 710         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 711         update_exception_bitmap(vcpu);
 712
 713         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 714         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 715         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 716
 717         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 718         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
 719         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
 720                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
 721         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 722
 723         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 724         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 725         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 726         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 727 }
 728
 729 #ifdef CONFIG_X86_64
 730
 731 static void enter_lmode(struct kvm_vcpu *vcpu)
 732 {
 733         u32 guest_tr_ar;
 734
 735         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 736         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 737                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 738                        __FUNCTION__);
 739                 vmcs_write32(GUEST_TR_AR_BYTES,
 740                              (guest_tr_ar & ~AR_TYPE_MASK)
 741                              | AR_TYPE_BUSY_64_TSS);
 742         }
 743
 744         vcpu->shadow_efer |= EFER_LMA;
 745
 746         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 747         vmcs_write32(VM_ENTRY_CONTROLS,
 748                      vmcs_read32(VM_ENTRY_CONTROLS)
 749                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 750 }
 751
 752 static void exit_lmode(struct kvm_vcpu *vcpu)
 753 {
 754         vcpu->shadow_efer &= ~EFER_LMA;
 755
 756         vmcs_write32(VM_ENTRY_CONTROLS,
 757                      vmcs_read32(VM_ENTRY_CONTROLS)
 758                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 759 }
 760
 761 #endif
 762
 763 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
 764 {
 765         vcpu->cr0 &= KVM_GUEST_CR0_MASK;
 766         vcpu->cr0 |= vmcs_readl(GUEST_CR0) & ~KVM_GUEST_CR0_MASK;
 767
 768         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
 769         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
 770 }
 771
 772 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 773 {
 774         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
 775                 enter_pmode(vcpu);
 776
 777         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
 778                 enter_rmode(vcpu);
 779
 780 #ifdef CONFIG_X86_64
 781         if (vcpu->shadow_efer & EFER_LME) {
 782                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
 783                         enter_lmode(vcpu);
 784                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
 785                         exit_lmode(vcpu);
 786         }
 787 #endif
 788
 789         vmcs_writel(CR0_READ_SHADOW, cr0);
 790         vmcs_writel(GUEST_CR0,
 791                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 792         vcpu->cr0 = cr0;
 793 }
 794
 795 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 796 {
 797         vmcs_writel(GUEST_CR3, cr3);
 798 }
 799
 800 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 801 {
 802         vmcs_writel(CR4_READ_SHADOW, cr4);
 803         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
 804                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
 805         vcpu->cr4 = cr4;
 806 }
 807
 808 #ifdef CONFIG_X86_64
 809
 810 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 811 {
 812         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
 813
 814         vcpu->shadow_efer = efer;
 815         if (efer & EFER_LMA) {
 816                 vmcs_write32(VM_ENTRY_CONTROLS,
 817                                      vmcs_read32(VM_ENTRY_CONTROLS) |
 818                                      VM_ENTRY_CONTROLS_IA32E_MASK);
 819                 msr->data = efer;
 820
 821         } else {
 822                 vmcs_write32(VM_ENTRY_CONTROLS,
 823                                      vmcs_read32(VM_ENTRY_CONTROLS) &
 824                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
 825
 826                 msr->data = efer & ~EFER_LME;
 827         }
 828 }
 829
 830 #endif
 831
 832 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 833 {
 834         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 835
 836         return vmcs_readl(sf->base);
 837 }
 838
 839 static void vmx_get_segment(struct kvm_vcpu *vcpu,
 840                             struct kvm_segment *var, int seg)
 841 {
 842         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 843         u32 ar;
 844
 845         var->base = vmcs_readl(sf->base);
 846         var->limit = vmcs_read32(sf->limit);
 847         var->selector = vmcs_read16(sf->selector);
 848         ar = vmcs_read32(sf->ar_bytes);
 849         if (ar & AR_UNUSABLE_MASK)
 850                 ar = 0;
 851         var->type = ar & 15;
 852         var->s = (ar >> 4) & 1;
 853         var->dpl = (ar >> 5) & 3;
 854         var->present = (ar >> 7) & 1;
 855         var->avl = (ar >> 12) & 1;
 856         var->l = (ar >> 13) & 1;
 857         var->db = (ar >> 14) & 1;
 858         var->g = (ar >> 15) & 1;
 859         var->unusable = (ar >> 16) & 1;
 860 }
 861
 862 static void vmx_set_segment(struct kvm_vcpu *vcpu,
 863                             struct kvm_segment *var, int seg)
 864 {
 865         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 866         u32 ar;
 867
 868         vmcs_writel(sf->base, var->base);
 869         vmcs_write32(sf->limit, var->limit);
 870         vmcs_write16(sf->selector, var->selector);
 871         if (vcpu->rmode.active && var->s) {
 872                 /*
 873                  * Hack real-mode segments into vm86 compatibility.
 874                  */
 875                 if (var->base == 0xffff0000 && var->selector == 0xf000)
 876                         vmcs_writel(sf->base, 0xf0000);
 877                 ar = 0xf3;
 878         } else if (var->unusable)
 879                 ar = 1 << 16;
 880         else {
 881                 ar = var->type & 15;
 882                 ar |= (var->s & 1) << 4;
 883                 ar |= (var->dpl & 3) << 5;
 884                 ar |= (var->present & 1) << 7;
 885                 ar |= (var->avl & 1) << 12;
 886                 ar |= (var->l & 1) << 13;
 887                 ar |= (var->db & 1) << 14;
 888                 ar |= (var->g & 1) << 15;
 889         }
 890         if (ar == 0) /* a 0 value means unusable */
 891                 ar = AR_UNUSABLE_MASK;
 892         vmcs_write32(sf->ar_bytes, ar);
 893 }
 894
 895 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 896 {
 897         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
 898
 899         *db = (ar >> 14) & 1;
 900         *l = (ar >> 13) & 1;
 901 }
 902
 903 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 904 {
 905         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
 906         dt->base = vmcs_readl(GUEST_IDTR_BASE);
 907 }
 908
 909 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 910 {
 911         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
 912         vmcs_writel(GUEST_IDTR_BASE, dt->base);
 913 }
 914
 915 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 916 {
 917         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
 918         dt->base = vmcs_readl(GUEST_GDTR_BASE);
 919 }
 920
 921 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 922 {
 923         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
 924         vmcs_writel(GUEST_GDTR_BASE, dt->base);
 925 }
 926
 927 static int init_rmode_tss(struct kvm* kvm)
 928 {
 929         struct page *p1, *p2, *p3;
 930         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
 931         char *page;
 932
 933         p1 = gfn_to_page(kvm, fn++);
 934         p2 = gfn_to_page(kvm, fn++);
 935         p3 = gfn_to_page(kvm, fn);
 936
 937         if (!p1 || !p2 || !p3) {
 938                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
 939                 return 0;
 940         }
 941
 942         page = kmap_atomic(p1, KM_USER0);
 943         memset(page, 0, PAGE_SIZE);
 944         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
 945         kunmap_atomic(page, KM_USER0);
 946
 947         page = kmap_atomic(p2, KM_USER0);
 948         memset(page, 0, PAGE_SIZE);
 949         kunmap_atomic(page, KM_USER0);
 950
 951         page = kmap_atomic(p3, KM_USER0);
 952         memset(page, 0, PAGE_SIZE);
 953         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
 954         kunmap_atomic(page, KM_USER0);
 955
 956         return 1;
 957 }
 958
 959 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
 960 {
 961         u32 msr_high, msr_low;
 962
 963         rdmsr(msr, msr_low, msr_high);
 964
 965         val &= msr_high;
 966         val |= msr_low;
 967         vmcs_write32(vmcs_field, val);
 968 }
 969
 970 static void seg_setup(int seg)
 971 {
 972         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 973
 974         vmcs_write16(sf->selector, 0);
 975         vmcs_writel(sf->base, 0);
 976         vmcs_write32(sf->limit, 0xffff);
 977         vmcs_write32(sf->ar_bytes, 0x93);
 978 }
 979
 980 /*
 981  * Sets up the vmcs for emulated real mode.
 982  */
 983 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
 984 {
 985         u32 host_sysenter_cs;
 986         u32 junk;
 987         unsigned long a;
 988         struct descriptor_table dt;
 989         int i;
 990         int ret = 0;
 991         int nr_good_msrs;
 992         extern asmlinkage void kvm_vmx_return(void);
 993
 994         if (!init_rmode_tss(vcpu->kvm)) {
 995                 ret = -ENOMEM;
 996                 goto out;
 997         }
 998
 999         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1000         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1001         vcpu->cr8 = 0;
1002         vcpu->apic_base = 0xfee00000 |
1003                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1004                         MSR_IA32_APICBASE_ENABLE;
1005
1006         fx_init(vcpu);
1007
1008         /*
1009          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1010          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1011          */
1012         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1013         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1014         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1015         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1016
1017         seg_setup(VCPU_SREG_DS);
1018         seg_setup(VCPU_SREG_ES);
1019         seg_setup(VCPU_SREG_FS);
1020         seg_setup(VCPU_SREG_GS);
1021         seg_setup(VCPU_SREG_SS);
1022
1023         vmcs_write16(GUEST_TR_SELECTOR, 0);
1024         vmcs_writel(GUEST_TR_BASE, 0);
1025         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1026         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1027
1028         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1029         vmcs_writel(GUEST_LDTR_BASE, 0);
1030         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1031         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1032
1033         vmcs_write32(GUEST_SYSENTER_CS, 0);
1034         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1035         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1036
1037         vmcs_writel(GUEST_RFLAGS, 0x02);
1038         vmcs_writel(GUEST_RIP, 0xfff0);
1039         vmcs_writel(GUEST_RSP, 0);
1040
1041         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1042         vmcs_writel(GUEST_DR7, 0x400);
1043
1044         vmcs_writel(GUEST_GDTR_BASE, 0);
1045         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1046
1047         vmcs_writel(GUEST_IDTR_BASE, 0);
1048         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1049
1050         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1051         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1052         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1053
1054         /* I/O */
1055         vmcs_write64(IO_BITMAP_A, 0);
1056         vmcs_write64(IO_BITMAP_B, 0);
1057
1058         guest_write_tsc(0);
1059
1060         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1061
1062         /* Special registers */
1063         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1064
1065         /* Control */
1066         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1067                                PIN_BASED_VM_EXEC_CONTROL,
1068                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1069                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1070                         );
1071         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1072                                CPU_BASED_VM_EXEC_CONTROL,
1073                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1074                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1075                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1076                                | CPU_BASED_UNCOND_IO_EXITING   /* 20.6.2 */
1077                                | CPU_BASED_MOV_DR_EXITING
1078                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1079                         );
1080
1081         vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1082         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1083         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1084         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1085
1086         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1087         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1088         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1089
1090         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1091         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1092         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1093         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1094         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1095         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1096 #ifdef CONFIG_X86_64
1097         rdmsrl(MSR_FS_BASE, a);
1098         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1099         rdmsrl(MSR_GS_BASE, a);
1100         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1101 #else
1102         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1103         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1104 #endif
1105
1106         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1107
1108         get_idt(&dt);
1109         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1110
1111
1112         vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1113
1114         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1115         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1116         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1117         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1118         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1119         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1120
1121         for (i = 0; i < NR_VMX_MSR; ++i) {
1122                 u32 index = vmx_msr_index[i];
1123                 u32 data_low, data_high;
1124                 u64 data;
1125                 int j = vcpu->nmsrs;
1126
1127                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1128                         continue;
1129                 if (wrmsr_safe(index, data_low, data_high) < 0)
1130                         continue;
1131                 data = data_low | ((u64)data_high << 32);
1132                 vcpu->host_msrs[j].index = index;
1133                 vcpu->host_msrs[j].reserved = 0;
1134                 vcpu->host_msrs[j].data = data;
1135                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1136 #ifdef CONFIG_X86_64
1137                 if (index == MSR_KERNEL_GS_BASE)
1138                         msr_offset_kernel_gs_base = j;
1139 #endif
1140                 ++vcpu->nmsrs;
1141         }
1142
1143         nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1144         vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1145                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1146         vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1147                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1148         vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1149                     virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
1150         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1151                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1152         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1153         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs);  /* 22.2.2 */
1154         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1155
1156
1157         /* 22.2.1, 20.8.1 */
1158         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1159                                VM_ENTRY_CONTROLS, 0);
1160         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1161
1162 #ifdef CONFIG_X86_64
1163         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1164         vmcs_writel(TPR_THRESHOLD, 0);
1165 #endif
1166
1167         vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1168         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1169
1170         vcpu->cr0 = 0x60000010;
1171         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1172         vmx_set_cr4(vcpu, 0);
1173 #ifdef CONFIG_X86_64
1174         vmx_set_efer(vcpu, 0);
1175 #endif
1176
1177         return 0;
1178
1179 out:
1180         return ret;
1181 }
1182
1183 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1184 {
1185         u16 ent[2];
1186         u16 cs;
1187         u16 ip;
1188         unsigned long flags;
1189         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1190         u16 sp =  vmcs_readl(GUEST_RSP);
1191         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1192
1193         if (sp > ss_limit || sp < 6 ) {
1194                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1195                             __FUNCTION__,
1196                             vmcs_readl(GUEST_RSP),
1197                             vmcs_readl(GUEST_SS_BASE),
1198                             vmcs_read32(GUEST_SS_LIMIT));
1199                 return;
1200         }
1201
1202         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1203                                                                 sizeof(ent)) {
1204                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1205                 return;
1206         }
1207
1208         flags =  vmcs_readl(GUEST_RFLAGS);
1209         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1210         ip =  vmcs_readl(GUEST_RIP);
1211
1212
1213         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1214             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1215             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1216                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1217                 return;
1218         }
1219
1220         vmcs_writel(GUEST_RFLAGS, flags &
1221                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1222         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1223         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1224         vmcs_writel(GUEST_RIP, ent[0]);
1225         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1226 }
1227
1228 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1229 {
1230         int word_index = __ffs(vcpu->irq_summary);
1231         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1232         int irq = word_index * BITS_PER_LONG + bit_index;
1233
1234         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1235         if (!vcpu->irq_pending[word_index])
1236                 clear_bit(word_index, &vcpu->irq_summary);
1237
1238         if (vcpu->rmode.active) {
1239                 inject_rmode_irq(vcpu, irq);
1240                 return;
1241         }
1242         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1243                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1244 }
1245
1246
1247 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1248                                        struct kvm_run *kvm_run)
1249 {
1250         u32 cpu_based_vm_exec_control;
1251
1252         vcpu->interrupt_window_open =
1253                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1254                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1255
1256         if (vcpu->interrupt_window_open &&
1257             vcpu->irq_summary &&
1258             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1259                 /*
1260                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1261                  */
1262                 kvm_do_inject_irq(vcpu);
1263
1264         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1265         if (!vcpu->interrupt_window_open &&
1266             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1267                 /*
1268                  * Interrupts blocked.  Wait for unblock.
1269                  */
1270                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1271         else
1272                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1273         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1274 }
1275
1276 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1277 {
1278         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1279
1280         set_debugreg(dbg->bp[0], 0);
1281         set_debugreg(dbg->bp[1], 1);
1282         set_debugreg(dbg->bp[2], 2);
1283         set_debugreg(dbg->bp[3], 3);
1284
1285         if (dbg->singlestep) {
1286                 unsigned long flags;
1287
1288                 flags = vmcs_readl(GUEST_RFLAGS);
1289                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1290                 vmcs_writel(GUEST_RFLAGS, flags);
1291         }
1292 }
1293
1294 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1295                                   int vec, u32 err_code)
1296 {
1297         if (!vcpu->rmode.active)
1298                 return 0;
1299
1300         if (vec == GP_VECTOR && err_code == 0)
1301                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1302                         return 1;
1303         return 0;
1304 }
1305
1306 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1307 {
1308         u32 intr_info, error_code;
1309         unsigned long cr2, rip;
1310         u32 vect_info;
1311         enum emulation_result er;
1312         int r;
1313
1314         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1315         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1316
1317         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1318                                                 !is_page_fault(intr_info)) {
1319                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1320                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1321         }
1322
1323         if (is_external_interrupt(vect_info)) {
1324                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1325                 set_bit(irq, vcpu->irq_pending);
1326                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1327         }
1328
1329         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1330                 asm ("int $2");
1331                 return 1;
1332         }
1333         error_code = 0;
1334         rip = vmcs_readl(GUEST_RIP);
1335         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1336                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1337         if (is_page_fault(intr_info)) {
1338                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1339
1340                 spin_lock(&vcpu->kvm->lock);
1341                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1342                 if (r < 0) {
1343                         spin_unlock(&vcpu->kvm->lock);
1344                         return r;
1345                 }
1346                 if (!r) {
1347                         spin_unlock(&vcpu->kvm->lock);
1348                         return 1;
1349                 }
1350
1351                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1352                 spin_unlock(&vcpu->kvm->lock);
1353
1354                 switch (er) {
1355                 case EMULATE_DONE:
1356                         return 1;
1357                 case EMULATE_DO_MMIO:
1358                         ++kvm_stat.mmio_exits;
1359                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1360                         return 0;
1361                  case EMULATE_FAIL:
1362                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1363                         break;
1364                 default:
1365                         BUG();
1366                 }
1367         }
1368
1369         if (vcpu->rmode.active &&
1370             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1371                                                                 error_code))
1372                 return 1;
1373
1374         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1375                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1376                 return 0;
1377         }
1378         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1379         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1380         kvm_run->ex.error_code = error_code;
1381         return 0;
1382 }
1383
1384 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1385                                      struct kvm_run *kvm_run)
1386 {
1387         ++kvm_stat.irq_exits;
1388         return 1;
1389 }
1390
1391 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1392 {
1393         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1394         return 0;
1395 }
1396
1397 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1398 {
1399         u64 inst;
1400         gva_t rip;
1401         int countr_size;
1402         int i, n;
1403
1404         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1405                 countr_size = 2;
1406         } else {
1407                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1408
1409                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1410                               (cs_ar & AR_DB_MASK) ? 4: 2;
1411         }
1412
1413         rip =  vmcs_readl(GUEST_RIP);
1414         if (countr_size != 8)
1415                 rip += vmcs_readl(GUEST_CS_BASE);
1416
1417         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1418
1419         for (i = 0; i < n; i++) {
1420                 switch (((u8*)&inst)[i]) {
1421                 case 0xf0:
1422                 case 0xf2:
1423                 case 0xf3:
1424                 case 0x2e:
1425                 case 0x36:
1426                 case 0x3e:
1427                 case 0x26:
1428                 case 0x64:
1429                 case 0x65:
1430                 case 0x66:
1431                         break;
1432                 case 0x67:
1433                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1434                 default:
1435                         goto done;
1436                 }
1437         }
1438         return 0;
1439 done:
1440         countr_size *= 8;
1441         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1442         //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1443         return 1;
1444 }
1445
1446 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1447 {
1448         u64 exit_qualification;
1449         int size, down, in, string, rep;
1450         unsigned port;
1451         unsigned long count;
1452         gva_t address;
1453
1454         ++kvm_stat.io_exits;
1455         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1456         in = (exit_qualification & 8) != 0;
1457         size = (exit_qualification & 7) + 1;
1458         string = (exit_qualification & 16) != 0;
1459         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1460         count = 1;
1461         rep = (exit_qualification & 32) != 0;
1462         port = exit_qualification >> 16;
1463         address = 0;
1464         if (string) {
1465                 if (rep && !get_io_count(vcpu, &count))
1466                         return 1;
1467                 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1468         }
1469         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1470                              address, rep, port);
1471 }
1472
1473 static void
1474 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1475 {
1476         /*
1477          * Patch in the VMCALL instruction:
1478          */
1479         hypercall[0] = 0x0f;
1480         hypercall[1] = 0x01;
1481         hypercall[2] = 0xc1;
1482         hypercall[3] = 0xc3;
1483 }
1484
1485 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1486 {
1487         u64 exit_qualification;
1488         int cr;
1489         int reg;
1490
1491         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1492         cr = exit_qualification & 15;
1493         reg = (exit_qualification >> 8) & 15;
1494         switch ((exit_qualification >> 4) & 3) {
1495         case 0: /* mov to cr */
1496                 switch (cr) {
1497                 case 0:
1498                         vcpu_load_rsp_rip(vcpu);
1499                         set_cr0(vcpu, vcpu->regs[reg]);
1500                         skip_emulated_instruction(vcpu);
1501                         return 1;
1502                 case 3:
1503                         vcpu_load_rsp_rip(vcpu);
1504                         set_cr3(vcpu, vcpu->regs[reg]);
1505                         skip_emulated_instruction(vcpu);
1506                         return 1;
1507                 case 4:
1508                         vcpu_load_rsp_rip(vcpu);
1509                         set_cr4(vcpu, vcpu->regs[reg]);
1510                         skip_emulated_instruction(vcpu);
1511                         return 1;
1512                 case 8:
1513                         vcpu_load_rsp_rip(vcpu);
1514                         set_cr8(vcpu, vcpu->regs[reg]);
1515                         skip_emulated_instruction(vcpu);
1516                         return 1;
1517                 };
1518                 break;
1519         case 1: /*mov from cr*/
1520                 switch (cr) {
1521                 case 3:
1522                         vcpu_load_rsp_rip(vcpu);
1523                         vcpu->regs[reg] = vcpu->cr3;
1524                         vcpu_put_rsp_rip(vcpu);
1525                         skip_emulated_instruction(vcpu);
1526                         return 1;
1527                 case 8:
1528                         printk(KERN_DEBUG "handle_cr: read CR8 "
1529                                "cpu erratum AA15\n");
1530                         vcpu_load_rsp_rip(vcpu);
1531                         vcpu->regs[reg] = vcpu->cr8;
1532                         vcpu_put_rsp_rip(vcpu);
1533                         skip_emulated_instruction(vcpu);
1534                         return 1;
1535                 }
1536                 break;
1537         case 3: /* lmsw */
1538                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1539
1540                 skip_emulated_instruction(vcpu);
1541                 return 1;
1542         default:
1543                 break;
1544         }
1545         kvm_run->exit_reason = 0;
1546         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1547                (int)(exit_qualification >> 4) & 3, cr);
1548         return 0;
1549 }
1550
1551 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1552 {
1553         u64 exit_qualification;
1554         unsigned long val;
1555         int dr, reg;
1556
1557         /*
1558          * FIXME: this code assumes the host is debugging the guest.
1559          *        need to deal with guest debugging itself too.
1560          */
1561         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1562         dr = exit_qualification & 7;
1563         reg = (exit_qualification >> 8) & 15;
1564         vcpu_load_rsp_rip(vcpu);
1565         if (exit_qualification & 16) {
1566                 /* mov from dr */
1567                 switch (dr) {
1568                 case 6:
1569                         val = 0xffff0ff0;
1570                         break;
1571                 case 7:
1572                         val = 0x400;
1573                         break;
1574                 default:
1575                         val = 0;
1576                 }
1577                 vcpu->regs[reg] = val;
1578         } else {
1579                 /* mov to dr */
1580         }
1581         vcpu_put_rsp_rip(vcpu);
1582         skip_emulated_instruction(vcpu);
1583         return 1;
1584 }
1585
1586 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1587 {
1588         kvm_emulate_cpuid(vcpu);
1589         return 1;
1590 }
1591
1592 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1593 {
1594         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1595         u64 data;
1596
1597         if (vmx_get_msr(vcpu, ecx, &data)) {
1598                 vmx_inject_gp(vcpu, 0);
1599                 return 1;
1600         }
1601
1602         /* FIXME: handling of bits 32:63 of rax, rdx */
1603         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1604         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1605         skip_emulated_instruction(vcpu);
1606         return 1;
1607 }
1608
1609 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1610 {
1611         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1612         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1613                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1614
1615         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1616                 vmx_inject_gp(vcpu, 0);
1617                 return 1;
1618         }
1619
1620         skip_emulated_instruction(vcpu);
1621         return 1;
1622 }
1623
1624 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1625                               struct kvm_run *kvm_run)
1626 {
1627         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1628         kvm_run->cr8 = vcpu->cr8;
1629         kvm_run->apic_base = vcpu->apic_base;
1630         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1631                                                   vcpu->irq_summary == 0);
1632 }
1633
1634 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1635                                    struct kvm_run *kvm_run)
1636 {
1637         /*
1638          * If the user space waits to inject interrupts, exit as soon as
1639          * possible
1640          */
1641         if (kvm_run->request_interrupt_window &&
1642             !vcpu->irq_summary) {
1643                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1644                 ++kvm_stat.irq_window_exits;
1645                 return 0;
1646         }
1647         return 1;
1648 }
1649
1650 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1651 {
1652         skip_emulated_instruction(vcpu);
1653         if (vcpu->irq_summary)
1654                 return 1;
1655
1656         kvm_run->exit_reason = KVM_EXIT_HLT;
1657         ++kvm_stat.halt_exits;
1658         return 0;
1659 }
1660
1661 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1662 {
1663         skip_emulated_instruction(vcpu);
1664         return kvm_hypercall(vcpu, kvm_run);
1665 }
1666
1667 /*
1668  * The exit handlers return 1 if the exit was handled fully and guest execution
1669  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1670  * to be done to userspace and return 0.
1671  */
1672 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1673                                       struct kvm_run *kvm_run) = {
1674         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1675         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1676         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
1677         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1678         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1679         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1680         [EXIT_REASON_CPUID]                   = handle_cpuid,
1681         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1682         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1683         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1684         [EXIT_REASON_HLT]                     = handle_halt,
1685         [EXIT_REASON_VMCALL]                  = handle_vmcall,
1686 };
1687
1688 static const int kvm_vmx_max_exit_handlers =
1689         sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1690
1691 /*
1692  * The guest has exited.  See if we can fix it or if we need userspace
1693  * assistance.
1694  */
1695 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1696 {
1697         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1698         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1699
1700         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1701                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1702                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1703                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1704         kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1705         if (exit_reason < kvm_vmx_max_exit_handlers
1706             && kvm_vmx_exit_handlers[exit_reason])
1707                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1708         else {
1709                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1710                 kvm_run->hw.hardware_exit_reason = exit_reason;
1711         }
1712         return 0;
1713 }
1714
1715 /*
1716  * Check if userspace requested an interrupt window, and that the
1717  * interrupt window is open.
1718  *
1719  * No need to exit to userspace if we already have an interrupt queued.
1720  */
1721 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1722                                           struct kvm_run *kvm_run)
1723 {
1724         return (!vcpu->irq_summary &&
1725                 kvm_run->request_interrupt_window &&
1726                 vcpu->interrupt_window_open &&
1727                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1728 }
1729
1730 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1731 {
1732         u8 fail;
1733         u16 fs_sel, gs_sel, ldt_sel;
1734         int fs_gs_ldt_reload_needed;
1735         int r;
1736
1737 again:
1738         /*
1739          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
1740          * allow segment selectors with cpl > 0 or ti == 1.
1741          */
1742         fs_sel = read_fs();
1743         gs_sel = read_gs();
1744         ldt_sel = read_ldt();
1745         fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1746         if (!fs_gs_ldt_reload_needed) {
1747                 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1748                 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1749         } else {
1750                 vmcs_write16(HOST_FS_SELECTOR, 0);
1751                 vmcs_write16(HOST_GS_SELECTOR, 0);
1752         }
1753
1754 #ifdef CONFIG_X86_64
1755         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1756         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1757 #else
1758         vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1759         vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1760 #endif
1761
1762         if (!vcpu->mmio_read_completed)
1763                 do_interrupt_requests(vcpu, kvm_run);
1764
1765         if (vcpu->guest_debug.enabled)
1766                 kvm_guest_debug_pre(vcpu);
1767
1768         fx_save(vcpu->host_fx_image);
1769         fx_restore(vcpu->guest_fx_image);
1770
1771 #ifdef CONFIG_X86_64
1772         save_msrs(vcpu->host_msrs + msr_offset_kernel_gs_base, 1);
1773 #endif
1774         load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1775
1776         asm (
1777                 /* Store host registers */
1778                 "pushf \n\t"
1779 #ifdef CONFIG_X86_64
1780                 "push %%rax; push %%rbx; push %%rdx;"
1781                 "push %%rsi; push %%rdi; push %%rbp;"
1782                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1783                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1784                 "push %%rcx \n\t"
1785                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1786 #else
1787                 "pusha; push %%ecx \n\t"
1788                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1789 #endif
1790                 /* Check if vmlaunch of vmresume is needed */
1791                 "cmp $0, %1 \n\t"
1792                 /* Load guest registers.  Don't clobber flags. */
1793 #ifdef CONFIG_X86_64
1794                 "mov %c[cr2](%3), %%rax \n\t"
1795                 "mov %%rax, %%cr2 \n\t"
1796                 "mov %c[rax](%3), %%rax \n\t"
1797                 "mov %c[rbx](%3), %%rbx \n\t"
1798                 "mov %c[rdx](%3), %%rdx \n\t"
1799                 "mov %c[rsi](%3), %%rsi \n\t"
1800                 "mov %c[rdi](%3), %%rdi \n\t"
1801                 "mov %c[rbp](%3), %%rbp \n\t"
1802                 "mov %c[r8](%3),  %%r8  \n\t"
1803                 "mov %c[r9](%3),  %%r9  \n\t"
1804                 "mov %c[r10](%3), %%r10 \n\t"
1805                 "mov %c[r11](%3), %%r11 \n\t"
1806                 "mov %c[r12](%3), %%r12 \n\t"
1807                 "mov %c[r13](%3), %%r13 \n\t"
1808                 "mov %c[r14](%3), %%r14 \n\t"
1809                 "mov %c[r15](%3), %%r15 \n\t"
1810                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1811 #else
1812                 "mov %c[cr2](%3), %%eax \n\t"
1813                 "mov %%eax,   %%cr2 \n\t"
1814                 "mov %c[rax](%3), %%eax \n\t"
1815                 "mov %c[rbx](%3), %%ebx \n\t"
1816                 "mov %c[rdx](%3), %%edx \n\t"
1817                 "mov %c[rsi](%3), %%esi \n\t"
1818                 "mov %c[rdi](%3), %%edi \n\t"
1819                 "mov %c[rbp](%3), %%ebp \n\t"
1820                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1821 #endif
1822                 /* Enter guest mode */
1823                 "jne launched \n\t"
1824                 ASM_VMX_VMLAUNCH "\n\t"
1825                 "jmp kvm_vmx_return \n\t"
1826                 "launched: " ASM_VMX_VMRESUME "\n\t"
1827                 ".globl kvm_vmx_return \n\t"
1828                 "kvm_vmx_return: "
1829                 /* Save guest registers, load host registers, keep flags */
1830 #ifdef CONFIG_X86_64
1831                 "xchg %3,     (%%rsp) \n\t"
1832                 "mov %%rax, %c[rax](%3) \n\t"
1833                 "mov %%rbx, %c[rbx](%3) \n\t"
1834                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1835                 "mov %%rdx, %c[rdx](%3) \n\t"
1836                 "mov %%rsi, %c[rsi](%3) \n\t"
1837                 "mov %%rdi, %c[rdi](%3) \n\t"
1838                 "mov %%rbp, %c[rbp](%3) \n\t"
1839                 "mov %%r8,  %c[r8](%3) \n\t"
1840                 "mov %%r9,  %c[r9](%3) \n\t"
1841                 "mov %%r10, %c[r10](%3) \n\t"
1842                 "mov %%r11, %c[r11](%3) \n\t"
1843                 "mov %%r12, %c[r12](%3) \n\t"
1844                 "mov %%r13, %c[r13](%3) \n\t"
1845                 "mov %%r14, %c[r14](%3) \n\t"
1846                 "mov %%r15, %c[r15](%3) \n\t"
1847                 "mov %%cr2, %%rax   \n\t"
1848                 "mov %%rax, %c[cr2](%3) \n\t"
1849                 "mov (%%rsp), %3 \n\t"
1850
1851                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1852                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1853                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1854                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
1855 #else
1856                 "xchg %3, (%%esp) \n\t"
1857                 "mov %%eax, %c[rax](%3) \n\t"
1858                 "mov %%ebx, %c[rbx](%3) \n\t"
1859                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1860                 "mov %%edx, %c[rdx](%3) \n\t"
1861                 "mov %%esi, %c[rsi](%3) \n\t"
1862                 "mov %%edi, %c[rdi](%3) \n\t"
1863                 "mov %%ebp, %c[rbp](%3) \n\t"
1864                 "mov %%cr2, %%eax  \n\t"
1865                 "mov %%eax, %c[cr2](%3) \n\t"
1866                 "mov (%%esp), %3 \n\t"
1867
1868                 "pop %%ecx; popa \n\t"
1869 #endif
1870                 "setbe %0 \n\t"
1871                 "popf \n\t"
1872               : "=q" (fail)
1873               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1874                 "c"(vcpu),
1875                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1876                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1877                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1878                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1879                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1880                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1881                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1882 #ifdef CONFIG_X86_64
1883                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1884                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1885                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1886                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1887                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1888                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1889                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1890                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1891 #endif
1892                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1893               : "cc", "memory" );
1894
1895         /*
1896          * Reload segment selectors ASAP. (it's needed for a functional
1897          * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1898          * relies on having 0 in %gs for the CPU PDA to work.)
1899          */
1900         if (fs_gs_ldt_reload_needed) {
1901                 load_ldt(ldt_sel);
1902                 load_fs(fs_sel);
1903                 /*
1904                  * If we have to reload gs, we must take care to
1905                  * preserve our gs base.
1906                  */
1907                 local_irq_disable();
1908                 load_gs(gs_sel);
1909 #ifdef CONFIG_X86_64
1910                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1911 #endif
1912                 local_irq_enable();
1913
1914                 reload_tss();
1915         }
1916         ++kvm_stat.exits;
1917
1918         save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1919         load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1920
1921         fx_save(vcpu->guest_fx_image);
1922         fx_restore(vcpu->host_fx_image);
1923         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
1924
1925         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
1926
1927         if (fail) {
1928                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1929                 kvm_run->fail_entry.hardware_entry_failure_reason
1930                         = vmcs_read32(VM_INSTRUCTION_ERROR);
1931                 r = 0;
1932         } else {
1933                 /*
1934                  * Profile KVM exit RIPs:
1935                  */
1936                 if (unlikely(prof_on == KVM_PROFILING))
1937                         profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
1938
1939                 vcpu->launched = 1;
1940                 r = kvm_handle_exit(kvm_run, vcpu);
1941                 if (r > 0) {
1942                         /* Give scheduler a change to reschedule. */
1943                         if (signal_pending(current)) {
1944                                 ++kvm_stat.signal_exits;
1945                                 post_kvm_run_save(vcpu, kvm_run);
1946                                 kvm_run->exit_reason = KVM_EXIT_INTR;
1947                                 return -EINTR;
1948                         }
1949
1950                         if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1951                                 ++kvm_stat.request_irq_exits;
1952                                 post_kvm_run_save(vcpu, kvm_run);
1953                                 kvm_run->exit_reason = KVM_EXIT_INTR;
1954                                 return -EINTR;
1955                         }
1956
1957                         kvm_resched(vcpu);
1958                         goto again;
1959                 }
1960         }
1961
1962         post_kvm_run_save(vcpu, kvm_run);
1963         return r;
1964 }
1965
1966 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1967 {
1968         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1969 }
1970
1971 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1972                                   unsigned long addr,
1973                                   u32 err_code)
1974 {
1975         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1976
1977         ++kvm_stat.pf_guest;
1978
1979         if (is_page_fault(vect_info)) {
1980                 printk(KERN_DEBUG "inject_page_fault: "
1981                        "double fault 0x%lx @ 0x%lx\n",
1982                        addr, vmcs_readl(GUEST_RIP));
1983                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1984                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1985                              DF_VECTOR |
1986                              INTR_TYPE_EXCEPTION |
1987                              INTR_INFO_DELIEVER_CODE_MASK |
1988                              INTR_INFO_VALID_MASK);
1989                 return;
1990         }
1991         vcpu->cr2 = addr;
1992         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1993         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1994                      PF_VECTOR |
1995                      INTR_TYPE_EXCEPTION |
1996                      INTR_INFO_DELIEVER_CODE_MASK |
1997                      INTR_INFO_VALID_MASK);
1998
1999 }
2000
2001 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2002 {
2003         if (vcpu->vmcs) {
2004                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2005                 free_vmcs(vcpu->vmcs);
2006                 vcpu->vmcs = NULL;
2007         }
2008 }
2009
2010 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2011 {
2012         vmx_free_vmcs(vcpu);
2013 }
2014
2015 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2016 {
2017         struct vmcs *vmcs;
2018
2019         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2020         if (!vcpu->guest_msrs)
2021                 return -ENOMEM;
2022
2023         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2024         if (!vcpu->host_msrs)
2025                 goto out_free_guest_msrs;
2026
2027         vmcs = alloc_vmcs();
2028         if (!vmcs)
2029                 goto out_free_msrs;
2030
2031         vmcs_clear(vmcs);
2032         vcpu->vmcs = vmcs;
2033         vcpu->launched = 0;
2034
2035         return 0;
2036
2037 out_free_msrs:
2038         kfree(vcpu->host_msrs);
2039         vcpu->host_msrs = NULL;
2040
2041 out_free_guest_msrs:
2042         kfree(vcpu->guest_msrs);
2043         vcpu->guest_msrs = NULL;
2044
2045         return -ENOMEM;
2046 }
2047
2048 static struct kvm_arch_ops vmx_arch_ops = {
2049         .cpu_has_kvm_support = cpu_has_kvm_support,
2050         .disabled_by_bios = vmx_disabled_by_bios,
2051         .hardware_setup = hardware_setup,
2052         .hardware_unsetup = hardware_unsetup,
2053         .hardware_enable = hardware_enable,
2054         .hardware_disable = hardware_disable,
2055
2056         .vcpu_create = vmx_create_vcpu,
2057         .vcpu_free = vmx_free_vcpu,
2058
2059         .vcpu_load = vmx_vcpu_load,
2060         .vcpu_put = vmx_vcpu_put,
2061         .vcpu_decache = vmx_vcpu_decache,
2062
2063         .set_guest_debug = set_guest_debug,
2064         .get_msr = vmx_get_msr,
2065         .set_msr = vmx_set_msr,
2066         .get_segment_base = vmx_get_segment_base,
2067         .get_segment = vmx_get_segment,
2068         .set_segment = vmx_set_segment,
2069         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2070         .decache_cr0_cr4_guest_bits = vmx_decache_cr0_cr4_guest_bits,
2071         .set_cr0 = vmx_set_cr0,
2072         .set_cr3 = vmx_set_cr3,
2073         .set_cr4 = vmx_set_cr4,
2074 #ifdef CONFIG_X86_64
2075         .set_efer = vmx_set_efer,
2076 #endif
2077         .get_idt = vmx_get_idt,
2078         .set_idt = vmx_set_idt,
2079         .get_gdt = vmx_get_gdt,
2080         .set_gdt = vmx_set_gdt,
2081         .cache_regs = vcpu_load_rsp_rip,
2082         .decache_regs = vcpu_put_rsp_rip,
2083         .get_rflags = vmx_get_rflags,
2084         .set_rflags = vmx_set_rflags,
2085
2086         .tlb_flush = vmx_flush_tlb,
2087         .inject_page_fault = vmx_inject_page_fault,
2088
2089         .inject_gp = vmx_inject_gp,
2090
2091         .run = vmx_vcpu_run,
2092         .skip_emulated_instruction = skip_emulated_instruction,
2093         .vcpu_setup = vmx_vcpu_setup,
2094         .patch_hypercall = vmx_patch_hypercall,
2095 };
2096
2097 static int __init vmx_init(void)
2098 {
2099         return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2100 }
2101
2102 static void __exit vmx_exit(void)
2103 {
2104         kvm_exit_arch();
2105 }
2106
2107 module_init(vmx_init)
2108 module_exit(vmx_exit)