5a200c0b4b48b2a5bde4047cb6feba617ebb34d5
[safe/jmp/linux-2.6] / drivers / kvm / svm.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * AMD SVM support
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  *
8  * Authors:
9  *   Yaniv Kamay  <yaniv@qumranet.com>
10  *   Avi Kivity   <avi@qumranet.com>
11  *
12  * This work is licensed under the terms of the GNU GPL, version 2.  See
13  * the COPYING file in the top-level directory.
14  *
15  */
16
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/vmalloc.h>
20 #include <linux/highmem.h>
21 #include <linux/profile.h>
22 #include <asm/desc.h>
23
24 #include "kvm_svm.h"
25 #include "x86_emulate.h"
26
27 MODULE_AUTHOR("Qumranet");
28 MODULE_LICENSE("GPL");
29
30 #define IOPM_ALLOC_ORDER 2
31 #define MSRPM_ALLOC_ORDER 1
32
33 #define DB_VECTOR 1
34 #define UD_VECTOR 6
35 #define GP_VECTOR 13
36
37 #define DR7_GD_MASK (1 << 13)
38 #define DR6_BD_MASK (1 << 13)
39 #define CR4_DE_MASK (1UL << 3)
40
41 #define SEG_TYPE_LDT 2
42 #define SEG_TYPE_BUSY_TSS16 3
43
44 #define KVM_EFER_LMA (1 << 10)
45 #define KVM_EFER_LME (1 << 8)
46
47 unsigned long iopm_base;
48 unsigned long msrpm_base;
49
50 struct kvm_ldttss_desc {
51         u16 limit0;
52         u16 base0;
53         unsigned base1 : 8, type : 5, dpl : 2, p : 1;
54         unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
55         u32 base3;
56         u32 zero1;
57 } __attribute__((packed));
58
59 struct svm_cpu_data {
60         int cpu;
61
62         uint64_t asid_generation;
63         uint32_t max_asid;
64         uint32_t next_asid;
65         struct kvm_ldttss_desc *tss_desc;
66
67         struct page *save_area;
68 };
69
70 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
71
72 struct svm_init_data {
73         int cpu;
74         int r;
75 };
76
77 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
78
79 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
80 #define MSRS_RANGE_SIZE 2048
81 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
82
83 #define MAX_INST_SIZE 15
84
85 static unsigned get_addr_size(struct kvm_vcpu *vcpu)
86 {
87         struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
88         u16 cs_attrib;
89
90         if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
91                 return 2;
92
93         cs_attrib = sa->cs.attrib;
94
95         return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
96                                 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
97 }
98
99 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
100 {
101         int word_index = __ffs(vcpu->irq_summary);
102         int bit_index = __ffs(vcpu->irq_pending[word_index]);
103         int irq = word_index * BITS_PER_LONG + bit_index;
104
105         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
106         if (!vcpu->irq_pending[word_index])
107                 clear_bit(word_index, &vcpu->irq_summary);
108         return irq;
109 }
110
111 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
112 {
113         set_bit(irq, vcpu->irq_pending);
114         set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
115 }
116
117 static inline void clgi(void)
118 {
119         asm volatile (SVM_CLGI);
120 }
121
122 static inline void stgi(void)
123 {
124         asm volatile (SVM_STGI);
125 }
126
127 static inline void invlpga(unsigned long addr, u32 asid)
128 {
129         asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
130 }
131
132 static inline unsigned long kvm_read_cr2(void)
133 {
134         unsigned long cr2;
135
136         asm volatile ("mov %%cr2, %0" : "=r" (cr2));
137         return cr2;
138 }
139
140 static inline void kvm_write_cr2(unsigned long val)
141 {
142         asm volatile ("mov %0, %%cr2" :: "r" (val));
143 }
144
145 static inline unsigned long read_dr6(void)
146 {
147         unsigned long dr6;
148
149         asm volatile ("mov %%dr6, %0" : "=r" (dr6));
150         return dr6;
151 }
152
153 static inline void write_dr6(unsigned long val)
154 {
155         asm volatile ("mov %0, %%dr6" :: "r" (val));
156 }
157
158 static inline unsigned long read_dr7(void)
159 {
160         unsigned long dr7;
161
162         asm volatile ("mov %%dr7, %0" : "=r" (dr7));
163         return dr7;
164 }
165
166 static inline void write_dr7(unsigned long val)
167 {
168         asm volatile ("mov %0, %%dr7" :: "r" (val));
169 }
170
171 static inline void force_new_asid(struct kvm_vcpu *vcpu)
172 {
173         vcpu->svm->asid_generation--;
174 }
175
176 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
177 {
178         force_new_asid(vcpu);
179 }
180
181 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
182 {
183         if (!(efer & KVM_EFER_LMA))
184                 efer &= ~KVM_EFER_LME;
185
186         vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
187         vcpu->shadow_efer = efer;
188 }
189
190 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
191 {
192         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
193                                                 SVM_EVTINJ_VALID_ERR |
194                                                 SVM_EVTINJ_TYPE_EXEPT |
195                                                 GP_VECTOR;
196         vcpu->svm->vmcb->control.event_inj_err = error_code;
197 }
198
199 static void inject_ud(struct kvm_vcpu *vcpu)
200 {
201         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
202                                                 SVM_EVTINJ_TYPE_EXEPT |
203                                                 UD_VECTOR;
204 }
205
206 static void inject_db(struct kvm_vcpu *vcpu)
207 {
208         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
209                                                 SVM_EVTINJ_TYPE_EXEPT |
210                                                 DB_VECTOR;
211 }
212
213 static int is_page_fault(uint32_t info)
214 {
215         info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
216         return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
217 }
218
219 static int is_external_interrupt(u32 info)
220 {
221         info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
222         return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
223 }
224
225 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
226 {
227         if (!vcpu->svm->next_rip) {
228                 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
229                 return;
230         }
231         if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
232                 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
233                        __FUNCTION__,
234                        vcpu->svm->vmcb->save.rip,
235                        vcpu->svm->next_rip);
236         }
237
238         vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
239         vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
240
241         vcpu->interrupt_window_open = 1;
242 }
243
244 static int has_svm(void)
245 {
246         uint32_t eax, ebx, ecx, edx;
247
248         if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
249                 printk(KERN_INFO "has_svm: not amd\n");
250                 return 0;
251         }
252
253         cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
254         if (eax < SVM_CPUID_FUNC) {
255                 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
256                 return 0;
257         }
258
259         cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
260         if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
261                 printk(KERN_DEBUG "has_svm: svm not available\n");
262                 return 0;
263         }
264         return 1;
265 }
266
267 static void svm_hardware_disable(void *garbage)
268 {
269         struct svm_cpu_data *svm_data
270                 = per_cpu(svm_data, raw_smp_processor_id());
271
272         if (svm_data) {
273                 uint64_t efer;
274
275                 wrmsrl(MSR_VM_HSAVE_PA, 0);
276                 rdmsrl(MSR_EFER, efer);
277                 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
278                 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
279                 __free_page(svm_data->save_area);
280                 kfree(svm_data);
281         }
282 }
283
284 static void svm_hardware_enable(void *garbage)
285 {
286
287         struct svm_cpu_data *svm_data;
288         uint64_t efer;
289 #ifdef CONFIG_X86_64
290         struct desc_ptr gdt_descr;
291 #else
292         struct Xgt_desc_struct gdt_descr;
293 #endif
294         struct desc_struct *gdt;
295         int me = raw_smp_processor_id();
296
297         if (!has_svm()) {
298                 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
299                 return;
300         }
301         svm_data = per_cpu(svm_data, me);
302
303         if (!svm_data) {
304                 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
305                        me);
306                 return;
307         }
308
309         svm_data->asid_generation = 1;
310         svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
311         svm_data->next_asid = svm_data->max_asid + 1;
312
313         asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
314         gdt = (struct desc_struct *)gdt_descr.address;
315         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
316
317         rdmsrl(MSR_EFER, efer);
318         wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
319
320         wrmsrl(MSR_VM_HSAVE_PA,
321                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
322 }
323
324 static int svm_cpu_init(int cpu)
325 {
326         struct svm_cpu_data *svm_data;
327         int r;
328
329         svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
330         if (!svm_data)
331                 return -ENOMEM;
332         svm_data->cpu = cpu;
333         svm_data->save_area = alloc_page(GFP_KERNEL);
334         r = -ENOMEM;
335         if (!svm_data->save_area)
336                 goto err_1;
337
338         per_cpu(svm_data, cpu) = svm_data;
339
340         return 0;
341
342 err_1:
343         kfree(svm_data);
344         return r;
345
346 }
347
348 static int set_msr_interception(u32 *msrpm, unsigned msr,
349                                 int read, int write)
350 {
351         int i;
352
353         for (i = 0; i < NUM_MSR_MAPS; i++) {
354                 if (msr >= msrpm_ranges[i] &&
355                     msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
356                         u32 msr_offset = (i * MSRS_IN_RANGE + msr -
357                                           msrpm_ranges[i]) * 2;
358
359                         u32 *base = msrpm + (msr_offset / 32);
360                         u32 msr_shift = msr_offset % 32;
361                         u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
362                         *base = (*base & ~(0x3 << msr_shift)) |
363                                 (mask << msr_shift);
364                         return 1;
365                 }
366         }
367         printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
368         return 0;
369 }
370
371 static __init int svm_hardware_setup(void)
372 {
373         int cpu;
374         struct page *iopm_pages;
375         struct page *msrpm_pages;
376         void *msrpm_va;
377         int r;
378
379         kvm_emulator_want_group7_invlpg();
380
381         iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
382
383         if (!iopm_pages)
384                 return -ENOMEM;
385         memset(page_address(iopm_pages), 0xff,
386                                         PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
387         iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
388
389
390         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
391
392         r = -ENOMEM;
393         if (!msrpm_pages)
394                 goto err_1;
395
396         msrpm_va = page_address(msrpm_pages);
397         memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
398         msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
399
400 #ifdef CONFIG_X86_64
401         set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
402         set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
403         set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
404         set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
405         set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
406         set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
407 #endif
408         set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
409         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
410         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
411         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
412
413         for_each_online_cpu(cpu) {
414                 r = svm_cpu_init(cpu);
415                 if (r)
416                         goto err_2;
417         }
418         return 0;
419
420 err_2:
421         __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
422         msrpm_base = 0;
423 err_1:
424         __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
425         iopm_base = 0;
426         return r;
427 }
428
429 static __exit void svm_hardware_unsetup(void)
430 {
431         __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
432         __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
433         iopm_base = msrpm_base = 0;
434 }
435
436 static void init_seg(struct vmcb_seg *seg)
437 {
438         seg->selector = 0;
439         seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
440                 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
441         seg->limit = 0xffff;
442         seg->base = 0;
443 }
444
445 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
446 {
447         seg->selector = 0;
448         seg->attrib = SVM_SELECTOR_P_MASK | type;
449         seg->limit = 0xffff;
450         seg->base = 0;
451 }
452
453 static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
454 {
455         return 0;
456 }
457
458 static void init_vmcb(struct vmcb *vmcb)
459 {
460         struct vmcb_control_area *control = &vmcb->control;
461         struct vmcb_save_area *save = &vmcb->save;
462         u64 tsc;
463
464         control->intercept_cr_read =    INTERCEPT_CR0_MASK |
465                                         INTERCEPT_CR3_MASK |
466                                         INTERCEPT_CR4_MASK;
467
468         control->intercept_cr_write =   INTERCEPT_CR0_MASK |
469                                         INTERCEPT_CR3_MASK |
470                                         INTERCEPT_CR4_MASK;
471
472         control->intercept_dr_read =    INTERCEPT_DR0_MASK |
473                                         INTERCEPT_DR1_MASK |
474                                         INTERCEPT_DR2_MASK |
475                                         INTERCEPT_DR3_MASK;
476
477         control->intercept_dr_write =   INTERCEPT_DR0_MASK |
478                                         INTERCEPT_DR1_MASK |
479                                         INTERCEPT_DR2_MASK |
480                                         INTERCEPT_DR3_MASK |
481                                         INTERCEPT_DR5_MASK |
482                                         INTERCEPT_DR7_MASK;
483
484         control->intercept_exceptions = 1 << PF_VECTOR;
485
486
487         control->intercept =    (1ULL << INTERCEPT_INTR) |
488                                 (1ULL << INTERCEPT_NMI) |
489                                 (1ULL << INTERCEPT_SMI) |
490                 /*
491                  * selective cr0 intercept bug?
492                  *      0:   0f 22 d8                mov    %eax,%cr3
493                  *      3:   0f 20 c0                mov    %cr0,%eax
494                  *      6:   0d 00 00 00 80          or     $0x80000000,%eax
495                  *      b:   0f 22 c0                mov    %eax,%cr0
496                  * set cr3 ->interception
497                  * get cr0 ->interception
498                  * set cr0 -> no interception
499                  */
500                 /*              (1ULL << INTERCEPT_SELECTIVE_CR0) | */
501                                 (1ULL << INTERCEPT_CPUID) |
502                                 (1ULL << INTERCEPT_HLT) |
503                                 (1ULL << INTERCEPT_INVLPGA) |
504                                 (1ULL << INTERCEPT_IOIO_PROT) |
505                                 (1ULL << INTERCEPT_MSR_PROT) |
506                                 (1ULL << INTERCEPT_TASK_SWITCH) |
507                                 (1ULL << INTERCEPT_SHUTDOWN) |
508                                 (1ULL << INTERCEPT_VMRUN) |
509                                 (1ULL << INTERCEPT_VMMCALL) |
510                                 (1ULL << INTERCEPT_VMLOAD) |
511                                 (1ULL << INTERCEPT_VMSAVE) |
512                                 (1ULL << INTERCEPT_STGI) |
513                                 (1ULL << INTERCEPT_CLGI) |
514                                 (1ULL << INTERCEPT_SKINIT);
515
516         control->iopm_base_pa = iopm_base;
517         control->msrpm_base_pa = msrpm_base;
518         rdtscll(tsc);
519         control->tsc_offset = -tsc;
520         control->int_ctl = V_INTR_MASKING_MASK;
521
522         init_seg(&save->es);
523         init_seg(&save->ss);
524         init_seg(&save->ds);
525         init_seg(&save->fs);
526         init_seg(&save->gs);
527
528         save->cs.selector = 0xf000;
529         /* Executable/Readable Code Segment */
530         save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
531                 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
532         save->cs.limit = 0xffff;
533         /*
534          * cs.base should really be 0xffff0000, but vmx can't handle that, so
535          * be consistent with it.
536          *
537          * Replace when we have real mode working for vmx.
538          */
539         save->cs.base = 0xf0000;
540
541         save->gdtr.limit = 0xffff;
542         save->idtr.limit = 0xffff;
543
544         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
545         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
546
547         save->efer = MSR_EFER_SVME_MASK;
548
549         save->dr6 = 0xffff0ff0;
550         save->dr7 = 0x400;
551         save->rflags = 2;
552         save->rip = 0x0000fff0;
553
554         /*
555          * cr0 val on cpu init should be 0x60000010, we enable cpu
556          * cache by default. the orderly way is to enable cache in bios.
557          */
558         save->cr0 = 0x00000010 | CR0_PG_MASK | CR0_WP_MASK;
559         save->cr4 = CR4_PAE_MASK;
560         /* rdx = ?? */
561 }
562
563 static int svm_create_vcpu(struct kvm_vcpu *vcpu)
564 {
565         struct page *page;
566         int r;
567
568         r = -ENOMEM;
569         vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
570         if (!vcpu->svm)
571                 goto out1;
572         page = alloc_page(GFP_KERNEL);
573         if (!page)
574                 goto out2;
575
576         vcpu->svm->vmcb = page_address(page);
577         memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
578         vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
579         vcpu->svm->cr0 = 0x00000010;
580         vcpu->svm->asid_generation = 0;
581         memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
582         init_vmcb(vcpu->svm->vmcb);
583
584         fx_init(vcpu);
585
586         return 0;
587
588 out2:
589         kfree(vcpu->svm);
590 out1:
591         return r;
592 }
593
594 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
595 {
596         if (!vcpu->svm)
597                 return;
598         if (vcpu->svm->vmcb)
599                 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
600         kfree(vcpu->svm);
601 }
602
603 static struct kvm_vcpu *svm_vcpu_load(struct kvm_vcpu *vcpu)
604 {
605         get_cpu();
606         return vcpu;
607 }
608
609 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
610 {
611         put_cpu();
612 }
613
614 static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
615 {
616 }
617
618 static void svm_cache_regs(struct kvm_vcpu *vcpu)
619 {
620         vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
621         vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
622         vcpu->rip = vcpu->svm->vmcb->save.rip;
623 }
624
625 static void svm_decache_regs(struct kvm_vcpu *vcpu)
626 {
627         vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
628         vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
629         vcpu->svm->vmcb->save.rip = vcpu->rip;
630 }
631
632 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
633 {
634         return vcpu->svm->vmcb->save.rflags;
635 }
636
637 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
638 {
639         vcpu->svm->vmcb->save.rflags = rflags;
640 }
641
642 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
643 {
644         struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
645
646         switch (seg) {
647         case VCPU_SREG_CS: return &save->cs;
648         case VCPU_SREG_DS: return &save->ds;
649         case VCPU_SREG_ES: return &save->es;
650         case VCPU_SREG_FS: return &save->fs;
651         case VCPU_SREG_GS: return &save->gs;
652         case VCPU_SREG_SS: return &save->ss;
653         case VCPU_SREG_TR: return &save->tr;
654         case VCPU_SREG_LDTR: return &save->ldtr;
655         }
656         BUG();
657         return NULL;
658 }
659
660 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
661 {
662         struct vmcb_seg *s = svm_seg(vcpu, seg);
663
664         return s->base;
665 }
666
667 static void svm_get_segment(struct kvm_vcpu *vcpu,
668                             struct kvm_segment *var, int seg)
669 {
670         struct vmcb_seg *s = svm_seg(vcpu, seg);
671
672         var->base = s->base;
673         var->limit = s->limit;
674         var->selector = s->selector;
675         var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
676         var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
677         var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
678         var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
679         var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
680         var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
681         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
682         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
683         var->unusable = !var->present;
684 }
685
686 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
687 {
688         struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
689
690         *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
691         *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
692 }
693
694 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
695 {
696         dt->limit = vcpu->svm->vmcb->save.idtr.limit;
697         dt->base = vcpu->svm->vmcb->save.idtr.base;
698 }
699
700 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
701 {
702         vcpu->svm->vmcb->save.idtr.limit = dt->limit;
703         vcpu->svm->vmcb->save.idtr.base = dt->base ;
704 }
705
706 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
707 {
708         dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
709         dt->base = vcpu->svm->vmcb->save.gdtr.base;
710 }
711
712 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
713 {
714         vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
715         vcpu->svm->vmcb->save.gdtr.base = dt->base ;
716 }
717
718 static void svm_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
719 {
720 }
721
722 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
723 {
724 #ifdef CONFIG_X86_64
725         if (vcpu->shadow_efer & KVM_EFER_LME) {
726                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
727                         vcpu->shadow_efer |= KVM_EFER_LMA;
728                         vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
729                 }
730
731                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
732                         vcpu->shadow_efer &= ~KVM_EFER_LMA;
733                         vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
734                 }
735         }
736 #endif
737         vcpu->svm->cr0 = cr0;
738         vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK | CR0_WP_MASK;
739         vcpu->cr0 = cr0;
740 }
741
742 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
743 {
744        vcpu->cr4 = cr4;
745        vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
746 }
747
748 static void svm_set_segment(struct kvm_vcpu *vcpu,
749                             struct kvm_segment *var, int seg)
750 {
751         struct vmcb_seg *s = svm_seg(vcpu, seg);
752
753         s->base = var->base;
754         s->limit = var->limit;
755         s->selector = var->selector;
756         if (var->unusable)
757                 s->attrib = 0;
758         else {
759                 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
760                 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
761                 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
762                 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
763                 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
764                 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
765                 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
766                 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
767         }
768         if (seg == VCPU_SREG_CS)
769                 vcpu->svm->vmcb->save.cpl
770                         = (vcpu->svm->vmcb->save.cs.attrib
771                            >> SVM_SELECTOR_DPL_SHIFT) & 3;
772
773 }
774
775 /* FIXME:
776
777         vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
778         vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
779
780 */
781
782 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
783 {
784         return -EOPNOTSUPP;
785 }
786
787 static void load_host_msrs(struct kvm_vcpu *vcpu)
788 {
789         int i;
790
791         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
792                 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
793 }
794
795 static void save_host_msrs(struct kvm_vcpu *vcpu)
796 {
797         int i;
798
799         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
800                 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
801 }
802
803 static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
804 {
805         if (svm_data->next_asid > svm_data->max_asid) {
806                 ++svm_data->asid_generation;
807                 svm_data->next_asid = 1;
808                 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
809         }
810
811         vcpu->cpu = svm_data->cpu;
812         vcpu->svm->asid_generation = svm_data->asid_generation;
813         vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
814 }
815
816 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
817 {
818         invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
819 }
820
821 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
822 {
823         return vcpu->svm->db_regs[dr];
824 }
825
826 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
827                        int *exception)
828 {
829         *exception = 0;
830
831         if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
832                 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
833                 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
834                 *exception = DB_VECTOR;
835                 return;
836         }
837
838         switch (dr) {
839         case 0 ... 3:
840                 vcpu->svm->db_regs[dr] = value;
841                 return;
842         case 4 ... 5:
843                 if (vcpu->cr4 & CR4_DE_MASK) {
844                         *exception = UD_VECTOR;
845                         return;
846                 }
847         case 7: {
848                 if (value & ~((1ULL << 32) - 1)) {
849                         *exception = GP_VECTOR;
850                         return;
851                 }
852                 vcpu->svm->vmcb->save.dr7 = value;
853                 return;
854         }
855         default:
856                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
857                        __FUNCTION__, dr);
858                 *exception = UD_VECTOR;
859                 return;
860         }
861 }
862
863 static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
864 {
865         u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
866         u64 fault_address;
867         u32 error_code;
868         enum emulation_result er;
869         int r;
870
871         if (is_external_interrupt(exit_int_info))
872                 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
873
874         spin_lock(&vcpu->kvm->lock);
875
876         fault_address  = vcpu->svm->vmcb->control.exit_info_2;
877         error_code = vcpu->svm->vmcb->control.exit_info_1;
878         r = kvm_mmu_page_fault(vcpu, fault_address, error_code);
879         if (r < 0) {
880                 spin_unlock(&vcpu->kvm->lock);
881                 return r;
882         }
883         if (!r) {
884                 spin_unlock(&vcpu->kvm->lock);
885                 return 1;
886         }
887         er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
888         spin_unlock(&vcpu->kvm->lock);
889
890         switch (er) {
891         case EMULATE_DONE:
892                 return 1;
893         case EMULATE_DO_MMIO:
894                 ++kvm_stat.mmio_exits;
895                 kvm_run->exit_reason = KVM_EXIT_MMIO;
896                 return 0;
897         case EMULATE_FAIL:
898                 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
899                 break;
900         default:
901                 BUG();
902         }
903
904         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
905         return 0;
906 }
907
908 static int shutdown_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
909 {
910         /*
911          * VMCB is undefined after a SHUTDOWN intercept
912          * so reinitialize it.
913          */
914         memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
915         init_vmcb(vcpu->svm->vmcb);
916
917         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
918         return 0;
919 }
920
921 static int io_get_override(struct kvm_vcpu *vcpu,
922                           struct vmcb_seg **seg,
923                           int *addr_override)
924 {
925         u8 inst[MAX_INST_SIZE];
926         unsigned ins_length;
927         gva_t rip;
928         int i;
929
930         rip =  vcpu->svm->vmcb->save.rip;
931         ins_length = vcpu->svm->next_rip - rip;
932         rip += vcpu->svm->vmcb->save.cs.base;
933
934         if (ins_length > MAX_INST_SIZE)
935                 printk(KERN_DEBUG
936                        "%s: inst length err, cs base 0x%llx rip 0x%llx "
937                        "next rip 0x%llx ins_length %u\n",
938                        __FUNCTION__,
939                        vcpu->svm->vmcb->save.cs.base,
940                        vcpu->svm->vmcb->save.rip,
941                        vcpu->svm->vmcb->control.exit_info_2,
942                        ins_length);
943
944         if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
945                 /* #PF */
946                 return 0;
947
948         *addr_override = 0;
949         *seg = NULL;
950         for (i = 0; i < ins_length; i++)
951                 switch (inst[i]) {
952                 case 0xf0:
953                 case 0xf2:
954                 case 0xf3:
955                 case 0x66:
956                         continue;
957                 case 0x67:
958                         *addr_override = 1;
959                         continue;
960                 case 0x2e:
961                         *seg = &vcpu->svm->vmcb->save.cs;
962                         continue;
963                 case 0x36:
964                         *seg = &vcpu->svm->vmcb->save.ss;
965                         continue;
966                 case 0x3e:
967                         *seg = &vcpu->svm->vmcb->save.ds;
968                         continue;
969                 case 0x26:
970                         *seg = &vcpu->svm->vmcb->save.es;
971                         continue;
972                 case 0x64:
973                         *seg = &vcpu->svm->vmcb->save.fs;
974                         continue;
975                 case 0x65:
976                         *seg = &vcpu->svm->vmcb->save.gs;
977                         continue;
978                 default:
979                         return 1;
980                 }
981         printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
982         return 0;
983 }
984
985 static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, u64 *address)
986 {
987         unsigned long addr_mask;
988         unsigned long *reg;
989         struct vmcb_seg *seg;
990         int addr_override;
991         struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
992         u16 cs_attrib = save_area->cs.attrib;
993         unsigned addr_size = get_addr_size(vcpu);
994
995         if (!io_get_override(vcpu, &seg, &addr_override))
996                 return 0;
997
998         if (addr_override)
999                 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
1000
1001         if (ins) {
1002                 reg = &vcpu->regs[VCPU_REGS_RDI];
1003                 seg = &vcpu->svm->vmcb->save.es;
1004         } else {
1005                 reg = &vcpu->regs[VCPU_REGS_RSI];
1006                 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
1007         }
1008
1009         addr_mask = ~0ULL >> (64 - (addr_size * 8));
1010
1011         if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
1012             !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
1013                 *address = (*reg & addr_mask);
1014                 return addr_mask;
1015         }
1016
1017         if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
1018                 svm_inject_gp(vcpu, 0);
1019                 return 0;
1020         }
1021
1022         *address = (*reg & addr_mask) + seg->base;
1023         return addr_mask;
1024 }
1025
1026 static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1027 {
1028         u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
1029         int _in = io_info & SVM_IOIO_TYPE_MASK;
1030
1031         ++kvm_stat.io_exits;
1032
1033         vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
1034
1035         kvm_run->exit_reason = KVM_EXIT_IO;
1036         kvm_run->io.port = io_info >> 16;
1037         kvm_run->io.direction = (_in) ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1038         kvm_run->io.size = ((io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT);
1039         kvm_run->io.string = (io_info & SVM_IOIO_STR_MASK) != 0;
1040         kvm_run->io.rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1041
1042         if (kvm_run->io.string) {
1043                 unsigned addr_mask;
1044
1045                 addr_mask = io_adress(vcpu, _in, &kvm_run->io.address);
1046                 if (!addr_mask) {
1047                         printk(KERN_DEBUG "%s: get io address failed\n",
1048                                __FUNCTION__);
1049                         return 1;
1050                 }
1051
1052                 if (kvm_run->io.rep) {
1053                         kvm_run->io.count
1054                                 = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1055                         kvm_run->io.string_down = (vcpu->svm->vmcb->save.rflags
1056                                                    & X86_EFLAGS_DF) != 0;
1057                 }
1058         } else
1059                 kvm_run->io.value = vcpu->svm->vmcb->save.rax;
1060         return 0;
1061 }
1062
1063 static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1064 {
1065         return 1;
1066 }
1067
1068 static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1069 {
1070         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1071         skip_emulated_instruction(vcpu);
1072         if (vcpu->irq_summary)
1073                 return 1;
1074
1075         kvm_run->exit_reason = KVM_EXIT_HLT;
1076         ++kvm_stat.halt_exits;
1077         return 0;
1078 }
1079
1080 static int vmmcall_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1081 {
1082         vcpu->svm->vmcb->save.rip += 3;
1083         return kvm_hypercall(vcpu, kvm_run);
1084 }
1085
1086 static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1087 {
1088         inject_ud(vcpu);
1089         return 1;
1090 }
1091
1092 static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1093 {
1094         printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1095         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1096         return 0;
1097 }
1098
1099 static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1100 {
1101         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1102         kvm_run->exit_reason = KVM_EXIT_CPUID;
1103         return 0;
1104 }
1105
1106 static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1107 {
1108         if (emulate_instruction(vcpu, NULL, 0, 0) != EMULATE_DONE)
1109                 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1110         return 1;
1111 }
1112
1113 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1114 {
1115         switch (ecx) {
1116         case MSR_IA32_TIME_STAMP_COUNTER: {
1117                 u64 tsc;
1118
1119                 rdtscll(tsc);
1120                 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1121                 break;
1122         }
1123         case MSR_K6_STAR:
1124                 *data = vcpu->svm->vmcb->save.star;
1125                 break;
1126 #ifdef CONFIG_X86_64
1127         case MSR_LSTAR:
1128                 *data = vcpu->svm->vmcb->save.lstar;
1129                 break;
1130         case MSR_CSTAR:
1131                 *data = vcpu->svm->vmcb->save.cstar;
1132                 break;
1133         case MSR_KERNEL_GS_BASE:
1134                 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1135                 break;
1136         case MSR_SYSCALL_MASK:
1137                 *data = vcpu->svm->vmcb->save.sfmask;
1138                 break;
1139 #endif
1140         case MSR_IA32_SYSENTER_CS:
1141                 *data = vcpu->svm->vmcb->save.sysenter_cs;
1142                 break;
1143         case MSR_IA32_SYSENTER_EIP:
1144                 *data = vcpu->svm->vmcb->save.sysenter_eip;
1145                 break;
1146         case MSR_IA32_SYSENTER_ESP:
1147                 *data = vcpu->svm->vmcb->save.sysenter_esp;
1148                 break;
1149         default:
1150                 return kvm_get_msr_common(vcpu, ecx, data);
1151         }
1152         return 0;
1153 }
1154
1155 static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1156 {
1157         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1158         u64 data;
1159
1160         if (svm_get_msr(vcpu, ecx, &data))
1161                 svm_inject_gp(vcpu, 0);
1162         else {
1163                 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1164                 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1165                 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1166                 skip_emulated_instruction(vcpu);
1167         }
1168         return 1;
1169 }
1170
1171 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1172 {
1173         switch (ecx) {
1174         case MSR_IA32_TIME_STAMP_COUNTER: {
1175                 u64 tsc;
1176
1177                 rdtscll(tsc);
1178                 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1179                 break;
1180         }
1181         case MSR_K6_STAR:
1182                 vcpu->svm->vmcb->save.star = data;
1183                 break;
1184 #ifdef CONFIG_X86_64
1185         case MSR_LSTAR:
1186                 vcpu->svm->vmcb->save.lstar = data;
1187                 break;
1188         case MSR_CSTAR:
1189                 vcpu->svm->vmcb->save.cstar = data;
1190                 break;
1191         case MSR_KERNEL_GS_BASE:
1192                 vcpu->svm->vmcb->save.kernel_gs_base = data;
1193                 break;
1194         case MSR_SYSCALL_MASK:
1195                 vcpu->svm->vmcb->save.sfmask = data;
1196                 break;
1197 #endif
1198         case MSR_IA32_SYSENTER_CS:
1199                 vcpu->svm->vmcb->save.sysenter_cs = data;
1200                 break;
1201         case MSR_IA32_SYSENTER_EIP:
1202                 vcpu->svm->vmcb->save.sysenter_eip = data;
1203                 break;
1204         case MSR_IA32_SYSENTER_ESP:
1205                 vcpu->svm->vmcb->save.sysenter_esp = data;
1206                 break;
1207         default:
1208                 return kvm_set_msr_common(vcpu, ecx, data);
1209         }
1210         return 0;
1211 }
1212
1213 static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1214 {
1215         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1216         u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1217                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1218         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1219         if (svm_set_msr(vcpu, ecx, data))
1220                 svm_inject_gp(vcpu, 0);
1221         else
1222                 skip_emulated_instruction(vcpu);
1223         return 1;
1224 }
1225
1226 static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1227 {
1228         if (vcpu->svm->vmcb->control.exit_info_1)
1229                 return wrmsr_interception(vcpu, kvm_run);
1230         else
1231                 return rdmsr_interception(vcpu, kvm_run);
1232 }
1233
1234 static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1235                                    struct kvm_run *kvm_run)
1236 {
1237         /*
1238          * If the user space waits to inject interrupts, exit as soon as
1239          * possible
1240          */
1241         if (kvm_run->request_interrupt_window &&
1242             !vcpu->irq_summary) {
1243                 ++kvm_stat.irq_window_exits;
1244                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1245                 return 0;
1246         }
1247
1248         return 1;
1249 }
1250
1251 static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1252                                       struct kvm_run *kvm_run) = {
1253         [SVM_EXIT_READ_CR0]                     = emulate_on_interception,
1254         [SVM_EXIT_READ_CR3]                     = emulate_on_interception,
1255         [SVM_EXIT_READ_CR4]                     = emulate_on_interception,
1256         /* for now: */
1257         [SVM_EXIT_WRITE_CR0]                    = emulate_on_interception,
1258         [SVM_EXIT_WRITE_CR3]                    = emulate_on_interception,
1259         [SVM_EXIT_WRITE_CR4]                    = emulate_on_interception,
1260         [SVM_EXIT_READ_DR0]                     = emulate_on_interception,
1261         [SVM_EXIT_READ_DR1]                     = emulate_on_interception,
1262         [SVM_EXIT_READ_DR2]                     = emulate_on_interception,
1263         [SVM_EXIT_READ_DR3]                     = emulate_on_interception,
1264         [SVM_EXIT_WRITE_DR0]                    = emulate_on_interception,
1265         [SVM_EXIT_WRITE_DR1]                    = emulate_on_interception,
1266         [SVM_EXIT_WRITE_DR2]                    = emulate_on_interception,
1267         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
1268         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
1269         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
1270         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
1271         [SVM_EXIT_INTR]                         = nop_on_interception,
1272         [SVM_EXIT_NMI]                          = nop_on_interception,
1273         [SVM_EXIT_SMI]                          = nop_on_interception,
1274         [SVM_EXIT_INIT]                         = nop_on_interception,
1275         [SVM_EXIT_VINTR]                        = interrupt_window_interception,
1276         /* [SVM_EXIT_CR0_SEL_WRITE]             = emulate_on_interception, */
1277         [SVM_EXIT_CPUID]                        = cpuid_interception,
1278         [SVM_EXIT_HLT]                          = halt_interception,
1279         [SVM_EXIT_INVLPG]                       = emulate_on_interception,
1280         [SVM_EXIT_INVLPGA]                      = invalid_op_interception,
1281         [SVM_EXIT_IOIO]                         = io_interception,
1282         [SVM_EXIT_MSR]                          = msr_interception,
1283         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
1284         [SVM_EXIT_SHUTDOWN]                     = shutdown_interception,
1285         [SVM_EXIT_VMRUN]                        = invalid_op_interception,
1286         [SVM_EXIT_VMMCALL]                      = vmmcall_interception,
1287         [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
1288         [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
1289         [SVM_EXIT_STGI]                         = invalid_op_interception,
1290         [SVM_EXIT_CLGI]                         = invalid_op_interception,
1291         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
1292 };
1293
1294
1295 static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1296 {
1297         u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1298
1299         kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1300
1301         if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1302             exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1303                 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1304                        "exit_code 0x%x\n",
1305                        __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1306                        exit_code);
1307
1308         if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
1309             || svm_exit_handlers[exit_code] == 0) {
1310                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1311                 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1312                        __FUNCTION__,
1313                        exit_code,
1314                        vcpu->svm->vmcb->save.rip,
1315                        vcpu->cr0,
1316                        vcpu->svm->vmcb->save.rflags);
1317                 return 0;
1318         }
1319
1320         return svm_exit_handlers[exit_code](vcpu, kvm_run);
1321 }
1322
1323 static void reload_tss(struct kvm_vcpu *vcpu)
1324 {
1325         int cpu = raw_smp_processor_id();
1326
1327         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1328         svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1329         load_TR_desc();
1330 }
1331
1332 static void pre_svm_run(struct kvm_vcpu *vcpu)
1333 {
1334         int cpu = raw_smp_processor_id();
1335
1336         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1337
1338         vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1339         if (vcpu->cpu != cpu ||
1340             vcpu->svm->asid_generation != svm_data->asid_generation)
1341                 new_asid(vcpu, svm_data);
1342 }
1343
1344
1345 static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1346 {
1347         struct vmcb_control_area *control;
1348
1349         control = &vcpu->svm->vmcb->control;
1350         control->int_vector = pop_irq(vcpu);
1351         control->int_ctl &= ~V_INTR_PRIO_MASK;
1352         control->int_ctl |= V_IRQ_MASK |
1353                 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1354 }
1355
1356 static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1357 {
1358         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1359
1360         if (control->int_ctl & V_IRQ_MASK) {
1361                 control->int_ctl &= ~V_IRQ_MASK;
1362                 push_irq(vcpu, control->int_vector);
1363         }
1364
1365         vcpu->interrupt_window_open =
1366                 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1367 }
1368
1369 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1370                                        struct kvm_run *kvm_run)
1371 {
1372         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1373
1374         vcpu->interrupt_window_open =
1375                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1376                  (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1377
1378         if (vcpu->interrupt_window_open && vcpu->irq_summary)
1379                 /*
1380                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1381                  */
1382                 kvm_do_inject_irq(vcpu);
1383
1384         /*
1385          * Interrupts blocked.  Wait for unblock.
1386          */
1387         if (!vcpu->interrupt_window_open &&
1388             (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1389                 control->intercept |= 1ULL << INTERCEPT_VINTR;
1390         } else
1391                 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1392 }
1393
1394 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1395                               struct kvm_run *kvm_run)
1396 {
1397         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1398                                                   vcpu->irq_summary == 0);
1399         kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1400         kvm_run->cr8 = vcpu->cr8;
1401         kvm_run->apic_base = vcpu->apic_base;
1402 }
1403
1404 /*
1405  * Check if userspace requested an interrupt window, and that the
1406  * interrupt window is open.
1407  *
1408  * No need to exit to userspace if we already have an interrupt queued.
1409  */
1410 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1411                                           struct kvm_run *kvm_run)
1412 {
1413         return (!vcpu->irq_summary &&
1414                 kvm_run->request_interrupt_window &&
1415                 vcpu->interrupt_window_open &&
1416                 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1417 }
1418
1419 static void save_db_regs(unsigned long *db_regs)
1420 {
1421         asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1422         asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1423         asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1424         asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1425 }
1426
1427 static void load_db_regs(unsigned long *db_regs)
1428 {
1429         asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1430         asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1431         asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1432         asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1433 }
1434
1435 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1436 {
1437         u16 fs_selector;
1438         u16 gs_selector;
1439         u16 ldt_selector;
1440         int r;
1441
1442 again:
1443         if (!vcpu->mmio_read_completed)
1444                 do_interrupt_requests(vcpu, kvm_run);
1445
1446         clgi();
1447
1448         pre_svm_run(vcpu);
1449
1450         save_host_msrs(vcpu);
1451         fs_selector = read_fs();
1452         gs_selector = read_gs();
1453         ldt_selector = read_ldt();
1454         vcpu->svm->host_cr2 = kvm_read_cr2();
1455         vcpu->svm->host_dr6 = read_dr6();
1456         vcpu->svm->host_dr7 = read_dr7();
1457         vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1458
1459         if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1460                 write_dr7(0);
1461                 save_db_regs(vcpu->svm->host_db_regs);
1462                 load_db_regs(vcpu->svm->db_regs);
1463         }
1464
1465         fx_save(vcpu->host_fx_image);
1466         fx_restore(vcpu->guest_fx_image);
1467
1468         asm volatile (
1469 #ifdef CONFIG_X86_64
1470                 "push %%rbx; push %%rcx; push %%rdx;"
1471                 "push %%rsi; push %%rdi; push %%rbp;"
1472                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1473                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1474 #else
1475                 "push %%ebx; push %%ecx; push %%edx;"
1476                 "push %%esi; push %%edi; push %%ebp;"
1477 #endif
1478
1479 #ifdef CONFIG_X86_64
1480                 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1481                 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1482                 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1483                 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1484                 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1485                 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1486                 "mov %c[r8](%[vcpu]),  %%r8  \n\t"
1487                 "mov %c[r9](%[vcpu]),  %%r9  \n\t"
1488                 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1489                 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1490                 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1491                 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1492                 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1493                 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1494 #else
1495                 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1496                 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1497                 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1498                 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1499                 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1500                 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1501 #endif
1502
1503 #ifdef CONFIG_X86_64
1504                 /* Enter guest mode */
1505                 "push %%rax \n\t"
1506                 "mov %c[svm](%[vcpu]), %%rax \n\t"
1507                 "mov %c[vmcb](%%rax), %%rax \n\t"
1508                 SVM_VMLOAD "\n\t"
1509                 SVM_VMRUN "\n\t"
1510                 SVM_VMSAVE "\n\t"
1511                 "pop %%rax \n\t"
1512 #else
1513                 /* Enter guest mode */
1514                 "push %%eax \n\t"
1515                 "mov %c[svm](%[vcpu]), %%eax \n\t"
1516                 "mov %c[vmcb](%%eax), %%eax \n\t"
1517                 SVM_VMLOAD "\n\t"
1518                 SVM_VMRUN "\n\t"
1519                 SVM_VMSAVE "\n\t"
1520                 "pop %%eax \n\t"
1521 #endif
1522
1523                 /* Save guest registers, load host registers */
1524 #ifdef CONFIG_X86_64
1525                 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1526                 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1527                 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1528                 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1529                 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1530                 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1531                 "mov %%r8,  %c[r8](%[vcpu]) \n\t"
1532                 "mov %%r9,  %c[r9](%[vcpu]) \n\t"
1533                 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1534                 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1535                 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1536                 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1537                 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1538                 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1539
1540                 "pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1541                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1542                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1543                 "pop  %%rdx; pop  %%rcx; pop  %%rbx; \n\t"
1544 #else
1545                 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1546                 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1547                 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1548                 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1549                 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1550                 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1551
1552                 "pop  %%ebp; pop  %%edi; pop  %%esi;"
1553                 "pop  %%edx; pop  %%ecx; pop  %%ebx; \n\t"
1554 #endif
1555                 :
1556                 : [vcpu]"a"(vcpu),
1557                   [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1558                   [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1559                   [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1560                   [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1561                   [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1562                   [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1563                   [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1564                   [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
1565 #ifdef CONFIG_X86_64
1566                   ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1567                   [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1568                   [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1569                   [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1570                   [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1571                   [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1572                   [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1573                   [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1574 #endif
1575                 : "cc", "memory" );
1576
1577         fx_save(vcpu->guest_fx_image);
1578         fx_restore(vcpu->host_fx_image);
1579
1580         if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1581                 load_db_regs(vcpu->svm->host_db_regs);
1582
1583         vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1584
1585         write_dr6(vcpu->svm->host_dr6);
1586         write_dr7(vcpu->svm->host_dr7);
1587         kvm_write_cr2(vcpu->svm->host_cr2);
1588
1589         load_fs(fs_selector);
1590         load_gs(gs_selector);
1591         load_ldt(ldt_selector);
1592         load_host_msrs(vcpu);
1593
1594         reload_tss(vcpu);
1595
1596         /*
1597          * Profile KVM exit RIPs:
1598          */
1599         if (unlikely(prof_on == KVM_PROFILING))
1600                 profile_hit(KVM_PROFILING,
1601                         (void *)(unsigned long)vcpu->svm->vmcb->save.rip);
1602
1603         stgi();
1604
1605         kvm_reput_irq(vcpu);
1606
1607         vcpu->svm->next_rip = 0;
1608
1609         if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1610                 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1611                 kvm_run->exit_reason = vcpu->svm->vmcb->control.exit_code;
1612                 post_kvm_run_save(vcpu, kvm_run);
1613                 return 0;
1614         }
1615
1616         r = handle_exit(vcpu, kvm_run);
1617         if (r > 0) {
1618                 if (signal_pending(current)) {
1619                         ++kvm_stat.signal_exits;
1620                         post_kvm_run_save(vcpu, kvm_run);
1621                         return -EINTR;
1622                 }
1623
1624                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1625                         ++kvm_stat.request_irq_exits;
1626                         post_kvm_run_save(vcpu, kvm_run);
1627                         return -EINTR;
1628                 }
1629                 kvm_resched(vcpu);
1630                 goto again;
1631         }
1632         post_kvm_run_save(vcpu, kvm_run);
1633         return r;
1634 }
1635
1636 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1637 {
1638         force_new_asid(vcpu);
1639 }
1640
1641 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1642 {
1643         vcpu->svm->vmcb->save.cr3 = root;
1644         force_new_asid(vcpu);
1645 }
1646
1647 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1648                                   unsigned long  addr,
1649                                   uint32_t err_code)
1650 {
1651         uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1652
1653         ++kvm_stat.pf_guest;
1654
1655         if (is_page_fault(exit_int_info)) {
1656
1657                 vcpu->svm->vmcb->control.event_inj_err = 0;
1658                 vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1659                                                         SVM_EVTINJ_VALID_ERR |
1660                                                         SVM_EVTINJ_TYPE_EXEPT |
1661                                                         DF_VECTOR;
1662                 return;
1663         }
1664         vcpu->cr2 = addr;
1665         vcpu->svm->vmcb->save.cr2 = addr;
1666         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1667                                                 SVM_EVTINJ_VALID_ERR |
1668                                                 SVM_EVTINJ_TYPE_EXEPT |
1669                                                 PF_VECTOR;
1670         vcpu->svm->vmcb->control.event_inj_err = err_code;
1671 }
1672
1673
1674 static int is_disabled(void)
1675 {
1676         return 0;
1677 }
1678
1679 static void
1680 svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1681 {
1682         /*
1683          * Patch in the VMMCALL instruction:
1684          */
1685         hypercall[0] = 0x0f;
1686         hypercall[1] = 0x01;
1687         hypercall[2] = 0xd9;
1688         hypercall[3] = 0xc3;
1689 }
1690
1691 static struct kvm_arch_ops svm_arch_ops = {
1692         .cpu_has_kvm_support = has_svm,
1693         .disabled_by_bios = is_disabled,
1694         .hardware_setup = svm_hardware_setup,
1695         .hardware_unsetup = svm_hardware_unsetup,
1696         .hardware_enable = svm_hardware_enable,
1697         .hardware_disable = svm_hardware_disable,
1698
1699         .vcpu_create = svm_create_vcpu,
1700         .vcpu_free = svm_free_vcpu,
1701
1702         .vcpu_load = svm_vcpu_load,
1703         .vcpu_put = svm_vcpu_put,
1704         .vcpu_decache = svm_vcpu_decache,
1705
1706         .set_guest_debug = svm_guest_debug,
1707         .get_msr = svm_get_msr,
1708         .set_msr = svm_set_msr,
1709         .get_segment_base = svm_get_segment_base,
1710         .get_segment = svm_get_segment,
1711         .set_segment = svm_set_segment,
1712         .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1713         .decache_cr0_cr4_guest_bits = svm_decache_cr0_cr4_guest_bits,
1714         .set_cr0 = svm_set_cr0,
1715         .set_cr0_no_modeswitch = svm_set_cr0,
1716         .set_cr3 = svm_set_cr3,
1717         .set_cr4 = svm_set_cr4,
1718         .set_efer = svm_set_efer,
1719         .get_idt = svm_get_idt,
1720         .set_idt = svm_set_idt,
1721         .get_gdt = svm_get_gdt,
1722         .set_gdt = svm_set_gdt,
1723         .get_dr = svm_get_dr,
1724         .set_dr = svm_set_dr,
1725         .cache_regs = svm_cache_regs,
1726         .decache_regs = svm_decache_regs,
1727         .get_rflags = svm_get_rflags,
1728         .set_rflags = svm_set_rflags,
1729
1730         .invlpg = svm_invlpg,
1731         .tlb_flush = svm_flush_tlb,
1732         .inject_page_fault = svm_inject_page_fault,
1733
1734         .inject_gp = svm_inject_gp,
1735
1736         .run = svm_vcpu_run,
1737         .skip_emulated_instruction = skip_emulated_instruction,
1738         .vcpu_setup = svm_vcpu_setup,
1739         .patch_hypercall = svm_patch_hypercall,
1740 };
1741
1742 static int __init svm_init(void)
1743 {
1744         return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
1745 }
1746
1747 static void __exit svm_exit(void)
1748 {
1749         kvm_exit_arch();
1750 }
1751
1752 module_init(svm_init)
1753 module_exit(svm_exit)