SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/kvm/svm.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * AMD SVM support
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  *
   8  * Authors:
   9  *   Yaniv Kamay  <yaniv@qumranet.com>
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *
  12  * This work is licensed under the terms of the GNU GPL, version 2.  See
  13  * the COPYING file in the top-level directory.
  14  *
  15  */
  16 #include "x86.h"
  17 #include "kvm_svm.h"
  18 #include "x86_emulate.h"
  19 #include "irq.h"
  20
  21 #include <linux/module.h>
  22 #include <linux/kernel.h>
  23 #include <linux/vmalloc.h>
  24 #include <linux/highmem.h>
  25 #include <linux/sched.h>
  26
  27 #include <asm/desc.h>
  28
  29 MODULE_AUTHOR("Qumranet");
  30 MODULE_LICENSE("GPL");
  31
  32 #define IOPM_ALLOC_ORDER 2
  33 #define MSRPM_ALLOC_ORDER 1
  34
  35 #define DB_VECTOR 1
  36 #define UD_VECTOR 6
  37 #define GP_VECTOR 13
  38
  39 #define DR7_GD_MASK (1 << 13)
  40 #define DR6_BD_MASK (1 << 13)
  41
  42 #define SEG_TYPE_LDT 2
  43 #define SEG_TYPE_BUSY_TSS16 3
  44
  45 #define KVM_EFER_LMA (1 << 10)
  46 #define KVM_EFER_LME (1 << 8)
  47
  48 #define SVM_FEATURE_NPT  (1 << 0)
  49 #define SVM_FEATURE_LBRV (1 << 1)
  50 #define SVM_DEATURE_SVML (1 << 2)
  51
  52 static void kvm_reput_irq(struct vcpu_svm *svm);
  53
  54 static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
  55 {
  56         return container_of(vcpu, struct vcpu_svm, vcpu);
  57 }
  58
  59 unsigned long iopm_base;
  60 unsigned long msrpm_base;
  61
  62 struct kvm_ldttss_desc {
  63         u16 limit0;
  64         u16 base0;
  65         unsigned base1 : 8, type : 5, dpl : 2, p : 1;
  66         unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
  67         u32 base3;
  68         u32 zero1;
  69 } __attribute__((packed));
  70
  71 struct svm_cpu_data {
  72         int cpu;
  73
  74         u64 asid_generation;
  75         u32 max_asid;
  76         u32 next_asid;
  77         struct kvm_ldttss_desc *tss_desc;
  78
  79         struct page *save_area;
  80 };
  81
  82 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
  83 static uint32_t svm_features;
  84
  85 struct svm_init_data {
  86         int cpu;
  87         int r;
  88 };
  89
  90 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
  91
  92 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
  93 #define MSRS_RANGE_SIZE 2048
  94 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
  95
  96 #define MAX_INST_SIZE 15
  97
  98 static inline u32 svm_has(u32 feat)
  99 {
 100         return svm_features & feat;
 101 }
 102
 103 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
 104 {
 105         int word_index = __ffs(vcpu->irq_summary);
 106         int bit_index = __ffs(vcpu->irq_pending[word_index]);
 107         int irq = word_index * BITS_PER_LONG + bit_index;
 108
 109         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
 110         if (!vcpu->irq_pending[word_index])
 111                 clear_bit(word_index, &vcpu->irq_summary);
 112         return irq;
 113 }
 114
 115 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
 116 {
 117         set_bit(irq, vcpu->irq_pending);
 118         set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
 119 }
 120
 121 static inline void clgi(void)
 122 {
 123         asm volatile (SVM_CLGI);
 124 }
 125
 126 static inline void stgi(void)
 127 {
 128         asm volatile (SVM_STGI);
 129 }
 130
 131 static inline void invlpga(unsigned long addr, u32 asid)
 132 {
 133         asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
 134 }
 135
 136 static inline unsigned long kvm_read_cr2(void)
 137 {
 138         unsigned long cr2;
 139
 140         asm volatile ("mov %%cr2, %0" : "=r" (cr2));
 141         return cr2;
 142 }
 143
 144 static inline void kvm_write_cr2(unsigned long val)
 145 {
 146         asm volatile ("mov %0, %%cr2" :: "r" (val));
 147 }
 148
 149 static inline unsigned long read_dr6(void)
 150 {
 151         unsigned long dr6;
 152
 153         asm volatile ("mov %%dr6, %0" : "=r" (dr6));
 154         return dr6;
 155 }
 156
 157 static inline void write_dr6(unsigned long val)
 158 {
 159         asm volatile ("mov %0, %%dr6" :: "r" (val));
 160 }
 161
 162 static inline unsigned long read_dr7(void)
 163 {
 164         unsigned long dr7;
 165
 166         asm volatile ("mov %%dr7, %0" : "=r" (dr7));
 167         return dr7;
 168 }
 169
 170 static inline void write_dr7(unsigned long val)
 171 {
 172         asm volatile ("mov %0, %%dr7" :: "r" (val));
 173 }
 174
 175 static inline void force_new_asid(struct kvm_vcpu *vcpu)
 176 {
 177         to_svm(vcpu)->asid_generation--;
 178 }
 179
 180 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
 181 {
 182         force_new_asid(vcpu);
 183 }
 184
 185 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 186 {
 187         if (!(efer & KVM_EFER_LMA))
 188                 efer &= ~KVM_EFER_LME;
 189
 190         to_svm(vcpu)->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
 191         vcpu->shadow_efer = efer;
 192 }
 193
 194 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 195 {
 196         struct vcpu_svm *svm = to_svm(vcpu);
 197
 198         svm->vmcb->control.event_inj =          SVM_EVTINJ_VALID |
 199                                                 SVM_EVTINJ_VALID_ERR |
 200                                                 SVM_EVTINJ_TYPE_EXEPT |
 201                                                 GP_VECTOR;
 202         svm->vmcb->control.event_inj_err = error_code;
 203 }
 204
 205 static void inject_ud(struct kvm_vcpu *vcpu)
 206 {
 207         to_svm(vcpu)->vmcb->control.event_inj = SVM_EVTINJ_VALID |
 208                                                 SVM_EVTINJ_TYPE_EXEPT |
 209                                                 UD_VECTOR;
 210 }
 211
 212 static int is_page_fault(uint32_t info)
 213 {
 214         info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 215         return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
 216 }
 217
 218 static int is_external_interrupt(u32 info)
 219 {
 220         info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 221         return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
 222 }
 223
 224 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 225 {
 226         struct vcpu_svm *svm = to_svm(vcpu);
 227
 228         if (!svm->next_rip) {
 229                 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
 230                 return;
 231         }
 232         if (svm->next_rip - svm->vmcb->save.rip > MAX_INST_SIZE)
 233                 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
 234                        __FUNCTION__,
 235                        svm->vmcb->save.rip,
 236                        svm->next_rip);
 237
 238         vcpu->rip = svm->vmcb->save.rip = svm->next_rip;
 239         svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
 240
 241         vcpu->interrupt_window_open = 1;
 242 }
 243
 244 static int has_svm(void)
 245 {
 246         uint32_t eax, ebx, ecx, edx;
 247
 248         if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
 249                 printk(KERN_INFO "has_svm: not amd\n");
 250                 return 0;
 251         }
 252
 253         cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
 254         if (eax < SVM_CPUID_FUNC) {
 255                 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
 256                 return 0;
 257         }
 258
 259         cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
 260         if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
 261                 printk(KERN_DEBUG "has_svm: svm not available\n");
 262                 return 0;
 263         }
 264         return 1;
 265 }
 266
 267 static void svm_hardware_disable(void *garbage)
 268 {
 269         struct svm_cpu_data *svm_data
 270                 = per_cpu(svm_data, raw_smp_processor_id());
 271
 272         if (svm_data) {
 273                 uint64_t efer;
 274
 275                 wrmsrl(MSR_VM_HSAVE_PA, 0);
 276                 rdmsrl(MSR_EFER, efer);
 277                 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
 278                 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
 279                 __free_page(svm_data->save_area);
 280                 kfree(svm_data);
 281         }
 282 }
 283
 284 static void svm_hardware_enable(void *garbage)
 285 {
 286
 287         struct svm_cpu_data *svm_data;
 288         uint64_t efer;
 289 #ifdef CONFIG_X86_64
 290         struct desc_ptr gdt_descr;
 291 #else
 292         struct desc_ptr gdt_descr;
 293 #endif
 294         struct desc_struct *gdt;
 295         int me = raw_smp_processor_id();
 296
 297         if (!has_svm()) {
 298                 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
 299                 return;
 300         }
 301         svm_data = per_cpu(svm_data, me);
 302
 303         if (!svm_data) {
 304                 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
 305                        me);
 306                 return;
 307         }
 308
 309         svm_data->asid_generation = 1;
 310         svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
 311         svm_data->next_asid = svm_data->max_asid + 1;
 312         svm_features = cpuid_edx(SVM_CPUID_FUNC);
 313
 314         asm volatile ("sgdt %0" : "=m"(gdt_descr));
 315         gdt = (struct desc_struct *)gdt_descr.address;
 316         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
 317
 318         rdmsrl(MSR_EFER, efer);
 319         wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
 320
 321         wrmsrl(MSR_VM_HSAVE_PA,
 322                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
 323 }
 324
 325 static int svm_cpu_init(int cpu)
 326 {
 327         struct svm_cpu_data *svm_data;
 328         int r;
 329
 330         svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
 331         if (!svm_data)
 332                 return -ENOMEM;
 333         svm_data->cpu = cpu;
 334         svm_data->save_area = alloc_page(GFP_KERNEL);
 335         r = -ENOMEM;
 336         if (!svm_data->save_area)
 337                 goto err_1;
 338
 339         per_cpu(svm_data, cpu) = svm_data;
 340
 341         return 0;
 342
 343 err_1:
 344         kfree(svm_data);
 345         return r;
 346
 347 }
 348
 349 static void set_msr_interception(u32 *msrpm, unsigned msr,
 350                                  int read, int write)
 351 {
 352         int i;
 353
 354         for (i = 0; i < NUM_MSR_MAPS; i++) {
 355                 if (msr >= msrpm_ranges[i] &&
 356                     msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
 357                         u32 msr_offset = (i * MSRS_IN_RANGE + msr -
 358                                           msrpm_ranges[i]) * 2;
 359
 360                         u32 *base = msrpm + (msr_offset / 32);
 361                         u32 msr_shift = msr_offset % 32;
 362                         u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
 363                         *base = (*base & ~(0x3 << msr_shift)) |
 364                                 (mask << msr_shift);
 365                         return;
 366                 }
 367         }
 368         BUG();
 369 }
 370
 371 static __init int svm_hardware_setup(void)
 372 {
 373         int cpu;
 374         struct page *iopm_pages;
 375         struct page *msrpm_pages;
 376         void *iopm_va, *msrpm_va;
 377         int r;
 378
 379         iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
 380
 381         if (!iopm_pages)
 382                 return -ENOMEM;
 383
 384         iopm_va = page_address(iopm_pages);
 385         memset(iopm_va, 0xff, PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
 386         clear_bit(0x80, iopm_va); /* allow direct access to PC debug port */
 387         iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
 388
 389
 390         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
 391
 392         r = -ENOMEM;
 393         if (!msrpm_pages)
 394                 goto err_1;
 395
 396         msrpm_va = page_address(msrpm_pages);
 397         memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
 398         msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
 399
 400 #ifdef CONFIG_X86_64
 401         set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
 402         set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
 403         set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
 404         set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
 405         set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
 406         set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
 407 #endif
 408         set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
 409         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
 410         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
 411         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
 412
 413         for_each_online_cpu(cpu) {
 414                 r = svm_cpu_init(cpu);
 415                 if (r)
 416                         goto err_2;
 417         }
 418         return 0;
 419
 420 err_2:
 421         __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
 422         msrpm_base = 0;
 423 err_1:
 424         __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
 425         iopm_base = 0;
 426         return r;
 427 }
 428
 429 static __exit void svm_hardware_unsetup(void)
 430 {
 431         __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
 432         __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
 433         iopm_base = msrpm_base = 0;
 434 }
 435
 436 static void init_seg(struct vmcb_seg *seg)
 437 {
 438         seg->selector = 0;
 439         seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
 440                 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
 441         seg->limit = 0xffff;
 442         seg->base = 0;
 443 }
 444
 445 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
 446 {
 447         seg->selector = 0;
 448         seg->attrib = SVM_SELECTOR_P_MASK | type;
 449         seg->limit = 0xffff;
 450         seg->base = 0;
 451 }
 452
 453 static void init_vmcb(struct vmcb *vmcb)
 454 {
 455         struct vmcb_control_area *control = &vmcb->control;
 456         struct vmcb_save_area *save = &vmcb->save;
 457
 458         control->intercept_cr_read =    INTERCEPT_CR0_MASK |
 459                                         INTERCEPT_CR3_MASK |
 460                                         INTERCEPT_CR4_MASK;
 461
 462         control->intercept_cr_write =   INTERCEPT_CR0_MASK |
 463                                         INTERCEPT_CR3_MASK |
 464                                         INTERCEPT_CR4_MASK;
 465
 466         control->intercept_dr_read =    INTERCEPT_DR0_MASK |
 467                                         INTERCEPT_DR1_MASK |
 468                                         INTERCEPT_DR2_MASK |
 469                                         INTERCEPT_DR3_MASK;
 470
 471         control->intercept_dr_write =   INTERCEPT_DR0_MASK |
 472                                         INTERCEPT_DR1_MASK |
 473                                         INTERCEPT_DR2_MASK |
 474                                         INTERCEPT_DR3_MASK |
 475                                         INTERCEPT_DR5_MASK |
 476                                         INTERCEPT_DR7_MASK;
 477
 478         control->intercept_exceptions = (1 << PF_VECTOR) |
 479                                         (1 << UD_VECTOR);
 480
 481
 482         control->intercept =    (1ULL << INTERCEPT_INTR) |
 483                                 (1ULL << INTERCEPT_NMI) |
 484                                 (1ULL << INTERCEPT_SMI) |
 485                 /*
 486                  * selective cr0 intercept bug?
 487                  *      0:   0f 22 d8                mov    %eax,%cr3
 488                  *      3:   0f 20 c0                mov    %cr0,%eax
 489                  *      6:   0d 00 00 00 80          or     $0x80000000,%eax
 490                  *      b:   0f 22 c0                mov    %eax,%cr0
 491                  * set cr3 ->interception
 492                  * get cr0 ->interception
 493                  * set cr0 -> no interception
 494                  */
 495                 /*              (1ULL << INTERCEPT_SELECTIVE_CR0) | */
 496                                 (1ULL << INTERCEPT_CPUID) |
 497                                 (1ULL << INTERCEPT_INVD) |
 498                                 (1ULL << INTERCEPT_HLT) |
 499                                 (1ULL << INTERCEPT_INVLPGA) |
 500                                 (1ULL << INTERCEPT_IOIO_PROT) |
 501                                 (1ULL << INTERCEPT_MSR_PROT) |
 502                                 (1ULL << INTERCEPT_TASK_SWITCH) |
 503                                 (1ULL << INTERCEPT_SHUTDOWN) |
 504                                 (1ULL << INTERCEPT_VMRUN) |
 505                                 (1ULL << INTERCEPT_VMMCALL) |
 506                                 (1ULL << INTERCEPT_VMLOAD) |
 507                                 (1ULL << INTERCEPT_VMSAVE) |
 508                                 (1ULL << INTERCEPT_STGI) |
 509                                 (1ULL << INTERCEPT_CLGI) |
 510                                 (1ULL << INTERCEPT_SKINIT) |
 511                                 (1ULL << INTERCEPT_WBINVD) |
 512                                 (1ULL << INTERCEPT_MONITOR) |
 513                                 (1ULL << INTERCEPT_MWAIT);
 514
 515         control->iopm_base_pa = iopm_base;
 516         control->msrpm_base_pa = msrpm_base;
 517         control->tsc_offset = 0;
 518         control->int_ctl = V_INTR_MASKING_MASK;
 519
 520         init_seg(&save->es);
 521         init_seg(&save->ss);
 522         init_seg(&save->ds);
 523         init_seg(&save->fs);
 524         init_seg(&save->gs);
 525
 526         save->cs.selector = 0xf000;
 527         /* Executable/Readable Code Segment */
 528         save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
 529                 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
 530         save->cs.limit = 0xffff;
 531         /*
 532          * cs.base should really be 0xffff0000, but vmx can't handle that, so
 533          * be consistent with it.
 534          *
 535          * Replace when we have real mode working for vmx.
 536          */
 537         save->cs.base = 0xf0000;
 538
 539         save->gdtr.limit = 0xffff;
 540         save->idtr.limit = 0xffff;
 541
 542         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
 543         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 544
 545         save->efer = MSR_EFER_SVME_MASK;
 546         save->dr6 = 0xffff0ff0;
 547         save->dr7 = 0x400;
 548         save->rflags = 2;
 549         save->rip = 0x0000fff0;
 550
 551         /*
 552          * cr0 val on cpu init should be 0x60000010, we enable cpu
 553          * cache by default. the orderly way is to enable cache in bios.
 554          */
 555         save->cr0 = 0x00000010 | X86_CR0_PG | X86_CR0_WP;
 556         save->cr4 = X86_CR4_PAE;
 557         /* rdx = ?? */
 558 }
 559
 560 static int svm_vcpu_reset(struct kvm_vcpu *vcpu)
 561 {
 562         struct vcpu_svm *svm = to_svm(vcpu);
 563
 564         init_vmcb(svm->vmcb);
 565
 566         if (vcpu->vcpu_id != 0) {
 567                 svm->vmcb->save.rip = 0;
 568                 svm->vmcb->save.cs.base = svm->vcpu.sipi_vector << 12;
 569                 svm->vmcb->save.cs.selector = svm->vcpu.sipi_vector << 8;
 570         }
 571
 572         return 0;
 573 }
 574
 575 static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
 576 {
 577         struct vcpu_svm *svm;
 578         struct page *page;
 579         int err;
 580
 581         svm = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
 582         if (!svm) {
 583                 err = -ENOMEM;
 584                 goto out;
 585         }
 586
 587         err = kvm_vcpu_init(&svm->vcpu, kvm, id);
 588         if (err)
 589                 goto free_svm;
 590
 591         page = alloc_page(GFP_KERNEL);
 592         if (!page) {
 593                 err = -ENOMEM;
 594                 goto uninit;
 595         }
 596
 597         svm->vmcb = page_address(page);
 598         clear_page(svm->vmcb);
 599         svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
 600         svm->asid_generation = 0;
 601         memset(svm->db_regs, 0, sizeof(svm->db_regs));
 602         init_vmcb(svm->vmcb);
 603
 604         fx_init(&svm->vcpu);
 605         svm->vcpu.fpu_active = 1;
 606         svm->vcpu.apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
 607         if (svm->vcpu.vcpu_id == 0)
 608                 svm->vcpu.apic_base |= MSR_IA32_APICBASE_BSP;
 609
 610         return &svm->vcpu;
 611
 612 uninit:
 613         kvm_vcpu_uninit(&svm->vcpu);
 614 free_svm:
 615         kmem_cache_free(kvm_vcpu_cache, svm);
 616 out:
 617         return ERR_PTR(err);
 618 }
 619
 620 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
 621 {
 622         struct vcpu_svm *svm = to_svm(vcpu);
 623
 624         __free_page(pfn_to_page(svm->vmcb_pa >> PAGE_SHIFT));
 625         kvm_vcpu_uninit(vcpu);
 626         kmem_cache_free(kvm_vcpu_cache, svm);
 627 }
 628
 629 static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 630 {
 631         struct vcpu_svm *svm = to_svm(vcpu);
 632         int i;
 633
 634         if (unlikely(cpu != vcpu->cpu)) {
 635                 u64 tsc_this, delta;
 636
 637                 /*
 638                  * Make sure that the guest sees a monotonically
 639                  * increasing TSC.
 640                  */
 641                 rdtscll(tsc_this);
 642                 delta = vcpu->host_tsc - tsc_this;
 643                 svm->vmcb->control.tsc_offset += delta;
 644                 vcpu->cpu = cpu;
 645                 kvm_migrate_apic_timer(vcpu);
 646         }
 647
 648         for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
 649                 rdmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
 650 }
 651
 652 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
 653 {
 654         struct vcpu_svm *svm = to_svm(vcpu);
 655         int i;
 656
 657         ++vcpu->stat.host_state_reload;
 658         for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
 659                 wrmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
 660
 661         rdtscll(vcpu->host_tsc);
 662         kvm_put_guest_fpu(vcpu);
 663 }
 664
 665 static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
 666 {
 667 }
 668
 669 static void svm_cache_regs(struct kvm_vcpu *vcpu)
 670 {
 671         struct vcpu_svm *svm = to_svm(vcpu);
 672
 673         vcpu->regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
 674         vcpu->regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
 675         vcpu->rip = svm->vmcb->save.rip;
 676 }
 677
 678 static void svm_decache_regs(struct kvm_vcpu *vcpu)
 679 {
 680         struct vcpu_svm *svm = to_svm(vcpu);
 681         svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
 682         svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
 683         svm->vmcb->save.rip = vcpu->rip;
 684 }
 685
 686 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
 687 {
 688         return to_svm(vcpu)->vmcb->save.rflags;
 689 }
 690
 691 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 692 {
 693         to_svm(vcpu)->vmcb->save.rflags = rflags;
 694 }
 695
 696 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
 697 {
 698         struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
 699
 700         switch (seg) {
 701         case VCPU_SREG_CS: return &save->cs;
 702         case VCPU_SREG_DS: return &save->ds;
 703         case VCPU_SREG_ES: return &save->es;
 704         case VCPU_SREG_FS: return &save->fs;
 705         case VCPU_SREG_GS: return &save->gs;
 706         case VCPU_SREG_SS: return &save->ss;
 707         case VCPU_SREG_TR: return &save->tr;
 708         case VCPU_SREG_LDTR: return &save->ldtr;
 709         }
 710         BUG();
 711         return NULL;
 712 }
 713
 714 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 715 {
 716         struct vmcb_seg *s = svm_seg(vcpu, seg);
 717
 718         return s->base;
 719 }
 720
 721 static void svm_get_segment(struct kvm_vcpu *vcpu,
 722                             struct kvm_segment *var, int seg)
 723 {
 724         struct vmcb_seg *s = svm_seg(vcpu, seg);
 725
 726         var->base = s->base;
 727         var->limit = s->limit;
 728         var->selector = s->selector;
 729         var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
 730         var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
 731         var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
 732         var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
 733         var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
 734         var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 735         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 736         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
 737         var->unusable = !var->present;
 738 }
 739
 740 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 741 {
 742         struct vcpu_svm *svm = to_svm(vcpu);
 743
 744         dt->limit = svm->vmcb->save.idtr.limit;
 745         dt->base = svm->vmcb->save.idtr.base;
 746 }
 747
 748 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 749 {
 750         struct vcpu_svm *svm = to_svm(vcpu);
 751
 752         svm->vmcb->save.idtr.limit = dt->limit;
 753         svm->vmcb->save.idtr.base = dt->base ;
 754 }
 755
 756 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 757 {
 758         struct vcpu_svm *svm = to_svm(vcpu);
 759
 760         dt->limit = svm->vmcb->save.gdtr.limit;
 761         dt->base = svm->vmcb->save.gdtr.base;
 762 }
 763
 764 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 765 {
 766         struct vcpu_svm *svm = to_svm(vcpu);
 767
 768         svm->vmcb->save.gdtr.limit = dt->limit;
 769         svm->vmcb->save.gdtr.base = dt->base ;
 770 }
 771
 772 static void svm_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
 773 {
 774 }
 775
 776 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 777 {
 778         struct vcpu_svm *svm = to_svm(vcpu);
 779
 780 #ifdef CONFIG_X86_64
 781         if (vcpu->shadow_efer & KVM_EFER_LME) {
 782                 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 783                         vcpu->shadow_efer |= KVM_EFER_LMA;
 784                         svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
 785                 }
 786
 787                 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG)) {
 788                         vcpu->shadow_efer &= ~KVM_EFER_LMA;
 789                         svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
 790                 }
 791         }
 792 #endif
 793         if ((vcpu->cr0 & X86_CR0_TS) && !(cr0 & X86_CR0_TS)) {
 794                 svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
 795                 vcpu->fpu_active = 1;
 796         }
 797
 798         vcpu->cr0 = cr0;
 799         cr0 |= X86_CR0_PG | X86_CR0_WP;
 800         cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
 801         svm->vmcb->save.cr0 = cr0;
 802 }
 803
 804 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 805 {
 806        vcpu->cr4 = cr4;
 807        to_svm(vcpu)->vmcb->save.cr4 = cr4 | X86_CR4_PAE;
 808 }
 809
 810 static void svm_set_segment(struct kvm_vcpu *vcpu,
 811                             struct kvm_segment *var, int seg)
 812 {
 813         struct vcpu_svm *svm = to_svm(vcpu);
 814         struct vmcb_seg *s = svm_seg(vcpu, seg);
 815
 816         s->base = var->base;
 817         s->limit = var->limit;
 818         s->selector = var->selector;
 819         if (var->unusable)
 820                 s->attrib = 0;
 821         else {
 822                 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
 823                 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
 824                 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
 825                 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
 826                 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
 827                 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
 828                 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
 829                 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
 830         }
 831         if (seg == VCPU_SREG_CS)
 832                 svm->vmcb->save.cpl
 833                         = (svm->vmcb->save.cs.attrib
 834                            >> SVM_SELECTOR_DPL_SHIFT) & 3;
 835
 836 }
 837
 838 /* FIXME:
 839
 840         svm(vcpu)->vmcb->control.int_ctl &= ~V_TPR_MASK;
 841         svm(vcpu)->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
 842
 843 */
 844
 845 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 846 {
 847         return -EOPNOTSUPP;
 848 }
 849
 850 static int svm_get_irq(struct kvm_vcpu *vcpu)
 851 {
 852         struct vcpu_svm *svm = to_svm(vcpu);
 853         u32 exit_int_info = svm->vmcb->control.exit_int_info;
 854
 855         if (is_external_interrupt(exit_int_info))
 856                 return exit_int_info & SVM_EVTINJ_VEC_MASK;
 857         return -1;
 858 }
 859
 860 static void load_host_msrs(struct kvm_vcpu *vcpu)
 861 {
 862 #ifdef CONFIG_X86_64
 863         wrmsrl(MSR_GS_BASE, to_svm(vcpu)->host_gs_base);
 864 #endif
 865 }
 866
 867 static void save_host_msrs(struct kvm_vcpu *vcpu)
 868 {
 869 #ifdef CONFIG_X86_64
 870         rdmsrl(MSR_GS_BASE, to_svm(vcpu)->host_gs_base);
 871 #endif
 872 }
 873
 874 static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *svm_data)
 875 {
 876         if (svm_data->next_asid > svm_data->max_asid) {
 877                 ++svm_data->asid_generation;
 878                 svm_data->next_asid = 1;
 879                 svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
 880         }
 881
 882         svm->vcpu.cpu = svm_data->cpu;
 883         svm->asid_generation = svm_data->asid_generation;
 884         svm->vmcb->control.asid = svm_data->next_asid++;
 885 }
 886
 887 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
 888 {
 889         return to_svm(vcpu)->db_regs[dr];
 890 }
 891
 892 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 893                        int *exception)
 894 {
 895         struct vcpu_svm *svm = to_svm(vcpu);
 896
 897         *exception = 0;
 898
 899         if (svm->vmcb->save.dr7 & DR7_GD_MASK) {
 900                 svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
 901                 svm->vmcb->save.dr6 |= DR6_BD_MASK;
 902                 *exception = DB_VECTOR;
 903                 return;
 904         }
 905
 906         switch (dr) {
 907         case 0 ... 3:
 908                 svm->db_regs[dr] = value;
 909                 return;
 910         case 4 ... 5:
 911                 if (vcpu->cr4 & X86_CR4_DE) {
 912                         *exception = UD_VECTOR;
 913                         return;
 914                 }
 915         case 7: {
 916                 if (value & ~((1ULL << 32) - 1)) {
 917                         *exception = GP_VECTOR;
 918                         return;
 919                 }
 920                 svm->vmcb->save.dr7 = value;
 921                 return;
 922         }
 923         default:
 924                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
 925                        __FUNCTION__, dr);
 926                 *exception = UD_VECTOR;
 927                 return;
 928         }
 929 }
 930
 931 static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 932 {
 933         u32 exit_int_info = svm->vmcb->control.exit_int_info;
 934         struct kvm *kvm = svm->vcpu.kvm;
 935         u64 fault_address;
 936         u32 error_code;
 937
 938         if (!irqchip_in_kernel(kvm) &&
 939                 is_external_interrupt(exit_int_info))
 940                 push_irq(&svm->vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
 941
 942         fault_address  = svm->vmcb->control.exit_info_2;
 943         error_code = svm->vmcb->control.exit_info_1;
 944         return kvm_mmu_page_fault(&svm->vcpu, fault_address, error_code);
 945 }
 946
 947 static int ud_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 948 {
 949         int er;
 950
 951         er = emulate_instruction(&svm->vcpu, kvm_run, 0, 0, 0);
 952         if (er != EMULATE_DONE)
 953                 inject_ud(&svm->vcpu);
 954
 955         return 1;
 956 }
 957
 958 static int nm_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 959 {
 960         svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
 961         if (!(svm->vcpu.cr0 & X86_CR0_TS))
 962                 svm->vmcb->save.cr0 &= ~X86_CR0_TS;
 963         svm->vcpu.fpu_active = 1;
 964
 965         return 1;
 966 }
 967
 968 static int shutdown_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 969 {
 970         /*
 971          * VMCB is undefined after a SHUTDOWN intercept
 972          * so reinitialize it.
 973          */
 974         clear_page(svm->vmcb);
 975         init_vmcb(svm->vmcb);
 976
 977         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
 978         return 0;
 979 }
 980
 981 static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 982 {
 983         u32 io_info = svm->vmcb->control.exit_info_1; /* address size bug? */
 984         int size, down, in, string, rep;
 985         unsigned port;
 986
 987         ++svm->vcpu.stat.io_exits;
 988
 989         svm->next_rip = svm->vmcb->control.exit_info_2;
 990
 991         string = (io_info & SVM_IOIO_STR_MASK) != 0;
 992
 993         if (string) {
 994                 if (emulate_instruction(&svm->vcpu,
 995                                         kvm_run, 0, 0, 0) == EMULATE_DO_MMIO)
 996                         return 0;
 997                 return 1;
 998         }
 999
1000         in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
1001         port = io_info >> 16;
1002         size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
1003         rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1004         down = (svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
1005
1006         return kvm_emulate_pio(&svm->vcpu, kvm_run, in, size, port);
1007 }
1008
1009 static int nop_on_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1010 {
1011         return 1;
1012 }
1013
1014 static int halt_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1015 {
1016         svm->next_rip = svm->vmcb->save.rip + 1;
1017         skip_emulated_instruction(&svm->vcpu);
1018         return kvm_emulate_halt(&svm->vcpu);
1019 }
1020
1021 static int vmmcall_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1022 {
1023         svm->next_rip = svm->vmcb->save.rip + 3;
1024         skip_emulated_instruction(&svm->vcpu);
1025         kvm_emulate_hypercall(&svm->vcpu);
1026         return 1;
1027 }
1028
1029 static int invalid_op_interception(struct vcpu_svm *svm,
1030                                    struct kvm_run *kvm_run)
1031 {
1032         inject_ud(&svm->vcpu);
1033         return 1;
1034 }
1035
1036 static int task_switch_interception(struct vcpu_svm *svm,
1037                                     struct kvm_run *kvm_run)
1038 {
1039         pr_unimpl(&svm->vcpu, "%s: task switch is unsupported\n", __FUNCTION__);
1040         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1041         return 0;
1042 }
1043
1044 static int cpuid_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1045 {
1046         svm->next_rip = svm->vmcb->save.rip + 2;
1047         kvm_emulate_cpuid(&svm->vcpu);
1048         return 1;
1049 }
1050
1051 static int emulate_on_interception(struct vcpu_svm *svm,
1052                                    struct kvm_run *kvm_run)
1053 {
1054         if (emulate_instruction(&svm->vcpu, NULL, 0, 0, 0) != EMULATE_DONE)
1055                 pr_unimpl(&svm->vcpu, "%s: failed\n", __FUNCTION__);
1056         return 1;
1057 }
1058
1059 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1060 {
1061         struct vcpu_svm *svm = to_svm(vcpu);
1062
1063         switch (ecx) {
1064         case MSR_IA32_TIME_STAMP_COUNTER: {
1065                 u64 tsc;
1066
1067                 rdtscll(tsc);
1068                 *data = svm->vmcb->control.tsc_offset + tsc;
1069                 break;
1070         }
1071         case MSR_K6_STAR:
1072                 *data = svm->vmcb->save.star;
1073                 break;
1074 #ifdef CONFIG_X86_64
1075         case MSR_LSTAR:
1076                 *data = svm->vmcb->save.lstar;
1077                 break;
1078         case MSR_CSTAR:
1079                 *data = svm->vmcb->save.cstar;
1080                 break;
1081         case MSR_KERNEL_GS_BASE:
1082                 *data = svm->vmcb->save.kernel_gs_base;
1083                 break;
1084         case MSR_SYSCALL_MASK:
1085                 *data = svm->vmcb->save.sfmask;
1086                 break;
1087 #endif
1088         case MSR_IA32_SYSENTER_CS:
1089                 *data = svm->vmcb->save.sysenter_cs;
1090                 break;
1091         case MSR_IA32_SYSENTER_EIP:
1092                 *data = svm->vmcb->save.sysenter_eip;
1093                 break;
1094         case MSR_IA32_SYSENTER_ESP:
1095                 *data = svm->vmcb->save.sysenter_esp;
1096                 break;
1097         default:
1098                 return kvm_get_msr_common(vcpu, ecx, data);
1099         }
1100         return 0;
1101 }
1102
1103 static int rdmsr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1104 {
1105         u32 ecx = svm->vcpu.regs[VCPU_REGS_RCX];
1106         u64 data;
1107
1108         if (svm_get_msr(&svm->vcpu, ecx, &data))
1109                 svm_inject_gp(&svm->vcpu, 0);
1110         else {
1111                 svm->vmcb->save.rax = data & 0xffffffff;
1112                 svm->vcpu.regs[VCPU_REGS_RDX] = data >> 32;
1113                 svm->next_rip = svm->vmcb->save.rip + 2;
1114                 skip_emulated_instruction(&svm->vcpu);
1115         }
1116         return 1;
1117 }
1118
1119 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1120 {
1121         struct vcpu_svm *svm = to_svm(vcpu);
1122
1123         switch (ecx) {
1124         case MSR_IA32_TIME_STAMP_COUNTER: {
1125                 u64 tsc;
1126
1127                 rdtscll(tsc);
1128                 svm->vmcb->control.tsc_offset = data - tsc;
1129                 break;
1130         }
1131         case MSR_K6_STAR:
1132                 svm->vmcb->save.star = data;
1133                 break;
1134 #ifdef CONFIG_X86_64
1135         case MSR_LSTAR:
1136                 svm->vmcb->save.lstar = data;
1137                 break;
1138         case MSR_CSTAR:
1139                 svm->vmcb->save.cstar = data;
1140                 break;
1141         case MSR_KERNEL_GS_BASE:
1142                 svm->vmcb->save.kernel_gs_base = data;
1143                 break;
1144         case MSR_SYSCALL_MASK:
1145                 svm->vmcb->save.sfmask = data;
1146                 break;
1147 #endif
1148         case MSR_IA32_SYSENTER_CS:
1149                 svm->vmcb->save.sysenter_cs = data;
1150                 break;
1151         case MSR_IA32_SYSENTER_EIP:
1152                 svm->vmcb->save.sysenter_eip = data;
1153                 break;
1154         case MSR_IA32_SYSENTER_ESP:
1155                 svm->vmcb->save.sysenter_esp = data;
1156                 break;
1157         default:
1158                 return kvm_set_msr_common(vcpu, ecx, data);
1159         }
1160         return 0;
1161 }
1162
1163 static int wrmsr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1164 {
1165         u32 ecx = svm->vcpu.regs[VCPU_REGS_RCX];
1166         u64 data = (svm->vmcb->save.rax & -1u)
1167                 | ((u64)(svm->vcpu.regs[VCPU_REGS_RDX] & -1u) << 32);
1168         svm->next_rip = svm->vmcb->save.rip + 2;
1169         if (svm_set_msr(&svm->vcpu, ecx, data))
1170                 svm_inject_gp(&svm->vcpu, 0);
1171         else
1172                 skip_emulated_instruction(&svm->vcpu);
1173         return 1;
1174 }
1175
1176 static int msr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
1177 {
1178         if (svm->vmcb->control.exit_info_1)
1179                 return wrmsr_interception(svm, kvm_run);
1180         else
1181                 return rdmsr_interception(svm, kvm_run);
1182 }
1183
1184 static int interrupt_window_interception(struct vcpu_svm *svm,
1185                                    struct kvm_run *kvm_run)
1186 {
1187         svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_VINTR);
1188         svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
1189         /*
1190          * If the user space waits to inject interrupts, exit as soon as
1191          * possible
1192          */
1193         if (kvm_run->request_interrupt_window &&
1194             !svm->vcpu.irq_summary) {
1195                 ++svm->vcpu.stat.irq_window_exits;
1196                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1197                 return 0;
1198         }
1199
1200         return 1;
1201 }
1202
1203 static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
1204                                       struct kvm_run *kvm_run) = {
1205         [SVM_EXIT_READ_CR0]                     = emulate_on_interception,
1206         [SVM_EXIT_READ_CR3]                     = emulate_on_interception,
1207         [SVM_EXIT_READ_CR4]                     = emulate_on_interception,
1208         /* for now: */
1209         [SVM_EXIT_WRITE_CR0]                    = emulate_on_interception,
1210         [SVM_EXIT_WRITE_CR3]                    = emulate_on_interception,
1211         [SVM_EXIT_WRITE_CR4]                    = emulate_on_interception,
1212         [SVM_EXIT_READ_DR0]                     = emulate_on_interception,
1213         [SVM_EXIT_READ_DR1]                     = emulate_on_interception,
1214         [SVM_EXIT_READ_DR2]                     = emulate_on_interception,
1215         [SVM_EXIT_READ_DR3]                     = emulate_on_interception,
1216         [SVM_EXIT_WRITE_DR0]                    = emulate_on_interception,
1217         [SVM_EXIT_WRITE_DR1]                    = emulate_on_interception,
1218         [SVM_EXIT_WRITE_DR2]                    = emulate_on_interception,
1219         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
1220         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
1221         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
1222         [SVM_EXIT_EXCP_BASE + UD_VECTOR]        = ud_interception,
1223         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
1224         [SVM_EXIT_EXCP_BASE + NM_VECTOR]        = nm_interception,
1225         [SVM_EXIT_INTR]                         = nop_on_interception,
1226         [SVM_EXIT_NMI]                          = nop_on_interception,
1227         [SVM_EXIT_SMI]                          = nop_on_interception,
1228         [SVM_EXIT_INIT]                         = nop_on_interception,
1229         [SVM_EXIT_VINTR]                        = interrupt_window_interception,
1230         /* [SVM_EXIT_CR0_SEL_WRITE]             = emulate_on_interception, */
1231         [SVM_EXIT_CPUID]                        = cpuid_interception,
1232         [SVM_EXIT_INVD]                         = emulate_on_interception,
1233         [SVM_EXIT_HLT]                          = halt_interception,
1234         [SVM_EXIT_INVLPG]                       = emulate_on_interception,
1235         [SVM_EXIT_INVLPGA]                      = invalid_op_interception,
1236         [SVM_EXIT_IOIO]                         = io_interception,
1237         [SVM_EXIT_MSR]                          = msr_interception,
1238         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
1239         [SVM_EXIT_SHUTDOWN]                     = shutdown_interception,
1240         [SVM_EXIT_VMRUN]                        = invalid_op_interception,
1241         [SVM_EXIT_VMMCALL]                      = vmmcall_interception,
1242         [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
1243         [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
1244         [SVM_EXIT_STGI]                         = invalid_op_interception,
1245         [SVM_EXIT_CLGI]                         = invalid_op_interception,
1246         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
1247         [SVM_EXIT_WBINVD]                       = emulate_on_interception,
1248         [SVM_EXIT_MONITOR]                      = invalid_op_interception,
1249         [SVM_EXIT_MWAIT]                        = invalid_op_interception,
1250 };
1251
1252
1253 static int handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1254 {
1255         struct vcpu_svm *svm = to_svm(vcpu);
1256         u32 exit_code = svm->vmcb->control.exit_code;
1257
1258         kvm_reput_irq(svm);
1259
1260         if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1261                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1262                 kvm_run->fail_entry.hardware_entry_failure_reason
1263                         = svm->vmcb->control.exit_code;
1264                 return 0;
1265         }
1266
1267         if (is_external_interrupt(svm->vmcb->control.exit_int_info) &&
1268             exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1269                 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1270                        "exit_code 0x%x\n",
1271                        __FUNCTION__, svm->vmcb->control.exit_int_info,
1272                        exit_code);
1273
1274         if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
1275             || !svm_exit_handlers[exit_code]) {
1276                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1277                 kvm_run->hw.hardware_exit_reason = exit_code;
1278                 return 0;
1279         }
1280
1281         return svm_exit_handlers[exit_code](svm, kvm_run);
1282 }
1283
1284 static void reload_tss(struct kvm_vcpu *vcpu)
1285 {
1286         int cpu = raw_smp_processor_id();
1287
1288         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1289         svm_data->tss_desc->type = 9; /* available 32/64-bit TSS */
1290         load_TR_desc();
1291 }
1292
1293 static void pre_svm_run(struct vcpu_svm *svm)
1294 {
1295         int cpu = raw_smp_processor_id();
1296
1297         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1298
1299         svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1300         if (svm->vcpu.cpu != cpu ||
1301             svm->asid_generation != svm_data->asid_generation)
1302                 new_asid(svm, svm_data);
1303 }
1304
1305
1306 static inline void svm_inject_irq(struct vcpu_svm *svm, int irq)
1307 {
1308         struct vmcb_control_area *control;
1309
1310         control = &svm->vmcb->control;
1311         control->int_vector = irq;
1312         control->int_ctl &= ~V_INTR_PRIO_MASK;
1313         control->int_ctl |= V_IRQ_MASK |
1314                 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1315 }
1316
1317 static void svm_set_irq(struct kvm_vcpu *vcpu, int irq)
1318 {
1319         struct vcpu_svm *svm = to_svm(vcpu);
1320
1321         svm_inject_irq(svm, irq);
1322 }
1323
1324 static void svm_intr_assist(struct kvm_vcpu *vcpu)
1325 {
1326         struct vcpu_svm *svm = to_svm(vcpu);
1327         struct vmcb *vmcb = svm->vmcb;
1328         int intr_vector = -1;
1329
1330         if ((vmcb->control.exit_int_info & SVM_EVTINJ_VALID) &&
1331             ((vmcb->control.exit_int_info & SVM_EVTINJ_TYPE_MASK) == 0)) {
1332                 intr_vector = vmcb->control.exit_int_info &
1333                               SVM_EVTINJ_VEC_MASK;
1334                 vmcb->control.exit_int_info = 0;
1335                 svm_inject_irq(svm, intr_vector);
1336                 return;
1337         }
1338
1339         if (vmcb->control.int_ctl & V_IRQ_MASK)
1340                 return;
1341
1342         if (!kvm_cpu_has_interrupt(vcpu))
1343                 return;
1344
1345         if (!(vmcb->save.rflags & X86_EFLAGS_IF) ||
1346             (vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) ||
1347             (vmcb->control.event_inj & SVM_EVTINJ_VALID)) {
1348                 /* unable to deliver irq, set pending irq */
1349                 vmcb->control.intercept |= (1ULL << INTERCEPT_VINTR);
1350                 svm_inject_irq(svm, 0x0);
1351                 return;
1352         }
1353         /* Okay, we can deliver the interrupt: grab it and update PIC state. */
1354         intr_vector = kvm_cpu_get_interrupt(vcpu);
1355         svm_inject_irq(svm, intr_vector);
1356         kvm_timer_intr_post(vcpu, intr_vector);
1357 }
1358
1359 static void kvm_reput_irq(struct vcpu_svm *svm)
1360 {
1361         struct vmcb_control_area *control = &svm->vmcb->control;
1362
1363         if ((control->int_ctl & V_IRQ_MASK)
1364             && !irqchip_in_kernel(svm->vcpu.kvm)) {
1365                 control->int_ctl &= ~V_IRQ_MASK;
1366                 push_irq(&svm->vcpu, control->int_vector);
1367         }
1368
1369         svm->vcpu.interrupt_window_open =
1370                 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1371 }
1372
1373 static void svm_do_inject_vector(struct vcpu_svm *svm)
1374 {
1375         struct kvm_vcpu *vcpu = &svm->vcpu;
1376         int word_index = __ffs(vcpu->irq_summary);
1377         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1378         int irq = word_index * BITS_PER_LONG + bit_index;
1379
1380         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1381         if (!vcpu->irq_pending[word_index])
1382                 clear_bit(word_index, &vcpu->irq_summary);
1383         svm_inject_irq(svm, irq);
1384 }
1385
1386 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1387                                        struct kvm_run *kvm_run)
1388 {
1389         struct vcpu_svm *svm = to_svm(vcpu);
1390         struct vmcb_control_area *control = &svm->vmcb->control;
1391
1392         svm->vcpu.interrupt_window_open =
1393                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1394                  (svm->vmcb->save.rflags & X86_EFLAGS_IF));
1395
1396         if (svm->vcpu.interrupt_window_open && svm->vcpu.irq_summary)
1397                 /*
1398                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1399                  */
1400                 svm_do_inject_vector(svm);
1401
1402         /*
1403          * Interrupts blocked.  Wait for unblock.
1404          */
1405         if (!svm->vcpu.interrupt_window_open &&
1406             (svm->vcpu.irq_summary || kvm_run->request_interrupt_window))
1407                 control->intercept |= 1ULL << INTERCEPT_VINTR;
1408          else
1409                 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1410 }
1411
1412 static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
1413 {
1414         return 0;
1415 }
1416
1417 static void save_db_regs(unsigned long *db_regs)
1418 {
1419         asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1420         asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1421         asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1422         asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1423 }
1424
1425 static void load_db_regs(unsigned long *db_regs)
1426 {
1427         asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1428         asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1429         asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1430         asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1431 }
1432
1433 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1434 {
1435         force_new_asid(vcpu);
1436 }
1437
1438 static void svm_prepare_guest_switch(struct kvm_vcpu *vcpu)
1439 {
1440 }
1441
1442 static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1443 {
1444         struct vcpu_svm *svm = to_svm(vcpu);
1445         u16 fs_selector;
1446         u16 gs_selector;
1447         u16 ldt_selector;
1448
1449         pre_svm_run(svm);
1450
1451         save_host_msrs(vcpu);
1452         fs_selector = read_fs();
1453         gs_selector = read_gs();
1454         ldt_selector = read_ldt();
1455         svm->host_cr2 = kvm_read_cr2();
1456         svm->host_dr6 = read_dr6();
1457         svm->host_dr7 = read_dr7();
1458         svm->vmcb->save.cr2 = vcpu->cr2;
1459
1460         if (svm->vmcb->save.dr7 & 0xff) {
1461                 write_dr7(0);
1462                 save_db_regs(svm->host_db_regs);
1463                 load_db_regs(svm->db_regs);
1464         }
1465
1466         clgi();
1467
1468         local_irq_enable();
1469
1470         asm volatile (
1471 #ifdef CONFIG_X86_64
1472                 "push %%rbp; \n\t"
1473 #else
1474                 "push %%ebp; \n\t"
1475 #endif
1476
1477 #ifdef CONFIG_X86_64
1478                 "mov %c[rbx](%[svm]), %%rbx \n\t"
1479                 "mov %c[rcx](%[svm]), %%rcx \n\t"
1480                 "mov %c[rdx](%[svm]), %%rdx \n\t"
1481                 "mov %c[rsi](%[svm]), %%rsi \n\t"
1482                 "mov %c[rdi](%[svm]), %%rdi \n\t"
1483                 "mov %c[rbp](%[svm]), %%rbp \n\t"
1484                 "mov %c[r8](%[svm]),  %%r8  \n\t"
1485                 "mov %c[r9](%[svm]),  %%r9  \n\t"
1486                 "mov %c[r10](%[svm]), %%r10 \n\t"
1487                 "mov %c[r11](%[svm]), %%r11 \n\t"
1488                 "mov %c[r12](%[svm]), %%r12 \n\t"
1489                 "mov %c[r13](%[svm]), %%r13 \n\t"
1490                 "mov %c[r14](%[svm]), %%r14 \n\t"
1491                 "mov %c[r15](%[svm]), %%r15 \n\t"
1492 #else
1493                 "mov %c[rbx](%[svm]), %%ebx \n\t"
1494                 "mov %c[rcx](%[svm]), %%ecx \n\t"
1495                 "mov %c[rdx](%[svm]), %%edx \n\t"
1496                 "mov %c[rsi](%[svm]), %%esi \n\t"
1497                 "mov %c[rdi](%[svm]), %%edi \n\t"
1498                 "mov %c[rbp](%[svm]), %%ebp \n\t"
1499 #endif
1500
1501 #ifdef CONFIG_X86_64
1502                 /* Enter guest mode */
1503                 "push %%rax \n\t"
1504                 "mov %c[vmcb](%[svm]), %%rax \n\t"
1505                 SVM_VMLOAD "\n\t"
1506                 SVM_VMRUN "\n\t"
1507                 SVM_VMSAVE "\n\t"
1508                 "pop %%rax \n\t"
1509 #else
1510                 /* Enter guest mode */
1511                 "push %%eax \n\t"
1512                 "mov %c[vmcb](%[svm]), %%eax \n\t"
1513                 SVM_VMLOAD "\n\t"
1514                 SVM_VMRUN "\n\t"
1515                 SVM_VMSAVE "\n\t"
1516                 "pop %%eax \n\t"
1517 #endif
1518
1519                 /* Save guest registers, load host registers */
1520 #ifdef CONFIG_X86_64
1521                 "mov %%rbx, %c[rbx](%[svm]) \n\t"
1522                 "mov %%rcx, %c[rcx](%[svm]) \n\t"
1523                 "mov %%rdx, %c[rdx](%[svm]) \n\t"
1524                 "mov %%rsi, %c[rsi](%[svm]) \n\t"
1525                 "mov %%rdi, %c[rdi](%[svm]) \n\t"
1526                 "mov %%rbp, %c[rbp](%[svm]) \n\t"
1527                 "mov %%r8,  %c[r8](%[svm]) \n\t"
1528                 "mov %%r9,  %c[r9](%[svm]) \n\t"
1529                 "mov %%r10, %c[r10](%[svm]) \n\t"
1530                 "mov %%r11, %c[r11](%[svm]) \n\t"
1531                 "mov %%r12, %c[r12](%[svm]) \n\t"
1532                 "mov %%r13, %c[r13](%[svm]) \n\t"
1533                 "mov %%r14, %c[r14](%[svm]) \n\t"
1534                 "mov %%r15, %c[r15](%[svm]) \n\t"
1535
1536                 "pop  %%rbp; \n\t"
1537 #else
1538                 "mov %%ebx, %c[rbx](%[svm]) \n\t"
1539                 "mov %%ecx, %c[rcx](%[svm]) \n\t"
1540                 "mov %%edx, %c[rdx](%[svm]) \n\t"
1541                 "mov %%esi, %c[rsi](%[svm]) \n\t"
1542                 "mov %%edi, %c[rdi](%[svm]) \n\t"
1543                 "mov %%ebp, %c[rbp](%[svm]) \n\t"
1544
1545                 "pop  %%ebp; \n\t"
1546 #endif
1547                 :
1548                 : [svm]"a"(svm),
1549                   [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1550                   [rbx]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RBX])),
1551                   [rcx]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RCX])),
1552                   [rdx]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RDX])),
1553                   [rsi]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RSI])),
1554                   [rdi]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RDI])),
1555                   [rbp]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_RBP]))
1556 #ifdef CONFIG_X86_64
1557                   , [r8]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R8])),
1558                   [r9]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R9])),
1559                   [r10]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R10])),
1560                   [r11]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R11])),
1561                   [r12]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R12])),
1562                   [r13]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R13])),
1563                   [r14]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R14])),
1564                   [r15]"i"(offsetof(struct vcpu_svm, vcpu.regs[VCPU_REGS_R15]))
1565 #endif
1566                 : "cc", "memory"
1567 #ifdef CONFIG_X86_64
1568                 , "rbx", "rcx", "rdx", "rsi", "rdi"
1569                 , "r8", "r9", "r10", "r11" , "r12", "r13", "r14", "r15"
1570 #else
1571                 , "ebx", "ecx", "edx" , "esi", "edi"
1572 #endif
1573                 );
1574
1575         if ((svm->vmcb->save.dr7 & 0xff))
1576                 load_db_regs(svm->host_db_regs);
1577
1578         vcpu->cr2 = svm->vmcb->save.cr2;
1579
1580         write_dr6(svm->host_dr6);
1581         write_dr7(svm->host_dr7);
1582         kvm_write_cr2(svm->host_cr2);
1583
1584         load_fs(fs_selector);
1585         load_gs(gs_selector);
1586         load_ldt(ldt_selector);
1587         load_host_msrs(vcpu);
1588
1589         reload_tss(vcpu);
1590
1591         local_irq_disable();
1592
1593         stgi();
1594
1595         svm->next_rip = 0;
1596 }
1597
1598 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1599 {
1600         struct vcpu_svm *svm = to_svm(vcpu);
1601
1602         svm->vmcb->save.cr3 = root;
1603         force_new_asid(vcpu);
1604
1605         if (vcpu->fpu_active) {
1606                 svm->vmcb->control.intercept_exceptions |= (1 << NM_VECTOR);
1607                 svm->vmcb->save.cr0 |= X86_CR0_TS;
1608                 vcpu->fpu_active = 0;
1609         }
1610 }
1611
1612 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1613                                   unsigned long  addr,
1614                                   uint32_t err_code)
1615 {
1616         struct vcpu_svm *svm = to_svm(vcpu);
1617         uint32_t exit_int_info = svm->vmcb->control.exit_int_info;
1618
1619         ++vcpu->stat.pf_guest;
1620
1621         if (is_page_fault(exit_int_info)) {
1622
1623                 svm->vmcb->control.event_inj_err = 0;
1624                 svm->vmcb->control.event_inj =  SVM_EVTINJ_VALID |
1625                                                 SVM_EVTINJ_VALID_ERR |
1626                                                 SVM_EVTINJ_TYPE_EXEPT |
1627                                                 DF_VECTOR;
1628                 return;
1629         }
1630         vcpu->cr2 = addr;
1631         svm->vmcb->save.cr2 = addr;
1632         svm->vmcb->control.event_inj =  SVM_EVTINJ_VALID |
1633                                         SVM_EVTINJ_VALID_ERR |
1634                                         SVM_EVTINJ_TYPE_EXEPT |
1635                                         PF_VECTOR;
1636         svm->vmcb->control.event_inj_err = err_code;
1637 }
1638
1639
1640 static int is_disabled(void)
1641 {
1642         u64 vm_cr;
1643
1644         rdmsrl(MSR_VM_CR, vm_cr);
1645         if (vm_cr & (1 << SVM_VM_CR_SVM_DISABLE))
1646                 return 1;
1647
1648         return 0;
1649 }
1650
1651 static void
1652 svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1653 {
1654         /*
1655          * Patch in the VMMCALL instruction:
1656          */
1657         hypercall[0] = 0x0f;
1658         hypercall[1] = 0x01;
1659         hypercall[2] = 0xd9;
1660 }
1661
1662 static void svm_check_processor_compat(void *rtn)
1663 {
1664         *(int *)rtn = 0;
1665 }
1666
1667 static struct kvm_x86_ops svm_x86_ops = {
1668         .cpu_has_kvm_support = has_svm,
1669         .disabled_by_bios = is_disabled,
1670         .hardware_setup = svm_hardware_setup,
1671         .hardware_unsetup = svm_hardware_unsetup,
1672         .check_processor_compatibility = svm_check_processor_compat,
1673         .hardware_enable = svm_hardware_enable,
1674         .hardware_disable = svm_hardware_disable,
1675
1676         .vcpu_create = svm_create_vcpu,
1677         .vcpu_free = svm_free_vcpu,
1678         .vcpu_reset = svm_vcpu_reset,
1679
1680         .prepare_guest_switch = svm_prepare_guest_switch,
1681         .vcpu_load = svm_vcpu_load,
1682         .vcpu_put = svm_vcpu_put,
1683         .vcpu_decache = svm_vcpu_decache,
1684
1685         .set_guest_debug = svm_guest_debug,
1686         .get_msr = svm_get_msr,
1687         .set_msr = svm_set_msr,
1688         .get_segment_base = svm_get_segment_base,
1689         .get_segment = svm_get_segment,
1690         .set_segment = svm_set_segment,
1691         .get_cs_db_l_bits = kvm_get_cs_db_l_bits,
1692         .decache_cr4_guest_bits = svm_decache_cr4_guest_bits,
1693         .set_cr0 = svm_set_cr0,
1694         .set_cr3 = svm_set_cr3,
1695         .set_cr4 = svm_set_cr4,
1696         .set_efer = svm_set_efer,
1697         .get_idt = svm_get_idt,
1698         .set_idt = svm_set_idt,
1699         .get_gdt = svm_get_gdt,
1700         .set_gdt = svm_set_gdt,
1701         .get_dr = svm_get_dr,
1702         .set_dr = svm_set_dr,
1703         .cache_regs = svm_cache_regs,
1704         .decache_regs = svm_decache_regs,
1705         .get_rflags = svm_get_rflags,
1706         .set_rflags = svm_set_rflags,
1707
1708         .tlb_flush = svm_flush_tlb,
1709         .inject_page_fault = svm_inject_page_fault,
1710
1711         .inject_gp = svm_inject_gp,
1712
1713         .run = svm_vcpu_run,
1714         .handle_exit = handle_exit,
1715         .skip_emulated_instruction = skip_emulated_instruction,
1716         .patch_hypercall = svm_patch_hypercall,
1717         .get_irq = svm_get_irq,
1718         .set_irq = svm_set_irq,
1719         .inject_pending_irq = svm_intr_assist,
1720         .inject_pending_vectors = do_interrupt_requests,
1721
1722         .set_tss_addr = svm_set_tss_addr,
1723 };
1724
1725 static int __init svm_init(void)
1726 {
1727         return kvm_init(&svm_x86_ops, sizeof(struct vcpu_svm),
1728                               THIS_MODULE);
1729 }
1730
1731 static void __exit svm_exit(void)
1732 {
1733         kvm_exit();
1734 }
1735
1736 module_init(svm_init)
1737 module_exit(svm_exit)