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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  *
  11  * Authors:
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *
  15  * This work is licensed under the terms of the GNU GPL, version 2.  See
  16  * the COPYING file in the top-level directory.
  17  *
  18  */
  19
  20 /*
  21  * We need the mmu code to access both 32-bit and 64-bit guest ptes,
  22  * so the code in this file is compiled twice, once per pte size.
  23  */
  24
  25 #if PTTYPE == 64
  26         #define pt_element_t u64
  27         #define guest_walker guest_walker64
  28         #define FNAME(name) paging##64_##name
  29         #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
  30         #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
  31         #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
  32         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  33         #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
  34         #define PT_LEVEL_BITS PT64_LEVEL_BITS
  35         #ifdef CONFIG_X86_64
  36         #define PT_MAX_FULL_LEVELS 4
  37         #else
  38         #define PT_MAX_FULL_LEVELS 2
  39         #endif
  40 #elif PTTYPE == 32
  41         #define pt_element_t u32
  42         #define guest_walker guest_walker32
  43         #define FNAME(name) paging##32_##name
  44         #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
  45         #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
  46         #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
  47         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  48         #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
  49         #define PT_LEVEL_BITS PT32_LEVEL_BITS
  50         #define PT_MAX_FULL_LEVELS 2
  51 #else
  52         #error Invalid PTTYPE value
  53 #endif
  54
  55 /*
  56  * The guest_walker structure emulates the behavior of the hardware page
  57  * table walker.
  58  */
  59 struct guest_walker {
  60         int level;
  61         gfn_t table_gfn[PT_MAX_FULL_LEVELS];
  62         pt_element_t *table;
  63         pt_element_t pte;
  64         pt_element_t *ptep;
  65         struct page *page;
  66         int index;
  67         pt_element_t inherited_ar;
  68         gfn_t gfn;
  69         u32 error_code;
  70 };
  71
  72 /*
  73  * Fetch a guest pte for a guest virtual address
  74  */
  75 static int FNAME(walk_addr)(struct guest_walker *walker,
  76                             struct kvm_vcpu *vcpu, gva_t addr,
  77                             int write_fault, int user_fault, int fetch_fault)
  78 {
  79         hpa_t hpa;
  80         struct kvm_memory_slot *slot;
  81         pt_element_t *ptep;
  82         pt_element_t root;
  83         gfn_t table_gfn;
  84
  85         pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
  86         walker->level = vcpu->mmu.root_level;
  87         walker->table = NULL;
  88         walker->page = NULL;
  89         walker->ptep = NULL;
  90         root = vcpu->cr3;
  91 #if PTTYPE == 64
  92         if (!is_long_mode(vcpu)) {
  93                 walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
  94                 root = *walker->ptep;
  95                 walker->pte = root;
  96                 if (!(root & PT_PRESENT_MASK))
  97                         goto not_present;
  98                 --walker->level;
  99         }
 100 #endif
 101         table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
 102         walker->table_gfn[walker->level - 1] = table_gfn;
 103         pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
 104                  walker->level - 1, table_gfn);
 105         slot = gfn_to_memslot(vcpu->kvm, table_gfn);
 106         hpa = safe_gpa_to_hpa(vcpu->kvm, root & PT64_BASE_ADDR_MASK);
 107         walker->page = pfn_to_page(hpa >> PAGE_SHIFT);
 108         walker->table = kmap_atomic(walker->page, KM_USER0);
 109
 110         ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
 111                (vcpu->cr3 & CR3_NONPAE_RESERVED_BITS) == 0);
 112
 113         walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
 114
 115         for (;;) {
 116                 int index = PT_INDEX(addr, walker->level);
 117                 hpa_t paddr;
 118
 119                 ptep = &walker->table[index];
 120                 walker->index = index;
 121                 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
 122                        ((unsigned long)ptep & PAGE_MASK));
 123
 124                 if (!is_present_pte(*ptep))
 125                         goto not_present;
 126
 127                 if (write_fault && !is_writeble_pte(*ptep))
 128                         if (user_fault || is_write_protection(vcpu))
 129                                 goto access_error;
 130
 131                 if (user_fault && !(*ptep & PT_USER_MASK))
 132                         goto access_error;
 133
 134 #if PTTYPE == 64
 135                 if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
 136                         goto access_error;
 137 #endif
 138
 139                 if (!(*ptep & PT_ACCESSED_MASK)) {
 140                         mark_page_dirty(vcpu->kvm, table_gfn);
 141                         *ptep |= PT_ACCESSED_MASK;
 142                 }
 143
 144                 if (walker->level == PT_PAGE_TABLE_LEVEL) {
 145                         walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
 146                                 >> PAGE_SHIFT;
 147                         if (write_fault && !is_dirty_pte(*ptep)) {
 148                                 mark_page_dirty(vcpu->kvm, table_gfn);
 149                                 *ptep |= PT_DIRTY_MASK;
 150                         }
 151                         break;
 152                 }
 153
 154                 if (walker->level == PT_DIRECTORY_LEVEL
 155                     && (*ptep & PT_PAGE_SIZE_MASK)
 156                     && (PTTYPE == 64 || is_pse(vcpu))) {
 157                         walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
 158                                 >> PAGE_SHIFT;
 159                         walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
 160                         if (write_fault && !is_dirty_pte(*ptep)) {
 161                                 mark_page_dirty(vcpu->kvm, table_gfn);
 162                                 *ptep |= PT_DIRTY_MASK;
 163                         }
 164                         break;
 165                 }
 166
 167                 walker->inherited_ar &= walker->table[index];
 168                 table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
 169                 kunmap_atomic(walker->table, KM_USER0);
 170                 paddr = safe_gpa_to_hpa(vcpu->kvm, table_gfn << PAGE_SHIFT);
 171                 walker->page = pfn_to_page(paddr >> PAGE_SHIFT);
 172                 walker->table = kmap_atomic(walker->page, KM_USER0);
 173                 --walker->level;
 174                 walker->table_gfn[walker->level - 1] = table_gfn;
 175                 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
 176                          walker->level - 1, table_gfn);
 177         }
 178         walker->pte = *ptep;
 179         if (walker->page)
 180                 walker->ptep = NULL;
 181         if (walker->table)
 182                 kunmap_atomic(walker->table, KM_USER0);
 183         pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
 184         return 1;
 185
 186 not_present:
 187         walker->error_code = 0;
 188         goto err;
 189
 190 access_error:
 191         walker->error_code = PFERR_PRESENT_MASK;
 192
 193 err:
 194         if (write_fault)
 195                 walker->error_code |= PFERR_WRITE_MASK;
 196         if (user_fault)
 197                 walker->error_code |= PFERR_USER_MASK;
 198         if (fetch_fault)
 199                 walker->error_code |= PFERR_FETCH_MASK;
 200         if (walker->table)
 201                 kunmap_atomic(walker->table, KM_USER0);
 202         return 0;
 203 }
 204
 205 static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
 206                                   u64 *shadow_pte,
 207                                   gpa_t gaddr,
 208                                   pt_element_t gpte,
 209                                   u64 access_bits,
 210                                   int user_fault,
 211                                   int write_fault,
 212                                   int *ptwrite,
 213                                   struct guest_walker *walker,
 214                                   gfn_t gfn)
 215 {
 216         hpa_t paddr;
 217         int dirty = gpte & PT_DIRTY_MASK;
 218         u64 spte;
 219         int was_rmapped = is_rmap_pte(*shadow_pte);
 220
 221         pgprintk("%s: spte %llx gpte %llx access %llx write_fault %d"
 222                  " user_fault %d gfn %lx\n",
 223                  __FUNCTION__, *shadow_pte, (u64)gpte, access_bits,
 224                  write_fault, user_fault, gfn);
 225
 226         /*
 227          * We don't set the accessed bit, since we sometimes want to see
 228          * whether the guest actually used the pte (in order to detect
 229          * demand paging).
 230          */
 231         spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
 232         spte |= gpte & PT64_NX_MASK;
 233         if (!dirty)
 234                 access_bits &= ~PT_WRITABLE_MASK;
 235
 236         paddr = gpa_to_hpa(vcpu->kvm, gaddr & PT64_BASE_ADDR_MASK);
 237
 238         spte |= PT_PRESENT_MASK;
 239         if (access_bits & PT_USER_MASK)
 240                 spte |= PT_USER_MASK;
 241
 242         if (is_error_hpa(paddr)) {
 243                 set_shadow_pte(shadow_pte,
 244                                shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK);
 245                 return;
 246         }
 247
 248         spte |= paddr;
 249
 250         if ((access_bits & PT_WRITABLE_MASK)
 251             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
 252                 struct kvm_mmu_page *shadow;
 253
 254                 spte |= PT_WRITABLE_MASK;
 255                 if (user_fault) {
 256                         mmu_unshadow(vcpu->kvm, gfn);
 257                         goto unshadowed;
 258                 }
 259
 260                 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
 261                 if (shadow) {
 262                         pgprintk("%s: found shadow page for %lx, marking ro\n",
 263                                  __FUNCTION__, gfn);
 264                         access_bits &= ~PT_WRITABLE_MASK;
 265                         if (is_writeble_pte(spte)) {
 266                                 spte &= ~PT_WRITABLE_MASK;
 267                                 kvm_x86_ops->tlb_flush(vcpu);
 268                         }
 269                         if (write_fault)
 270                                 *ptwrite = 1;
 271                 }
 272         }
 273
 274 unshadowed:
 275
 276         if (access_bits & PT_WRITABLE_MASK)
 277                 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
 278
 279         pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
 280         set_shadow_pte(shadow_pte, spte);
 281         page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
 282         if (!was_rmapped)
 283                 rmap_add(vcpu, shadow_pte, (gaddr & PT64_BASE_ADDR_MASK)
 284                          >> PAGE_SHIFT);
 285         if (!ptwrite || !*ptwrite)
 286                 vcpu->last_pte_updated = shadow_pte;
 287 }
 288
 289 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t gpte,
 290                            u64 *shadow_pte, u64 access_bits,
 291                            int user_fault, int write_fault, int *ptwrite,
 292                            struct guest_walker *walker, gfn_t gfn)
 293 {
 294         access_bits &= gpte;
 295         FNAME(set_pte_common)(vcpu, shadow_pte, gpte & PT_BASE_ADDR_MASK,
 296                               gpte, access_bits, user_fault, write_fault,
 297                               ptwrite, walker, gfn);
 298 }
 299
 300 static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
 301                               u64 *spte, const void *pte, int bytes,
 302                               int offset_in_pte)
 303 {
 304         pt_element_t gpte;
 305
 306         gpte = *(const pt_element_t *)pte;
 307         if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK)) {
 308                 if (!offset_in_pte && !is_present_pte(gpte))
 309                         set_shadow_pte(spte, shadow_notrap_nonpresent_pte);
 310                 return;
 311         }
 312         if (bytes < sizeof(pt_element_t))
 313                 return;
 314         pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
 315         FNAME(set_pte)(vcpu, gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK, 0,
 316                        0, NULL, NULL,
 317                        (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
 318 }
 319
 320 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, pt_element_t gpde,
 321                            u64 *shadow_pte, u64 access_bits,
 322                            int user_fault, int write_fault, int *ptwrite,
 323                            struct guest_walker *walker, gfn_t gfn)
 324 {
 325         gpa_t gaddr;
 326
 327         access_bits &= gpde;
 328         gaddr = (gpa_t)gfn << PAGE_SHIFT;
 329         if (PTTYPE == 32 && is_cpuid_PSE36())
 330                 gaddr |= (gpde & PT32_DIR_PSE36_MASK) <<
 331                         (32 - PT32_DIR_PSE36_SHIFT);
 332         FNAME(set_pte_common)(vcpu, shadow_pte, gaddr,
 333                               gpde, access_bits, user_fault, write_fault,
 334                               ptwrite, walker, gfn);
 335 }
 336
 337 /*
 338  * Fetch a shadow pte for a specific level in the paging hierarchy.
 339  */
 340 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
 341                          struct guest_walker *walker,
 342                          int user_fault, int write_fault, int *ptwrite)
 343 {
 344         hpa_t shadow_addr;
 345         int level;
 346         u64 *shadow_ent;
 347         u64 *prev_shadow_ent = NULL;
 348
 349         if (!is_present_pte(walker->pte))
 350                 return NULL;
 351
 352         shadow_addr = vcpu->mmu.root_hpa;
 353         level = vcpu->mmu.shadow_root_level;
 354         if (level == PT32E_ROOT_LEVEL) {
 355                 shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
 356                 shadow_addr &= PT64_BASE_ADDR_MASK;
 357                 --level;
 358         }
 359
 360         for (; ; level--) {
 361                 u32 index = SHADOW_PT_INDEX(addr, level);
 362                 struct kvm_mmu_page *shadow_page;
 363                 u64 shadow_pte;
 364                 int metaphysical;
 365                 gfn_t table_gfn;
 366                 unsigned hugepage_access = 0;
 367
 368                 shadow_ent = ((u64 *)__va(shadow_addr)) + index;
 369                 if (is_shadow_present_pte(*shadow_ent)) {
 370                         if (level == PT_PAGE_TABLE_LEVEL)
 371                                 break;
 372                         shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
 373                         prev_shadow_ent = shadow_ent;
 374                         continue;
 375                 }
 376
 377                 if (level == PT_PAGE_TABLE_LEVEL)
 378                         break;
 379
 380                 if (level - 1 == PT_PAGE_TABLE_LEVEL
 381                     && walker->level == PT_DIRECTORY_LEVEL) {
 382                         metaphysical = 1;
 383                         hugepage_access = walker->pte;
 384                         hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
 385                         if (!is_dirty_pte(walker->pte))
 386                                 hugepage_access &= ~PT_WRITABLE_MASK;
 387                         hugepage_access >>= PT_WRITABLE_SHIFT;
 388                         if (walker->pte & PT64_NX_MASK)
 389                                 hugepage_access |= (1 << 2);
 390                         table_gfn = (walker->pte & PT_BASE_ADDR_MASK)
 391                                 >> PAGE_SHIFT;
 392                 } else {
 393                         metaphysical = 0;
 394                         table_gfn = walker->table_gfn[level - 2];
 395                 }
 396                 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
 397                                                metaphysical, hugepage_access,
 398                                                shadow_ent);
 399                 shadow_addr = __pa(shadow_page->spt);
 400                 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
 401                         | PT_WRITABLE_MASK | PT_USER_MASK;
 402                 *shadow_ent = shadow_pte;
 403                 prev_shadow_ent = shadow_ent;
 404         }
 405
 406         if (walker->level == PT_DIRECTORY_LEVEL) {
 407                 FNAME(set_pde)(vcpu, walker->pte, shadow_ent,
 408                                walker->inherited_ar, user_fault, write_fault,
 409                                ptwrite, walker, walker->gfn);
 410         } else {
 411                 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
 412                 FNAME(set_pte)(vcpu, walker->pte, shadow_ent,
 413                                walker->inherited_ar, user_fault, write_fault,
 414                                ptwrite, walker, walker->gfn);
 415         }
 416         return shadow_ent;
 417 }
 418
 419 /*
 420  * Page fault handler.  There are several causes for a page fault:
 421  *   - there is no shadow pte for the guest pte
 422  *   - write access through a shadow pte marked read only so that we can set
 423  *     the dirty bit
 424  *   - write access to a shadow pte marked read only so we can update the page
 425  *     dirty bitmap, when userspace requests it
 426  *   - mmio access; in this case we will never install a present shadow pte
 427  *   - normal guest page fault due to the guest pte marked not present, not
 428  *     writable, or not executable
 429  *
 430  *  Returns: 1 if we need to emulate the instruction, 0 otherwise, or
 431  *           a negative value on error.
 432  */
 433 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
 434                                u32 error_code)
 435 {
 436         int write_fault = error_code & PFERR_WRITE_MASK;
 437         int user_fault = error_code & PFERR_USER_MASK;
 438         int fetch_fault = error_code & PFERR_FETCH_MASK;
 439         struct guest_walker walker;
 440         u64 *shadow_pte;
 441         int write_pt = 0;
 442         int r;
 443
 444         pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
 445         kvm_mmu_audit(vcpu, "pre page fault");
 446
 447         r = mmu_topup_memory_caches(vcpu);
 448         if (r)
 449                 return r;
 450
 451         /*
 452          * Look up the shadow pte for the faulting address.
 453          */
 454         r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
 455                              fetch_fault);
 456
 457         /*
 458          * The page is not mapped by the guest.  Let the guest handle it.
 459          */
 460         if (!r) {
 461                 pgprintk("%s: guest page fault\n", __FUNCTION__);
 462                 inject_page_fault(vcpu, addr, walker.error_code);
 463                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 464                 return 0;
 465         }
 466
 467         shadow_pte = FNAME(fetch)(vcpu, addr, &walker, user_fault, write_fault,
 468                                   &write_pt);
 469         pgprintk("%s: shadow pte %p %llx ptwrite %d\n", __FUNCTION__,
 470                  shadow_pte, *shadow_pte, write_pt);
 471
 472         if (!write_pt)
 473                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 474
 475         /*
 476          * mmio: emulate if accessible, otherwise its a guest fault.
 477          */
 478         if (is_io_pte(*shadow_pte))
 479                 return 1;
 480
 481         ++vcpu->stat.pf_fixed;
 482         kvm_mmu_audit(vcpu, "post page fault (fixed)");
 483
 484         return write_pt;
 485 }
 486
 487 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
 488 {
 489         struct guest_walker walker;
 490         gpa_t gpa = UNMAPPED_GVA;
 491         int r;
 492
 493         r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
 494
 495         if (r) {
 496                 gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
 497                 gpa |= vaddr & ~PAGE_MASK;
 498         }
 499
 500         return gpa;
 501 }
 502
 503 static void FNAME(prefetch_page)(struct kvm_vcpu *vcpu,
 504                                  struct kvm_mmu_page *sp)
 505 {
 506         int i;
 507         pt_element_t *gpt;
 508
 509         if (sp->role.metaphysical || PTTYPE == 32) {
 510                 nonpaging_prefetch_page(vcpu, sp);
 511                 return;
 512         }
 513
 514         gpt = kmap_atomic(gfn_to_page(vcpu->kvm, sp->gfn), KM_USER0);
 515         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
 516                 if (is_present_pte(gpt[i]))
 517                         sp->spt[i] = shadow_trap_nonpresent_pte;
 518                 else
 519                         sp->spt[i] = shadow_notrap_nonpresent_pte;
 520         kunmap_atomic(gpt, KM_USER0);
 521 }
 522
 523 #undef pt_element_t
 524 #undef guest_walker
 525 #undef FNAME
 526 #undef PT_BASE_ADDR_MASK
 527 #undef PT_INDEX
 528 #undef SHADOW_PT_INDEX
 529 #undef PT_LEVEL_MASK
 530 #undef PT_DIR_BASE_ADDR_MASK
 531 #undef PT_LEVEL_BITS
 532 #undef PT_MAX_FULL_LEVELS