2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
19 #include <linux/types.h>
20 #include <linux/string.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
34 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
36 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
41 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
42 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
46 #define pgprintk(x...) do { } while (0)
47 #define rmap_printk(x...) do { } while (0)
51 #if defined(MMU_DEBUG) || defined(AUDIT)
57 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
58 __FILE__, __LINE__, #x); \
61 #define PT64_PT_BITS 9
62 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
63 #define PT32_PT_BITS 10
64 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
66 #define PT_WRITABLE_SHIFT 1
68 #define PT_PRESENT_MASK (1ULL << 0)
69 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
70 #define PT_USER_MASK (1ULL << 2)
71 #define PT_PWT_MASK (1ULL << 3)
72 #define PT_PCD_MASK (1ULL << 4)
73 #define PT_ACCESSED_MASK (1ULL << 5)
74 #define PT_DIRTY_MASK (1ULL << 6)
75 #define PT_PAGE_SIZE_MASK (1ULL << 7)
76 #define PT_PAT_MASK (1ULL << 7)
77 #define PT_GLOBAL_MASK (1ULL << 8)
78 #define PT64_NX_MASK (1ULL << 63)
80 #define PT_PAT_SHIFT 7
81 #define PT_DIR_PAT_SHIFT 12
82 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
84 #define PT32_DIR_PSE36_SIZE 4
85 #define PT32_DIR_PSE36_SHIFT 13
86 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
89 #define PT32_PTE_COPY_MASK \
90 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
92 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
94 #define PT_FIRST_AVAIL_BITS_SHIFT 9
95 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
97 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
98 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
100 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
101 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
103 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
104 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
106 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
108 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
110 #define PT64_LEVEL_BITS 9
112 #define PT64_LEVEL_SHIFT(level) \
113 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
115 #define PT64_LEVEL_MASK(level) \
116 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
118 #define PT64_INDEX(address, level)\
119 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
122 #define PT32_LEVEL_BITS 10
124 #define PT32_LEVEL_SHIFT(level) \
125 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
127 #define PT32_LEVEL_MASK(level) \
128 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
130 #define PT32_INDEX(address, level)\
131 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
138 #define PT32_BASE_ADDR_MASK PAGE_MASK
139 #define PT32_DIR_BASE_ADDR_MASK \
140 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
157 struct kvm_rmap_desc {
158 u64 *shadow_ptes[RMAP_EXT];
159 struct kvm_rmap_desc *more;
162 static int is_write_protection(struct kvm_vcpu *vcpu)
164 return vcpu->cr0 & CR0_WP_MASK;
167 static int is_cpuid_PSE36(void)
172 static int is_nx(struct kvm_vcpu *vcpu)
174 return vcpu->shadow_efer & EFER_NX;
177 static int is_present_pte(unsigned long pte)
179 return pte & PT_PRESENT_MASK;
182 static int is_writeble_pte(unsigned long pte)
184 return pte & PT_WRITABLE_MASK;
187 static int is_io_pte(unsigned long pte)
189 return pte & PT_SHADOW_IO_MARK;
192 static int is_rmap_pte(u64 pte)
194 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
195 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
198 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
199 size_t objsize, int min)
203 if (cache->nobjs >= min)
205 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
206 obj = kzalloc(objsize, GFP_NOWAIT);
209 cache->objects[cache->nobjs++] = obj;
214 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
217 kfree(mc->objects[--mc->nobjs]);
220 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
224 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
225 sizeof(struct kvm_pte_chain), 4);
228 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
229 sizeof(struct kvm_rmap_desc), 1);
234 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
236 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
237 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
240 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
246 p = mc->objects[--mc->nobjs];
251 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
253 if (mc->nobjs < KVM_NR_MEM_OBJS)
254 mc->objects[mc->nobjs++] = obj;
259 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
261 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
262 sizeof(struct kvm_pte_chain));
265 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
266 struct kvm_pte_chain *pc)
268 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
271 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
273 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
274 sizeof(struct kvm_rmap_desc));
277 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
278 struct kvm_rmap_desc *rd)
280 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
284 * Reverse mapping data structures:
286 * If page->private bit zero is zero, then page->private points to the
287 * shadow page table entry that points to page_address(page).
289 * If page->private bit zero is one, (then page->private & ~1) points
290 * to a struct kvm_rmap_desc containing more mappings.
292 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
295 struct kvm_rmap_desc *desc;
298 if (!is_rmap_pte(*spte))
300 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
301 if (!page_private(page)) {
302 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
303 set_page_private(page,(unsigned long)spte);
304 } else if (!(page_private(page) & 1)) {
305 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
306 desc = mmu_alloc_rmap_desc(vcpu);
307 desc->shadow_ptes[0] = (u64 *)page_private(page);
308 desc->shadow_ptes[1] = spte;
309 set_page_private(page,(unsigned long)desc | 1);
311 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
312 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
313 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
315 if (desc->shadow_ptes[RMAP_EXT-1]) {
316 desc->more = mmu_alloc_rmap_desc(vcpu);
319 for (i = 0; desc->shadow_ptes[i]; ++i)
321 desc->shadow_ptes[i] = spte;
325 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
327 struct kvm_rmap_desc *desc,
329 struct kvm_rmap_desc *prev_desc)
333 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
335 desc->shadow_ptes[i] = desc->shadow_ptes[j];
336 desc->shadow_ptes[j] = NULL;
339 if (!prev_desc && !desc->more)
340 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
343 prev_desc->more = desc->more;
345 set_page_private(page,(unsigned long)desc->more | 1);
346 mmu_free_rmap_desc(vcpu, desc);
349 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
352 struct kvm_rmap_desc *desc;
353 struct kvm_rmap_desc *prev_desc;
356 if (!is_rmap_pte(*spte))
358 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
359 if (!page_private(page)) {
360 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
362 } else if (!(page_private(page) & 1)) {
363 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
364 if ((u64 *)page_private(page) != spte) {
365 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
369 set_page_private(page,0);
371 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
372 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
375 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
376 if (desc->shadow_ptes[i] == spte) {
377 rmap_desc_remove_entry(vcpu, page,
389 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
391 struct kvm *kvm = vcpu->kvm;
393 struct kvm_memory_slot *slot;
394 struct kvm_rmap_desc *desc;
397 slot = gfn_to_memslot(kvm, gfn);
399 page = gfn_to_page(slot, gfn);
401 while (page_private(page)) {
402 if (!(page_private(page) & 1))
403 spte = (u64 *)page_private(page);
405 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
406 spte = desc->shadow_ptes[0];
409 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
410 != page_to_pfn(page));
411 BUG_ON(!(*spte & PT_PRESENT_MASK));
412 BUG_ON(!(*spte & PT_WRITABLE_MASK));
413 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
414 rmap_remove(vcpu, spte);
415 kvm_arch_ops->tlb_flush(vcpu);
416 *spte &= ~(u64)PT_WRITABLE_MASK;
420 static int is_empty_shadow_page(hpa_t page_hpa)
425 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
428 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
435 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
437 struct kvm_mmu_page *page_head = page_header(page_hpa);
439 ASSERT(is_empty_shadow_page(page_hpa));
440 list_del(&page_head->link);
441 page_head->page_hpa = page_hpa;
442 list_add(&page_head->link, &vcpu->free_pages);
443 ++vcpu->kvm->n_free_mmu_pages;
446 static unsigned kvm_page_table_hashfn(gfn_t gfn)
451 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
454 struct kvm_mmu_page *page;
456 if (list_empty(&vcpu->free_pages))
459 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
460 list_del(&page->link);
461 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
462 ASSERT(is_empty_shadow_page(page->page_hpa));
463 page->slot_bitmap = 0;
464 page->multimapped = 0;
465 page->parent_pte = parent_pte;
466 --vcpu->kvm->n_free_mmu_pages;
470 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
471 struct kvm_mmu_page *page, u64 *parent_pte)
473 struct kvm_pte_chain *pte_chain;
474 struct hlist_node *node;
479 if (!page->multimapped) {
480 u64 *old = page->parent_pte;
483 page->parent_pte = parent_pte;
486 page->multimapped = 1;
487 pte_chain = mmu_alloc_pte_chain(vcpu);
488 INIT_HLIST_HEAD(&page->parent_ptes);
489 hlist_add_head(&pte_chain->link, &page->parent_ptes);
490 pte_chain->parent_ptes[0] = old;
492 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
493 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
495 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
496 if (!pte_chain->parent_ptes[i]) {
497 pte_chain->parent_ptes[i] = parent_pte;
501 pte_chain = mmu_alloc_pte_chain(vcpu);
503 hlist_add_head(&pte_chain->link, &page->parent_ptes);
504 pte_chain->parent_ptes[0] = parent_pte;
507 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
508 struct kvm_mmu_page *page,
511 struct kvm_pte_chain *pte_chain;
512 struct hlist_node *node;
515 if (!page->multimapped) {
516 BUG_ON(page->parent_pte != parent_pte);
517 page->parent_pte = NULL;
520 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
521 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
522 if (!pte_chain->parent_ptes[i])
524 if (pte_chain->parent_ptes[i] != parent_pte)
526 while (i + 1 < NR_PTE_CHAIN_ENTRIES
527 && pte_chain->parent_ptes[i + 1]) {
528 pte_chain->parent_ptes[i]
529 = pte_chain->parent_ptes[i + 1];
532 pte_chain->parent_ptes[i] = NULL;
534 hlist_del(&pte_chain->link);
535 mmu_free_pte_chain(vcpu, pte_chain);
536 if (hlist_empty(&page->parent_ptes)) {
537 page->multimapped = 0;
538 page->parent_pte = NULL;
546 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
550 struct hlist_head *bucket;
551 struct kvm_mmu_page *page;
552 struct hlist_node *node;
554 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
555 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
556 bucket = &vcpu->kvm->mmu_page_hash[index];
557 hlist_for_each_entry(page, node, bucket, hash_link)
558 if (page->gfn == gfn && !page->role.metaphysical) {
559 pgprintk("%s: found role %x\n",
560 __FUNCTION__, page->role.word);
566 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
571 unsigned hugepage_access,
574 union kvm_mmu_page_role role;
577 struct hlist_head *bucket;
578 struct kvm_mmu_page *page;
579 struct hlist_node *node;
582 role.glevels = vcpu->mmu.root_level;
584 role.metaphysical = metaphysical;
585 role.hugepage_access = hugepage_access;
586 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
587 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
588 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
589 role.quadrant = quadrant;
591 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
593 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
594 bucket = &vcpu->kvm->mmu_page_hash[index];
595 hlist_for_each_entry(page, node, bucket, hash_link)
596 if (page->gfn == gfn && page->role.word == role.word) {
597 mmu_page_add_parent_pte(vcpu, page, parent_pte);
598 pgprintk("%s: found\n", __FUNCTION__);
601 page = kvm_mmu_alloc_page(vcpu, parent_pte);
604 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
607 hlist_add_head(&page->hash_link, bucket);
609 rmap_write_protect(vcpu, gfn);
613 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
614 struct kvm_mmu_page *page)
620 pt = __va(page->page_hpa);
622 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
623 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
624 if (pt[i] & PT_PRESENT_MASK)
625 rmap_remove(vcpu, &pt[i]);
628 kvm_arch_ops->tlb_flush(vcpu);
632 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
636 if (!(ent & PT_PRESENT_MASK))
638 ent &= PT64_BASE_ADDR_MASK;
639 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
643 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
644 struct kvm_mmu_page *page,
647 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
650 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
651 struct kvm_mmu_page *page)
655 while (page->multimapped || page->parent_pte) {
656 if (!page->multimapped)
657 parent_pte = page->parent_pte;
659 struct kvm_pte_chain *chain;
661 chain = container_of(page->parent_ptes.first,
662 struct kvm_pte_chain, link);
663 parent_pte = chain->parent_ptes[0];
666 kvm_mmu_put_page(vcpu, page, parent_pte);
669 kvm_mmu_page_unlink_children(vcpu, page);
670 if (!page->root_count) {
671 hlist_del(&page->hash_link);
672 kvm_mmu_free_page(vcpu, page->page_hpa);
674 list_del(&page->link);
675 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
679 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
682 struct hlist_head *bucket;
683 struct kvm_mmu_page *page;
684 struct hlist_node *node, *n;
687 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
689 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
690 bucket = &vcpu->kvm->mmu_page_hash[index];
691 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
692 if (page->gfn == gfn && !page->role.metaphysical) {
693 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
695 kvm_mmu_zap_page(vcpu, page);
701 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
703 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
704 struct kvm_mmu_page *page_head = page_header(__pa(pte));
706 __set_bit(slot, &page_head->slot_bitmap);
709 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
711 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
713 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
716 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
718 struct kvm_memory_slot *slot;
721 ASSERT((gpa & HPA_ERR_MASK) == 0);
722 slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
724 return gpa | HPA_ERR_MASK;
725 page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
726 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
727 | (gpa & (PAGE_SIZE-1));
730 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
732 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
734 if (gpa == UNMAPPED_GVA)
736 return gpa_to_hpa(vcpu, gpa);
739 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
741 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
743 if (gpa == UNMAPPED_GVA)
745 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
748 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
752 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
754 int level = PT32E_ROOT_LEVEL;
755 hpa_t table_addr = vcpu->mmu.root_hpa;
758 u32 index = PT64_INDEX(v, level);
762 ASSERT(VALID_PAGE(table_addr));
763 table = __va(table_addr);
767 if (is_present_pte(pte) && is_writeble_pte(pte))
769 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
770 page_header_update_slot(vcpu->kvm, table, v);
771 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
773 rmap_add(vcpu, &table[index]);
777 if (table[index] == 0) {
778 struct kvm_mmu_page *new_table;
781 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
783 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
785 1, 0, &table[index]);
787 pgprintk("nonpaging_map: ENOMEM\n");
791 table[index] = new_table->page_hpa | PT_PRESENT_MASK
792 | PT_WRITABLE_MASK | PT_USER_MASK;
794 table_addr = table[index] & PT64_BASE_ADDR_MASK;
798 static void mmu_free_roots(struct kvm_vcpu *vcpu)
801 struct kvm_mmu_page *page;
804 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
805 hpa_t root = vcpu->mmu.root_hpa;
807 ASSERT(VALID_PAGE(root));
808 page = page_header(root);
810 vcpu->mmu.root_hpa = INVALID_PAGE;
814 for (i = 0; i < 4; ++i) {
815 hpa_t root = vcpu->mmu.pae_root[i];
817 ASSERT(VALID_PAGE(root));
818 root &= PT64_BASE_ADDR_MASK;
819 page = page_header(root);
821 vcpu->mmu.pae_root[i] = INVALID_PAGE;
823 vcpu->mmu.root_hpa = INVALID_PAGE;
826 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
830 struct kvm_mmu_page *page;
832 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
835 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
836 hpa_t root = vcpu->mmu.root_hpa;
838 ASSERT(!VALID_PAGE(root));
839 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
840 PT64_ROOT_LEVEL, 0, 0, NULL);
841 root = page->page_hpa;
843 vcpu->mmu.root_hpa = root;
847 for (i = 0; i < 4; ++i) {
848 hpa_t root = vcpu->mmu.pae_root[i];
850 ASSERT(!VALID_PAGE(root));
851 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
852 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
853 else if (vcpu->mmu.root_level == 0)
855 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
856 PT32_ROOT_LEVEL, !is_paging(vcpu),
858 root = page->page_hpa;
860 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
862 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
865 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
870 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
877 r = mmu_topup_memory_caches(vcpu);
882 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
885 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
887 if (is_error_hpa(paddr))
890 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
893 static void nonpaging_free(struct kvm_vcpu *vcpu)
895 mmu_free_roots(vcpu);
898 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
900 struct kvm_mmu *context = &vcpu->mmu;
902 context->new_cr3 = nonpaging_new_cr3;
903 context->page_fault = nonpaging_page_fault;
904 context->gva_to_gpa = nonpaging_gva_to_gpa;
905 context->free = nonpaging_free;
906 context->root_level = 0;
907 context->shadow_root_level = PT32E_ROOT_LEVEL;
908 mmu_alloc_roots(vcpu);
909 ASSERT(VALID_PAGE(context->root_hpa));
910 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
914 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
916 ++kvm_stat.tlb_flush;
917 kvm_arch_ops->tlb_flush(vcpu);
920 static void paging_new_cr3(struct kvm_vcpu *vcpu)
922 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
923 mmu_free_roots(vcpu);
924 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
925 kvm_mmu_free_some_pages(vcpu);
926 mmu_alloc_roots(vcpu);
927 kvm_mmu_flush_tlb(vcpu);
928 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
931 static inline void set_pte_common(struct kvm_vcpu *vcpu,
940 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
942 access_bits &= ~PT_WRITABLE_MASK;
944 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
946 *shadow_pte |= access_bits;
948 if (is_error_hpa(paddr)) {
949 *shadow_pte |= gaddr;
950 *shadow_pte |= PT_SHADOW_IO_MARK;
951 *shadow_pte &= ~PT_PRESENT_MASK;
955 *shadow_pte |= paddr;
957 if (access_bits & PT_WRITABLE_MASK) {
958 struct kvm_mmu_page *shadow;
960 shadow = kvm_mmu_lookup_page(vcpu, gfn);
962 pgprintk("%s: found shadow page for %lx, marking ro\n",
964 access_bits &= ~PT_WRITABLE_MASK;
965 if (is_writeble_pte(*shadow_pte)) {
966 *shadow_pte &= ~PT_WRITABLE_MASK;
967 kvm_arch_ops->tlb_flush(vcpu);
972 if (access_bits & PT_WRITABLE_MASK)
973 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
975 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
976 rmap_add(vcpu, shadow_pte);
979 static void inject_page_fault(struct kvm_vcpu *vcpu,
983 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
986 static inline int fix_read_pf(u64 *shadow_ent)
988 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
989 !(*shadow_ent & PT_USER_MASK)) {
991 * If supervisor write protect is disabled, we shadow kernel
992 * pages as user pages so we can trap the write access.
994 *shadow_ent |= PT_USER_MASK;
995 *shadow_ent &= ~PT_WRITABLE_MASK;
1003 static void paging_free(struct kvm_vcpu *vcpu)
1005 nonpaging_free(vcpu);
1009 #include "paging_tmpl.h"
1013 #include "paging_tmpl.h"
1016 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1018 struct kvm_mmu *context = &vcpu->mmu;
1020 ASSERT(is_pae(vcpu));
1021 context->new_cr3 = paging_new_cr3;
1022 context->page_fault = paging64_page_fault;
1023 context->gva_to_gpa = paging64_gva_to_gpa;
1024 context->free = paging_free;
1025 context->root_level = level;
1026 context->shadow_root_level = level;
1027 mmu_alloc_roots(vcpu);
1028 ASSERT(VALID_PAGE(context->root_hpa));
1029 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1030 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1034 static int paging64_init_context(struct kvm_vcpu *vcpu)
1036 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1039 static int paging32_init_context(struct kvm_vcpu *vcpu)
1041 struct kvm_mmu *context = &vcpu->mmu;
1043 context->new_cr3 = paging_new_cr3;
1044 context->page_fault = paging32_page_fault;
1045 context->gva_to_gpa = paging32_gva_to_gpa;
1046 context->free = paging_free;
1047 context->root_level = PT32_ROOT_LEVEL;
1048 context->shadow_root_level = PT32E_ROOT_LEVEL;
1049 mmu_alloc_roots(vcpu);
1050 ASSERT(VALID_PAGE(context->root_hpa));
1051 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1052 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1056 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1058 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1061 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1064 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1066 if (!is_paging(vcpu))
1067 return nonpaging_init_context(vcpu);
1068 else if (is_long_mode(vcpu))
1069 return paging64_init_context(vcpu);
1070 else if (is_pae(vcpu))
1071 return paging32E_init_context(vcpu);
1073 return paging32_init_context(vcpu);
1076 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1079 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1080 vcpu->mmu.free(vcpu);
1081 vcpu->mmu.root_hpa = INVALID_PAGE;
1085 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1089 destroy_kvm_mmu(vcpu);
1090 r = init_kvm_mmu(vcpu);
1093 r = mmu_topup_memory_caches(vcpu);
1098 static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu,
1099 struct kvm_mmu_page *page,
1103 struct kvm_mmu_page *child;
1106 if (is_present_pte(pte)) {
1107 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1108 rmap_remove(vcpu, spte);
1110 child = page_header(pte & PT64_BASE_ADDR_MASK);
1111 mmu_page_remove_parent_pte(vcpu, child, spte);
1117 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1119 gfn_t gfn = gpa >> PAGE_SHIFT;
1120 struct kvm_mmu_page *page;
1121 struct hlist_node *node, *n;
1122 struct hlist_head *bucket;
1125 unsigned offset = offset_in_page(gpa);
1127 unsigned page_offset;
1128 unsigned misaligned;
1133 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1134 if (gfn == vcpu->last_pt_write_gfn) {
1135 ++vcpu->last_pt_write_count;
1136 if (vcpu->last_pt_write_count >= 3)
1139 vcpu->last_pt_write_gfn = gfn;
1140 vcpu->last_pt_write_count = 1;
1142 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1143 bucket = &vcpu->kvm->mmu_page_hash[index];
1144 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1145 if (page->gfn != gfn || page->role.metaphysical)
1147 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1148 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1149 if (misaligned || flooded) {
1151 * Misaligned accesses are too much trouble to fix
1152 * up; also, they usually indicate a page is not used
1155 * If we're seeing too many writes to a page,
1156 * it may no longer be a page table, or we may be
1157 * forking, in which case it is better to unmap the
1160 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1161 gpa, bytes, page->role.word);
1162 kvm_mmu_zap_page(vcpu, page);
1165 page_offset = offset;
1166 level = page->role.level;
1168 if (page->role.glevels == PT32_ROOT_LEVEL) {
1169 page_offset <<= 1; /* 32->64 */
1171 * A 32-bit pde maps 4MB while the shadow pdes map
1172 * only 2MB. So we need to double the offset again
1173 * and zap two pdes instead of one.
1175 if (level == PT32_ROOT_LEVEL) {
1176 page_offset &= ~7; /* kill rounding error */
1180 page_offset &= ~PAGE_MASK;
1182 spte = __va(page->page_hpa);
1183 spte += page_offset / sizeof(*spte);
1185 mmu_pre_write_zap_pte(vcpu, page, spte);
1191 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1195 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1197 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1199 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1202 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1204 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1205 struct kvm_mmu_page *page;
1207 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1208 struct kvm_mmu_page, link);
1209 kvm_mmu_zap_page(vcpu, page);
1212 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1214 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1216 struct kvm_mmu_page *page;
1218 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1219 page = container_of(vcpu->kvm->active_mmu_pages.next,
1220 struct kvm_mmu_page, link);
1221 kvm_mmu_zap_page(vcpu, page);
1223 while (!list_empty(&vcpu->free_pages)) {
1224 page = list_entry(vcpu->free_pages.next,
1225 struct kvm_mmu_page, link);
1226 list_del(&page->link);
1227 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1228 page->page_hpa = INVALID_PAGE;
1230 free_page((unsigned long)vcpu->mmu.pae_root);
1233 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1240 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1241 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1243 INIT_LIST_HEAD(&page_header->link);
1244 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1246 set_page_private(page, (unsigned long)page_header);
1247 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1248 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1249 list_add(&page_header->link, &vcpu->free_pages);
1250 ++vcpu->kvm->n_free_mmu_pages;
1254 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1255 * Therefore we need to allocate shadow page tables in the first
1256 * 4GB of memory, which happens to fit the DMA32 zone.
1258 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1261 vcpu->mmu.pae_root = page_address(page);
1262 for (i = 0; i < 4; ++i)
1263 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1268 free_mmu_pages(vcpu);
1272 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1275 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1276 ASSERT(list_empty(&vcpu->free_pages));
1278 return alloc_mmu_pages(vcpu);
1281 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1284 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1285 ASSERT(!list_empty(&vcpu->free_pages));
1287 return init_kvm_mmu(vcpu);
1290 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1294 destroy_kvm_mmu(vcpu);
1295 free_mmu_pages(vcpu);
1296 mmu_free_memory_caches(vcpu);
1299 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1301 struct kvm *kvm = vcpu->kvm;
1302 struct kvm_mmu_page *page;
1304 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1308 if (!test_bit(slot, &page->slot_bitmap))
1311 pt = __va(page->page_hpa);
1312 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1314 if (pt[i] & PT_WRITABLE_MASK) {
1315 rmap_remove(vcpu, &pt[i]);
1316 pt[i] &= ~PT_WRITABLE_MASK;
1323 static const char *audit_msg;
1325 static gva_t canonicalize(gva_t gva)
1327 #ifdef CONFIG_X86_64
1328 gva = (long long)(gva << 16) >> 16;
1333 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1334 gva_t va, int level)
1336 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1338 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1340 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1343 if (!ent & PT_PRESENT_MASK)
1346 va = canonicalize(va);
1348 audit_mappings_page(vcpu, ent, va, level - 1);
1350 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1351 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1353 if ((ent & PT_PRESENT_MASK)
1354 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1355 printk(KERN_ERR "audit error: (%s) levels %d"
1356 " gva %lx gpa %llx hpa %llx ent %llx\n",
1357 audit_msg, vcpu->mmu.root_level,
1363 static void audit_mappings(struct kvm_vcpu *vcpu)
1367 if (vcpu->mmu.root_level == 4)
1368 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1370 for (i = 0; i < 4; ++i)
1371 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1372 audit_mappings_page(vcpu,
1373 vcpu->mmu.pae_root[i],
1378 static int count_rmaps(struct kvm_vcpu *vcpu)
1383 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1384 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1385 struct kvm_rmap_desc *d;
1387 for (j = 0; j < m->npages; ++j) {
1388 struct page *page = m->phys_mem[j];
1392 if (!(page->private & 1)) {
1396 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1398 for (k = 0; k < RMAP_EXT; ++k)
1399 if (d->shadow_ptes[k])
1410 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1413 struct kvm_mmu_page *page;
1416 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1417 u64 *pt = __va(page->page_hpa);
1419 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1422 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1425 if (!(ent & PT_PRESENT_MASK))
1427 if (!(ent & PT_WRITABLE_MASK))
1435 static void audit_rmap(struct kvm_vcpu *vcpu)
1437 int n_rmap = count_rmaps(vcpu);
1438 int n_actual = count_writable_mappings(vcpu);
1440 if (n_rmap != n_actual)
1441 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1442 __FUNCTION__, audit_msg, n_rmap, n_actual);
1445 static void audit_write_protection(struct kvm_vcpu *vcpu)
1447 struct kvm_mmu_page *page;
1449 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1453 if (page->role.metaphysical)
1456 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1458 pg = pfn_to_page(hfn);
1460 printk(KERN_ERR "%s: (%s) shadow page has writable"
1461 " mappings: gfn %lx role %x\n",
1462 __FUNCTION__, audit_msg, page->gfn,
1467 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1474 audit_write_protection(vcpu);
1475 audit_mappings(vcpu);