2 * Promise TX2/TX4/TX2000/133 IDE driver
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
10 * linux/drivers/ide/pdc202xx.c Version 0.35 Mar. 30, 2002
11 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
12 * Copyright (C) 2005-2006 MontaVista Software, Inc.
13 * Portions Copyright (C) 1999 Promise Technology, Inc.
14 * Author: Frank Tiernan (frankt@promise.com)
15 * Released under terms of General Public License
18 #include <linux/module.h>
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/delay.h>
22 #include <linux/timer.h>
24 #include <linux/ioport.h>
25 #include <linux/blkdev.h>
26 #include <linux/hdreg.h>
27 #include <linux/interrupt.h>
28 #include <linux/pci.h>
29 #include <linux/init.h>
30 #include <linux/ide.h>
35 #ifdef CONFIG_PPC_PMAC
37 #include <asm/pci-bridge.h>
40 #define PDC202_DEBUG_CABLE 0
42 static const char *pdc_quirk_drives[] = {
43 "QUANTUM FIREBALLlct08 08",
44 "QUANTUM FIREBALLP KA6.4",
45 "QUANTUM FIREBALLP KA9.1",
46 "QUANTUM FIREBALLP LM20.4",
47 "QUANTUM FIREBALLP KX13.6",
48 "QUANTUM FIREBALLP KX20.5",
49 "QUANTUM FIREBALLP KX27.3",
50 "QUANTUM FIREBALLP LM20.5",
54 #define set_2regs(a, b) \
56 hwif->OUTB((a + adj), indexreg); \
57 hwif->OUTB(b, datareg); \
60 #define set_ultra(a, b, c) \
62 set_2regs(0x10,(a)); \
63 set_2regs(0x11,(b)); \
64 set_2regs(0x12,(c)); \
67 #define set_ata2(a, b) \
69 set_2regs(0x0e,(a)); \
70 set_2regs(0x0f,(b)); \
73 #define set_pio(a, b, c) \
75 set_2regs(0x0c,(a)); \
76 set_2regs(0x0d,(b)); \
77 set_2regs(0x13,(c)); \
80 static u8 pdcnew_ratemask (ide_drive_t *drive)
84 switch(HWIF(drive)->pci_dev->device) {
85 case PCI_DEVICE_ID_PROMISE_20277:
86 case PCI_DEVICE_ID_PROMISE_20276:
87 case PCI_DEVICE_ID_PROMISE_20275:
88 case PCI_DEVICE_ID_PROMISE_20271:
89 case PCI_DEVICE_ID_PROMISE_20269:
92 case PCI_DEVICE_ID_PROMISE_20270:
93 case PCI_DEVICE_ID_PROMISE_20268:
99 if (!eighty_ninty_three(drive))
100 mode = min(mode, (u8)1);
104 static int check_in_drive_lists (ide_drive_t *drive, const char **list)
106 struct hd_driveid *id = drive->id;
108 if (pdc_quirk_drives == list) {
110 if (strstr(id->model, *list++)) {
116 if (!strcmp(*list++,id->model)) {
124 static int pdcnew_new_tune_chipset (ide_drive_t *drive, u8 xferspeed)
126 ide_hwif_t *hwif = HWIF(drive);
127 unsigned long indexreg = hwif->dma_vendor1;
128 unsigned long datareg = hwif->dma_vendor3;
130 u8 adj = (drive->dn%2) ? 0x08 : 0x00;
131 u8 speed = ide_rate_filter(pdcnew_ratemask(drive), xferspeed);
133 if (speed == XFER_UDMA_2) {
134 hwif->OUTB((thold + adj), indexreg);
135 hwif->OUTB((hwif->INB(datareg) & 0x7f), datareg);
141 case XFER_UDMA_6: set_ultra(0x1a, 0x01, 0xcb); break;
142 case XFER_UDMA_5: set_ultra(0x1a, 0x02, 0xcb); break;
143 case XFER_UDMA_4: set_ultra(0x1a, 0x03, 0xcd); break;
144 case XFER_UDMA_3: set_ultra(0x1a, 0x05, 0xcd); break;
145 case XFER_UDMA_2: set_ultra(0x2a, 0x07, 0xcd); break;
146 case XFER_UDMA_1: set_ultra(0x3a, 0x0a, 0xd0); break;
147 case XFER_UDMA_0: set_ultra(0x4a, 0x0f, 0xd5); break;
148 case XFER_MW_DMA_2: set_ata2(0x69, 0x25); break;
149 case XFER_MW_DMA_1: set_ata2(0x6b, 0x27); break;
150 case XFER_MW_DMA_0: set_ata2(0xdf, 0x5f); break;
151 case XFER_PIO_4: set_pio(0x23, 0x09, 0x25); break;
152 case XFER_PIO_3: set_pio(0x27, 0x0d, 0x35); break;
153 case XFER_PIO_2: set_pio(0x23, 0x26, 0x64); break;
154 case XFER_PIO_1: set_pio(0x46, 0x29, 0xa4); break;
155 case XFER_PIO_0: set_pio(0xfb, 0x2b, 0xac); break;
160 return (ide_config_drive_speed(drive, speed));
164 * 960, 480, 390, 300, 240, 180, 120, 90, 60
165 * 180, 150, 120, 90, 60
167 * 180, 120, 90, 90, 90, 60, 30
168 * 11, 5, 4, 3, 2, 1, 0
170 static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio)
172 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
173 (void)pdcnew_new_tune_chipset(drive, XFER_PIO_0 + pio);
176 static u8 pdcnew_new_cable_detect (ide_hwif_t *hwif)
178 hwif->OUTB(0x0b, hwif->dma_vendor1);
179 return ((u8)((hwif->INB(hwif->dma_vendor3) & 0x04)));
181 static int config_chipset_for_dma (ide_drive_t *drive)
183 struct hd_driveid *id = drive->id;
184 ide_hwif_t *hwif = HWIF(drive);
188 u8 ultra_66 = ((id->dma_ultra & 0x0010) ||
189 (id->dma_ultra & 0x0008)) ? 1 : 0;
191 cable = pdcnew_new_cable_detect(hwif);
193 if (ultra_66 && cable) {
194 printk(KERN_WARNING "Warning: %s channel requires an 80-pin cable for operation.\n", hwif->channel ? "Secondary":"Primary");
195 printk(KERN_WARNING "%s reduced to Ultra33 mode.\n", drive->name);
198 if (drive->media != ide_disk)
200 if (id->capability & 4) { /* IORDY_EN & PREFETCH_EN */
201 hwif->OUTB((0x13 + ((drive->dn%2) ? 0x08 : 0x00)), hwif->dma_vendor1);
202 hwif->OUTB((hwif->INB(hwif->dma_vendor3)|0x03), hwif->dma_vendor3);
205 speed = ide_dma_speed(drive, pdcnew_ratemask(drive));
210 (void) hwif->speedproc(drive, speed);
211 return ide_dma_enable(drive);
214 static int pdcnew_config_drive_xfer_rate (ide_drive_t *drive)
216 ide_hwif_t *hwif = HWIF(drive);
217 struct hd_driveid *id = drive->id;
219 drive->init_speed = 0;
221 if (id && (id->capability & 1) && drive->autodma) {
223 if (ide_use_dma(drive)) {
224 if (config_chipset_for_dma(drive))
225 return hwif->ide_dma_on(drive);
230 } else if ((id->capability & 8) || (id->field_valid & 2)) {
232 hwif->tuneproc(drive, 255);
233 return hwif->ide_dma_off_quietly(drive);
235 /* IORDY not supported */
239 static int pdcnew_quirkproc (ide_drive_t *drive)
241 return ((int) check_in_drive_lists(drive, pdc_quirk_drives));
244 static int pdcnew_ide_dma_lostirq(ide_drive_t *drive)
246 if (HWIF(drive)->resetproc != NULL)
247 HWIF(drive)->resetproc(drive);
248 return __ide_dma_lostirq(drive);
251 static int pdcnew_ide_dma_timeout(ide_drive_t *drive)
253 if (HWIF(drive)->resetproc != NULL)
254 HWIF(drive)->resetproc(drive);
255 return __ide_dma_timeout(drive);
258 static void pdcnew_new_reset (ide_drive_t *drive)
261 * Deleted this because it is redundant from the caller.
263 printk(KERN_WARNING "PDC202XX: %s channel reset.\n",
264 HWIF(drive)->channel ? "Secondary" : "Primary");
267 #ifdef CONFIG_PPC_PMAC
268 static void __devinit apple_kiwi_init(struct pci_dev *pdev)
270 struct device_node *np = pci_device_to_OF_node(pdev);
271 unsigned int class_rev = 0;
275 if (np == NULL || !device_is_compatible(np, "kiwi-root"))
278 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
281 if (class_rev >= 0x03) {
282 /* Setup chip magic config stuff (from darwin) */
283 pci_read_config_byte(pdev, 0x40, &conf);
284 pci_write_config_byte(pdev, 0x40, conf | 0x01);
286 mmio = ioremap(pci_resource_start(pdev, 5),
287 pci_resource_len(pdev, 5));
289 /* Setup some PLL stuffs */
290 switch (pdev->device) {
291 case PCI_DEVICE_ID_PROMISE_20270:
292 writew(0x0d2b, mmio + 0x1202);
295 case PCI_DEVICE_ID_PROMISE_20271:
296 writew(0x0826, mmio + 0x1202);
303 #endif /* CONFIG_PPC_PMAC */
305 static unsigned int __devinit init_chipset_pdcnew(struct pci_dev *dev, const char *name)
307 if (dev->resource[PCI_ROM_RESOURCE].start) {
308 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
309 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
310 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name,
311 (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
314 #ifdef CONFIG_PPC_PMAC
315 apple_kiwi_init(dev);
321 static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
325 hwif->tuneproc = &pdcnew_tune_drive;
326 hwif->quirkproc = &pdcnew_quirkproc;
327 hwif->speedproc = &pdcnew_new_tune_chipset;
328 hwif->resetproc = &pdcnew_new_reset;
330 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
332 hwif->ultra_mask = 0x7f;
333 hwif->mwdma_mask = 0x07;
335 hwif->err_stops_fifo = 1;
337 hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate;
338 hwif->ide_dma_lostirq = &pdcnew_ide_dma_lostirq;
339 hwif->ide_dma_timeout = &pdcnew_ide_dma_timeout;
340 if (!(hwif->udma_four))
341 hwif->udma_four = (pdcnew_new_cable_detect(hwif)) ? 0 : 1;
344 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
345 #if PDC202_DEBUG_CABLE
346 printk(KERN_DEBUG "%s: %s-pin cable\n",
347 hwif->name, hwif->udma_four ? "80" : "40");
348 #endif /* PDC202_DEBUG_CABLE */
351 static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d)
353 return ide_setup_pci_device(dev, d);
356 static int __devinit init_setup_pdc20270(struct pci_dev *dev,
359 struct pci_dev *findev = NULL;
362 if ((dev->bus->self &&
363 dev->bus->self->vendor == PCI_VENDOR_ID_DEC) &&
364 (dev->bus->self->device == PCI_DEVICE_ID_DEC_21150)) {
365 if (PCI_SLOT(dev->devfn) & 2)
368 while ((findev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) {
369 if ((findev->vendor == dev->vendor) &&
370 (findev->device == dev->device) &&
371 (PCI_SLOT(findev->devfn) & 2)) {
372 if (findev->irq != dev->irq) {
373 findev->irq = dev->irq;
375 ret = ide_setup_pci_devices(dev, findev, d);
381 return ide_setup_pci_device(dev, d);
384 static int __devinit init_setup_pdc20276(struct pci_dev *dev,
387 if ((dev->bus->self) &&
388 (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) &&
389 ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) ||
390 (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) {
391 printk(KERN_INFO "ide: Skipping Promise PDC20276 "
392 "attached to I2O RAID controller.\n");
395 return ide_setup_pci_device(dev, d);
398 static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
401 .init_setup = init_setup_pdcnew,
402 .init_chipset = init_chipset_pdcnew,
403 .init_hwif = init_hwif_pdc202new,
406 .bootable = OFF_BOARD,
409 .init_setup = init_setup_pdcnew,
410 .init_chipset = init_chipset_pdcnew,
411 .init_hwif = init_hwif_pdc202new,
414 .bootable = OFF_BOARD,
417 .init_setup = init_setup_pdc20270,
418 .init_chipset = init_chipset_pdcnew,
419 .init_hwif = init_hwif_pdc202new,
422 .bootable = OFF_BOARD,
425 .init_setup = init_setup_pdcnew,
426 .init_chipset = init_chipset_pdcnew,
427 .init_hwif = init_hwif_pdc202new,
430 .bootable = OFF_BOARD,
433 .init_setup = init_setup_pdcnew,
434 .init_chipset = init_chipset_pdcnew,
435 .init_hwif = init_hwif_pdc202new,
438 .bootable = OFF_BOARD,
441 .init_setup = init_setup_pdc20276,
442 .init_chipset = init_chipset_pdcnew,
443 .init_hwif = init_hwif_pdc202new,
446 .bootable = OFF_BOARD,
449 .init_setup = init_setup_pdcnew,
450 .init_chipset = init_chipset_pdcnew,
451 .init_hwif = init_hwif_pdc202new,
454 .bootable = OFF_BOARD,
459 * pdc202new_init_one - called when a pdc202xx is found
460 * @dev: the pdc202new device
461 * @id: the matching pci id
463 * Called when the PCI registration layer (or the IDE initialization)
464 * finds a device matching our IDE device tables.
467 static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id)
469 ide_pci_device_t *d = &pdcnew_chipsets[id->driver_data];
471 return d->init_setup(dev, d);
474 static struct pci_device_id pdc202new_pci_tbl[] = {
475 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20268, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
476 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20269, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
477 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20270, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
478 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20271, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
479 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20275, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
480 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20276, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5},
481 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20277, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6},
484 MODULE_DEVICE_TABLE(pci, pdc202new_pci_tbl);
486 static struct pci_driver driver = {
487 .name = "Promise_IDE",
488 .id_table = pdc202new_pci_tbl,
489 .probe = pdc202new_init_one,
492 static int pdc202new_ide_init(void)
494 return ide_pci_register_driver(&driver);
497 module_init(pdc202new_ide_init);
499 MODULE_AUTHOR("Andre Hedrick, Frank Tiernan");
500 MODULE_DESCRIPTION("PCI driver module for Promise PDC20268 and higher");
501 MODULE_LICENSE("GPL");