SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/ide/ide-iops.c

   1 /*
   2  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
   3  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
   4  *
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/types.h>
   9 #include <linux/string.h>
  10 #include <linux/kernel.h>
  11 #include <linux/timer.h>
  12 #include <linux/mm.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/major.h>
  15 #include <linux/errno.h>
  16 #include <linux/genhd.h>
  17 #include <linux/blkpg.h>
  18 #include <linux/slab.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/hdreg.h>
  22 #include <linux/ide.h>
  23 #include <linux/bitops.h>
  24 #include <linux/nmi.h>
  25
  26 #include <asm/byteorder.h>
  27 #include <asm/irq.h>
  28 #include <asm/uaccess.h>
  29 #include <asm/io.h>
  30
  31 /*
  32  *      Conventional PIO operations for ATA devices
  33  */
  34
  35 static u8 ide_inb (unsigned long port)
  36 {
  37         return (u8) inb(port);
  38 }
  39
  40 static void ide_outb (u8 val, unsigned long port)
  41 {
  42         outb(val, port);
  43 }
  44
  45 static void ide_outbsync(ide_hwif_t *hwif, u8 addr, unsigned long port)
  46 {
  47         outb(addr, port);
  48 }
  49
  50 void default_hwif_iops (ide_hwif_t *hwif)
  51 {
  52         hwif->OUTB      = ide_outb;
  53         hwif->OUTBSYNC  = ide_outbsync;
  54         hwif->INB       = ide_inb;
  55 }
  56
  57 /*
  58  *      MMIO operations, typically used for SATA controllers
  59  */
  60
  61 static u8 ide_mm_inb (unsigned long port)
  62 {
  63         return (u8) readb((void __iomem *) port);
  64 }
  65
  66 static void ide_mm_outb (u8 value, unsigned long port)
  67 {
  68         writeb(value, (void __iomem *) port);
  69 }
  70
  71 static void ide_mm_outbsync(ide_hwif_t *hwif, u8 value, unsigned long port)
  72 {
  73         writeb(value, (void __iomem *) port);
  74 }
  75
  76 void default_hwif_mmiops (ide_hwif_t *hwif)
  77 {
  78         hwif->OUTB      = ide_mm_outb;
  79         /* Most systems will need to override OUTBSYNC, alas however
  80            this one is controller specific! */
  81         hwif->OUTBSYNC  = ide_mm_outbsync;
  82         hwif->INB       = ide_mm_inb;
  83 }
  84
  85 EXPORT_SYMBOL(default_hwif_mmiops);
  86
  87 void SELECT_DRIVE (ide_drive_t *drive)
  88 {
  89         ide_hwif_t *hwif = drive->hwif;
  90         const struct ide_port_ops *port_ops = hwif->port_ops;
  91
  92         if (port_ops && port_ops->selectproc)
  93                 port_ops->selectproc(drive);
  94
  95         hwif->OUTB(drive->select.all, hwif->io_ports.device_addr);
  96 }
  97
  98 void SELECT_MASK(ide_drive_t *drive, int mask)
  99 {
 100         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
 101
 102         if (port_ops && port_ops->maskproc)
 103                 port_ops->maskproc(drive, mask);
 104 }
 105
 106 static void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
 107 {
 108         if (hwif->host_flags & IDE_HFLAG_MMIO)
 109                 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
 110         else
 111                 outb(cmd, hwif->io_ports.command_addr);
 112 }
 113
 114 static u8 ide_read_status(ide_hwif_t *hwif)
 115 {
 116         if (hwif->host_flags & IDE_HFLAG_MMIO)
 117                 return readb((void __iomem *)hwif->io_ports.status_addr);
 118         else
 119                 return inb(hwif->io_ports.status_addr);
 120 }
 121
 122 static u8 ide_read_altstatus(ide_hwif_t *hwif)
 123 {
 124         if (hwif->host_flags & IDE_HFLAG_MMIO)
 125                 return readb((void __iomem *)hwif->io_ports.ctl_addr);
 126         else
 127                 return inb(hwif->io_ports.ctl_addr);
 128 }
 129
 130 static u8 ide_read_sff_dma_status(ide_hwif_t *hwif)
 131 {
 132         if (hwif->host_flags & IDE_HFLAG_MMIO)
 133                 return readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
 134         else
 135                 return inb(hwif->dma_base + ATA_DMA_STATUS);
 136 }
 137
 138 static void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
 139 {
 140         ide_hwif_t *hwif = drive->hwif;
 141         struct ide_io_ports *io_ports = &hwif->io_ports;
 142         struct ide_taskfile *tf = &task->tf;
 143         void (*tf_outb)(u8 addr, unsigned long port);
 144         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 145         u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
 146
 147         if (mmio)
 148                 tf_outb = ide_mm_outb;
 149         else
 150                 tf_outb = ide_outb;
 151
 152         if (task->tf_flags & IDE_TFLAG_FLAGGED)
 153                 HIHI = 0xFF;
 154
 155         if (task->tf_flags & IDE_TFLAG_OUT_DATA) {
 156                 u16 data = (tf->hob_data << 8) | tf->data;
 157
 158                 if (mmio)
 159                         writew(data, (void __iomem *)io_ports->data_addr);
 160                 else
 161                         outw(data, io_ports->data_addr);
 162         }
 163
 164         if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
 165                 tf_outb(tf->hob_feature, io_ports->feature_addr);
 166         if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
 167                 tf_outb(tf->hob_nsect, io_ports->nsect_addr);
 168         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
 169                 tf_outb(tf->hob_lbal, io_ports->lbal_addr);
 170         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
 171                 tf_outb(tf->hob_lbam, io_ports->lbam_addr);
 172         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
 173                 tf_outb(tf->hob_lbah, io_ports->lbah_addr);
 174
 175         if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
 176                 tf_outb(tf->feature, io_ports->feature_addr);
 177         if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
 178                 tf_outb(tf->nsect, io_ports->nsect_addr);
 179         if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
 180                 tf_outb(tf->lbal, io_ports->lbal_addr);
 181         if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
 182                 tf_outb(tf->lbam, io_ports->lbam_addr);
 183         if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
 184                 tf_outb(tf->lbah, io_ports->lbah_addr);
 185
 186         if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
 187                 tf_outb((tf->device & HIHI) | drive->select.all,
 188                          io_ports->device_addr);
 189 }
 190
 191 static void ide_tf_read(ide_drive_t *drive, ide_task_t *task)
 192 {
 193         ide_hwif_t *hwif = drive->hwif;
 194         struct ide_io_ports *io_ports = &hwif->io_ports;
 195         struct ide_taskfile *tf = &task->tf;
 196         void (*tf_outb)(u8 addr, unsigned long port);
 197         u8 (*tf_inb)(unsigned long port);
 198         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 199
 200         if (mmio) {
 201                 tf_outb = ide_mm_outb;
 202                 tf_inb  = ide_mm_inb;
 203         } else {
 204                 tf_outb = ide_outb;
 205                 tf_inb  = ide_inb;
 206         }
 207
 208         if (task->tf_flags & IDE_TFLAG_IN_DATA) {
 209                 u16 data;
 210
 211                 if (mmio)
 212                         data = readw((void __iomem *)io_ports->data_addr);
 213                 else
 214                         data = inw(io_ports->data_addr);
 215
 216                 tf->data = data & 0xff;
 217                 tf->hob_data = (data >> 8) & 0xff;
 218         }
 219
 220         /* be sure we're looking at the low order bits */
 221         tf_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
 222
 223         if (task->tf_flags & IDE_TFLAG_IN_NSECT)
 224                 tf->nsect  = tf_inb(io_ports->nsect_addr);
 225         if (task->tf_flags & IDE_TFLAG_IN_LBAL)
 226                 tf->lbal   = tf_inb(io_ports->lbal_addr);
 227         if (task->tf_flags & IDE_TFLAG_IN_LBAM)
 228                 tf->lbam   = tf_inb(io_ports->lbam_addr);
 229         if (task->tf_flags & IDE_TFLAG_IN_LBAH)
 230                 tf->lbah   = tf_inb(io_ports->lbah_addr);
 231         if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
 232                 tf->device = tf_inb(io_ports->device_addr);
 233
 234         if (task->tf_flags & IDE_TFLAG_LBA48) {
 235                 tf_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
 236
 237                 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
 238                         tf->hob_feature = tf_inb(io_ports->feature_addr);
 239                 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
 240                         tf->hob_nsect   = tf_inb(io_ports->nsect_addr);
 241                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
 242                         tf->hob_lbal    = tf_inb(io_ports->lbal_addr);
 243                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
 244                         tf->hob_lbam    = tf_inb(io_ports->lbam_addr);
 245                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
 246                         tf->hob_lbah    = tf_inb(io_ports->lbah_addr);
 247         }
 248 }
 249
 250 /*
 251  * Some localbus EIDE interfaces require a special access sequence
 252  * when using 32-bit I/O instructions to transfer data.  We call this
 253  * the "vlb_sync" sequence, which consists of three successive reads
 254  * of the sector count register location, with interrupts disabled
 255  * to ensure that the reads all happen together.
 256  */
 257 static void ata_vlb_sync(unsigned long port)
 258 {
 259         (void)inb(port);
 260         (void)inb(port);
 261         (void)inb(port);
 262 }
 263
 264 /*
 265  * This is used for most PIO data transfers *from* the IDE interface
 266  *
 267  * These routines will round up any request for an odd number of bytes,
 268  * so if an odd len is specified, be sure that there's at least one
 269  * extra byte allocated for the buffer.
 270  */
 271 static void ata_input_data(ide_drive_t *drive, struct request *rq,
 272                            void *buf, unsigned int len)
 273 {
 274         ide_hwif_t *hwif = drive->hwif;
 275         struct ide_io_ports *io_ports = &hwif->io_ports;
 276         unsigned long data_addr = io_ports->data_addr;
 277         u8 io_32bit = drive->io_32bit;
 278         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 279
 280         len++;
 281
 282         if (io_32bit) {
 283                 unsigned long uninitialized_var(flags);
 284
 285                 if ((io_32bit & 2) && !mmio) {
 286                         local_irq_save(flags);
 287                         ata_vlb_sync(io_ports->nsect_addr);
 288                 }
 289
 290                 if (mmio)
 291                         __ide_mm_insl((void __iomem *)data_addr, buf, len / 4);
 292                 else
 293                         insl(data_addr, buf, len / 4);
 294
 295                 if ((io_32bit & 2) && !mmio)
 296                         local_irq_restore(flags);
 297
 298                 if ((len & 3) >= 2) {
 299                         if (mmio)
 300                                 __ide_mm_insw((void __iomem *)data_addr,
 301                                                 (u8 *)buf + (len & ~3), 1);
 302                         else
 303                                 insw(data_addr, (u8 *)buf + (len & ~3), 1);
 304                 }
 305         } else {
 306                 if (mmio)
 307                         __ide_mm_insw((void __iomem *)data_addr, buf, len / 2);
 308                 else
 309                         insw(data_addr, buf, len / 2);
 310         }
 311 }
 312
 313 /*
 314  * This is used for most PIO data transfers *to* the IDE interface
 315  */
 316 static void ata_output_data(ide_drive_t *drive, struct request *rq,
 317                             void *buf, unsigned int len)
 318 {
 319         ide_hwif_t *hwif = drive->hwif;
 320         struct ide_io_ports *io_ports = &hwif->io_ports;
 321         unsigned long data_addr = io_ports->data_addr;
 322         u8 io_32bit = drive->io_32bit;
 323         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 324
 325         if (io_32bit) {
 326                 unsigned long uninitialized_var(flags);
 327
 328                 if ((io_32bit & 2) && !mmio) {
 329                         local_irq_save(flags);
 330                         ata_vlb_sync(io_ports->nsect_addr);
 331                 }
 332
 333                 if (mmio)
 334                         __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4);
 335                 else
 336                         outsl(data_addr, buf, len / 4);
 337
 338                 if ((io_32bit & 2) && !mmio)
 339                         local_irq_restore(flags);
 340
 341                 if ((len & 3) >= 2) {
 342                         if (mmio)
 343                                 __ide_mm_outsw((void __iomem *)data_addr,
 344                                                  (u8 *)buf + (len & ~3), 1);
 345                         else
 346                                 outsw(data_addr, (u8 *)buf + (len & ~3), 1);
 347                 }
 348         } else {
 349                 if (mmio)
 350                         __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2);
 351                 else
 352                         outsw(data_addr, buf, len / 2);
 353         }
 354 }
 355
 356 void default_hwif_transport(ide_hwif_t *hwif)
 357 {
 358         hwif->exec_command        = ide_exec_command;
 359         hwif->read_status         = ide_read_status;
 360         hwif->read_altstatus      = ide_read_altstatus;
 361         hwif->read_sff_dma_status = ide_read_sff_dma_status;
 362
 363         hwif->tf_load     = ide_tf_load;
 364         hwif->tf_read     = ide_tf_read;
 365
 366         hwif->input_data  = ata_input_data;
 367         hwif->output_data = ata_output_data;
 368 }
 369
 370 void ide_fix_driveid (struct hd_driveid *id)
 371 {
 372 #ifndef __LITTLE_ENDIAN
 373 # ifdef __BIG_ENDIAN
 374         int i;
 375         u16 *stringcast;
 376
 377         id->config         = __le16_to_cpu(id->config);
 378         id->cyls           = __le16_to_cpu(id->cyls);
 379         id->reserved2      = __le16_to_cpu(id->reserved2);
 380         id->heads          = __le16_to_cpu(id->heads);
 381         id->track_bytes    = __le16_to_cpu(id->track_bytes);
 382         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
 383         id->sectors        = __le16_to_cpu(id->sectors);
 384         id->vendor0        = __le16_to_cpu(id->vendor0);
 385         id->vendor1        = __le16_to_cpu(id->vendor1);
 386         id->vendor2        = __le16_to_cpu(id->vendor2);
 387         stringcast = (u16 *)&id->serial_no[0];
 388         for (i = 0; i < (20/2); i++)
 389                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 390         id->buf_type       = __le16_to_cpu(id->buf_type);
 391         id->buf_size       = __le16_to_cpu(id->buf_size);
 392         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
 393         stringcast = (u16 *)&id->fw_rev[0];
 394         for (i = 0; i < (8/2); i++)
 395                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 396         stringcast = (u16 *)&id->model[0];
 397         for (i = 0; i < (40/2); i++)
 398                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 399         id->dword_io       = __le16_to_cpu(id->dword_io);
 400         id->reserved50     = __le16_to_cpu(id->reserved50);
 401         id->field_valid    = __le16_to_cpu(id->field_valid);
 402         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
 403         id->cur_heads      = __le16_to_cpu(id->cur_heads);
 404         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
 405         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
 406         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
 407         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
 408         id->dma_1word      = __le16_to_cpu(id->dma_1word);
 409         id->dma_mword      = __le16_to_cpu(id->dma_mword);
 410         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
 411         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
 412         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
 413         id->eide_pio       = __le16_to_cpu(id->eide_pio);
 414         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
 415         for (i = 0; i < 2; ++i)
 416                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
 417         for (i = 0; i < 4; ++i)
 418                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
 419         id->queue_depth    = __le16_to_cpu(id->queue_depth);
 420         for (i = 0; i < 4; ++i)
 421                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
 422         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
 423         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
 424         id->command_set_1  = __le16_to_cpu(id->command_set_1);
 425         id->command_set_2  = __le16_to_cpu(id->command_set_2);
 426         id->cfsse          = __le16_to_cpu(id->cfsse);
 427         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
 428         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
 429         id->csf_default    = __le16_to_cpu(id->csf_default);
 430         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
 431         id->trseuc         = __le16_to_cpu(id->trseuc);
 432         id->trsEuc         = __le16_to_cpu(id->trsEuc);
 433         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
 434         id->mprc           = __le16_to_cpu(id->mprc);
 435         id->hw_config      = __le16_to_cpu(id->hw_config);
 436         id->acoustic       = __le16_to_cpu(id->acoustic);
 437         id->msrqs          = __le16_to_cpu(id->msrqs);
 438         id->sxfert         = __le16_to_cpu(id->sxfert);
 439         id->sal            = __le16_to_cpu(id->sal);
 440         id->spg            = __le32_to_cpu(id->spg);
 441         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
 442         for (i = 0; i < 22; i++)
 443                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
 444         id->last_lun       = __le16_to_cpu(id->last_lun);
 445         id->word127        = __le16_to_cpu(id->word127);
 446         id->dlf            = __le16_to_cpu(id->dlf);
 447         id->csfo           = __le16_to_cpu(id->csfo);
 448         for (i = 0; i < 26; i++)
 449                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
 450         id->word156        = __le16_to_cpu(id->word156);
 451         for (i = 0; i < 3; i++)
 452                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
 453         id->cfa_power      = __le16_to_cpu(id->cfa_power);
 454         for (i = 0; i < 14; i++)
 455                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
 456         for (i = 0; i < 31; i++)
 457                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
 458         for (i = 0; i < 48; i++)
 459                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
 460         id->integrity_word  = __le16_to_cpu(id->integrity_word);
 461 # else
 462 #  error "Please fix <asm/byteorder.h>"
 463 # endif
 464 #endif
 465 }
 466
 467 /*
 468  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
 469  * removing leading/trailing blanks and compressing internal blanks.
 470  * It is primarily used to tidy up the model name/number fields as
 471  * returned by the WIN_[P]IDENTIFY commands.
 472  */
 473
 474 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
 475 {
 476         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
 477
 478         if (byteswap) {
 479                 /* convert from big-endian to host byte order */
 480                 for (p = end ; p != s;) {
 481                         unsigned short *pp = (unsigned short *) (p -= 2);
 482                         *pp = ntohs(*pp);
 483                 }
 484         }
 485         /* strip leading blanks */
 486         while (s != end && *s == ' ')
 487                 ++s;
 488         /* compress internal blanks and strip trailing blanks */
 489         while (s != end && *s) {
 490                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
 491                         *p++ = *(s-1);
 492         }
 493         /* wipe out trailing garbage */
 494         while (p != end)
 495                 *p++ = '\0';
 496 }
 497
 498 EXPORT_SYMBOL(ide_fixstring);
 499
 500 /*
 501  * Needed for PCI irq sharing
 502  */
 503 int drive_is_ready (ide_drive_t *drive)
 504 {
 505         ide_hwif_t *hwif        = HWIF(drive);
 506         u8 stat                 = 0;
 507
 508         if (drive->waiting_for_dma)
 509                 return hwif->dma_ops->dma_test_irq(drive);
 510
 511 #if 0
 512         /* need to guarantee 400ns since last command was issued */
 513         udelay(1);
 514 #endif
 515
 516         /*
 517          * We do a passive status test under shared PCI interrupts on
 518          * cards that truly share the ATA side interrupt, but may also share
 519          * an interrupt with another pci card/device.  We make no assumptions
 520          * about possible isa-pnp and pci-pnp issues yet.
 521          */
 522         if (hwif->io_ports.ctl_addr)
 523                 stat = hwif->read_altstatus(hwif);
 524         else
 525                 /* Note: this may clear a pending IRQ!! */
 526                 stat = hwif->read_status(hwif);
 527
 528         if (stat & BUSY_STAT)
 529                 /* drive busy:  definitely not interrupting */
 530                 return 0;
 531
 532         /* drive ready: *might* be interrupting */
 533         return 1;
 534 }
 535
 536 EXPORT_SYMBOL(drive_is_ready);
 537
 538 /*
 539  * This routine busy-waits for the drive status to be not "busy".
 540  * It then checks the status for all of the "good" bits and none
 541  * of the "bad" bits, and if all is okay it returns 0.  All other
 542  * cases return error -- caller may then invoke ide_error().
 543  *
 544  * This routine should get fixed to not hog the cpu during extra long waits..
 545  * That could be done by busy-waiting for the first jiffy or two, and then
 546  * setting a timer to wake up at half second intervals thereafter,
 547  * until timeout is achieved, before timing out.
 548  */
 549 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
 550 {
 551         ide_hwif_t *hwif = drive->hwif;
 552         unsigned long flags;
 553         int i;
 554         u8 stat;
 555
 556         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
 557         stat = hwif->read_status(hwif);
 558
 559         if (stat & BUSY_STAT) {
 560                 local_irq_set(flags);
 561                 timeout += jiffies;
 562                 while ((stat = hwif->read_status(hwif)) & BUSY_STAT) {
 563                         if (time_after(jiffies, timeout)) {
 564                                 /*
 565                                  * One last read after the timeout in case
 566                                  * heavy interrupt load made us not make any
 567                                  * progress during the timeout..
 568                                  */
 569                                 stat = hwif->read_status(hwif);
 570                                 if (!(stat & BUSY_STAT))
 571                                         break;
 572
 573                                 local_irq_restore(flags);
 574                                 *rstat = stat;
 575                                 return -EBUSY;
 576                         }
 577                 }
 578                 local_irq_restore(flags);
 579         }
 580         /*
 581          * Allow status to settle, then read it again.
 582          * A few rare drives vastly violate the 400ns spec here,
 583          * so we'll wait up to 10usec for a "good" status
 584          * rather than expensively fail things immediately.
 585          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 586          */
 587         for (i = 0; i < 10; i++) {
 588                 udelay(1);
 589                 stat = hwif->read_status(hwif);
 590
 591                 if (OK_STAT(stat, good, bad)) {
 592                         *rstat = stat;
 593                         return 0;
 594                 }
 595         }
 596         *rstat = stat;
 597         return -EFAULT;
 598 }
 599
 600 /*
 601  * In case of error returns error value after doing "*startstop = ide_error()".
 602  * The caller should return the updated value of "startstop" in this case,
 603  * "startstop" is unchanged when the function returns 0.
 604  */
 605 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
 606 {
 607         int err;
 608         u8 stat;
 609
 610         /* bail early if we've exceeded max_failures */
 611         if (drive->max_failures && (drive->failures > drive->max_failures)) {
 612                 *startstop = ide_stopped;
 613                 return 1;
 614         }
 615
 616         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
 617
 618         if (err) {
 619                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
 620                 *startstop = ide_error(drive, s, stat);
 621         }
 622
 623         return err;
 624 }
 625
 626 EXPORT_SYMBOL(ide_wait_stat);
 627
 628 /**
 629  *      ide_in_drive_list       -       look for drive in black/white list
 630  *      @id: drive identifier
 631  *      @drive_table: list to inspect
 632  *
 633  *      Look for a drive in the blacklist and the whitelist tables
 634  *      Returns 1 if the drive is found in the table.
 635  */
 636
 637 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
 638 {
 639         for ( ; drive_table->id_model; drive_table++)
 640                 if ((!strcmp(drive_table->id_model, id->model)) &&
 641                     (!drive_table->id_firmware ||
 642                      strstr(id->fw_rev, drive_table->id_firmware)))
 643                         return 1;
 644         return 0;
 645 }
 646
 647 EXPORT_SYMBOL_GPL(ide_in_drive_list);
 648
 649 /*
 650  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
 651  * We list them here and depend on the device side cable detection for them.
 652  *
 653  * Some optical devices with the buggy firmwares have the same problem.
 654  */
 655 static const struct drive_list_entry ivb_list[] = {
 656         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
 657         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
 658         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
 659         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
 660         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
 661         { "TSSTcorp CDDVDW SH-S202H"    , "SB00"        },
 662         { "TSSTcorp CDDVDW SH-S202H"    , "SB01"        },
 663         { NULL                          , NULL          }
 664 };
 665
 666 /*
 667  *  All hosts that use the 80c ribbon must use!
 668  *  The name is derived from upper byte of word 93 and the 80c ribbon.
 669  */
 670 u8 eighty_ninty_three (ide_drive_t *drive)
 671 {
 672         ide_hwif_t *hwif = drive->hwif;
 673         struct hd_driveid *id = drive->id;
 674         int ivb = ide_in_drive_list(id, ivb_list);
 675
 676         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
 677                 return 1;
 678
 679         if (ivb)
 680                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
 681                                   drive->name);
 682
 683         if (ide_dev_is_sata(id) && !ivb)
 684                 return 1;
 685
 686         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
 687                 goto no_80w;
 688
 689         /*
 690          * FIXME:
 691          * - change master/slave IDENTIFY order
 692          * - force bit13 (80c cable present) check also for !ivb devices
 693          *   (unless the slave device is pre-ATA3)
 694          */
 695         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
 696                 return 1;
 697
 698 no_80w:
 699         if (drive->udma33_warned == 1)
 700                 return 0;
 701
 702         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
 703                             "limiting max speed to UDMA33\n",
 704                             drive->name,
 705                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
 706
 707         drive->udma33_warned = 1;
 708
 709         return 0;
 710 }
 711
 712 int ide_driveid_update(ide_drive_t *drive)
 713 {
 714         ide_hwif_t *hwif = drive->hwif;
 715         struct hd_driveid *id;
 716         unsigned long timeout, flags;
 717         u8 stat;
 718
 719         /*
 720          * Re-read drive->id for possible DMA mode
 721          * change (copied from ide-probe.c)
 722          */
 723
 724         SELECT_MASK(drive, 1);
 725         ide_set_irq(drive, 0);
 726         msleep(50);
 727         hwif->exec_command(hwif, WIN_IDENTIFY);
 728         timeout = jiffies + WAIT_WORSTCASE;
 729         do {
 730                 if (time_after(jiffies, timeout)) {
 731                         SELECT_MASK(drive, 0);
 732                         return 0;       /* drive timed-out */
 733                 }
 734
 735                 msleep(50);     /* give drive a breather */
 736                 stat = hwif->read_altstatus(hwif);
 737         } while (stat & BUSY_STAT);
 738
 739         msleep(50);     /* wait for IRQ and DRQ_STAT */
 740         stat = hwif->read_status(hwif);
 741
 742         if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) {
 743                 SELECT_MASK(drive, 0);
 744                 printk("%s: CHECK for good STATUS\n", drive->name);
 745                 return 0;
 746         }
 747         local_irq_save(flags);
 748         SELECT_MASK(drive, 0);
 749         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 750         if (!id) {
 751                 local_irq_restore(flags);
 752                 return 0;
 753         }
 754         hwif->input_data(drive, NULL, id, SECTOR_SIZE);
 755         (void)hwif->read_status(hwif);  /* clear drive IRQ */
 756         local_irq_enable();
 757         local_irq_restore(flags);
 758         ide_fix_driveid(id);
 759         if (id) {
 760                 drive->id->dma_ultra = id->dma_ultra;
 761                 drive->id->dma_mword = id->dma_mword;
 762                 drive->id->dma_1word = id->dma_1word;
 763                 /* anything more ? */
 764                 kfree(id);
 765
 766                 if (drive->using_dma && ide_id_dma_bug(drive))
 767                         ide_dma_off(drive);
 768         }
 769
 770         return 1;
 771 }
 772
 773 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
 774 {
 775         ide_hwif_t *hwif = drive->hwif;
 776         struct ide_io_ports *io_ports = &hwif->io_ports;
 777         int error = 0;
 778         u8 stat;
 779
 780 #ifdef CONFIG_BLK_DEV_IDEDMA
 781         if (hwif->dma_ops)      /* check if host supports DMA */
 782                 hwif->dma_ops->dma_host_set(drive, 0);
 783 #endif
 784
 785         /* Skip setting PIO flow-control modes on pre-EIDE drives */
 786         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
 787                 goto skip;
 788
 789         /*
 790          * Don't use ide_wait_cmd here - it will
 791          * attempt to set_geometry and recalibrate,
 792          * but for some reason these don't work at
 793          * this point (lost interrupt).
 794          */
 795         /*
 796          * Select the drive, and issue the SETFEATURES command
 797          */
 798         disable_irq_nosync(hwif->irq);
 799
 800         /*
 801          *      FIXME: we race against the running IRQ here if
 802          *      this is called from non IRQ context. If we use
 803          *      disable_irq() we hang on the error path. Work
 804          *      is needed.
 805          */
 806
 807         udelay(1);
 808         SELECT_DRIVE(drive);
 809         SELECT_MASK(drive, 0);
 810         udelay(1);
 811         ide_set_irq(drive, 0);
 812         hwif->OUTB(speed, io_ports->nsect_addr);
 813         hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr);
 814         hwif->exec_command(hwif, WIN_SETFEATURES);
 815         if (drive->quirk_list == 2)
 816                 ide_set_irq(drive, 1);
 817
 818         error = __ide_wait_stat(drive, drive->ready_stat,
 819                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
 820                                 WAIT_CMD, &stat);
 821
 822         SELECT_MASK(drive, 0);
 823
 824         enable_irq(hwif->irq);
 825
 826         if (error) {
 827                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
 828                 return error;
 829         }
 830
 831         drive->id->dma_ultra &= ~0xFF00;
 832         drive->id->dma_mword &= ~0x0F00;
 833         drive->id->dma_1word &= ~0x0F00;
 834
 835  skip:
 836 #ifdef CONFIG_BLK_DEV_IDEDMA
 837         if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
 838             drive->using_dma)
 839                 hwif->dma_ops->dma_host_set(drive, 1);
 840         else if (hwif->dma_ops) /* check if host supports DMA */
 841                 ide_dma_off_quietly(drive);
 842 #endif
 843
 844         switch(speed) {
 845                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
 846                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
 847                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
 848                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
 849                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
 850                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
 851                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
 852                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
 853                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
 854                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
 855                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
 856                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
 857                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
 858                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
 859                 default: break;
 860         }
 861         if (!drive->init_speed)
 862                 drive->init_speed = speed;
 863         drive->current_speed = speed;
 864         return error;
 865 }
 866
 867 /*
 868  * This should get invoked any time we exit the driver to
 869  * wait for an interrupt response from a drive.  handler() points
 870  * at the appropriate code to handle the next interrupt, and a
 871  * timer is started to prevent us from waiting forever in case
 872  * something goes wrong (see the ide_timer_expiry() handler later on).
 873  *
 874  * See also ide_execute_command
 875  */
 876 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 877                       unsigned int timeout, ide_expiry_t *expiry)
 878 {
 879         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 880
 881         BUG_ON(hwgroup->handler);
 882         hwgroup->handler        = handler;
 883         hwgroup->expiry         = expiry;
 884         hwgroup->timer.expires  = jiffies + timeout;
 885         hwgroup->req_gen_timer  = hwgroup->req_gen;
 886         add_timer(&hwgroup->timer);
 887 }
 888
 889 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 890                       unsigned int timeout, ide_expiry_t *expiry)
 891 {
 892         unsigned long flags;
 893         spin_lock_irqsave(&ide_lock, flags);
 894         __ide_set_handler(drive, handler, timeout, expiry);
 895         spin_unlock_irqrestore(&ide_lock, flags);
 896 }
 897
 898 EXPORT_SYMBOL(ide_set_handler);
 899
 900 /**
 901  *      ide_execute_command     -       execute an IDE command
 902  *      @drive: IDE drive to issue the command against
 903  *      @command: command byte to write
 904  *      @handler: handler for next phase
 905  *      @timeout: timeout for command
 906  *      @expiry:  handler to run on timeout
 907  *
 908  *      Helper function to issue an IDE command. This handles the
 909  *      atomicity requirements, command timing and ensures that the
 910  *      handler and IRQ setup do not race. All IDE command kick off
 911  *      should go via this function or do equivalent locking.
 912  */
 913
 914 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
 915                          unsigned timeout, ide_expiry_t *expiry)
 916 {
 917         unsigned long flags;
 918         ide_hwif_t *hwif = HWIF(drive);
 919
 920         spin_lock_irqsave(&ide_lock, flags);
 921         __ide_set_handler(drive, handler, timeout, expiry);
 922         hwif->exec_command(hwif, cmd);
 923         /*
 924          * Drive takes 400nS to respond, we must avoid the IRQ being
 925          * serviced before that.
 926          *
 927          * FIXME: we could skip this delay with care on non shared devices
 928          */
 929         ndelay(400);
 930         spin_unlock_irqrestore(&ide_lock, flags);
 931 }
 932 EXPORT_SYMBOL(ide_execute_command);
 933
 934 void ide_execute_pkt_cmd(ide_drive_t *drive)
 935 {
 936         ide_hwif_t *hwif = drive->hwif;
 937         unsigned long flags;
 938
 939         spin_lock_irqsave(&ide_lock, flags);
 940         hwif->exec_command(hwif, WIN_PACKETCMD);
 941         ndelay(400);
 942         spin_unlock_irqrestore(&ide_lock, flags);
 943 }
 944 EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd);
 945
 946 static inline void ide_complete_drive_reset(ide_drive_t *drive, int err)
 947 {
 948         struct request *rq = drive->hwif->hwgroup->rq;
 949
 950         if (rq && blk_special_request(rq) && rq->cmd[0] == REQ_DRIVE_RESET)
 951                 ide_end_request(drive, err ? err : 1, 0);
 952 }
 953
 954 /* needed below */
 955 static ide_startstop_t do_reset1 (ide_drive_t *, int);
 956
 957 /*
 958  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 959  * during an atapi drive reset operation. If the drive has not yet responded,
 960  * and we have not yet hit our maximum waiting time, then the timer is restarted
 961  * for another 50ms.
 962  */
 963 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
 964 {
 965         ide_hwif_t *hwif = drive->hwif;
 966         ide_hwgroup_t *hwgroup = hwif->hwgroup;
 967         u8 stat;
 968
 969         SELECT_DRIVE(drive);
 970         udelay (10);
 971         stat = hwif->read_status(hwif);
 972
 973         if (OK_STAT(stat, 0, BUSY_STAT))
 974                 printk("%s: ATAPI reset complete\n", drive->name);
 975         else {
 976                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 977                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
 978                         /* continue polling */
 979                         return ide_started;
 980                 }
 981                 /* end of polling */
 982                 hwgroup->polling = 0;
 983                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
 984                                 drive->name, stat);
 985                 /* do it the old fashioned way */
 986                 return do_reset1(drive, 1);
 987         }
 988         /* done polling */
 989         hwgroup->polling = 0;
 990         ide_complete_drive_reset(drive, 0);
 991         return ide_stopped;
 992 }
 993
 994 /*
 995  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 996  * during an ide reset operation. If the drives have not yet responded,
 997  * and we have not yet hit our maximum waiting time, then the timer is restarted
 998  * for another 50ms.
 999  */
1000 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1001 {
1002         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
1003         ide_hwif_t *hwif        = HWIF(drive);
1004         const struct ide_port_ops *port_ops = hwif->port_ops;
1005         u8 tmp;
1006         int err = 0;
1007
1008         if (port_ops && port_ops->reset_poll) {
1009                 err = port_ops->reset_poll(drive);
1010                 if (err) {
1011                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1012                                 hwif->name, drive->name);
1013                         goto out;
1014                 }
1015         }
1016
1017         tmp = hwif->read_status(hwif);
1018
1019         if (!OK_STAT(tmp, 0, BUSY_STAT)) {
1020                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1021                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1022                         /* continue polling */
1023                         return ide_started;
1024                 }
1025                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1026                 drive->failures++;
1027                 err = -EIO;
1028         } else  {
1029                 printk("%s: reset: ", hwif->name);
1030                 tmp = ide_read_error(drive);
1031
1032                 if (tmp == 1) {
1033                         printk("success\n");
1034                         drive->failures = 0;
1035                 } else {
1036                         drive->failures++;
1037                         printk("master: ");
1038                         switch (tmp & 0x7f) {
1039                                 case 1: printk("passed");
1040                                         break;
1041                                 case 2: printk("formatter device error");
1042                                         break;
1043                                 case 3: printk("sector buffer error");
1044                                         break;
1045                                 case 4: printk("ECC circuitry error");
1046                                         break;
1047                                 case 5: printk("controlling MPU error");
1048                                         break;
1049                                 default:printk("error (0x%02x?)", tmp);
1050                         }
1051                         if (tmp & 0x80)
1052                                 printk("; slave: failed");
1053                         printk("\n");
1054                         err = -EIO;
1055                 }
1056         }
1057 out:
1058         hwgroup->polling = 0;   /* done polling */
1059         ide_complete_drive_reset(drive, err);
1060         return ide_stopped;
1061 }
1062
1063 static void ide_disk_pre_reset(ide_drive_t *drive)
1064 {
1065         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1066
1067         drive->special.all = 0;
1068         drive->special.b.set_geometry = legacy;
1069         drive->special.b.recalibrate  = legacy;
1070         drive->mult_count = 0;
1071         if (!drive->keep_settings && !drive->using_dma)
1072                 drive->mult_req = 0;
1073         if (drive->mult_req != drive->mult_count)
1074                 drive->special.b.set_multmode = 1;
1075 }
1076
1077 static void pre_reset(ide_drive_t *drive)
1078 {
1079         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
1080
1081         if (drive->media == ide_disk)
1082                 ide_disk_pre_reset(drive);
1083         else
1084                 drive->post_reset = 1;
1085
1086         if (drive->using_dma) {
1087                 if (drive->crc_count)
1088                         ide_check_dma_crc(drive);
1089                 else
1090                         ide_dma_off(drive);
1091         }
1092
1093         if (!drive->keep_settings) {
1094                 if (!drive->using_dma) {
1095                         drive->unmask = 0;
1096                         drive->io_32bit = 0;
1097                 }
1098                 return;
1099         }
1100
1101         if (port_ops && port_ops->pre_reset)
1102                 port_ops->pre_reset(drive);
1103
1104         if (drive->current_speed != 0xff)
1105                 drive->desired_speed = drive->current_speed;
1106         drive->current_speed = 0xff;
1107 }
1108
1109 /*
1110  * do_reset1() attempts to recover a confused drive by resetting it.
1111  * Unfortunately, resetting a disk drive actually resets all devices on
1112  * the same interface, so it can really be thought of as resetting the
1113  * interface rather than resetting the drive.
1114  *
1115  * ATAPI devices have their own reset mechanism which allows them to be
1116  * individually reset without clobbering other devices on the same interface.
1117  *
1118  * Unfortunately, the IDE interface does not generate an interrupt to let
1119  * us know when the reset operation has finished, so we must poll for this.
1120  * Equally poor, though, is the fact that this may a very long time to complete,
1121  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1122  * we set a timer to poll at 50ms intervals.
1123  */
1124 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1125 {
1126         unsigned int unit;
1127         unsigned long flags;
1128         ide_hwif_t *hwif;
1129         ide_hwgroup_t *hwgroup;
1130         struct ide_io_ports *io_ports;
1131         const struct ide_port_ops *port_ops;
1132         u8 ctl;
1133
1134         spin_lock_irqsave(&ide_lock, flags);
1135         hwif = HWIF(drive);
1136         hwgroup = HWGROUP(drive);
1137
1138         io_ports = &hwif->io_ports;
1139
1140         /* We must not reset with running handlers */
1141         BUG_ON(hwgroup->handler != NULL);
1142
1143         /* For an ATAPI device, first try an ATAPI SRST. */
1144         if (drive->media != ide_disk && !do_not_try_atapi) {
1145                 pre_reset(drive);
1146                 SELECT_DRIVE(drive);
1147                 udelay (20);
1148                 hwif->exec_command(hwif, WIN_SRST);
1149                 ndelay(400);
1150                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1151                 hwgroup->polling = 1;
1152                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1153                 spin_unlock_irqrestore(&ide_lock, flags);
1154                 return ide_started;
1155         }
1156
1157         /*
1158          * First, reset any device state data we were maintaining
1159          * for any of the drives on this interface.
1160          */
1161         for (unit = 0; unit < MAX_DRIVES; ++unit)
1162                 pre_reset(&hwif->drives[unit]);
1163
1164         if (io_ports->ctl_addr == 0) {
1165                 spin_unlock_irqrestore(&ide_lock, flags);
1166                 ide_complete_drive_reset(drive, -ENXIO);
1167                 return ide_stopped;
1168         }
1169
1170         /*
1171          * Note that we also set nIEN while resetting the device,
1172          * to mask unwanted interrupts from the interface during the reset.
1173          * However, due to the design of PC hardware, this will cause an
1174          * immediate interrupt due to the edge transition it produces.
1175          * This single interrupt gives us a "fast poll" for drives that
1176          * recover from reset very quickly, saving us the first 50ms wait time.
1177          */
1178         /* set SRST and nIEN */
1179         hwif->OUTBSYNC(hwif, ATA_DEVCTL_OBS | 6, io_ports->ctl_addr);
1180         /* more than enough time */
1181         udelay(10);
1182         if (drive->quirk_list == 2)
1183                 ctl = ATA_DEVCTL_OBS;           /* clear SRST and nIEN */
1184         else
1185                 ctl = ATA_DEVCTL_OBS | 2;       /* clear SRST, leave nIEN */
1186         hwif->OUTBSYNC(hwif, ctl, io_ports->ctl_addr);
1187         /* more than enough time */
1188         udelay(10);
1189         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1190         hwgroup->polling = 1;
1191         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1192
1193         /*
1194          * Some weird controller like resetting themselves to a strange
1195          * state when the disks are reset this way. At least, the Winbond
1196          * 553 documentation says that
1197          */
1198         port_ops = hwif->port_ops;
1199         if (port_ops && port_ops->resetproc)
1200                 port_ops->resetproc(drive);
1201
1202         spin_unlock_irqrestore(&ide_lock, flags);
1203         return ide_started;
1204 }
1205
1206 /*
1207  * ide_do_reset() is the entry point to the drive/interface reset code.
1208  */
1209
1210 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1211 {
1212         return do_reset1(drive, 0);
1213 }
1214
1215 EXPORT_SYMBOL(ide_do_reset);
1216
1217 /*
1218  * ide_wait_not_busy() waits for the currently selected device on the hwif
1219  * to report a non-busy status, see comments in ide_probe_port().
1220  */
1221 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1222 {
1223         u8 stat = 0;
1224
1225         while(timeout--) {
1226                 /*
1227                  * Turn this into a schedule() sleep once I'm sure
1228                  * about locking issues (2.5 work ?).
1229                  */
1230                 mdelay(1);
1231                 stat = hwif->read_status(hwif);
1232                 if ((stat & BUSY_STAT) == 0)
1233                         return 0;
1234                 /*
1235                  * Assume a value of 0xff means nothing is connected to
1236                  * the interface and it doesn't implement the pull-down
1237                  * resistor on D7.
1238                  */
1239                 if (stat == 0xff)
1240                         return -ENODEV;
1241                 touch_softlockup_watchdog();
1242                 touch_nmi_watchdog();
1243         }
1244         return -EBUSY;
1245 }
1246
1247 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1248