2 * generic/default IDE host driver
4 * Copyright (C) 2004, 2008-2009 Bartlomiej Zolnierkiewicz
5 * This code was split off from ide.c. See it for original copyrights.
7 * May be copied or modified under the terms of the GNU General Public License.
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/ide.h>
14 #include <linux/pci_ids.h>
16 /* FIXME: convert m32r to use ide_platform host driver */
21 #define DRV_NAME "ide_generic"
23 static int probe_mask;
24 module_param(probe_mask, int, 0);
25 MODULE_PARM_DESC(probe_mask, "probe mask for legacy ISA IDE ports");
27 static const struct ide_port_info ide_generic_port_info = {
28 .host_flags = IDE_HFLAG_NO_DMA,
31 #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) \
32 || defined(CONFIG_PLAT_OPSPUT)
33 static const u16 legacy_bases[] = { 0x1f0 };
34 static const int legacy_irqs[] = { PLD_IRQ_CFIREQ };
35 #elif defined(CONFIG_PLAT_MAPPI3)
36 static const u16 legacy_bases[] = { 0x1f0, 0x170 };
37 static const int legacy_irqs[] = { PLD_IRQ_CFIREQ, PLD_IRQ_IDEIREQ };
38 #elif defined(CONFIG_ALPHA)
39 static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168 };
40 static const int legacy_irqs[] = { 14, 15, 11, 10 };
42 static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
43 static const int legacy_irqs[] = { 14, 15, 11, 10, 8, 12 };
46 static void ide_generic_check_pci_legacy_iobases(int *primary, int *secondary)
48 struct pci_dev *p = NULL;
53 if (pci_resource_start(p, 0) == 0x1f0)
55 if (pci_resource_start(p, 2) == 0x170)
58 /* Cyrix CS55{1,2}0 pre SFF MWDMA ATA on the bridge */
59 if (p->vendor == PCI_VENDOR_ID_CYRIX &&
60 (p->device == PCI_DEVICE_ID_CYRIX_5510 ||
61 p->device == PCI_DEVICE_ID_CYRIX_5520))
62 *primary = *secondary = 1;
64 /* Intel MPIIX - PIO ATA on non PCI side of bridge */
65 if (p->vendor == PCI_VENDOR_ID_INTEL &&
66 p->device == PCI_DEVICE_ID_INTEL_82371MX) {
68 pci_read_config_word(p, 0x6C, &val);
70 /* ATA port enabled */
80 static int __init ide_generic_init(void)
82 hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
83 unsigned long io_addr;
84 int i, rc = 0, primary = 0, secondary = 0;
86 ide_generic_check_pci_legacy_iobases(&primary, &secondary);
89 printk(KERN_INFO DRV_NAME ": please use \"probe_mask=0x3f\" "
90 "module parameter for probing all legacy ISA IDE ports\n");
98 printk(KERN_INFO DRV_NAME ": enforcing probing of I/O ports "
99 "upon user request\n");
101 for (i = 0; i < ARRAY_SIZE(legacy_bases); i++) {
102 io_addr = legacy_bases[i];
104 if ((probe_mask & (1 << i)) && io_addr) {
105 if (!request_region(io_addr, 8, DRV_NAME)) {
106 printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX "
108 DRV_NAME, io_addr, io_addr + 7);
112 if (!request_region(io_addr + 0x206, 1, DRV_NAME)) {
113 printk(KERN_ERR "%s: I/O resource 0x%lX "
115 DRV_NAME, io_addr + 0x206);
116 release_region(io_addr, 8);
120 memset(&hw, 0, sizeof(hw));
121 ide_std_init_ports(&hw, io_addr, io_addr + 0x206);
123 hw.irq = isa_irq_to_vector(legacy_irqs[i]);
125 hw.irq = legacy_irqs[i];
127 hw.chipset = ide_generic;
129 rc = ide_host_add(&ide_generic_port_info, hws, NULL);
131 release_region(io_addr + 0x206, 1);
132 release_region(io_addr, 8);
140 module_init(ide_generic_init);
142 MODULE_LICENSE("GPL");