2 * Provides I2C support for Philips PNX010x/PNX4008 boards.
4 * Authors: Dennis Kovalev <dkovalev@ru.mvista.com>
5 * Vitaly Wool <vwool@ru.mvista.com>
7 * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/ioport.h>
16 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/timer.h>
19 #include <linux/completion.h>
20 #include <linux/platform_device.h>
21 #include <linux/i2c-pnx.h>
23 #include <linux/err.h>
24 #include <linux/clk.h>
26 #include <mach/hardware.h>
29 #include <asm/uaccess.h>
31 #define I2C_PNX_TIMEOUT 10 /* msec */
32 #define I2C_PNX_SPEED_KHZ 100
33 #define I2C_PNX_REGION_SIZE 0x100
35 static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
38 (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
42 return (timeout <= 0);
45 static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
48 (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
52 return (timeout <= 0);
55 static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
57 struct i2c_pnx_algo_data *data = adap->algo_data;
58 struct timer_list *timer = &data->mif.timer;
59 int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
64 del_timer_sync(timer);
66 dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n",
69 timer->expires = jiffies + expires;
70 timer->data = (unsigned long)adap;
76 * i2c_pnx_start - start a device
77 * @slave_addr: slave address
78 * @adap: pointer to adapter structure
80 * Generate a START signal in the desired mode.
82 static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
84 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
86 dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__,
87 slave_addr, alg_data->mif.mode);
89 /* Check for 7 bit slave addresses only */
90 if (slave_addr & ~0x7f) {
91 dev_err(&adap->dev, "%s: Invalid slave address %x. "
92 "Only 7-bit addresses are supported\n",
93 adap->name, slave_addr);
97 /* First, make sure bus is idle */
98 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
99 /* Somebody else is monopolizing the bus */
100 dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, "
101 "cntrl = %x, stat = %x\n",
102 adap->name, slave_addr,
103 ioread32(I2C_REG_CTL(alg_data)),
104 ioread32(I2C_REG_STS(alg_data)));
106 } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
107 /* Sorry, we lost the bus */
108 dev_err(&adap->dev, "%s: Arbitration failure. "
109 "Slave addr = %02x\n", adap->name, slave_addr);
114 * OK, I2C is enabled and we have the bus.
115 * Clear the current TDI and AFI status flags.
117 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
118 I2C_REG_STS(alg_data));
120 dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__,
121 (slave_addr << 1) | start_bit | alg_data->mif.mode);
123 /* Write the slave address, START bit and R/W bit */
124 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
125 I2C_REG_TX(alg_data));
127 dev_dbg(&adap->dev, "%s(): exit\n", __func__);
133 * i2c_pnx_stop - stop a device
134 * @adap: pointer to I2C adapter structure
136 * Generate a STOP signal to terminate the master transaction.
138 static void i2c_pnx_stop(struct i2c_adapter *adap)
140 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
141 /* Only 1 msec max timeout due to interrupt context */
144 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
145 __func__, ioread32(I2C_REG_STS(alg_data)));
147 /* Write a STOP bit to TX FIFO */
148 iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
150 /* Wait until the STOP is seen. */
151 while (timeout > 0 &&
152 (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
153 /* may be called from interrupt context */
158 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
159 __func__, ioread32(I2C_REG_STS(alg_data)));
163 * i2c_pnx_master_xmit - transmit data to slave
164 * @adap: pointer to I2C adapter structure
166 * Sends one byte of data to the slave
168 static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
170 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
173 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
174 __func__, ioread32(I2C_REG_STS(alg_data)));
176 if (alg_data->mif.len > 0) {
177 /* We still have something to talk about... */
178 val = *alg_data->mif.buf++;
180 if (alg_data->mif.len == 1) {
187 iowrite32(val, I2C_REG_TX(alg_data));
189 dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__,
190 val, alg_data->mif.len + 1);
192 if (alg_data->mif.len == 0) {
193 if (alg_data->last) {
194 /* Wait until the STOP is seen. */
195 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
196 dev_err(&adap->dev, "The bus is still "
197 "active after timeout\n");
199 /* Disable master interrupts */
200 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
201 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
202 I2C_REG_CTL(alg_data));
204 del_timer_sync(&alg_data->mif.timer);
206 dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
209 complete(&alg_data->mif.complete);
211 } else if (alg_data->mif.len == 0) {
212 /* zero-sized transfer */
215 /* Disable master interrupts. */
216 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
217 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
218 I2C_REG_CTL(alg_data));
221 del_timer_sync(&alg_data->mif.timer);
222 dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
223 "zero-xfer.\n", __func__);
225 complete(&alg_data->mif.complete);
228 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
229 __func__, ioread32(I2C_REG_STS(alg_data)));
235 * i2c_pnx_master_rcv - receive data from slave
236 * @adap: pointer to I2C adapter structure
238 * Reads one byte data from the slave
240 static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
242 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
243 unsigned int val = 0;
246 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
247 __func__, ioread32(I2C_REG_STS(alg_data)));
249 /* Check, whether there is already data,
250 * or we didn't 'ask' for it yet.
252 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
253 dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
254 "Rx-fifo...\n", __func__);
256 if (alg_data->mif.len == 1) {
257 /* Last byte, do not acknowledge next rcv. */
263 * Enable interrupt RFDAIE (data in Rx fifo),
264 * and disable DRMIE (need data for Tx)
266 ctl = ioread32(I2C_REG_CTL(alg_data));
267 ctl |= mcntrl_rffie | mcntrl_daie;
268 ctl &= ~mcntrl_drmie;
269 iowrite32(ctl, I2C_REG_CTL(alg_data));
273 * Now we'll 'ask' for data:
274 * For each byte we want to receive, we must
275 * write a (dummy) byte to the Tx-FIFO.
277 iowrite32(val, I2C_REG_TX(alg_data));
283 if (alg_data->mif.len > 0) {
284 val = ioread32(I2C_REG_RX(alg_data));
285 *alg_data->mif.buf++ = (u8) (val & 0xff);
286 dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val,
290 if (alg_data->mif.len == 0) {
292 /* Wait until the STOP is seen. */
293 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
294 dev_err(&adap->dev, "The bus is still "
295 "active after timeout\n");
297 /* Disable master interrupts */
298 ctl = ioread32(I2C_REG_CTL(alg_data));
299 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
300 mcntrl_drmie | mcntrl_daie);
301 iowrite32(ctl, I2C_REG_CTL(alg_data));
304 del_timer_sync(&alg_data->mif.timer);
305 complete(&alg_data->mif.complete);
309 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
310 __func__, ioread32(I2C_REG_STS(alg_data)));
315 static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
318 struct i2c_adapter *adap = dev_id;
319 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
321 dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
323 ioread32(I2C_REG_STS(alg_data)),
324 ioread32(I2C_REG_CTL(alg_data)),
326 stat = ioread32(I2C_REG_STS(alg_data));
328 /* let's see what kind of event this is */
329 if (stat & mstatus_afi) {
330 /* We lost arbitration in the midst of a transfer */
331 alg_data->mif.ret = -EIO;
333 /* Disable master interrupts. */
334 ctl = ioread32(I2C_REG_CTL(alg_data));
335 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
337 iowrite32(ctl, I2C_REG_CTL(alg_data));
339 /* Stop timer, to prevent timeout. */
340 del_timer_sync(&alg_data->mif.timer);
341 complete(&alg_data->mif.complete);
342 } else if (stat & mstatus_nai) {
343 /* Slave did not acknowledge, generate a STOP */
344 dev_dbg(&adap->dev, "%s(): "
345 "Slave did not acknowledge, generating a STOP.\n",
349 /* Disable master interrupts. */
350 ctl = ioread32(I2C_REG_CTL(alg_data));
351 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
353 iowrite32(ctl, I2C_REG_CTL(alg_data));
355 /* Our return value. */
356 alg_data->mif.ret = -EIO;
358 /* Stop timer, to prevent timeout. */
359 del_timer_sync(&alg_data->mif.timer);
360 complete(&alg_data->mif.complete);
364 * - Master Tx needs data.
365 * - There is data in the Rx-fifo
366 * The latter is only the case if we have requested for data,
367 * via a dummy write. (See 'i2c_pnx_master_rcv'.)
368 * We therefore check, as a sanity check, whether that interrupt
371 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
372 if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
373 i2c_pnx_master_xmit(adap);
374 } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
375 i2c_pnx_master_rcv(adap);
380 /* Clear TDI and AFI bits */
381 stat = ioread32(I2C_REG_STS(alg_data));
382 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
384 dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
385 __func__, ioread32(I2C_REG_STS(alg_data)),
386 ioread32(I2C_REG_CTL(alg_data)));
391 static void i2c_pnx_timeout(unsigned long data)
393 struct i2c_adapter *adap = (struct i2c_adapter *)data;
394 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
397 dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. "
398 "Resetting master...\n",
399 ioread32(I2C_REG_STS(alg_data)),
400 ioread32(I2C_REG_CTL(alg_data)));
402 /* Reset master and disable interrupts */
403 ctl = ioread32(I2C_REG_CTL(alg_data));
404 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
405 iowrite32(ctl, I2C_REG_CTL(alg_data));
408 iowrite32(ctl, I2C_REG_CTL(alg_data));
409 wait_reset(I2C_PNX_TIMEOUT, alg_data);
410 alg_data->mif.ret = -EIO;
411 complete(&alg_data->mif.complete);
414 static inline void bus_reset_if_active(struct i2c_adapter *adap)
416 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
419 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
421 "%s: Bus is still active after xfer. Reset it...\n",
423 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
424 I2C_REG_CTL(alg_data));
425 wait_reset(I2C_PNX_TIMEOUT, alg_data);
426 } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
427 /* If there is data in the fifo's after transfer,
428 * flush fifo's by reset.
430 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
431 I2C_REG_CTL(alg_data));
432 wait_reset(I2C_PNX_TIMEOUT, alg_data);
433 } else if (stat & mstatus_nai) {
434 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
435 I2C_REG_CTL(alg_data));
436 wait_reset(I2C_PNX_TIMEOUT, alg_data);
441 * i2c_pnx_xfer - generic transfer entry point
442 * @adap: pointer to I2C adapter structure
443 * @msgs: array of messages
444 * @num: number of messages
446 * Initiates the transfer
449 i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
451 struct i2c_msg *pmsg;
452 int rc = 0, completed = 0, i;
453 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
454 u32 stat = ioread32(I2C_REG_STS(alg_data));
456 dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
457 __func__, num, ioread32(I2C_REG_STS(alg_data)));
459 bus_reset_if_active(adap);
461 /* Process transactions in a loop. */
462 for (i = 0; rc >= 0 && i < num; i++) {
468 if (pmsg->flags & I2C_M_TEN) {
470 "%s: 10 bits addr not supported!\n",
476 alg_data->mif.buf = pmsg->buf;
477 alg_data->mif.len = pmsg->len;
478 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
479 I2C_SMBUS_READ : I2C_SMBUS_WRITE;
480 alg_data->mif.ret = 0;
481 alg_data->last = (i == num - 1);
483 dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__,
487 i2c_pnx_arm_timer(adap);
489 /* initialize the completion var */
490 init_completion(&alg_data->mif.complete);
492 /* Enable master interrupt */
493 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
494 mcntrl_naie | mcntrl_drmie,
495 I2C_REG_CTL(alg_data));
497 /* Put start-code and slave-address on the bus. */
498 rc = i2c_pnx_start(addr, adap);
502 /* Wait for completion */
503 wait_for_completion(&alg_data->mif.complete);
505 if (!(rc = alg_data->mif.ret))
507 dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
510 /* Clear TDI and AFI bits in case they are set. */
511 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
513 "%s: TDI still set... clearing now.\n",
515 iowrite32(stat, I2C_REG_STS(alg_data));
517 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
519 "%s: AFI still set... clearing now.\n",
521 iowrite32(stat, I2C_REG_STS(alg_data));
525 bus_reset_if_active(adap);
527 /* Cleanup to be sure... */
528 alg_data->mif.buf = NULL;
529 alg_data->mif.len = 0;
531 dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
532 __func__, ioread32(I2C_REG_STS(alg_data)));
534 if (completed != num)
535 return ((rc < 0) ? rc : -EREMOTEIO);
540 static u32 i2c_pnx_func(struct i2c_adapter *adapter)
542 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
545 static struct i2c_algorithm pnx_algorithm = {
546 .master_xfer = i2c_pnx_xfer,
547 .functionality = i2c_pnx_func,
551 static int i2c_pnx_controller_suspend(struct platform_device *pdev,
554 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
555 struct i2c_pnx_algo_data *alg_data = i2c_pnx->adapter->algo_data;
557 /* FIXME: shouldn't this be clk_disable? */
558 clk_enable(alg_data->clk);
563 static int i2c_pnx_controller_resume(struct platform_device *pdev)
565 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
566 struct i2c_pnx_algo_data *alg_data = i2c_pnx->adapter->algo_data;
568 return clk_enable(alg_data->clk);
571 #define i2c_pnx_controller_suspend NULL
572 #define i2c_pnx_controller_resume NULL
575 static int __devinit i2c_pnx_probe(struct platform_device *pdev)
579 struct i2c_pnx_algo_data *alg_data;
581 struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
583 if (!i2c_pnx || !i2c_pnx->adapter) {
584 dev_err(&pdev->dev, "%s: no platform data supplied\n",
590 platform_set_drvdata(pdev, i2c_pnx);
592 i2c_pnx->adapter->algo = &pnx_algorithm;
593 alg_data = i2c_pnx->adapter->algo_data;
595 alg_data->clk = clk_get(&pdev->dev, NULL);
596 if (IS_ERR(alg_data->clk)) {
597 ret = PTR_ERR(alg_data->clk);
601 init_timer(&alg_data->mif.timer);
602 alg_data->mif.timer.function = i2c_pnx_timeout;
603 alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
605 /* Register I/O resource */
606 if (!request_mem_region(alg_data->base, I2C_PNX_REGION_SIZE,
609 "I/O region 0x%08x for I2C already in use.\n",
615 if (!(alg_data->ioaddr =
616 (u32)ioremap(alg_data->base, I2C_PNX_REGION_SIZE))) {
617 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
622 ret = clk_enable(alg_data->clk);
626 freq = clk_get_rate(alg_data->clk);
629 * Clock Divisor High This value is the number of system clocks
630 * the serial clock (SCL) will be high.
631 * For example, if the system clock period is 50 ns and the maximum
632 * desired serial period is 10000 ns (100 kHz), then CLKHI would be
633 * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
634 * programmed into CLKHI will vary from this slightly due to
635 * variations in the output pad's rise and fall times as well as
636 * the deglitching filter length.
639 tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
640 iowrite32(tmp, I2C_REG_CKH(alg_data));
641 iowrite32(tmp, I2C_REG_CKL(alg_data));
643 iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
644 if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
648 init_completion(&alg_data->mif.complete);
650 ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
651 0, pdev->name, i2c_pnx->adapter);
655 /* Register this adapter with the I2C subsystem */
656 i2c_pnx->adapter->dev.parent = &pdev->dev;
657 i2c_pnx->adapter->nr = pdev->id;
658 ret = i2c_add_numbered_adapter(i2c_pnx->adapter);
660 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
664 dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
665 i2c_pnx->adapter->name, alg_data->base, alg_data->irq);
670 free_irq(alg_data->irq, i2c_pnx->adapter);
672 clk_disable(alg_data->clk);
674 iounmap((void *)alg_data->ioaddr);
676 release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
678 clk_put(alg_data->clk);
680 platform_set_drvdata(pdev, NULL);
685 static int __devexit i2c_pnx_remove(struct platform_device *pdev)
687 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
688 struct i2c_adapter *adap = i2c_pnx->adapter;
689 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
691 free_irq(alg_data->irq, i2c_pnx->adapter);
692 i2c_del_adapter(adap);
693 clk_disable(alg_data->clk);
694 iounmap((void *)alg_data->ioaddr);
695 release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
696 clk_put(alg_data->clk);
697 platform_set_drvdata(pdev, NULL);
702 static struct platform_driver i2c_pnx_driver = {
705 .owner = THIS_MODULE,
707 .probe = i2c_pnx_probe,
708 .remove = __devexit_p(i2c_pnx_remove),
709 .suspend = i2c_pnx_controller_suspend,
710 .resume = i2c_pnx_controller_resume,
713 static int __init i2c_adap_pnx_init(void)
715 return platform_driver_register(&i2c_pnx_driver);
718 static void __exit i2c_adap_pnx_exit(void)
720 platform_driver_unregister(&i2c_pnx_driver);
723 MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
724 MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
725 MODULE_LICENSE("GPL");
726 MODULE_ALIAS("platform:pnx-i2c");
728 /* We need to make sure I2C is initialized before USB */
729 subsys_initcall(i2c_adap_pnx_init);
730 module_exit(i2c_adap_pnx_exit);