2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 Supports following chips:
26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
27 as99127f 7 3 0 3 0x31 0x12c3 yes no
28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 #include <linux/i2c.h>
41 #include <linux/i2c-isa.h>
42 #include <linux/hwmon.h>
43 #include <linux/hwmon-vid.h>
44 #include <linux/err.h>
48 /* Addresses to scan */
49 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
50 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
51 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
52 static unsigned short isa_address = 0x290;
54 /* Insmod parameters */
55 I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
56 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
57 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
60 module_param(init, bool, 0);
61 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
63 /* Constants specified below */
65 /* Length of ISA address segment */
66 #define W83781D_EXTENT 8
68 /* Where are the ISA address/data registers relative to the base address */
69 #define W83781D_ADDR_REG_OFFSET 5
70 #define W83781D_DATA_REG_OFFSET 6
72 /* The W83781D registers */
73 /* The W83782D registers for nr=7,8 are in bank 5 */
74 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
75 (0x554 + (((nr) - 7) * 2)))
76 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
77 (0x555 + (((nr) - 7) * 2)))
78 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
81 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
82 #define W83781D_REG_FAN(nr) (0x27 + (nr))
84 #define W83781D_REG_BANK 0x4E
85 #define W83781D_REG_TEMP2_CONFIG 0x152
86 #define W83781D_REG_TEMP3_CONFIG 0x252
87 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
88 ((nr == 2) ? (0x0150) : \
90 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
91 ((nr == 2) ? (0x153) : \
93 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
94 ((nr == 2) ? (0x155) : \
97 #define W83781D_REG_CONFIG 0x40
98 #define W83781D_REG_ALARM1 0x41
99 #define W83781D_REG_ALARM2 0x42
100 #define W83781D_REG_ALARM3 0x450 /* not on W83781D */
102 #define W83781D_REG_IRQ 0x4C
103 #define W83781D_REG_BEEP_CONFIG 0x4D
104 #define W83781D_REG_BEEP_INTS1 0x56
105 #define W83781D_REG_BEEP_INTS2 0x57
106 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
108 #define W83781D_REG_VID_FANDIV 0x47
110 #define W83781D_REG_CHIPID 0x49
111 #define W83781D_REG_WCHIPID 0x58
112 #define W83781D_REG_CHIPMAN 0x4F
113 #define W83781D_REG_PIN 0x4B
116 #define W83781D_REG_VBAT 0x5D
118 /* PWM 782D (1-4) and 783S (1-2) only */
119 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
120 /* on which is which; */
121 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
122 /* However 782d is probably wrong. */
123 #define W83781D_REG_PWM3 0x5E
124 #define W83781D_REG_PWM4 0x5F
125 #define W83781D_REG_PWMCLK12 0x5C
126 #define W83781D_REG_PWMCLK34 0x45C
127 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
128 W83781D_REG_PWM3, W83781D_REG_PWM4
131 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
133 #define W83781D_REG_I2C_ADDR 0x48
134 #define W83781D_REG_I2C_SUBADDR 0x4A
136 /* The following are undocumented in the data sheets however we
137 received the information in an email from Winbond tech support */
138 /* Sensor selection - not on 781d */
139 #define W83781D_REG_SCFG1 0x5D
140 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
142 #define W83781D_REG_SCFG2 0x59
143 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
145 #define W83781D_DEFAULT_BETA 3435
147 /* RT Table registers */
148 #define W83781D_REG_RT_IDX 0x50
149 #define W83781D_REG_RT_VAL 0x51
151 /* Conversions. Rounding and limit checking is only done on the TO_REG
152 variants. Note that you should be a bit careful with which arguments
153 these macros are called: arguments may be evaluated more than once.
154 Fixing this is just not worth it. */
155 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
156 #define IN_FROM_REG(val) (((val) * 16) / 10)
159 FAN_TO_REG(long rpm, int div)
163 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
164 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
167 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
168 ((val) == 255 ? 0 : \
169 1350000 / ((val) * (div))))
171 #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
172 : (val)) / 1000, 0, 0xff))
173 #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
175 #define PWM_FROM_REG(val) (val)
176 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
177 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
178 (val) ^ 0x7fff : (val))
179 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
180 (~(val)) & 0x7fff : (val) & 0xffffff)
182 #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0)
183 #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0)
185 #define DIV_FROM_REG(val) (1 << (val))
188 DIV_TO_REG(long val, enum chips type)
191 val = SENSORS_LIMIT(val, 1,
193 || type == as99127f) ? 8 : 128)) >> 1;
194 for (i = 0; i < 7; i++) {
202 /* There are some complications in a module like this. First off, W83781D chips
203 may be both present on the SMBus and the ISA bus, and we have to handle
204 those cases separately at some places. Second, there might be several
205 W83781D chips available (well, actually, that is probably never done; but
206 it is a clean illustration of how to handle a case like that). Finally,
207 a specific chip may be attached to *both* ISA and SMBus, and we would
208 not like to detect it double. Fortunately, in the case of the W83781D at
209 least, a register tells us what SMBus address we are on, so that helps
210 a bit - except if there could be more than one SMBus. Groan. No solution
213 /* This module may seem overly long and complicated. In fact, it is not so
214 bad. Quite a lot of bookkeeping is done. A real driver can often cut
217 /* For each registered W83781D, we need to keep some data in memory. That
218 data is pointed to by w83781d_list[NR]->data. The structure itself is
219 dynamically allocated, at the same time when a new w83781d client is
221 struct w83781d_data {
222 struct i2c_client client;
223 struct class_device *class_dev;
224 struct semaphore lock;
227 struct semaphore update_lock;
228 char valid; /* !=0 if following fields are valid */
229 unsigned long last_updated; /* In jiffies */
231 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
232 /* array of 2 pointers to subclients */
234 u8 in[9]; /* Register value - 8 & 9 for 782D only */
235 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
236 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
237 u8 fan[3]; /* Register value */
238 u8 fan_min[3]; /* Register value */
240 u8 temp_max; /* Register value */
241 u8 temp_max_hyst; /* Register value */
242 u16 temp_add[2]; /* Register value */
243 u16 temp_max_add[2]; /* Register value */
244 u16 temp_max_hyst_add[2]; /* Register value */
245 u8 fan_div[3]; /* Register encoding, shifted right */
246 u8 vid; /* Register encoding, combined */
247 u32 alarms; /* Register encoding, combined */
248 u32 beep_mask; /* Register encoding, combined */
249 u8 beep_enable; /* Boolean */
250 u8 pwm[4]; /* Register value */
251 u8 pwmenable[4]; /* Boolean */
252 u16 sens[3]; /* 782D/783S only.
253 1 = pentium diode; 2 = 3904 diode;
254 3000-5000 = thermistor beta.
256 Other Betas unimplemented */
260 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
261 static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter);
262 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
263 static int w83781d_detach_client(struct i2c_client *client);
265 static int w83781d_read_value(struct i2c_client *client, u16 register);
266 static int w83781d_write_value(struct i2c_client *client, u16 register,
268 static struct w83781d_data *w83781d_update_device(struct device *dev);
269 static void w83781d_init_client(struct i2c_client *client);
271 static struct i2c_driver w83781d_driver = {
272 .owner = THIS_MODULE,
274 .id = I2C_DRIVERID_W83781D,
275 .attach_adapter = w83781d_attach_adapter,
276 .detach_client = w83781d_detach_client,
279 static struct i2c_driver w83781d_isa_driver = {
280 .owner = THIS_MODULE,
281 .name = "w83781d-isa",
282 .attach_adapter = w83781d_isa_attach_adapter,
283 .detach_client = w83781d_detach_client,
287 /* following are the sysfs callback functions */
288 #define show_in_reg(reg) \
289 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
291 struct w83781d_data *data = w83781d_update_device(dev); \
292 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
298 #define store_in_reg(REG, reg) \
299 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
301 struct i2c_client *client = to_i2c_client(dev); \
302 struct w83781d_data *data = i2c_get_clientdata(client); \
305 val = simple_strtoul(buf, NULL, 10) / 10; \
307 down(&data->update_lock); \
308 data->in_##reg[nr] = IN_TO_REG(val); \
309 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
311 up(&data->update_lock); \
314 store_in_reg(MIN, min);
315 store_in_reg(MAX, max);
317 #define sysfs_in_offset(offset) \
319 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
321 return show_in(dev, buf, offset); \
323 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
325 #define sysfs_in_reg_offset(reg, offset) \
326 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
328 return show_in_##reg (dev, buf, offset); \
330 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
332 return store_in_##reg (dev, buf, count, offset); \
334 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
336 #define sysfs_in_offsets(offset) \
337 sysfs_in_offset(offset); \
338 sysfs_in_reg_offset(min, offset); \
339 sysfs_in_reg_offset(max, offset);
351 #define device_create_file_in(client, offset) \
353 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
354 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
355 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
358 #define show_fan_reg(reg) \
359 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
361 struct w83781d_data *data = w83781d_update_device(dev); \
362 return sprintf(buf,"%ld\n", \
363 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
366 show_fan_reg(fan_min);
369 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
371 struct i2c_client *client = to_i2c_client(dev);
372 struct w83781d_data *data = i2c_get_clientdata(client);
375 val = simple_strtoul(buf, NULL, 10);
377 down(&data->update_lock);
378 data->fan_min[nr - 1] =
379 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
380 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
381 data->fan_min[nr - 1]);
383 up(&data->update_lock);
387 #define sysfs_fan_offset(offset) \
388 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
390 return show_fan(dev, buf, offset); \
392 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
394 #define sysfs_fan_min_offset(offset) \
395 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
397 return show_fan_min(dev, buf, offset); \
399 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
401 return store_fan_min(dev, buf, count, offset); \
403 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
406 sysfs_fan_min_offset(1);
408 sysfs_fan_min_offset(2);
410 sysfs_fan_min_offset(3);
412 #define device_create_file_fan(client, offset) \
414 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
415 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
418 #define show_temp_reg(reg) \
419 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
421 struct w83781d_data *data = w83781d_update_device(dev); \
422 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
423 return sprintf(buf,"%d\n", \
424 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
425 } else { /* TEMP1 */ \
426 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
430 show_temp_reg(temp_max);
431 show_temp_reg(temp_max_hyst);
433 #define store_temp_reg(REG, reg) \
434 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
436 struct i2c_client *client = to_i2c_client(dev); \
437 struct w83781d_data *data = i2c_get_clientdata(client); \
440 val = simple_strtol(buf, NULL, 10); \
442 down(&data->update_lock); \
444 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
445 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
446 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
447 data->temp_##reg##_add[nr-2]); \
448 } else { /* TEMP1 */ \
449 data->temp_##reg = TEMP_TO_REG(val); \
450 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
454 up(&data->update_lock); \
457 store_temp_reg(OVER, max);
458 store_temp_reg(HYST, max_hyst);
460 #define sysfs_temp_offset(offset) \
462 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
464 return show_temp(dev, buf, offset); \
466 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
468 #define sysfs_temp_reg_offset(reg, offset) \
469 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
471 return show_temp_##reg (dev, buf, offset); \
473 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
475 return store_temp_##reg (dev, buf, count, offset); \
477 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
479 #define sysfs_temp_offsets(offset) \
480 sysfs_temp_offset(offset); \
481 sysfs_temp_reg_offset(max, offset); \
482 sysfs_temp_reg_offset(max_hyst, offset);
484 sysfs_temp_offsets(1);
485 sysfs_temp_offsets(2);
486 sysfs_temp_offsets(3);
488 #define device_create_file_temp(client, offset) \
490 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
491 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
492 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
496 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
498 struct w83781d_data *data = w83781d_update_device(dev);
499 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
503 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
504 #define device_create_file_vid(client) \
505 device_create_file(&client->dev, &dev_attr_cpu0_vid);
507 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
509 struct w83781d_data *data = w83781d_update_device(dev);
510 return sprintf(buf, "%ld\n", (long) data->vrm);
514 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
516 struct i2c_client *client = to_i2c_client(dev);
517 struct w83781d_data *data = i2c_get_clientdata(client);
520 val = simple_strtoul(buf, NULL, 10);
527 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
528 #define device_create_file_vrm(client) \
529 device_create_file(&client->dev, &dev_attr_vrm);
531 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
533 struct w83781d_data *data = w83781d_update_device(dev);
534 return sprintf(buf, "%u\n", data->alarms);
538 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
539 #define device_create_file_alarms(client) \
540 device_create_file(&client->dev, &dev_attr_alarms);
541 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
543 struct w83781d_data *data = w83781d_update_device(dev);
544 return sprintf(buf, "%ld\n",
545 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
547 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
549 struct w83781d_data *data = w83781d_update_device(dev);
550 return sprintf(buf, "%ld\n",
551 (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
554 #define BEEP_ENABLE 0 /* Store beep_enable */
555 #define BEEP_MASK 1 /* Store beep_mask */
558 store_beep_reg(struct device *dev, const char *buf, size_t count,
561 struct i2c_client *client = to_i2c_client(dev);
562 struct w83781d_data *data = i2c_get_clientdata(client);
565 val = simple_strtoul(buf, NULL, 10);
567 down(&data->update_lock);
569 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
570 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
571 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
572 data->beep_mask & 0xff);
574 if ((data->type != w83781d) && (data->type != as99127f)) {
575 w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
576 ((data->beep_mask) >> 16) & 0xff);
579 val2 = (data->beep_mask >> 8) & 0x7f;
580 } else { /* We are storing beep_enable */
581 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
582 data->beep_enable = BEEP_ENABLE_TO_REG(val);
585 w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
586 val2 | data->beep_enable << 7);
588 up(&data->update_lock);
592 #define sysfs_beep(REG, reg) \
593 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
595 return show_beep_##reg(dev, attr, buf); \
597 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
599 return store_beep_reg(dev, buf, count, BEEP_##REG); \
601 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
603 sysfs_beep(ENABLE, enable);
604 sysfs_beep(MASK, mask);
606 #define device_create_file_beep(client) \
608 device_create_file(&client->dev, &dev_attr_beep_enable); \
609 device_create_file(&client->dev, &dev_attr_beep_mask); \
613 show_fan_div_reg(struct device *dev, char *buf, int nr)
615 struct w83781d_data *data = w83781d_update_device(dev);
616 return sprintf(buf, "%ld\n",
617 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
620 /* Note: we save and restore the fan minimum here, because its value is
621 determined in part by the fan divisor. This follows the principle of
622 least suprise; the user doesn't expect the fan minimum to change just
623 because the divisor changed. */
625 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
627 struct i2c_client *client = to_i2c_client(dev);
628 struct w83781d_data *data = i2c_get_clientdata(client);
631 unsigned long val = simple_strtoul(buf, NULL, 10);
633 down(&data->update_lock);
636 min = FAN_FROM_REG(data->fan_min[nr],
637 DIV_FROM_REG(data->fan_div[nr]));
639 data->fan_div[nr] = DIV_TO_REG(val, data->type);
641 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
642 & (nr==0 ? 0xcf : 0x3f))
643 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
644 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
646 /* w83781d and as99127f don't have extended divisor bits */
647 if (data->type != w83781d && data->type != as99127f) {
648 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
650 | ((data->fan_div[nr] & 0x04) << (3 + nr));
651 w83781d_write_value(client, W83781D_REG_VBAT, reg);
654 /* Restore fan_min */
655 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
656 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
658 up(&data->update_lock);
662 #define sysfs_fan_div(offset) \
663 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
665 return show_fan_div_reg(dev, buf, offset); \
667 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
669 return store_fan_div_reg(dev, buf, count, offset - 1); \
671 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
677 #define device_create_file_fan_div(client, offset) \
679 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
683 show_pwm_reg(struct device *dev, char *buf, int nr)
685 struct w83781d_data *data = w83781d_update_device(dev);
686 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
690 show_pwmenable_reg(struct device *dev, char *buf, int nr)
692 struct w83781d_data *data = w83781d_update_device(dev);
693 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
697 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
699 struct i2c_client *client = to_i2c_client(dev);
700 struct w83781d_data *data = i2c_get_clientdata(client);
703 val = simple_strtoul(buf, NULL, 10);
705 down(&data->update_lock);
706 data->pwm[nr - 1] = PWM_TO_REG(val);
707 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
708 up(&data->update_lock);
713 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
715 struct i2c_client *client = to_i2c_client(dev);
716 struct w83781d_data *data = i2c_get_clientdata(client);
719 val = simple_strtoul(buf, NULL, 10);
721 down(&data->update_lock);
726 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
727 w83781d_write_value(client, W83781D_REG_PWMCLK12,
728 (reg & 0xf7) | (val << 3));
730 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
731 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
732 (reg & 0xef) | (!val << 4));
734 data->pwmenable[nr - 1] = val;
738 up(&data->update_lock);
742 up(&data->update_lock);
746 #define sysfs_pwm(offset) \
747 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
749 return show_pwm_reg(dev, buf, offset); \
751 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
752 const char *buf, size_t count) \
754 return store_pwm_reg(dev, buf, count, offset); \
756 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
757 show_regs_pwm_##offset, store_regs_pwm_##offset);
759 #define sysfs_pwmenable(offset) \
760 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
762 return show_pwmenable_reg(dev, buf, offset); \
764 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
765 const char *buf, size_t count) \
767 return store_pwmenable_reg(dev, buf, count, offset); \
769 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
770 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
774 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
778 #define device_create_file_pwm(client, offset) \
780 device_create_file(&client->dev, &dev_attr_pwm##offset); \
783 #define device_create_file_pwmenable(client, offset) \
785 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
789 show_sensor_reg(struct device *dev, char *buf, int nr)
791 struct w83781d_data *data = w83781d_update_device(dev);
792 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
796 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
798 struct i2c_client *client = to_i2c_client(dev);
799 struct w83781d_data *data = i2c_get_clientdata(client);
802 val = simple_strtoul(buf, NULL, 10);
804 down(&data->update_lock);
807 case 1: /* PII/Celeron diode */
808 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
809 w83781d_write_value(client, W83781D_REG_SCFG1,
810 tmp | BIT_SCFG1[nr - 1]);
811 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
812 w83781d_write_value(client, W83781D_REG_SCFG2,
813 tmp | BIT_SCFG2[nr - 1]);
814 data->sens[nr - 1] = val;
817 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
818 w83781d_write_value(client, W83781D_REG_SCFG1,
819 tmp | BIT_SCFG1[nr - 1]);
820 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
821 w83781d_write_value(client, W83781D_REG_SCFG2,
822 tmp & ~BIT_SCFG2[nr - 1]);
823 data->sens[nr - 1] = val;
825 case W83781D_DEFAULT_BETA: /* thermistor */
826 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
827 w83781d_write_value(client, W83781D_REG_SCFG1,
828 tmp & ~BIT_SCFG1[nr - 1]);
829 data->sens[nr - 1] = val;
832 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
833 (long) val, W83781D_DEFAULT_BETA);
837 up(&data->update_lock);
841 #define sysfs_sensor(offset) \
842 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
844 return show_sensor_reg(dev, buf, offset); \
846 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
848 return store_sensor_reg(dev, buf, count, offset); \
850 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
856 #define device_create_file_sensor(client, offset) \
858 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
861 /* This function is called when:
862 * w83781d_driver is inserted (when this module is loaded), for each
864 * when a new adapter is inserted (and w83781d_driver is still present) */
866 w83781d_attach_adapter(struct i2c_adapter *adapter)
868 if (!(adapter->class & I2C_CLASS_HWMON))
870 return i2c_probe(adapter, &addr_data, w83781d_detect);
874 w83781d_isa_attach_adapter(struct i2c_adapter *adapter)
876 return w83781d_detect(adapter, isa_address, -1);
879 /* Assumes that adapter is of I2C, not ISA variety.
880 * OTHERWISE DON'T CALL THIS
883 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
884 struct i2c_client *new_client)
888 const char *client_name = "";
889 struct w83781d_data *data = i2c_get_clientdata(new_client);
891 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
892 if (!(data->lm75[0])) {
897 id = i2c_adapter_id(adapter);
899 if (force_subclients[0] == id && force_subclients[1] == address) {
900 for (i = 2; i <= 3; i++) {
901 if (force_subclients[i] < 0x48 ||
902 force_subclients[i] > 0x4f) {
903 dev_err(&new_client->dev, "Invalid subclient "
904 "address %d; must be 0x48-0x4f\n",
905 force_subclients[i]);
910 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
911 (force_subclients[2] & 0x07) |
912 ((force_subclients[3] & 0x07) << 4));
913 data->lm75[0]->addr = force_subclients[2];
915 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
916 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
919 if (kind != w83783s) {
920 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
921 if (!(data->lm75[1])) {
926 if (force_subclients[0] == id &&
927 force_subclients[1] == address) {
928 data->lm75[1]->addr = force_subclients[3];
930 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
932 if (data->lm75[0]->addr == data->lm75[1]->addr) {
933 dev_err(&new_client->dev,
934 "Duplicate addresses 0x%x for subclients.\n",
935 data->lm75[0]->addr);
942 client_name = "w83781d subclient";
943 else if (kind == w83782d)
944 client_name = "w83782d subclient";
945 else if (kind == w83783s)
946 client_name = "w83783s subclient";
947 else if (kind == w83627hf)
948 client_name = "w83627hf subclient";
949 else if (kind == as99127f)
950 client_name = "as99127f subclient";
952 for (i = 0; i <= 1; i++) {
953 /* store all data in w83781d */
954 i2c_set_clientdata(data->lm75[i], NULL);
955 data->lm75[i]->adapter = adapter;
956 data->lm75[i]->driver = &w83781d_driver;
957 data->lm75[i]->flags = 0;
958 strlcpy(data->lm75[i]->name, client_name,
960 if ((err = i2c_attach_client(data->lm75[i]))) {
961 dev_err(&new_client->dev, "Subclient %d "
962 "registration at address 0x%x "
963 "failed.\n", i, data->lm75[i]->addr);
974 /* Undo inits in case of errors */
976 i2c_detach_client(data->lm75[0]);
978 kfree(data->lm75[1]);
980 kfree(data->lm75[0]);
986 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
988 int i = 0, val1 = 0, val2;
989 struct i2c_client *new_client;
990 struct w83781d_data *data;
992 const char *client_name = "";
993 int is_isa = i2c_is_isa_adapter(adapter);
994 enum vendor { winbond, asus } vendid;
997 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1002 /* Prevent users from forcing a kind for a bus it isn't supposed
1003 to possibly be on */
1004 if (is_isa && (kind == as99127f || kind == w83783s)) {
1005 dev_err(&adapter->dev,
1006 "Cannot force I2C-only chip for ISA address 0x%02x.\n",
1013 if (!request_region(address, W83781D_EXTENT,
1014 w83781d_isa_driver.name)) {
1015 dev_dbg(&adapter->dev, "Request of region "
1016 "0x%x-0x%x for w83781d failed\n", address,
1017 address + W83781D_EXTENT - 1);
1022 /* Probe whether there is anything available on this address. Already
1023 done for SMBus clients */
1027 #define REALLY_SLOW_IO
1028 /* We need the timeouts for at least some LM78-like
1029 chips. But only if we read 'undefined' registers. */
1030 i = inb_p(address + 1);
1031 if (inb_p(address + 2) != i
1032 || inb_p(address + 3) != i
1033 || inb_p(address + 7) != i) {
1034 dev_dbg(&adapter->dev, "Detection of w83781d "
1035 "chip failed at step 1\n");
1039 #undef REALLY_SLOW_IO
1041 /* Let's just hope nothing breaks here */
1042 i = inb_p(address + 5) & 0x7f;
1043 outb_p(~i & 0x7f, address + 5);
1044 val2 = inb_p(address + 5) & 0x7f;
1045 if (val2 != (~i & 0x7f)) {
1046 outb_p(i, address + 5);
1047 dev_dbg(&adapter->dev, "Detection of w83781d "
1048 "chip failed at step 2 (0x%x != "
1049 "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1057 /* OK. For now, we presume we have a valid client. We now create the
1058 client structure, even though we cannot fill it completely yet.
1059 But it allows us to access w83781d_{read,write}_value. */
1061 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1066 new_client = &data->client;
1067 i2c_set_clientdata(new_client, data);
1068 new_client->addr = address;
1069 init_MUTEX(&data->lock);
1070 new_client->adapter = adapter;
1071 new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver;
1072 new_client->flags = 0;
1074 /* Now, we do the remaining detection. */
1076 /* The w8378?d may be stuck in some other bank than bank 0. This may
1077 make reading other information impossible. Specify a force=... or
1078 force_*=... parameter, and the Winbond will be reset to the right
1081 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1082 dev_dbg(&new_client->dev, "Detection failed at step "
1087 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1088 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1089 /* Check for Winbond or Asus ID if in bank 0 */
1090 if ((!(val1 & 0x07)) &&
1091 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1092 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1093 dev_dbg(&new_client->dev, "Detection failed at step "
1098 /* If Winbond SMBus, check address at 0x48.
1099 Asus doesn't support, except for as99127f rev.2 */
1100 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1101 ((val1 & 0x80) && (val2 == 0x5c)))) {
1102 if (w83781d_read_value
1103 (new_client, W83781D_REG_I2C_ADDR) != address) {
1104 dev_dbg(&new_client->dev, "Detection failed "
1112 /* We have either had a force parameter, or we have already detected the
1113 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1114 w83781d_write_value(new_client, W83781D_REG_BANK,
1115 (w83781d_read_value(new_client,
1116 W83781D_REG_BANK) & 0x78) |
1119 /* Determine the chip type. */
1122 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1125 else if (val2 == 0x12)
1128 dev_dbg(&new_client->dev, "Chip was made by neither "
1129 "Winbond nor Asus?\n");
1134 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1135 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1137 else if (val1 == 0x30 && vendid == winbond)
1139 else if (val1 == 0x40 && vendid == winbond && !is_isa
1142 else if (val1 == 0x21 && vendid == winbond)
1144 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1148 dev_warn(&new_client->dev, "Ignoring 'force' "
1149 "parameter for unknown chip at "
1150 "adapter %d, address 0x%02x\n",
1151 i2c_adapter_id(adapter), address);
1157 if (kind == w83781d) {
1158 client_name = "w83781d";
1159 } else if (kind == w83782d) {
1160 client_name = "w83782d";
1161 } else if (kind == w83783s) {
1162 client_name = "w83783s";
1163 } else if (kind == w83627hf) {
1164 client_name = "w83627hf";
1165 } else if (kind == as99127f) {
1166 client_name = "as99127f";
1169 /* Fill in the remaining client fields and put into the global list */
1170 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1174 init_MUTEX(&data->update_lock);
1176 /* Tell the I2C layer a new client has arrived */
1177 if ((err = i2c_attach_client(new_client)))
1180 /* attach secondary i2c lm75-like clients */
1182 if ((err = w83781d_detect_subclients(adapter, address,
1186 data->lm75[0] = NULL;
1187 data->lm75[1] = NULL;
1190 /* Initialize the chip */
1191 w83781d_init_client(new_client);
1193 /* A few vars need to be filled upon startup */
1194 for (i = 1; i <= 3; i++) {
1195 data->fan_min[i - 1] = w83781d_read_value(new_client,
1196 W83781D_REG_FAN_MIN(i));
1198 if (kind != w83781d && kind != as99127f)
1199 for (i = 0; i < 4; i++)
1200 data->pwmenable[i] = 1;
1202 /* Register sysfs hooks */
1203 data->class_dev = hwmon_device_register(&new_client->dev);
1204 if (IS_ERR(data->class_dev)) {
1205 err = PTR_ERR(data->class_dev);
1209 device_create_file_in(new_client, 0);
1210 if (kind != w83783s)
1211 device_create_file_in(new_client, 1);
1212 device_create_file_in(new_client, 2);
1213 device_create_file_in(new_client, 3);
1214 device_create_file_in(new_client, 4);
1215 device_create_file_in(new_client, 5);
1216 device_create_file_in(new_client, 6);
1217 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1218 device_create_file_in(new_client, 7);
1219 device_create_file_in(new_client, 8);
1222 device_create_file_fan(new_client, 1);
1223 device_create_file_fan(new_client, 2);
1224 device_create_file_fan(new_client, 3);
1226 device_create_file_temp(new_client, 1);
1227 device_create_file_temp(new_client, 2);
1228 if (kind != w83783s)
1229 device_create_file_temp(new_client, 3);
1231 device_create_file_vid(new_client);
1232 device_create_file_vrm(new_client);
1234 device_create_file_fan_div(new_client, 1);
1235 device_create_file_fan_div(new_client, 2);
1236 device_create_file_fan_div(new_client, 3);
1238 device_create_file_alarms(new_client);
1240 device_create_file_beep(new_client);
1242 if (kind != w83781d && kind != as99127f) {
1243 device_create_file_pwm(new_client, 1);
1244 device_create_file_pwm(new_client, 2);
1245 device_create_file_pwmenable(new_client, 2);
1247 if (kind == w83782d && !is_isa) {
1248 device_create_file_pwm(new_client, 3);
1249 device_create_file_pwm(new_client, 4);
1252 if (kind != as99127f && kind != w83781d) {
1253 device_create_file_sensor(new_client, 1);
1254 device_create_file_sensor(new_client, 2);
1255 if (kind != w83783s)
1256 device_create_file_sensor(new_client, 3);
1262 if (data->lm75[1]) {
1263 i2c_detach_client(data->lm75[1]);
1264 kfree(data->lm75[1]);
1266 if (data->lm75[0]) {
1267 i2c_detach_client(data->lm75[0]);
1268 kfree(data->lm75[0]);
1271 i2c_detach_client(new_client);
1276 release_region(address, W83781D_EXTENT);
1282 w83781d_detach_client(struct i2c_client *client)
1284 struct w83781d_data *data = i2c_get_clientdata(client);
1289 hwmon_device_unregister(data->class_dev);
1291 if (i2c_is_isa_client(client))
1292 release_region(client->addr, W83781D_EXTENT);
1294 if ((err = i2c_detach_client(client)))
1308 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1309 bank switches. ISA access must always be locked explicitly!
1310 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1311 would slow down the W83781D access and should not be necessary.
1312 There are some ugly typecasts here, but the good news is - they should
1313 nowhere else be necessary! */
1315 w83781d_read_value(struct i2c_client *client, u16 reg)
1317 struct w83781d_data *data = i2c_get_clientdata(client);
1318 int res, word_sized, bank;
1319 struct i2c_client *cl;
1322 if (i2c_is_isa_client(client)) {
1323 word_sized = (((reg & 0xff00) == 0x100)
1324 || ((reg & 0xff00) == 0x200))
1325 && (((reg & 0x00ff) == 0x50)
1326 || ((reg & 0x00ff) == 0x53)
1327 || ((reg & 0x00ff) == 0x55));
1329 outb_p(W83781D_REG_BANK,
1330 client->addr + W83781D_ADDR_REG_OFFSET);
1332 client->addr + W83781D_DATA_REG_OFFSET);
1334 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1335 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1337 outb_p((reg & 0xff) + 1,
1338 client->addr + W83781D_ADDR_REG_OFFSET);
1340 (res << 8) + inb_p(client->addr +
1341 W83781D_DATA_REG_OFFSET);
1344 outb_p(W83781D_REG_BANK,
1345 client->addr + W83781D_ADDR_REG_OFFSET);
1346 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1349 bank = (reg >> 8) & 0x0f;
1352 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1354 if (bank == 0 || bank > 2) {
1355 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1357 /* switch to subclient */
1358 cl = data->lm75[bank - 1];
1359 /* convert from ISA to LM75 I2C addresses */
1360 switch (reg & 0xff) {
1361 case 0x50: /* TEMP */
1362 res = swab16(i2c_smbus_read_word_data(cl, 0));
1364 case 0x52: /* CONFIG */
1365 res = i2c_smbus_read_byte_data(cl, 1);
1367 case 0x53: /* HYST */
1368 res = swab16(i2c_smbus_read_word_data(cl, 2));
1370 case 0x55: /* OVER */
1372 res = swab16(i2c_smbus_read_word_data(cl, 3));
1377 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1384 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1386 struct w83781d_data *data = i2c_get_clientdata(client);
1387 int word_sized, bank;
1388 struct i2c_client *cl;
1391 if (i2c_is_isa_client(client)) {
1392 word_sized = (((reg & 0xff00) == 0x100)
1393 || ((reg & 0xff00) == 0x200))
1394 && (((reg & 0x00ff) == 0x53)
1395 || ((reg & 0x00ff) == 0x55));
1397 outb_p(W83781D_REG_BANK,
1398 client->addr + W83781D_ADDR_REG_OFFSET);
1400 client->addr + W83781D_DATA_REG_OFFSET);
1402 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1405 client->addr + W83781D_DATA_REG_OFFSET);
1406 outb_p((reg & 0xff) + 1,
1407 client->addr + W83781D_ADDR_REG_OFFSET);
1409 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1411 outb_p(W83781D_REG_BANK,
1412 client->addr + W83781D_ADDR_REG_OFFSET);
1413 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1416 bank = (reg >> 8) & 0x0f;
1419 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1421 if (bank == 0 || bank > 2) {
1422 i2c_smbus_write_byte_data(client, reg & 0xff,
1425 /* switch to subclient */
1426 cl = data->lm75[bank - 1];
1427 /* convert from ISA to LM75 I2C addresses */
1428 switch (reg & 0xff) {
1429 case 0x52: /* CONFIG */
1430 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1432 case 0x53: /* HYST */
1433 i2c_smbus_write_word_data(cl, 2, swab16(value));
1435 case 0x55: /* OVER */
1436 i2c_smbus_write_word_data(cl, 3, swab16(value));
1441 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1448 w83781d_init_client(struct i2c_client *client)
1450 struct w83781d_data *data = i2c_get_clientdata(client);
1452 int type = data->type;
1455 if (init && type != as99127f) { /* this resets registers we don't have
1456 documentation for on the as99127f */
1457 /* save these registers */
1458 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1459 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1460 /* Reset all except Watchdog values and last conversion values
1461 This sets fan-divs to 2, among others */
1462 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1463 /* Restore the registers and disable power-on abnormal beep.
1464 This saves FAN 1/2/3 input/output values set by BIOS. */
1465 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1466 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1467 /* Disable master beep-enable (reset turns it on).
1468 Individual beep_mask should be reset to off but for some reason
1469 disabling this bit helps some people not get beeped */
1470 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1473 data->vrm = vid_which_vrm();
1475 if ((type != w83781d) && (type != as99127f)) {
1476 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1477 for (i = 1; i <= 3; i++) {
1478 if (!(tmp & BIT_SCFG1[i - 1])) {
1479 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1481 if (w83781d_read_value
1483 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1484 data->sens[i - 1] = 1;
1486 data->sens[i - 1] = 2;
1488 if (type == w83783s && i == 2)
1493 if (init && type != as99127f) {
1495 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1497 dev_warn(&client->dev, "Enabling temp2, readings "
1498 "might not make sense\n");
1499 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1504 if (type != w83783s) {
1505 tmp = w83781d_read_value(client,
1506 W83781D_REG_TEMP3_CONFIG);
1508 dev_warn(&client->dev, "Enabling temp3, "
1509 "readings might not make sense\n");
1510 w83781d_write_value(client,
1511 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1515 if (type != w83781d) {
1516 /* enable comparator mode for temp2 and temp3 so
1517 alarm indication will work correctly */
1518 i = w83781d_read_value(client, W83781D_REG_IRQ);
1520 w83781d_write_value(client, W83781D_REG_IRQ,
1525 /* Start monitoring */
1526 w83781d_write_value(client, W83781D_REG_CONFIG,
1527 (w83781d_read_value(client,
1528 W83781D_REG_CONFIG) & 0xf7)
1532 static struct w83781d_data *w83781d_update_device(struct device *dev)
1534 struct i2c_client *client = to_i2c_client(dev);
1535 struct w83781d_data *data = i2c_get_clientdata(client);
1538 down(&data->update_lock);
1540 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1542 dev_dbg(dev, "Starting device update\n");
1544 for (i = 0; i <= 8; i++) {
1545 if (data->type == w83783s && i == 1)
1546 continue; /* 783S has no in1 */
1548 w83781d_read_value(client, W83781D_REG_IN(i));
1550 w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1552 w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1553 if ((data->type != w83782d)
1554 && (data->type != w83627hf) && (i == 6))
1557 for (i = 1; i <= 3; i++) {
1559 w83781d_read_value(client, W83781D_REG_FAN(i));
1560 data->fan_min[i - 1] =
1561 w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1563 if (data->type != w83781d && data->type != as99127f) {
1564 for (i = 1; i <= 4; i++) {
1566 w83781d_read_value(client,
1567 W83781D_REG_PWM(i));
1568 if ((data->type != w83782d
1569 || i2c_is_isa_client(client))
1573 /* Only PWM2 can be disabled */
1574 data->pwmenable[1] = (w83781d_read_value(client,
1575 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1578 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1580 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1581 data->temp_max_hyst =
1582 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1584 w83781d_read_value(client, W83781D_REG_TEMP(2));
1585 data->temp_max_add[0] =
1586 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1587 data->temp_max_hyst_add[0] =
1588 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1589 if (data->type != w83783s) {
1591 w83781d_read_value(client, W83781D_REG_TEMP(3));
1592 data->temp_max_add[1] =
1593 w83781d_read_value(client,
1594 W83781D_REG_TEMP_OVER(3));
1595 data->temp_max_hyst_add[1] =
1596 w83781d_read_value(client,
1597 W83781D_REG_TEMP_HYST(3));
1599 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1600 data->vid = i & 0x0f;
1601 data->vid |= (w83781d_read_value(client,
1602 W83781D_REG_CHIPID) & 0x01) << 4;
1603 data->fan_div[0] = (i >> 4) & 0x03;
1604 data->fan_div[1] = (i >> 6) & 0x03;
1605 data->fan_div[2] = (w83781d_read_value(client,
1606 W83781D_REG_PIN) >> 6) & 0x03;
1607 if ((data->type != w83781d) && (data->type != as99127f)) {
1608 i = w83781d_read_value(client, W83781D_REG_VBAT);
1609 data->fan_div[0] |= (i >> 3) & 0x04;
1610 data->fan_div[1] |= (i >> 4) & 0x04;
1611 data->fan_div[2] |= (i >> 5) & 0x04;
1614 w83781d_read_value(client,
1615 W83781D_REG_ALARM1) +
1616 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1617 if ((data->type == w83782d) || (data->type == w83627hf)) {
1619 w83781d_read_value(client,
1620 W83781D_REG_ALARM3) << 16;
1622 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1623 data->beep_enable = i >> 7;
1624 data->beep_mask = ((i & 0x7f) << 8) +
1625 w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1626 if ((data->type != w83781d) && (data->type != as99127f)) {
1628 w83781d_read_value(client,
1629 W83781D_REG_BEEP_INTS3) << 16;
1631 data->last_updated = jiffies;
1635 up(&data->update_lock);
1641 sensors_w83781d_init(void)
1645 res = i2c_add_driver(&w83781d_driver);
1649 res = i2c_isa_add_driver(&w83781d_isa_driver);
1651 i2c_del_driver(&w83781d_driver);
1659 sensors_w83781d_exit(void)
1661 i2c_isa_del_driver(&w83781d_isa_driver);
1662 i2c_del_driver(&w83781d_driver);
1665 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1666 "Philip Edelbrock <phil@netroedge.com>, "
1667 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1668 MODULE_DESCRIPTION("W83781D driver");
1669 MODULE_LICENSE("GPL");
1671 module_init(sensors_w83781d_init);
1672 module_exit(sensors_w83781d_exit);