2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
31 #include <linux/seq_file.h>
32 #include <asm/atomic.h>
33 #include <linux/wait.h>
34 #include <linux/list.h>
35 #include <linux/kref.h>
38 #include "radeon_reg.h"
41 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
43 unsigned long irq_flags;
45 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
47 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
50 fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
51 if (!rdev->cp.ready) {
52 /* FIXME: cp is not running assume everythings is done right
55 WREG32(rdev->fence_drv.scratch_reg, fence->seq);
57 radeon_fence_ring_emit(rdev, fence);
60 fence->timeout = jiffies + ((2000 * HZ) / 1000);
61 list_del(&fence->list);
62 list_add_tail(&fence->list, &rdev->fence_drv.emited);
63 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
67 static bool radeon_fence_poll_locked(struct radeon_device *rdev)
69 struct radeon_fence *fence;
70 struct list_head *i, *n;
80 seq = RREG32(rdev->fence_drv.scratch_reg);
81 rdev->fence_drv.last_seq = seq;
83 list_for_each(i, &rdev->fence_drv.emited) {
84 fence = list_entry(i, struct radeon_fence, list);
85 if (fence->seq == seq) {
90 /* all fence previous to this one are considered as signaled */
96 list_add_tail(i, &rdev->fence_drv.signaled);
97 fence = list_entry(i, struct radeon_fence, list);
98 fence->signaled = true;
100 } while (i != &rdev->fence_drv.emited);
106 static void radeon_fence_destroy(struct kref *kref)
108 unsigned long irq_flags;
109 struct radeon_fence *fence;
111 fence = container_of(kref, struct radeon_fence, kref);
112 write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
113 list_del(&fence->list);
114 fence->emited = false;
115 write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
119 int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
121 unsigned long irq_flags;
123 *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
124 if ((*fence) == NULL) {
127 kref_init(&((*fence)->kref));
128 (*fence)->rdev = rdev;
129 (*fence)->emited = false;
130 (*fence)->signaled = false;
132 INIT_LIST_HEAD(&(*fence)->list);
134 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
135 list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
136 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
141 bool radeon_fence_signaled(struct radeon_fence *fence)
143 struct radeon_device *rdev = fence->rdev;
144 unsigned long irq_flags;
145 bool signaled = false;
147 if (rdev->gpu_lockup) {
153 write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
154 signaled = fence->signaled;
155 /* if we are shuting down report all fence as signaled */
156 if (fence->rdev->shutdown) {
159 if (!fence->emited) {
160 WARN(1, "Querying an unemited fence : %p !\n", fence);
164 radeon_fence_poll_locked(fence->rdev);
165 signaled = fence->signaled;
167 write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
171 int r600_fence_wait(struct radeon_fence *fence, bool intr, bool lazy)
173 struct radeon_device *rdev;
174 unsigned long cur_jiffies;
175 unsigned long timeout;
178 cur_jiffies = jiffies;
181 if (time_after(fence->timeout, cur_jiffies)) {
182 timeout = fence->timeout - cur_jiffies;
187 __set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
190 if (radeon_fence_signaled(fence))
193 if (time_after_eq(jiffies, timeout)) {
201 if (intr && signal_pending(current)) {
206 __set_current_state(TASK_RUNNING);
211 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
213 struct radeon_device *rdev;
214 unsigned long cur_jiffies;
215 unsigned long timeout;
216 bool expired = false;
220 WARN(1, "Querying an invalid fence : %p !\n", fence);
224 if (radeon_fence_signaled(fence)) {
228 if (rdev->family >= CHIP_R600)
229 return r600_fence_wait(fence, intr, 0);
232 cur_jiffies = jiffies;
234 if (time_after(fence->timeout, cur_jiffies)) {
235 timeout = fence->timeout - cur_jiffies;
239 r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
240 radeon_fence_signaled(fence), timeout);
241 if (unlikely(r == -ERESTARTSYS)) {
245 r = wait_event_timeout(rdev->fence_drv.queue,
246 radeon_fence_signaled(fence), timeout);
248 if (unlikely(!radeon_fence_signaled(fence))) {
249 if (unlikely(r == 0)) {
252 if (unlikely(expired)) {
254 if (time_after(cur_jiffies, fence->timeout)) {
255 timeout = cur_jiffies - fence->timeout;
257 timeout = jiffies_to_msecs(timeout);
259 DRM_ERROR("fence(%p:0x%08X) %lums timeout "
260 "going to reset GPU\n",
261 fence, fence->seq, timeout);
262 radeon_gpu_reset(rdev);
263 WREG32(rdev->fence_drv.scratch_reg, fence->seq);
268 if (unlikely(expired)) {
269 rdev->fence_drv.count_timeout++;
270 cur_jiffies = jiffies;
272 if (time_after(cur_jiffies, fence->timeout)) {
273 timeout = cur_jiffies - fence->timeout;
275 timeout = jiffies_to_msecs(timeout);
276 DRM_ERROR("fence(%p:0x%08X) %lums timeout\n",
277 fence, fence->seq, timeout);
278 DRM_ERROR("last signaled fence(0x%08X)\n",
279 rdev->fence_drv.last_seq);
284 int radeon_fence_wait_next(struct radeon_device *rdev)
286 unsigned long irq_flags;
287 struct radeon_fence *fence;
290 if (rdev->gpu_lockup) {
293 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
294 if (list_empty(&rdev->fence_drv.emited)) {
295 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
298 fence = list_entry(rdev->fence_drv.emited.next,
299 struct radeon_fence, list);
300 radeon_fence_ref(fence);
301 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
302 r = radeon_fence_wait(fence, false);
303 radeon_fence_unref(&fence);
307 int radeon_fence_wait_last(struct radeon_device *rdev)
309 unsigned long irq_flags;
310 struct radeon_fence *fence;
313 if (rdev->gpu_lockup) {
316 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
317 if (list_empty(&rdev->fence_drv.emited)) {
318 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
321 fence = list_entry(rdev->fence_drv.emited.prev,
322 struct radeon_fence, list);
323 radeon_fence_ref(fence);
324 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
325 r = radeon_fence_wait(fence, false);
326 radeon_fence_unref(&fence);
330 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
332 kref_get(&fence->kref);
336 void radeon_fence_unref(struct radeon_fence **fence)
338 struct radeon_fence *tmp = *fence;
342 kref_put(&tmp->kref, &radeon_fence_destroy);
346 void radeon_fence_process(struct radeon_device *rdev)
348 unsigned long irq_flags;
351 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
352 wake = radeon_fence_poll_locked(rdev);
353 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
355 wake_up_all(&rdev->fence_drv.queue);
359 int radeon_fence_driver_init(struct radeon_device *rdev)
361 unsigned long irq_flags;
364 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
365 r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
367 DRM_ERROR("Fence failed to get a scratch register.");
368 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
371 WREG32(rdev->fence_drv.scratch_reg, 0);
372 atomic_set(&rdev->fence_drv.seq, 0);
373 INIT_LIST_HEAD(&rdev->fence_drv.created);
374 INIT_LIST_HEAD(&rdev->fence_drv.emited);
375 INIT_LIST_HEAD(&rdev->fence_drv.signaled);
376 rdev->fence_drv.count_timeout = 0;
377 init_waitqueue_head(&rdev->fence_drv.queue);
378 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
379 if (radeon_debugfs_fence_init(rdev)) {
380 DRM_ERROR("Failed to register debugfs file for fence !\n");
385 void radeon_fence_driver_fini(struct radeon_device *rdev)
387 unsigned long irq_flags;
389 wake_up_all(&rdev->fence_drv.queue);
390 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
391 radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
392 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
393 DRM_INFO("radeon: fence finalized\n");
400 #if defined(CONFIG_DEBUG_FS)
401 static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
403 struct drm_info_node *node = (struct drm_info_node *)m->private;
404 struct drm_device *dev = node->minor->dev;
405 struct radeon_device *rdev = dev->dev_private;
406 struct radeon_fence *fence;
408 seq_printf(m, "Last signaled fence 0x%08X\n",
409 RREG32(rdev->fence_drv.scratch_reg));
410 if (!list_empty(&rdev->fence_drv.emited)) {
411 fence = list_entry(rdev->fence_drv.emited.prev,
412 struct radeon_fence, list);
413 seq_printf(m, "Last emited fence %p with 0x%08X\n",
419 static struct drm_info_list radeon_debugfs_fence_list[] = {
420 {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
424 int radeon_debugfs_fence_init(struct radeon_device *rdev)
426 #if defined(CONFIG_DEBUG_FS)
427 return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);