SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include "drmP.h"
  34 #include "drm.h"
  35 #include "drm_crtc.h"
  36 #include "drm_edid.h"
  37 #include "intel_drv.h"
  38 #include "i915_drm.h"
  39 #include "i915_drv.h"
  40 #include <linux/acpi.h>
  41
  42 /* Private structure for the integrated LVDS support */
  43 struct intel_lvds_priv {
  44         int fitting_mode;
  45         u32 pfit_control;
  46         u32 pfit_pgm_ratios;
  47 };
  48
  49 /**
  50  * Sets the backlight level.
  51  *
  52  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  53  */
  54 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  55 {
  56         struct drm_i915_private *dev_priv = dev->dev_private;
  57         u32 blc_pwm_ctl, reg;
  58
  59         if (IS_IGDNG(dev))
  60                 reg = BLC_PWM_CPU_CTL;
  61         else
  62                 reg = BLC_PWM_CTL;
  63
  64         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  65         I915_WRITE(reg, (blc_pwm_ctl |
  66                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  67 }
  68
  69 /**
  70  * Returns the maximum level of the backlight duty cycle field.
  71  */
  72 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  73 {
  74         struct drm_i915_private *dev_priv = dev->dev_private;
  75         u32 reg;
  76
  77         if (IS_IGDNG(dev))
  78                 reg = BLC_PWM_PCH_CTL2;
  79         else
  80                 reg = BLC_PWM_CTL;
  81
  82         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  83                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  84 }
  85
  86 /**
  87  * Sets the power state for the panel.
  88  */
  89 static void intel_lvds_set_power(struct drm_device *dev, bool on)
  90 {
  91         struct drm_i915_private *dev_priv = dev->dev_private;
  92         u32 pp_status, ctl_reg, status_reg;
  93
  94         if (IS_IGDNG(dev)) {
  95                 ctl_reg = PCH_PP_CONTROL;
  96                 status_reg = PCH_PP_STATUS;
  97         } else {
  98                 ctl_reg = PP_CONTROL;
  99                 status_reg = PP_STATUS;
 100         }
 101
 102         if (on) {
 103                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
 104                            POWER_TARGET_ON);
 105                 do {
 106                         pp_status = I915_READ(status_reg);
 107                 } while ((pp_status & PP_ON) == 0);
 108
 109                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
 110         } else {
 111                 intel_lvds_set_backlight(dev, 0);
 112
 113                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
 114                            ~POWER_TARGET_ON);
 115                 do {
 116                         pp_status = I915_READ(status_reg);
 117                 } while (pp_status & PP_ON);
 118         }
 119 }
 120
 121 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 122 {
 123         struct drm_device *dev = encoder->dev;
 124
 125         if (mode == DRM_MODE_DPMS_ON)
 126                 intel_lvds_set_power(dev, true);
 127         else
 128                 intel_lvds_set_power(dev, false);
 129
 130         /* XXX: We never power down the LVDS pairs. */
 131 }
 132
 133 static void intel_lvds_save(struct drm_connector *connector)
 134 {
 135         struct drm_device *dev = connector->dev;
 136         struct drm_i915_private *dev_priv = dev->dev_private;
 137         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
 138         u32 pwm_ctl_reg;
 139
 140         if (IS_IGDNG(dev)) {
 141                 pp_on_reg = PCH_PP_ON_DELAYS;
 142                 pp_off_reg = PCH_PP_OFF_DELAYS;
 143                 pp_ctl_reg = PCH_PP_CONTROL;
 144                 pp_div_reg = PCH_PP_DIVISOR;
 145                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
 146         } else {
 147                 pp_on_reg = PP_ON_DELAYS;
 148                 pp_off_reg = PP_OFF_DELAYS;
 149                 pp_ctl_reg = PP_CONTROL;
 150                 pp_div_reg = PP_DIVISOR;
 151                 pwm_ctl_reg = BLC_PWM_CTL;
 152         }
 153
 154         dev_priv->savePP_ON = I915_READ(pp_on_reg);
 155         dev_priv->savePP_OFF = I915_READ(pp_off_reg);
 156         dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
 157         dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
 158         dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
 159         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
 160                                        BACKLIGHT_DUTY_CYCLE_MASK);
 161
 162         /*
 163          * If the light is off at server startup, just make it full brightness
 164          */
 165         if (dev_priv->backlight_duty_cycle == 0)
 166                 dev_priv->backlight_duty_cycle =
 167                         intel_lvds_get_max_backlight(dev);
 168 }
 169
 170 static void intel_lvds_restore(struct drm_connector *connector)
 171 {
 172         struct drm_device *dev = connector->dev;
 173         struct drm_i915_private *dev_priv = dev->dev_private;
 174         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
 175         u32 pwm_ctl_reg;
 176
 177         if (IS_IGDNG(dev)) {
 178                 pp_on_reg = PCH_PP_ON_DELAYS;
 179                 pp_off_reg = PCH_PP_OFF_DELAYS;
 180                 pp_ctl_reg = PCH_PP_CONTROL;
 181                 pp_div_reg = PCH_PP_DIVISOR;
 182                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
 183         } else {
 184                 pp_on_reg = PP_ON_DELAYS;
 185                 pp_off_reg = PP_OFF_DELAYS;
 186                 pp_ctl_reg = PP_CONTROL;
 187                 pp_div_reg = PP_DIVISOR;
 188                 pwm_ctl_reg = BLC_PWM_CTL;
 189         }
 190
 191         I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
 192         I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
 193         I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
 194         I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
 195         I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
 196         if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
 197                 intel_lvds_set_power(dev, true);
 198         else
 199                 intel_lvds_set_power(dev, false);
 200 }
 201
 202 static int intel_lvds_mode_valid(struct drm_connector *connector,
 203                                  struct drm_display_mode *mode)
 204 {
 205         struct drm_device *dev = connector->dev;
 206         struct drm_i915_private *dev_priv = dev->dev_private;
 207         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
 208
 209         if (fixed_mode) {
 210                 if (mode->hdisplay > fixed_mode->hdisplay)
 211                         return MODE_PANEL;
 212                 if (mode->vdisplay > fixed_mode->vdisplay)
 213                         return MODE_PANEL;
 214         }
 215
 216         return MODE_OK;
 217 }
 218
 219 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 220                                   struct drm_display_mode *mode,
 221                                   struct drm_display_mode *adjusted_mode)
 222 {
 223         /*
 224          * float point operation is not supported . So the PANEL_RATIO_FACTOR
 225          * is defined, which can avoid the float point computation when
 226          * calculating the panel ratio.
 227          */
 228 #define PANEL_RATIO_FACTOR 8192
 229         struct drm_device *dev = encoder->dev;
 230         struct drm_i915_private *dev_priv = dev->dev_private;
 231         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 232         struct drm_encoder *tmp_encoder;
 233         struct intel_output *intel_output = enc_to_intel_output(encoder);
 234         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 235         u32 pfit_control = 0, pfit_pgm_ratios = 0;
 236         int left_border = 0, right_border = 0, top_border = 0;
 237         int bottom_border = 0;
 238         bool border = 0;
 239         int panel_ratio, desired_ratio, vert_scale, horiz_scale;
 240         int horiz_ratio, vert_ratio;
 241         u32 hsync_width, vsync_width;
 242         u32 hblank_width, vblank_width;
 243         u32 hsync_pos, vsync_pos;
 244
 245         /* Should never happen!! */
 246         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
 247                 DRM_ERROR("Can't support LVDS on pipe A\n");
 248                 return false;
 249         }
 250
 251         /* Should never happen!! */
 252         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 253                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 254                         DRM_ERROR("Can't enable LVDS and another "
 255                                "encoder on the same pipe\n");
 256                         return false;
 257                 }
 258         }
 259         /* If we don't have a panel mode, there is nothing we can do */
 260         if (dev_priv->panel_fixed_mode == NULL)
 261                 return true;
 262         /*
 263          * If we have timings from the BIOS for the panel, put them in
 264          * to the adjusted mode.  The CRTC will be set up for this mode,
 265          * with the panel scaling set up to source from the H/VDisplay
 266          * of the original mode.
 267          */
 268         if (dev_priv->panel_fixed_mode != NULL) {
 269                 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
 270                 adjusted_mode->hsync_start =
 271                         dev_priv->panel_fixed_mode->hsync_start;
 272                 adjusted_mode->hsync_end =
 273                         dev_priv->panel_fixed_mode->hsync_end;
 274                 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
 275                 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
 276                 adjusted_mode->vsync_start =
 277                         dev_priv->panel_fixed_mode->vsync_start;
 278                 adjusted_mode->vsync_end =
 279                         dev_priv->panel_fixed_mode->vsync_end;
 280                 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
 281                 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
 282                 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
 283         }
 284
 285         /* Make sure pre-965s set dither correctly */
 286         if (!IS_I965G(dev)) {
 287                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
 288                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 289         }
 290
 291         /* Native modes don't need fitting */
 292         if (adjusted_mode->hdisplay == mode->hdisplay &&
 293                         adjusted_mode->vdisplay == mode->vdisplay) {
 294                 pfit_pgm_ratios = 0;
 295                 border = 0;
 296                 goto out;
 297         }
 298
 299         /* full screen scale for now */
 300         if (IS_IGDNG(dev))
 301                 goto out;
 302
 303         /* 965+ wants fuzzy fitting */
 304         if (IS_I965G(dev))
 305                 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 306                                         PFIT_FILTER_FUZZY;
 307
 308         hsync_width = adjusted_mode->crtc_hsync_end -
 309                                         adjusted_mode->crtc_hsync_start;
 310         vsync_width = adjusted_mode->crtc_vsync_end -
 311                                         adjusted_mode->crtc_vsync_start;
 312         hblank_width = adjusted_mode->crtc_hblank_end -
 313                                         adjusted_mode->crtc_hblank_start;
 314         vblank_width = adjusted_mode->crtc_vblank_end -
 315                                         adjusted_mode->crtc_vblank_start;
 316         /*
 317          * Deal with panel fitting options. Figure out how to stretch the
 318          * image based on its aspect ratio & the current panel fitting mode.
 319          */
 320         panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
 321                                 adjusted_mode->vdisplay;
 322         desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
 323                                 mode->vdisplay;
 324         /*
 325          * Enable automatic panel scaling for non-native modes so that they fill
 326          * the screen.  Should be enabled before the pipe is enabled, according
 327          * to register description and PRM.
 328          * Change the value here to see the borders for debugging
 329          */
 330         if (!IS_IGDNG(dev)) {
 331                 I915_WRITE(BCLRPAT_A, 0);
 332                 I915_WRITE(BCLRPAT_B, 0);
 333         }
 334
 335         switch (lvds_priv->fitting_mode) {
 336         case DRM_MODE_SCALE_CENTER:
 337                 /*
 338                  * For centered modes, we have to calculate border widths &
 339                  * heights and modify the values programmed into the CRTC.
 340                  */
 341                 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
 342                 right_border = left_border;
 343                 if (mode->hdisplay & 1)
 344                         right_border++;
 345                 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
 346                 bottom_border = top_border;
 347                 if (mode->vdisplay & 1)
 348                         bottom_border++;
 349                 /* Set active & border values */
 350                 adjusted_mode->crtc_hdisplay = mode->hdisplay;
 351                 /* Keep the boder be even */
 352                 if (right_border & 1)
 353                         right_border++;
 354                 /* use the border directly instead of border minuse one */
 355                 adjusted_mode->crtc_hblank_start = mode->hdisplay +
 356                                                 right_border;
 357                 /* keep the blank width constant */
 358                 adjusted_mode->crtc_hblank_end =
 359                         adjusted_mode->crtc_hblank_start + hblank_width;
 360                 /* get the hsync pos relative to hblank start */
 361                 hsync_pos = (hblank_width - hsync_width) / 2;
 362                 /* keep the hsync pos be even */
 363                 if (hsync_pos & 1)
 364                         hsync_pos++;
 365                 adjusted_mode->crtc_hsync_start =
 366                                 adjusted_mode->crtc_hblank_start + hsync_pos;
 367                 /* keep the hsync width constant */
 368                 adjusted_mode->crtc_hsync_end =
 369                                 adjusted_mode->crtc_hsync_start + hsync_width;
 370                 adjusted_mode->crtc_vdisplay = mode->vdisplay;
 371                 /* use the border instead of border minus one */
 372                 adjusted_mode->crtc_vblank_start = mode->vdisplay +
 373                                                 bottom_border;
 374                 /* keep the vblank width constant */
 375                 adjusted_mode->crtc_vblank_end =
 376                                 adjusted_mode->crtc_vblank_start + vblank_width;
 377                 /* get the vsync start postion relative to vblank start */
 378                 vsync_pos = (vblank_width - vsync_width) / 2;
 379                 adjusted_mode->crtc_vsync_start =
 380                                 adjusted_mode->crtc_vblank_start + vsync_pos;
 381                 /* keep the vsync width constant */
 382                 adjusted_mode->crtc_vsync_end =
 383                                 adjusted_mode->crtc_vblank_start + vsync_width;
 384                 border = 1;
 385                 break;
 386         case DRM_MODE_SCALE_ASPECT:
 387                 /* Scale but preserve the spect ratio */
 388                 pfit_control |= PFIT_ENABLE;
 389                 if (IS_I965G(dev)) {
 390                         /* 965+ is easy, it does everything in hw */
 391                         if (panel_ratio > desired_ratio)
 392                                 pfit_control |= PFIT_SCALING_PILLAR;
 393                         else if (panel_ratio < desired_ratio)
 394                                 pfit_control |= PFIT_SCALING_LETTER;
 395                         else
 396                                 pfit_control |= PFIT_SCALING_AUTO;
 397                 } else {
 398                         /*
 399                          * For earlier chips we have to calculate the scaling
 400                          * ratio by hand and program it into the
 401                          * PFIT_PGM_RATIO register
 402                          */
 403                         u32 horiz_bits, vert_bits, bits = 12;
 404                         horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
 405                                                 adjusted_mode->hdisplay;
 406                         vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
 407                                                 adjusted_mode->vdisplay;
 408                         horiz_scale = adjusted_mode->hdisplay *
 409                                         PANEL_RATIO_FACTOR / mode->hdisplay;
 410                         vert_scale = adjusted_mode->vdisplay *
 411                                         PANEL_RATIO_FACTOR / mode->vdisplay;
 412
 413                         /* retain aspect ratio */
 414                         if (panel_ratio > desired_ratio) { /* Pillar */
 415                                 u32 scaled_width;
 416                                 scaled_width = mode->hdisplay * vert_scale /
 417                                                 PANEL_RATIO_FACTOR;
 418                                 horiz_ratio = vert_ratio;
 419                                 pfit_control |= (VERT_AUTO_SCALE |
 420                                                  VERT_INTERP_BILINEAR |
 421                                                  HORIZ_INTERP_BILINEAR);
 422                                 /* Pillar will have left/right borders */
 423                                 left_border = (adjusted_mode->hdisplay -
 424                                                 scaled_width) / 2;
 425                                 right_border = left_border;
 426                                 if (mode->hdisplay & 1) /* odd resolutions */
 427                                         right_border++;
 428                                 /* keep the border be even */
 429                                 if (right_border & 1)
 430                                         right_border++;
 431                                 adjusted_mode->crtc_hdisplay = scaled_width;
 432                                 /* use border instead of border minus one */
 433                                 adjusted_mode->crtc_hblank_start =
 434                                         scaled_width + right_border;
 435                                 /* keep the hblank width constant */
 436                                 adjusted_mode->crtc_hblank_end =
 437                                         adjusted_mode->crtc_hblank_start +
 438                                                         hblank_width;
 439                                 /*
 440                                  * get the hsync start pos relative to
 441                                  * hblank start
 442                                  */
 443                                 hsync_pos = (hblank_width - hsync_width) / 2;
 444                                 /* keep the hsync_pos be even */
 445                                 if (hsync_pos & 1)
 446                                         hsync_pos++;
 447                                 adjusted_mode->crtc_hsync_start =
 448                                         adjusted_mode->crtc_hblank_start +
 449                                                         hsync_pos;
 450                                 /* keept hsync width constant */
 451                                 adjusted_mode->crtc_hsync_end =
 452                                         adjusted_mode->crtc_hsync_start +
 453                                                         hsync_width;
 454                                 border = 1;
 455                         } else if (panel_ratio < desired_ratio) { /* letter */
 456                                 u32 scaled_height = mode->vdisplay *
 457                                         horiz_scale / PANEL_RATIO_FACTOR;
 458                                 vert_ratio = horiz_ratio;
 459                                 pfit_control |= (HORIZ_AUTO_SCALE |
 460                                                  VERT_INTERP_BILINEAR |
 461                                                  HORIZ_INTERP_BILINEAR);
 462                                 /* Letterbox will have top/bottom border */
 463                                 top_border = (adjusted_mode->vdisplay -
 464                                         scaled_height) / 2;
 465                                 bottom_border = top_border;
 466                                 if (mode->vdisplay & 1)
 467                                         bottom_border++;
 468                                 adjusted_mode->crtc_vdisplay = scaled_height;
 469                                 /* use border instead of border minus one */
 470                                 adjusted_mode->crtc_vblank_start =
 471                                         scaled_height + bottom_border;
 472                                 /* keep the vblank width constant */
 473                                 adjusted_mode->crtc_vblank_end =
 474                                         adjusted_mode->crtc_vblank_start +
 475                                                         vblank_width;
 476                                 /*
 477                                  * get the vsync start pos relative to
 478                                  * vblank start
 479                                  */
 480                                 vsync_pos = (vblank_width - vsync_width) / 2;
 481                                 adjusted_mode->crtc_vsync_start =
 482                                         adjusted_mode->crtc_vblank_start +
 483                                                         vsync_pos;
 484                                 /* keep the vsync width constant */
 485                                 adjusted_mode->crtc_vsync_end =
 486                                         adjusted_mode->crtc_vsync_start +
 487                                                         vsync_width;
 488                                 border = 1;
 489                         } else {
 490                         /* Aspects match, Let hw scale both directions */
 491                                 pfit_control |= (VERT_AUTO_SCALE |
 492                                                  HORIZ_AUTO_SCALE |
 493                                                  VERT_INTERP_BILINEAR |
 494                                                  HORIZ_INTERP_BILINEAR);
 495                         }
 496                         horiz_bits = (1 << bits) * horiz_ratio /
 497                                         PANEL_RATIO_FACTOR;
 498                         vert_bits = (1 << bits) * vert_ratio /
 499                                         PANEL_RATIO_FACTOR;
 500                         pfit_pgm_ratios =
 501                                 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
 502                                                 PFIT_VERT_SCALE_MASK) |
 503                                 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
 504                                                 PFIT_HORIZ_SCALE_MASK);
 505                 }
 506                 break;
 507
 508         case DRM_MODE_SCALE_FULLSCREEN:
 509                 /*
 510                  * Full scaling, even if it changes the aspect ratio.
 511                  * Fortunately this is all done for us in hw.
 512                  */
 513                 pfit_control |= PFIT_ENABLE;
 514                 if (IS_I965G(dev))
 515                         pfit_control |= PFIT_SCALING_AUTO;
 516                 else
 517                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 518                                          VERT_INTERP_BILINEAR |
 519                                          HORIZ_INTERP_BILINEAR);
 520                 break;
 521         default:
 522                 break;
 523         }
 524
 525 out:
 526         lvds_priv->pfit_control = pfit_control;
 527         lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
 528         /*
 529          * XXX: It would be nice to support lower refresh rates on the
 530          * panels to reduce power consumption, and perhaps match the
 531          * user's requested refresh rate.
 532          */
 533
 534         return true;
 535 }
 536
 537 static void intel_lvds_prepare(struct drm_encoder *encoder)
 538 {
 539         struct drm_device *dev = encoder->dev;
 540         struct drm_i915_private *dev_priv = dev->dev_private;
 541         u32 reg;
 542
 543         if (IS_IGDNG(dev))
 544                 reg = BLC_PWM_CPU_CTL;
 545         else
 546                 reg = BLC_PWM_CTL;
 547
 548         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
 549         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
 550                                        BACKLIGHT_DUTY_CYCLE_MASK);
 551
 552         intel_lvds_set_power(dev, false);
 553 }
 554
 555 static void intel_lvds_commit( struct drm_encoder *encoder)
 556 {
 557         struct drm_device *dev = encoder->dev;
 558         struct drm_i915_private *dev_priv = dev->dev_private;
 559
 560         if (dev_priv->backlight_duty_cycle == 0)
 561                 dev_priv->backlight_duty_cycle =
 562                         intel_lvds_get_max_backlight(dev);
 563
 564         intel_lvds_set_power(dev, true);
 565 }
 566
 567 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 568                                 struct drm_display_mode *mode,
 569                                 struct drm_display_mode *adjusted_mode)
 570 {
 571         struct drm_device *dev = encoder->dev;
 572         struct drm_i915_private *dev_priv = dev->dev_private;
 573         struct intel_output *intel_output = enc_to_intel_output(encoder);
 574         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 575
 576         /*
 577          * The LVDS pin pair will already have been turned on in the
 578          * intel_crtc_mode_set since it has a large impact on the DPLL
 579          * settings.
 580          */
 581
 582         if (IS_IGDNG(dev))
 583                 return;
 584
 585         /*
 586          * Enable automatic panel scaling so that non-native modes fill the
 587          * screen.  Should be enabled before the pipe is enabled, according to
 588          * register description and PRM.
 589          */
 590         I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
 591         I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
 592 }
 593
 594 /**
 595  * Detect the LVDS connection.
 596  *
 597  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 598  * connected and closed means disconnected.  We also send hotplug events as
 599  * needed, using lid status notification from the input layer.
 600  */
 601 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
 602 {
 603         enum drm_connector_status status = connector_status_connected;
 604
 605         if (!acpi_lid_open())
 606                 status = connector_status_disconnected;
 607
 608         return status;
 609 }
 610
 611 /**
 612  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 613  */
 614 static int intel_lvds_get_modes(struct drm_connector *connector)
 615 {
 616         struct drm_device *dev = connector->dev;
 617         struct intel_output *intel_output = to_intel_output(connector);
 618         struct drm_i915_private *dev_priv = dev->dev_private;
 619         int ret = 0;
 620
 621         ret = intel_ddc_get_modes(intel_output);
 622
 623         if (ret)
 624                 return ret;
 625
 626         /* Didn't get an EDID, so
 627          * Set wide sync ranges so we get all modes
 628          * handed to valid_mode for checking
 629          */
 630         connector->display_info.min_vfreq = 0;
 631         connector->display_info.max_vfreq = 200;
 632         connector->display_info.min_hfreq = 0;
 633         connector->display_info.max_hfreq = 200;
 634
 635         if (dev_priv->panel_fixed_mode != NULL) {
 636                 struct drm_display_mode *mode;
 637
 638                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
 639                 drm_mode_probed_add(connector, mode);
 640
 641                 return 1;
 642         }
 643
 644         return 0;
 645 }
 646
 647 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 648                             void *unused)
 649 {
 650         struct drm_i915_private *dev_priv =
 651                 container_of(nb, struct drm_i915_private, lid_notifier);
 652         struct drm_device *dev = dev_priv->dev;
 653
 654         if (acpi_lid_open() && !dev_priv->suspended) {
 655                 mutex_lock(&dev->mode_config.mutex);
 656                 drm_helper_resume_force_mode(dev);
 657                 mutex_unlock(&dev->mode_config.mutex);
 658         }
 659
 660         drm_sysfs_hotplug_event(dev_priv->dev);
 661
 662         return NOTIFY_OK;
 663 }
 664
 665 /**
 666  * intel_lvds_destroy - unregister and free LVDS structures
 667  * @connector: connector to free
 668  *
 669  * Unregister the DDC bus for this connector then free the driver private
 670  * structure.
 671  */
 672 static void intel_lvds_destroy(struct drm_connector *connector)
 673 {
 674         struct drm_device *dev = connector->dev;
 675         struct intel_output *intel_output = to_intel_output(connector);
 676         struct drm_i915_private *dev_priv = dev->dev_private;
 677
 678         if (intel_output->ddc_bus)
 679                 intel_i2c_destroy(intel_output->ddc_bus);
 680         if (dev_priv->lid_notifier.notifier_call)
 681                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 682         drm_sysfs_connector_remove(connector);
 683         drm_connector_cleanup(connector);
 684         kfree(connector);
 685 }
 686
 687 static int intel_lvds_set_property(struct drm_connector *connector,
 688                                    struct drm_property *property,
 689                                    uint64_t value)
 690 {
 691         struct drm_device *dev = connector->dev;
 692         struct intel_output *intel_output =
 693                         to_intel_output(connector);
 694
 695         if (property == dev->mode_config.scaling_mode_property &&
 696                                 connector->encoder) {
 697                 struct drm_crtc *crtc = connector->encoder->crtc;
 698                 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 699                 if (value == DRM_MODE_SCALE_NONE) {
 700                         DRM_DEBUG_KMS("no scaling not supported\n");
 701                         return 0;
 702                 }
 703                 if (lvds_priv->fitting_mode == value) {
 704                         /* the LVDS scaling property is not changed */
 705                         return 0;
 706                 }
 707                 lvds_priv->fitting_mode = value;
 708                 if (crtc && crtc->enabled) {
 709                         /*
 710                          * If the CRTC is enabled, the display will be changed
 711                          * according to the new panel fitting mode.
 712                          */
 713                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 714                                 crtc->x, crtc->y, crtc->fb);
 715                 }
 716         }
 717
 718         return 0;
 719 }
 720
 721 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 722         .dpms = intel_lvds_dpms,
 723         .mode_fixup = intel_lvds_mode_fixup,
 724         .prepare = intel_lvds_prepare,
 725         .mode_set = intel_lvds_mode_set,
 726         .commit = intel_lvds_commit,
 727 };
 728
 729 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 730         .get_modes = intel_lvds_get_modes,
 731         .mode_valid = intel_lvds_mode_valid,
 732         .best_encoder = intel_best_encoder,
 733 };
 734
 735 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 736         .dpms = drm_helper_connector_dpms,
 737         .save = intel_lvds_save,
 738         .restore = intel_lvds_restore,
 739         .detect = intel_lvds_detect,
 740         .fill_modes = drm_helper_probe_single_connector_modes,
 741         .set_property = intel_lvds_set_property,
 742         .destroy = intel_lvds_destroy,
 743 };
 744
 745
 746 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
 747 {
 748         drm_encoder_cleanup(encoder);
 749 }
 750
 751 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 752         .destroy = intel_lvds_enc_destroy,
 753 };
 754
 755 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 756 {
 757         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 758         return 1;
 759 }
 760
 761 /* These systems claim to have LVDS, but really don't */
 762 static const struct dmi_system_id intel_no_lvds[] = {
 763         {
 764                 .callback = intel_no_lvds_dmi_callback,
 765                 .ident = "Apple Mac Mini (Core series)",
 766                 .matches = {
 767                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 768                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 769                 },
 770         },
 771         {
 772                 .callback = intel_no_lvds_dmi_callback,
 773                 .ident = "Apple Mac Mini (Core 2 series)",
 774                 .matches = {
 775                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 776                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 777                 },
 778         },
 779         {
 780                 .callback = intel_no_lvds_dmi_callback,
 781                 .ident = "MSI IM-945GSE-A",
 782                 .matches = {
 783                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 784                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 785                 },
 786         },
 787         {
 788                 .callback = intel_no_lvds_dmi_callback,
 789                 .ident = "Dell Studio Hybrid",
 790                 .matches = {
 791                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 792                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 793                 },
 794         },
 795         {
 796                 .callback = intel_no_lvds_dmi_callback,
 797                 .ident = "AOpen Mini PC",
 798                 .matches = {
 799                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 800                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 801                 },
 802         },
 803         {
 804                 .callback = intel_no_lvds_dmi_callback,
 805                 .ident = "AOpen Mini PC MP915",
 806                 .matches = {
 807                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 808                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 809                 },
 810         },
 811         {
 812                 .callback = intel_no_lvds_dmi_callback,
 813                 .ident = "Aopen i945GTt-VFA",
 814                 .matches = {
 815                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 816                 },
 817         },
 818
 819         { }     /* terminating entry */
 820 };
 821
 822 #ifdef CONFIG_ACPI
 823 /*
 824  * check_lid_device -- check whether @handle is an ACPI LID device.
 825  * @handle: ACPI device handle
 826  * @level : depth in the ACPI namespace tree
 827  * @context: the number of LID device when we find the device
 828  * @rv: a return value to fill if desired (Not use)
 829  */
 830 static acpi_status
 831 check_lid_device(acpi_handle handle, u32 level, void *context,
 832                         void **return_value)
 833 {
 834         struct acpi_device *acpi_dev;
 835         int *lid_present = context;
 836
 837         acpi_dev = NULL;
 838         /* Get the acpi device for device handle */
 839         if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
 840                 /* If there is no ACPI device for handle, return */
 841                 return AE_OK;
 842         }
 843
 844         if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
 845                 *lid_present = 1;
 846
 847         return AE_OK;
 848 }
 849
 850 /**
 851  * check whether there exists the ACPI LID device by enumerating the ACPI
 852  * device tree.
 853  */
 854 static int intel_lid_present(void)
 855 {
 856         int lid_present = 0;
 857
 858         if (acpi_disabled) {
 859                 /* If ACPI is disabled, there is no ACPI device tree to
 860                  * check, so assume the LID device would have been present.
 861                  */
 862                 return 1;
 863         }
 864
 865         acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
 866                                 ACPI_UINT32_MAX,
 867                                 check_lid_device, &lid_present, NULL);
 868
 869         return lid_present;
 870 }
 871 #else
 872 static int intel_lid_present(void)
 873 {
 874         /* In the absence of ACPI built in, assume that the LID device would
 875          * have been present.
 876          */
 877         return 1;
 878 }
 879 #endif
 880
 881 /**
 882  * intel_lvds_init - setup LVDS connectors on this device
 883  * @dev: drm device
 884  *
 885  * Create the connector, register the LVDS DDC bus, and try to figure out what
 886  * modes we can display on the LVDS panel (if present).
 887  */
 888 void intel_lvds_init(struct drm_device *dev)
 889 {
 890         struct drm_i915_private *dev_priv = dev->dev_private;
 891         struct intel_output *intel_output;
 892         struct drm_connector *connector;
 893         struct drm_encoder *encoder;
 894         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 895         struct drm_crtc *crtc;
 896         struct intel_lvds_priv *lvds_priv;
 897         u32 lvds;
 898         int pipe, gpio = GPIOC;
 899
 900         /* Skip init on machines we know falsely report LVDS */
 901         if (dmi_check_system(intel_no_lvds))
 902                 return;
 903
 904         /* Assume that any device without an ACPI LID device also doesn't
 905          * have an integrated LVDS.  We would be better off parsing the BIOS
 906          * to get a reliable indicator, but that code isn't written yet.
 907          *
 908          * In the case of all-in-one desktops using LVDS that we've seen,
 909          * they're using SDVO LVDS.
 910          */
 911         if (!intel_lid_present())
 912                 return;
 913
 914         if (IS_IGDNG(dev)) {
 915                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 916                         return;
 917                 if (dev_priv->edp_support) {
 918                         DRM_DEBUG("disable LVDS for eDP support\n");
 919                         return;
 920                 }
 921                 gpio = PCH_GPIOC;
 922         }
 923
 924         intel_output = kzalloc(sizeof(struct intel_output) +
 925                                 sizeof(struct intel_lvds_priv), GFP_KERNEL);
 926         if (!intel_output) {
 927                 return;
 928         }
 929
 930         connector = &intel_output->base;
 931         encoder = &intel_output->enc;
 932         drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
 933                            DRM_MODE_CONNECTOR_LVDS);
 934
 935         drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
 936                          DRM_MODE_ENCODER_LVDS);
 937
 938         drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
 939         intel_output->type = INTEL_OUTPUT_LVDS;
 940
 941         intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 942         intel_output->crtc_mask = (1 << 1);
 943         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 944         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 945         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 946         connector->interlace_allowed = false;
 947         connector->doublescan_allowed = false;
 948
 949         lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
 950         intel_output->dev_priv = lvds_priv;
 951         /* create the scaling mode property */
 952         drm_mode_create_scaling_mode_property(dev);
 953         /*
 954          * the initial panel fitting mode will be FULL_SCREEN.
 955          */
 956
 957         drm_connector_attach_property(&intel_output->base,
 958                                       dev->mode_config.scaling_mode_property,
 959                                       DRM_MODE_SCALE_FULLSCREEN);
 960         lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
 961         /*
 962          * LVDS discovery:
 963          * 1) check for EDID on DDC
 964          * 2) check for VBT data
 965          * 3) check to see if LVDS is already on
 966          *    if none of the above, no panel
 967          * 4) make sure lid is open
 968          *    if closed, act like it's not there for now
 969          */
 970
 971         /* Set up the DDC bus. */
 972         intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
 973         if (!intel_output->ddc_bus) {
 974                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 975                            "failed.\n");
 976                 goto failed;
 977         }
 978
 979         /*
 980          * Attempt to get the fixed panel mode from DDC.  Assume that the
 981          * preferred mode is the right one.
 982          */
 983         intel_ddc_get_modes(intel_output);
 984
 985         list_for_each_entry(scan, &connector->probed_modes, head) {
 986                 mutex_lock(&dev->mode_config.mutex);
 987                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
 988                         dev_priv->panel_fixed_mode =
 989                                 drm_mode_duplicate(dev, scan);
 990                         mutex_unlock(&dev->mode_config.mutex);
 991                         goto out;
 992                 }
 993                 mutex_unlock(&dev->mode_config.mutex);
 994         }
 995
 996         /* Failed to get EDID, what about VBT? */
 997         if (dev_priv->lfp_lvds_vbt_mode) {
 998                 mutex_lock(&dev->mode_config.mutex);
 999                 dev_priv->panel_fixed_mode =
1000                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1001                 mutex_unlock(&dev->mode_config.mutex);
1002                 if (dev_priv->panel_fixed_mode) {
1003                         dev_priv->panel_fixed_mode->type |=
1004                                 DRM_MODE_TYPE_PREFERRED;
1005                         goto out;
1006                 }
1007         }
1008
1009         /*
1010          * If we didn't get EDID, try checking if the panel is already turned
1011          * on.  If so, assume that whatever is currently programmed is the
1012          * correct mode.
1013          */
1014
1015         /* IGDNG: FIXME if still fail, not try pipe mode now */
1016         if (IS_IGDNG(dev))
1017                 goto failed;
1018
1019         lvds = I915_READ(LVDS);
1020         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1021         crtc = intel_get_crtc_from_pipe(dev, pipe);
1022
1023         if (crtc && (lvds & LVDS_PORT_EN)) {
1024                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1025                 if (dev_priv->panel_fixed_mode) {
1026                         dev_priv->panel_fixed_mode->type |=
1027                                 DRM_MODE_TYPE_PREFERRED;
1028                         goto out;
1029                 }
1030         }
1031
1032         /* If we still don't have a mode after all that, give up. */
1033         if (!dev_priv->panel_fixed_mode)
1034                 goto failed;
1035
1036 out:
1037         if (IS_IGDNG(dev)) {
1038                 u32 pwm;
1039                 /* make sure PWM is enabled */
1040                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1041                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1042                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1043
1044                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1045                 pwm |= PWM_PCH_ENABLE;
1046                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1047         }
1048         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1049         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1050                 DRM_DEBUG("lid notifier registration failed\n");
1051                 dev_priv->lid_notifier.notifier_call = NULL;
1052         }
1053         drm_sysfs_connector_add(connector);
1054         return;
1055
1056 failed:
1057         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1058         if (intel_output->ddc_bus)
1059                 intel_i2c_destroy(intel_output->ddc_bus);
1060         drm_connector_cleanup(connector);
1061         kfree(intel_output);
1062 }