2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/i2c.h>
32 #include <linux/i2c-algo-bit.h>
38 * - support EDID 1.4 (incl. CE blocks)
42 * EDID blocks out in the wild have a variety of bugs, try to collect
43 * them here (note that userspace may work around broken monitors first,
44 * but fixes should make their way here so that the kernel "just works"
45 * on as many displays as possible).
48 /* First detailed mode wrong, use largest 60Hz mode */
49 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
50 /* Reported 135MHz pixel clock is too high, needs adjustment */
51 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
52 /* Prefer the largest mode at 75 Hz */
53 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
54 /* Detail timing is in cm not mm */
55 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
56 /* Detailed timing descriptors have bogus size values, so just take the
57 * maximum size and use that.
59 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
60 /* Monitor forgot to set the first detailed is preferred bit. */
61 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
62 /* use +hsync +vsync for detailed mode */
63 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
70 static struct edid_quirk {
74 } edid_quirk_list[] = {
76 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
78 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
80 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
82 /* Belinea 10 15 55 */
83 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
84 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
86 /* Envision Peripherals, Inc. EN-7100e */
87 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
89 /* Funai Electronics PM36B */
90 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
91 EDID_QUIRK_DETAILED_IN_CM },
93 /* LG Philips LCD LP154W01-A5 */
94 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
95 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
97 /* Philips 107p5 CRT */
98 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
101 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
103 /* Samsung SyncMaster 205BW. Note: irony */
104 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
105 /* Samsung SyncMaster 22[5-6]BW */
106 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
107 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
110 /*** DDC fetch and block validation ***/
112 static const u8 edid_header[] = {
113 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
117 * Sanity check the EDID block (base or extension). Return 0 if the block
118 * doesn't check out, or 1 if it's valid.
121 drm_edid_block_valid(u8 *raw_edid)
125 struct edid *edid = (struct edid *)raw_edid;
127 if (raw_edid[0] == 0x00) {
130 for (i = 0; i < sizeof(edid_header); i++)
131 if (raw_edid[i] == edid_header[i])
135 else if (score >= 6) {
136 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
137 memcpy(raw_edid, edid_header, sizeof(edid_header));
143 for (i = 0; i < EDID_LENGTH; i++)
146 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
150 /* per-block-type checks */
151 switch (raw_edid[0]) {
153 if (edid->version != 1) {
154 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
158 if (edid->revision > 4)
159 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
170 DRM_ERROR("Raw EDID:\n");
171 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
178 * drm_edid_is_valid - sanity check EDID data
181 * Sanity-check an entire EDID record (including extensions)
183 bool drm_edid_is_valid(struct edid *edid)
186 u8 *raw = (u8 *)edid;
191 for (i = 0; i <= edid->extensions; i++)
192 if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
197 EXPORT_SYMBOL(drm_edid_is_valid);
199 #define DDC_ADDR 0x50
200 #define DDC_SEGMENT_ADDR 0x30
202 * Get EDID information via I2C.
204 * \param adapter : i2c device adaptor
205 * \param buf : EDID data buffer to be filled
206 * \param len : EDID data buffer length
207 * \return 0 on success or -1 on failure.
209 * Try to fetch EDID information by calling i2c driver function.
212 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
215 unsigned char start = block * EDID_LENGTH;
216 struct i2c_msg msgs[] = {
230 if (i2c_transfer(adapter, msgs, 2) == 2)
237 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
242 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
245 /* base block fetch */
246 for (i = 0; i < 4; i++) {
247 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
249 if (drm_edid_block_valid(block))
255 /* if there's no extensions, we're done */
256 if (block[0x7e] == 0)
259 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
264 for (j = 1; j <= block[0x7e]; j++) {
265 for (i = 0; i < 4; i++) {
266 if (drm_do_probe_ddc_edid(adapter, block, j,
269 if (drm_edid_block_valid(block + j * EDID_LENGTH))
279 dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n",
280 drm_get_connector_name(connector), j);
288 * Probe DDC presence.
290 * \param adapter : i2c device adaptor
291 * \return 1 on success
294 drm_probe_ddc(struct i2c_adapter *adapter)
298 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
302 * drm_get_edid - get EDID data, if available
303 * @connector: connector we're probing
304 * @adapter: i2c adapter to use for DDC
306 * Poke the given i2c channel to grab EDID data if possible. If found,
307 * attach it to the connector.
309 * Return edid data or NULL if we couldn't find any.
311 struct edid *drm_get_edid(struct drm_connector *connector,
312 struct i2c_adapter *adapter)
314 struct edid *edid = NULL;
316 if (drm_probe_ddc(adapter))
317 edid = (struct edid *)drm_do_get_edid(connector, adapter);
319 connector->display_info.raw_edid = (char *)edid;
324 EXPORT_SYMBOL(drm_get_edid);
326 /*** EDID parsing ***/
329 * edid_vendor - match a string against EDID's obfuscated vendor field
330 * @edid: EDID to match
331 * @vendor: vendor string
333 * Returns true if @vendor is in @edid, false otherwise
335 static bool edid_vendor(struct edid *edid, char *vendor)
339 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
340 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
341 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
342 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
344 return !strncmp(edid_vendor, vendor, 3);
348 * edid_get_quirks - return quirk flags for a given EDID
349 * @edid: EDID to process
351 * This tells subsequent routines what fixes they need to apply.
353 static u32 edid_get_quirks(struct edid *edid)
355 struct edid_quirk *quirk;
358 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
359 quirk = &edid_quirk_list[i];
361 if (edid_vendor(edid, quirk->vendor) &&
362 (EDID_PRODUCT_ID(edid) == quirk->product_id))
363 return quirk->quirks;
369 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
370 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
374 * edid_fixup_preferred - set preferred modes based on quirk list
375 * @connector: has mode list to fix up
376 * @quirks: quirks list
378 * Walk the mode list for @connector, clearing the preferred status
379 * on existing modes and setting it anew for the right mode ala @quirks.
381 static void edid_fixup_preferred(struct drm_connector *connector,
384 struct drm_display_mode *t, *cur_mode, *preferred_mode;
385 int target_refresh = 0;
387 if (list_empty(&connector->probed_modes))
390 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
392 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
395 preferred_mode = list_first_entry(&connector->probed_modes,
396 struct drm_display_mode, head);
398 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
399 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
401 if (cur_mode == preferred_mode)
404 /* Largest mode is preferred */
405 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
406 preferred_mode = cur_mode;
408 /* At a given size, try to get closest to target refresh */
409 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
410 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
411 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
412 preferred_mode = cur_mode;
416 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
420 * Add the Autogenerated from the DMT spec.
421 * This table is copied from xfree86/modes/xf86EdidModes.c.
422 * But the mode with Reduced blank feature is deleted.
424 static struct drm_display_mode drm_dmt_modes[] = {
426 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
427 736, 832, 0, 350, 382, 385, 445, 0,
428 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
430 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
431 736, 832, 0, 400, 401, 404, 445, 0,
432 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
434 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
435 828, 936, 0, 400, 401, 404, 446, 0,
436 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
438 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
439 752, 800, 0, 480, 489, 492, 525, 0,
440 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
442 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
443 704, 832, 0, 480, 489, 492, 520, 0,
444 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
446 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
447 720, 840, 0, 480, 481, 484, 500, 0,
448 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
450 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
451 752, 832, 0, 480, 481, 484, 509, 0,
452 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
454 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
455 896, 1024, 0, 600, 601, 603, 625, 0,
456 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
458 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
459 968, 1056, 0, 600, 601, 605, 628, 0,
460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
462 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
463 976, 1040, 0, 600, 637, 643, 666, 0,
464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
466 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
467 896, 1056, 0, 600, 601, 604, 625, 0,
468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
470 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
471 896, 1048, 0, 600, 601, 604, 631, 0,
472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
474 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
475 976, 1088, 0, 480, 486, 494, 517, 0,
476 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
477 /* 1024x768@43Hz, interlace */
478 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
479 1208, 1264, 0, 768, 768, 772, 817, 0,
480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
481 DRM_MODE_FLAG_INTERLACE) },
483 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
484 1184, 1344, 0, 768, 771, 777, 806, 0,
485 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
487 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
488 1184, 1328, 0, 768, 771, 777, 806, 0,
489 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
491 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
492 1136, 1312, 0, 768, 769, 772, 800, 0,
493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
495 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
496 1072, 1376, 0, 768, 769, 772, 808, 0,
497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
499 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
500 1344, 1600, 0, 864, 865, 868, 900, 0,
501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
503 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
504 1472, 1664, 0, 768, 771, 778, 798, 0,
505 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
507 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
508 1488, 1696, 0, 768, 771, 778, 805, 0,
509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
511 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
512 1496, 1712, 0, 768, 771, 778, 809, 0,
513 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
515 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
516 1480, 1680, 0, 800, 803, 809, 831, 0,
517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
519 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
520 1488, 1696, 0, 800, 803, 809, 838, 0,
521 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
523 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
524 1496, 1712, 0, 800, 803, 809, 843, 0,
525 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
527 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
528 1488, 1800, 0, 960, 961, 964, 1000, 0,
529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
531 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
532 1504, 1728, 0, 960, 961, 964, 1011, 0,
533 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
535 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
536 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
537 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
539 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
540 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
541 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
543 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
544 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
545 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
547 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
548 1536, 1792, 0, 768, 771, 777, 795, 0,
549 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
551 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
552 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
553 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
555 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
556 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
557 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
559 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
560 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
561 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
563 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
564 1672, 1904, 0, 900, 903, 909, 934, 0,
565 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
567 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
568 1688, 1936, 0, 900, 903, 909, 942, 0,
569 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
571 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
572 1696, 1952, 0, 900, 903, 909, 948, 0,
573 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
575 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
576 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
577 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
579 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
580 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
581 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
583 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
584 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
585 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
587 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
588 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
589 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
591 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
592 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
593 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
595 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
596 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
597 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
599 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
600 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
601 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
603 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
604 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
605 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
607 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
608 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
609 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
611 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
612 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
613 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
615 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
616 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
617 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
619 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
620 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
621 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
623 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
624 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
625 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
627 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
628 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
629 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
631 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
632 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
633 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
635 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
636 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
637 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
639 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
640 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
641 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
643 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
644 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
645 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
647 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
648 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
649 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
651 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
652 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
653 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
655 static const int drm_num_dmt_modes =
656 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
658 static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
659 int hsize, int vsize, int fresh)
662 struct drm_display_mode *ptr, *mode;
665 for (i = 0; i < drm_num_dmt_modes; i++) {
666 ptr = &drm_dmt_modes[i];
667 if (hsize == ptr->hdisplay &&
668 vsize == ptr->vdisplay &&
669 fresh == drm_mode_vrefresh(ptr)) {
670 /* get the expected default mode */
671 mode = drm_mode_duplicate(dev, ptr);
679 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
680 * monitors fill with ascii space (0x20) instead.
683 bad_std_timing(u8 a, u8 b)
685 return (a == 0x00 && b == 0x00) ||
686 (a == 0x01 && b == 0x01) ||
687 (a == 0x20 && b == 0x20);
691 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
692 * @t: standard timing params
693 * @timing_level: standard timing level
695 * Take the standard timing params (in this case width, aspect, and refresh)
696 * and convert them into a real mode using CVT/GTF/DMT.
698 * Punts for now, but should eventually use the FB layer's CVT based mode
701 struct drm_display_mode *drm_mode_std(struct drm_device *dev,
702 struct std_timing *t,
706 struct drm_display_mode *mode;
709 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
710 >> EDID_TIMING_ASPECT_SHIFT;
711 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
712 >> EDID_TIMING_VFREQ_SHIFT;
714 if (bad_std_timing(t->hsize, t->vfreq_aspect))
717 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
718 hsize = t->hsize * 8 + 248;
719 /* vrefresh_rate = vfreq + 60 */
720 vrefresh_rate = vfreq + 60;
721 /* the vdisplay is calculated based on the aspect ratio */
722 if (aspect_ratio == 0) {
726 vsize = (hsize * 10) / 16;
727 } else if (aspect_ratio == 1)
728 vsize = (hsize * 3) / 4;
729 else if (aspect_ratio == 2)
730 vsize = (hsize * 4) / 5;
732 vsize = (hsize * 9) / 16;
734 if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
735 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
737 mode->hdisplay = 1366;
738 mode->vsync_start = mode->vsync_start - 1;
739 mode->vsync_end = mode->vsync_end - 1;
743 /* check whether it can be found in default mode table */
744 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
748 switch (timing_level) {
752 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
755 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
763 * EDID is delightfully ambiguous about how interlaced modes are to be
764 * encoded. Our internal representation is of frame height, but some
765 * HDTV detailed timings are encoded as field height.
767 * The format list here is from CEA, in frame size. Technically we
768 * should be checking refresh rate too. Whatever.
771 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
772 struct detailed_pixel_timing *pt)
775 static const struct {
777 } cea_interlaced[] = {
786 static const int n_sizes =
787 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
789 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
792 for (i = 0; i < n_sizes; i++) {
793 if ((mode->hdisplay == cea_interlaced[i].w) &&
794 (mode->vdisplay == cea_interlaced[i].h / 2)) {
796 mode->vsync_start *= 2;
797 mode->vsync_end *= 2;
803 mode->flags |= DRM_MODE_FLAG_INTERLACE;
807 * drm_mode_detailed - create a new mode from an EDID detailed timing section
808 * @dev: DRM device (needed to create new mode)
810 * @timing: EDID detailed timing info
811 * @quirks: quirks to apply
813 * An EDID detailed timing block contains enough info for us to create and
814 * return a new struct drm_display_mode.
816 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
818 struct detailed_timing *timing,
821 struct drm_display_mode *mode;
822 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
823 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
824 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
825 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
826 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
827 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
828 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
829 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
830 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
832 /* ignore tiny modes */
833 if (hactive < 64 || vactive < 64)
836 if (pt->misc & DRM_EDID_PT_STEREO) {
837 printk(KERN_WARNING "stereo mode not supported\n");
840 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
841 printk(KERN_WARNING "composite sync not supported\n");
844 /* it is incorrect if hsync/vsync width is zero */
845 if (!hsync_pulse_width || !vsync_pulse_width) {
846 DRM_DEBUG_KMS("Incorrect Detailed timing. "
847 "Wrong Hsync/Vsync pulse width\n");
850 mode = drm_mode_create(dev);
854 mode->type = DRM_MODE_TYPE_DRIVER;
856 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
857 timing->pixel_clock = cpu_to_le16(1088);
859 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
861 mode->hdisplay = hactive;
862 mode->hsync_start = mode->hdisplay + hsync_offset;
863 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
864 mode->htotal = mode->hdisplay + hblank;
866 mode->vdisplay = vactive;
867 mode->vsync_start = mode->vdisplay + vsync_offset;
868 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
869 mode->vtotal = mode->vdisplay + vblank;
871 /* Some EDIDs have bogus h/vtotal values */
872 if (mode->hsync_end > mode->htotal)
873 mode->htotal = mode->hsync_end + 1;
874 if (mode->vsync_end > mode->vtotal)
875 mode->vtotal = mode->vsync_end + 1;
877 drm_mode_set_name(mode);
879 drm_mode_do_interlace_quirk(mode, pt);
881 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
882 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
885 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
886 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
887 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
888 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
890 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
891 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
893 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
894 mode->width_mm *= 10;
895 mode->height_mm *= 10;
898 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
899 mode->width_mm = edid->width_cm * 10;
900 mode->height_mm = edid->height_cm * 10;
907 * Detailed mode info for the EDID "established modes" data to use.
909 static struct drm_display_mode edid_est_modes[] = {
910 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
911 968, 1056, 0, 600, 601, 605, 628, 0,
912 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
913 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
914 896, 1024, 0, 600, 601, 603, 625, 0,
915 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
916 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
917 720, 840, 0, 480, 481, 484, 500, 0,
918 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
919 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
920 704, 832, 0, 480, 489, 491, 520, 0,
921 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
922 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
923 768, 864, 0, 480, 483, 486, 525, 0,
924 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
925 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
926 752, 800, 0, 480, 490, 492, 525, 0,
927 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
928 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
929 846, 900, 0, 400, 421, 423, 449, 0,
930 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
931 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
932 846, 900, 0, 400, 412, 414, 449, 0,
933 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
934 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
935 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
936 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
937 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
938 1136, 1312, 0, 768, 769, 772, 800, 0,
939 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
940 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
941 1184, 1328, 0, 768, 771, 777, 806, 0,
942 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
943 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
944 1184, 1344, 0, 768, 771, 777, 806, 0,
945 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
946 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
947 1208, 1264, 0, 768, 768, 776, 817, 0,
948 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
949 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
950 928, 1152, 0, 624, 625, 628, 667, 0,
951 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
952 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
953 896, 1056, 0, 600, 601, 604, 625, 0,
954 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
955 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
956 976, 1040, 0, 600, 637, 643, 666, 0,
957 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
958 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
959 1344, 1600, 0, 864, 865, 868, 900, 0,
960 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
963 #define EDID_EST_TIMINGS 16
964 #define EDID_STD_TIMINGS 8
965 #define EDID_DETAILED_TIMINGS 4
968 * add_established_modes - get est. modes from EDID and add them
969 * @edid: EDID block to scan
971 * Each EDID block contains a bitmap of the supported "established modes" list
972 * (defined above). Tease them out and add them to the global modes list.
974 static int add_established_modes(struct drm_connector *connector, struct edid *edid)
976 struct drm_device *dev = connector->dev;
977 unsigned long est_bits = edid->established_timings.t1 |
978 (edid->established_timings.t2 << 8) |
979 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
982 for (i = 0; i <= EDID_EST_TIMINGS; i++)
983 if (est_bits & (1<<i)) {
984 struct drm_display_mode *newmode;
985 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
987 drm_mode_probed_add(connector, newmode);
995 * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
996 * @edid: EDID block to scan
998 static int standard_timing_level(struct edid *edid)
1000 if (edid->revision >= 2) {
1001 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1009 * add_standard_modes - get std. modes from EDID and add them
1010 * @edid: EDID block to scan
1012 * Standard modes can be calculated using the CVT standard. Grab them from
1013 * @edid, calculate them, and add them to the list.
1015 static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
1017 struct drm_device *dev = connector->dev;
1021 timing_level = standard_timing_level(edid);
1023 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1024 struct std_timing *t = &edid->standard_timings[i];
1025 struct drm_display_mode *newmode;
1027 /* If std timings bytes are 1, 1 it's empty */
1028 if (t->hsize == 1 && t->vfreq_aspect == 1)
1031 newmode = drm_mode_std(dev, &edid->standard_timings[i],
1032 edid->revision, timing_level);
1034 drm_mode_probed_add(connector, newmode);
1044 * - GTF secondary curve formula
1045 * - EDID 1.4 range offsets
1046 * - CVT extended bits
1049 mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
1051 struct detailed_data_monitor_range *range;
1052 int hsync, vrefresh;
1054 range = &timing->data.other_data.data.range;
1056 hsync = drm_mode_hsync(mode);
1057 vrefresh = drm_mode_vrefresh(mode);
1059 if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
1062 if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
1065 if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
1066 /* be forgiving since it's in units of 10MHz */
1067 int max_clock = range->pixel_clock_mhz * 10 + 9;
1069 if (mode->clock > max_clock)
1077 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
1078 * need to account for them.
1080 static int drm_gtf_modes_for_range(struct drm_connector *connector,
1081 struct detailed_timing *timing)
1084 struct drm_display_mode *newmode;
1085 struct drm_device *dev = connector->dev;
1087 for (i = 0; i < drm_num_dmt_modes; i++) {
1088 if (mode_in_range(drm_dmt_modes + i, timing)) {
1089 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1091 drm_mode_probed_add(connector, newmode);
1100 static int drm_cvt_modes(struct drm_connector *connector,
1101 struct detailed_timing *timing)
1103 int i, j, modes = 0;
1104 struct drm_display_mode *newmode;
1105 struct drm_device *dev = connector->dev;
1106 struct cvt_timing *cvt;
1107 const int rates[] = { 60, 85, 75, 60, 50 };
1108 const u8 empty[3] = { 0, 0, 0 };
1110 for (i = 0; i < 4; i++) {
1111 int uninitialized_var(width), height;
1112 cvt = &(timing->data.other_data.data.cvt[i]);
1114 if (!memcmp(cvt->code, empty, 3))
1117 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1118 switch (cvt->code[1] & 0x0c) {
1120 width = height * 4 / 3;
1123 width = height * 16 / 9;
1126 width = height * 16 / 10;
1129 width = height * 15 / 9;
1133 for (j = 1; j < 5; j++) {
1134 if (cvt->code[2] & (1 << j)) {
1135 newmode = drm_cvt_mode(dev, width, height,
1139 drm_mode_probed_add(connector, newmode);
1149 static int add_detailed_modes(struct drm_connector *connector,
1150 struct detailed_timing *timing,
1151 struct edid *edid, u32 quirks, int preferred)
1154 struct detailed_non_pixel *data = &timing->data.other_data;
1155 int timing_level = standard_timing_level(edid);
1156 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
1157 struct drm_display_mode *newmode;
1158 struct drm_device *dev = connector->dev;
1160 if (timing->pixel_clock) {
1161 newmode = drm_mode_detailed(dev, edid, timing, quirks);
1166 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1168 drm_mode_probed_add(connector, newmode);
1172 /* other timing types */
1173 switch (data->type) {
1174 case EDID_DETAIL_MONITOR_RANGE:
1176 modes += drm_gtf_modes_for_range(connector, timing);
1178 case EDID_DETAIL_STD_MODES:
1179 /* Six modes per detailed section */
1180 for (i = 0; i < 6; i++) {
1181 struct std_timing *std;
1182 struct drm_display_mode *newmode;
1184 std = &data->data.timings[i];
1185 newmode = drm_mode_std(dev, std, edid->revision,
1188 drm_mode_probed_add(connector, newmode);
1193 case EDID_DETAIL_CVT_3BYTE:
1194 modes += drm_cvt_modes(connector, timing);
1204 * add_detailed_info - get detailed mode info from EDID data
1205 * @connector: attached connector
1206 * @edid: EDID block to scan
1207 * @quirks: quirks to apply
1209 * Some of the detailed timing sections may contain mode information. Grab
1210 * it and add it to the list.
1212 static int add_detailed_info(struct drm_connector *connector,
1213 struct edid *edid, u32 quirks)
1217 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
1218 struct detailed_timing *timing = &edid->detailed_timings[i];
1219 int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1221 /* In 1.0, only timings are allowed */
1222 if (!timing->pixel_clock && edid->version == 1 &&
1223 edid->revision == 0)
1226 modes += add_detailed_modes(connector, timing, edid, quirks,
1234 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1236 * @connector: attached connector
1237 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1238 * @quirks: quirks to apply
1240 * Some of the detailed timing sections may contain mode information. Grab
1241 * it and add it to the list.
1243 static int add_detailed_info_eedid(struct drm_connector *connector,
1244 struct edid *edid, u32 quirks)
1247 char *edid_ext = NULL;
1248 struct detailed_timing *timing;
1250 int start_offset, end_offset;
1253 if (edid->version == 1 && edid->revision < 3) {
1254 /* If the EDID version is less than 1.3, there is no
1259 if (!edid->extensions) {
1260 /* if there is no extension EDID, it is unnecessary to
1261 * parse the E-EDID to get detailed info
1266 /* Chose real EDID extension number */
1267 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
1268 DRM_MAX_EDID_EXT_NUM : edid->extensions;
1270 /* Find CEA extension */
1271 for (i = 0; i < edid_ext_num; i++) {
1272 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1273 /* This block is CEA extension */
1274 if (edid_ext[0] == 0x02)
1278 if (i == edid_ext_num) {
1279 /* if there is no additional timing EDID block, return */
1283 /* Get the start offset of detailed timing block */
1284 start_offset = edid_ext[2];
1285 if (start_offset == 0) {
1286 /* If the start_offset is zero, it means that neither detailed
1287 * info nor data block exist. In such case it is also
1288 * unnecessary to parse the detailed timing info.
1293 timing_level = standard_timing_level(edid);
1294 end_offset = EDID_LENGTH;
1295 end_offset -= sizeof(struct detailed_timing);
1296 for (i = start_offset; i < end_offset;
1297 i += sizeof(struct detailed_timing)) {
1298 timing = (struct detailed_timing *)(edid_ext + i);
1299 modes += add_detailed_modes(connector, timing, edid, quirks, 0);
1305 #define HDMI_IDENTIFIER 0x000C03
1306 #define VENDOR_BLOCK 0x03
1308 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1309 * @edid: monitor EDID information
1311 * Parse the CEA extension according to CEA-861-B.
1312 * Return true if HDMI, false if not or unknown.
1314 bool drm_detect_hdmi_monitor(struct edid *edid)
1316 char *edid_ext = NULL;
1317 int i, hdmi_id, edid_ext_num;
1318 int start_offset, end_offset;
1319 bool is_hdmi = false;
1321 /* No EDID or EDID extensions */
1322 if (edid == NULL || edid->extensions == 0)
1325 /* Chose real EDID extension number */
1326 edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ?
1327 DRM_MAX_EDID_EXT_NUM : edid->extensions;
1329 /* Find CEA extension */
1330 for (i = 0; i < edid_ext_num; i++) {
1331 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1332 /* This block is CEA extension */
1333 if (edid_ext[0] == 0x02)
1337 if (i == edid_ext_num)
1340 /* Data block offset in CEA extension block */
1342 end_offset = edid_ext[2];
1345 * Because HDMI identifier is in Vendor Specific Block,
1346 * search it from all data blocks of CEA extension.
1348 for (i = start_offset; i < end_offset;
1349 /* Increased by data block len */
1350 i += ((edid_ext[i] & 0x1f) + 1)) {
1351 /* Find vendor specific block */
1352 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1353 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1354 edid_ext[i + 3] << 16;
1355 /* Find HDMI identifier */
1356 if (hdmi_id == HDMI_IDENTIFIER)
1365 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1368 * drm_add_edid_modes - add modes from EDID data, if available
1369 * @connector: connector we're probing
1372 * Add the specified modes to the connector's mode list.
1374 * Return number of modes added or 0 if we couldn't find any.
1376 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1384 if (!drm_edid_is_valid(edid)) {
1385 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1386 drm_get_connector_name(connector));
1390 quirks = edid_get_quirks(edid);
1392 num_modes += add_established_modes(connector, edid);
1393 num_modes += add_standard_modes(connector, edid);
1394 num_modes += add_detailed_info(connector, edid, quirks);
1395 num_modes += add_detailed_info_eedid(connector, edid, quirks);
1397 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1398 edid_fixup_preferred(connector, quirks);
1400 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1401 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1402 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1403 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1404 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1405 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1406 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1407 connector->display_info.width_mm = edid->width_cm * 10;
1408 connector->display_info.height_mm = edid->height_cm * 10;
1409 connector->display_info.gamma = edid->gamma;
1410 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1411 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1412 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1413 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1414 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1415 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1416 connector->display_info.gamma = edid->gamma;
1420 EXPORT_SYMBOL(drm_add_edid_modes);
1423 * drm_add_modes_noedid - add modes for the connectors without EDID
1424 * @connector: connector we're probing
1425 * @hdisplay: the horizontal display limit
1426 * @vdisplay: the vertical display limit
1428 * Add the specified modes to the connector's mode list. Only when the
1429 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1431 * Return number of modes added or 0 if we couldn't find any.
1433 int drm_add_modes_noedid(struct drm_connector *connector,
1434 int hdisplay, int vdisplay)
1436 int i, count, num_modes = 0;
1437 struct drm_display_mode *mode, *ptr;
1438 struct drm_device *dev = connector->dev;
1440 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1446 for (i = 0; i < count; i++) {
1447 ptr = &drm_dmt_modes[i];
1448 if (hdisplay && vdisplay) {
1450 * Only when two are valid, they will be used to check
1451 * whether the mode should be added to the mode list of
1454 if (ptr->hdisplay > hdisplay ||
1455 ptr->vdisplay > vdisplay)
1458 if (drm_mode_vrefresh(ptr) > 61)
1460 mode = drm_mode_duplicate(dev, ptr);
1462 drm_mode_probed_add(connector, mode);
1468 EXPORT_SYMBOL(drm_add_modes_noedid);