2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/i2c.h>
32 #include <linux/i2c-algo-bit.h>
36 #define EDID_EST_TIMINGS 16
37 #define EDID_STD_TIMINGS 8
38 #define EDID_DETAILED_TIMINGS 4
41 * EDID blocks out in the wild have a variety of bugs, try to collect
42 * them here (note that userspace may work around broken monitors first,
43 * but fixes should make their way here so that the kernel "just works"
44 * on as many displays as possible).
47 /* First detailed mode wrong, use largest 60Hz mode */
48 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
49 /* Reported 135MHz pixel clock is too high, needs adjustment */
50 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
51 /* Prefer the largest mode at 75 Hz */
52 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
53 /* Detail timing is in cm not mm */
54 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
55 /* Detailed timing descriptors have bogus size values, so just take the
56 * maximum size and use that.
58 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
59 /* Monitor forgot to set the first detailed is preferred bit. */
60 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
61 /* use +hsync +vsync for detailed mode */
62 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
69 static struct edid_quirk {
73 } edid_quirk_list[] = {
75 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
77 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
79 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
81 /* Belinea 10 15 55 */
82 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
83 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
85 /* Envision Peripherals, Inc. EN-7100e */
86 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
88 /* Funai Electronics PM36B */
89 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
90 EDID_QUIRK_DETAILED_IN_CM },
92 /* LG Philips LCD LP154W01-A5 */
93 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
94 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
96 /* Philips 107p5 CRT */
97 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
100 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
102 /* Samsung SyncMaster 205BW. Note: irony */
103 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
104 /* Samsung SyncMaster 22[5-6]BW */
105 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
106 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
109 /*** DDC fetch and block validation ***/
111 static const u8 edid_header[] = {
112 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
116 * Sanity check the EDID block (base or extension). Return 0 if the block
117 * doesn't check out, or 1 if it's valid.
120 drm_edid_block_valid(u8 *raw_edid)
124 struct edid *edid = (struct edid *)raw_edid;
126 if (raw_edid[0] == 0x00) {
129 for (i = 0; i < sizeof(edid_header); i++)
130 if (raw_edid[i] == edid_header[i])
134 else if (score >= 6) {
135 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
136 memcpy(raw_edid, edid_header, sizeof(edid_header));
142 for (i = 0; i < EDID_LENGTH; i++)
145 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
149 /* per-block-type checks */
150 switch (raw_edid[0]) {
152 if (edid->version != 1) {
153 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
157 if (edid->revision > 4)
158 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
169 DRM_ERROR("Raw EDID:\n");
170 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
177 * drm_edid_is_valid - sanity check EDID data
180 * Sanity-check an entire EDID record (including extensions)
182 bool drm_edid_is_valid(struct edid *edid)
185 u8 *raw = (u8 *)edid;
190 for (i = 0; i <= edid->extensions; i++)
191 if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
196 EXPORT_SYMBOL(drm_edid_is_valid);
198 #define DDC_ADDR 0x50
199 #define DDC_SEGMENT_ADDR 0x30
201 * Get EDID information via I2C.
203 * \param adapter : i2c device adaptor
204 * \param buf : EDID data buffer to be filled
205 * \param len : EDID data buffer length
206 * \return 0 on success or -1 on failure.
208 * Try to fetch EDID information by calling i2c driver function.
211 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
214 unsigned char start = block * EDID_LENGTH;
215 struct i2c_msg msgs[] = {
229 if (i2c_transfer(adapter, msgs, 2) == 2)
236 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
241 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
244 /* base block fetch */
245 for (i = 0; i < 4; i++) {
246 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
248 if (drm_edid_block_valid(block))
254 /* if there's no extensions, we're done */
255 if (block[0x7e] == 0)
258 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
263 for (j = 1; j <= block[0x7e]; j++) {
264 for (i = 0; i < 4; i++) {
265 if (drm_do_probe_ddc_edid(adapter, block, j,
268 if (drm_edid_block_valid(block + j * EDID_LENGTH))
278 dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n",
279 drm_get_connector_name(connector), j);
287 * Probe DDC presence.
289 * \param adapter : i2c device adaptor
290 * \return 1 on success
293 drm_probe_ddc(struct i2c_adapter *adapter)
297 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
301 * drm_get_edid - get EDID data, if available
302 * @connector: connector we're probing
303 * @adapter: i2c adapter to use for DDC
305 * Poke the given i2c channel to grab EDID data if possible. If found,
306 * attach it to the connector.
308 * Return edid data or NULL if we couldn't find any.
310 struct edid *drm_get_edid(struct drm_connector *connector,
311 struct i2c_adapter *adapter)
313 struct edid *edid = NULL;
315 if (drm_probe_ddc(adapter))
316 edid = (struct edid *)drm_do_get_edid(connector, adapter);
318 connector->display_info.raw_edid = (char *)edid;
323 EXPORT_SYMBOL(drm_get_edid);
325 /*** EDID parsing ***/
328 * edid_vendor - match a string against EDID's obfuscated vendor field
329 * @edid: EDID to match
330 * @vendor: vendor string
332 * Returns true if @vendor is in @edid, false otherwise
334 static bool edid_vendor(struct edid *edid, char *vendor)
338 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
339 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
340 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
341 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
343 return !strncmp(edid_vendor, vendor, 3);
347 * edid_get_quirks - return quirk flags for a given EDID
348 * @edid: EDID to process
350 * This tells subsequent routines what fixes they need to apply.
352 static u32 edid_get_quirks(struct edid *edid)
354 struct edid_quirk *quirk;
357 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
358 quirk = &edid_quirk_list[i];
360 if (edid_vendor(edid, quirk->vendor) &&
361 (EDID_PRODUCT_ID(edid) == quirk->product_id))
362 return quirk->quirks;
368 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
369 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
373 * edid_fixup_preferred - set preferred modes based on quirk list
374 * @connector: has mode list to fix up
375 * @quirks: quirks list
377 * Walk the mode list for @connector, clearing the preferred status
378 * on existing modes and setting it anew for the right mode ala @quirks.
380 static void edid_fixup_preferred(struct drm_connector *connector,
383 struct drm_display_mode *t, *cur_mode, *preferred_mode;
384 int target_refresh = 0;
386 if (list_empty(&connector->probed_modes))
389 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
391 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
394 preferred_mode = list_first_entry(&connector->probed_modes,
395 struct drm_display_mode, head);
397 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
398 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
400 if (cur_mode == preferred_mode)
403 /* Largest mode is preferred */
404 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
405 preferred_mode = cur_mode;
407 /* At a given size, try to get closest to target refresh */
408 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
409 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
410 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
411 preferred_mode = cur_mode;
415 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
419 * Add the Autogenerated from the DMT spec.
420 * This table is copied from xfree86/modes/xf86EdidModes.c.
421 * But the mode with Reduced blank feature is deleted.
423 static struct drm_display_mode drm_dmt_modes[] = {
425 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
426 736, 832, 0, 350, 382, 385, 445, 0,
427 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
429 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
430 736, 832, 0, 400, 401, 404, 445, 0,
431 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
433 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
434 828, 936, 0, 400, 401, 404, 446, 0,
435 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
437 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
438 752, 800, 0, 480, 489, 492, 525, 0,
439 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
441 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
442 704, 832, 0, 480, 489, 492, 520, 0,
443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
445 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
446 720, 840, 0, 480, 481, 484, 500, 0,
447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
449 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
450 752, 832, 0, 480, 481, 484, 509, 0,
451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
453 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
454 896, 1024, 0, 600, 601, 603, 625, 0,
455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
457 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
458 968, 1056, 0, 600, 601, 605, 628, 0,
459 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
461 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
462 976, 1040, 0, 600, 637, 643, 666, 0,
463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
466 896, 1056, 0, 600, 601, 604, 625, 0,
467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
469 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
470 896, 1048, 0, 600, 601, 604, 631, 0,
471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
473 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
474 976, 1088, 0, 480, 486, 494, 517, 0,
475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
476 /* 1024x768@43Hz, interlace */
477 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
478 1208, 1264, 0, 768, 768, 772, 817, 0,
479 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
480 DRM_MODE_FLAG_INTERLACE) },
482 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
483 1184, 1344, 0, 768, 771, 777, 806, 0,
484 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
486 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
487 1184, 1328, 0, 768, 771, 777, 806, 0,
488 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
490 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
491 1136, 1312, 0, 768, 769, 772, 800, 0,
492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
494 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
495 1072, 1376, 0, 768, 769, 772, 808, 0,
496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
498 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
499 1344, 1600, 0, 864, 865, 868, 900, 0,
500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
502 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
503 1472, 1664, 0, 768, 771, 778, 798, 0,
504 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
506 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
507 1488, 1696, 0, 768, 771, 778, 805, 0,
508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
510 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
511 1496, 1712, 0, 768, 771, 778, 809, 0,
512 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
514 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
515 1480, 1680, 0, 800, 803, 809, 831, 0,
516 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
518 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
519 1488, 1696, 0, 800, 803, 809, 838, 0,
520 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
522 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
523 1496, 1712, 0, 800, 803, 809, 843, 0,
524 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
526 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
527 1488, 1800, 0, 960, 961, 964, 1000, 0,
528 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
530 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
531 1504, 1728, 0, 960, 961, 964, 1011, 0,
532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
534 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
535 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
538 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
539 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
540 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
542 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
543 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
544 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
546 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
547 1536, 1792, 0, 768, 771, 777, 795, 0,
548 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
550 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
551 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
552 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
554 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
555 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
556 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
558 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
559 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
560 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
562 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
563 1672, 1904, 0, 900, 903, 909, 934, 0,
564 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
566 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
567 1688, 1936, 0, 900, 903, 909, 942, 0,
568 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
570 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
571 1696, 1952, 0, 900, 903, 909, 948, 0,
572 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
574 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
575 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
576 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
578 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
579 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
580 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
582 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
583 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
584 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
586 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
587 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
588 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
590 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
591 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
592 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
594 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
595 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
596 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
598 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
599 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
600 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
602 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
603 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
604 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
606 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
607 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
608 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
610 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
611 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
612 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
614 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
615 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
618 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
619 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
620 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
622 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
623 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
624 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
626 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
627 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
628 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
630 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
631 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
632 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
634 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
635 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
636 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
638 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
639 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
640 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
642 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
643 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
644 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
646 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
647 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
648 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
650 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
651 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
652 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
654 static const int drm_num_dmt_modes =
655 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
657 static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
658 int hsize, int vsize, int fresh)
661 struct drm_display_mode *ptr, *mode;
664 for (i = 0; i < drm_num_dmt_modes; i++) {
665 ptr = &drm_dmt_modes[i];
666 if (hsize == ptr->hdisplay &&
667 vsize == ptr->vdisplay &&
668 fresh == drm_mode_vrefresh(ptr)) {
669 /* get the expected default mode */
670 mode = drm_mode_duplicate(dev, ptr);
677 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
680 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
683 struct edid *edid = (struct edid *)raw_edid;
688 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
689 cb(&(edid->detailed_timings[i]), closure);
691 /* XXX extension block walk */
695 is_rb(struct detailed_timing *t, void *data)
698 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
700 *(bool *)data = true;
703 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
705 drm_monitor_supports_rb(struct edid *edid)
707 if (edid->revision >= 4) {
709 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
713 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
717 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
718 * monitors fill with ascii space (0x20) instead.
721 bad_std_timing(u8 a, u8 b)
723 return (a == 0x00 && b == 0x00) ||
724 (a == 0x01 && b == 0x01) ||
725 (a == 0x20 && b == 0x20);
729 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
730 * @t: standard timing params
731 * @timing_level: standard timing level
733 * Take the standard timing params (in this case width, aspect, and refresh)
734 * and convert them into a real mode using CVT/GTF/DMT.
736 struct drm_display_mode *drm_mode_std(struct drm_device *dev,
737 struct std_timing *t,
741 struct drm_display_mode *mode;
744 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
745 >> EDID_TIMING_ASPECT_SHIFT;
746 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
747 >> EDID_TIMING_VFREQ_SHIFT;
749 if (bad_std_timing(t->hsize, t->vfreq_aspect))
752 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
753 hsize = t->hsize * 8 + 248;
754 /* vrefresh_rate = vfreq + 60 */
755 vrefresh_rate = vfreq + 60;
756 /* the vdisplay is calculated based on the aspect ratio */
757 if (aspect_ratio == 0) {
761 vsize = (hsize * 10) / 16;
762 } else if (aspect_ratio == 1)
763 vsize = (hsize * 3) / 4;
764 else if (aspect_ratio == 2)
765 vsize = (hsize * 4) / 5;
767 vsize = (hsize * 9) / 16;
769 /* HDTV hack, part 1 */
770 if (vrefresh_rate == 60 &&
771 ((hsize == 1360 && vsize == 765) ||
772 (hsize == 1368 && vsize == 769))) {
777 /* HDTV hack, part 2 */
778 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
779 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
781 mode->hdisplay = 1366;
782 mode->vsync_start = mode->vsync_start - 1;
783 mode->vsync_end = mode->vsync_end - 1;
788 /* check whether it can be found in default mode table */
789 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
793 switch (timing_level) {
797 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
800 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
808 * EDID is delightfully ambiguous about how interlaced modes are to be
809 * encoded. Our internal representation is of frame height, but some
810 * HDTV detailed timings are encoded as field height.
812 * The format list here is from CEA, in frame size. Technically we
813 * should be checking refresh rate too. Whatever.
816 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
817 struct detailed_pixel_timing *pt)
820 static const struct {
822 } cea_interlaced[] = {
831 static const int n_sizes =
832 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
834 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
837 for (i = 0; i < n_sizes; i++) {
838 if ((mode->hdisplay == cea_interlaced[i].w) &&
839 (mode->vdisplay == cea_interlaced[i].h / 2)) {
841 mode->vsync_start *= 2;
842 mode->vsync_end *= 2;
848 mode->flags |= DRM_MODE_FLAG_INTERLACE;
852 * drm_mode_detailed - create a new mode from an EDID detailed timing section
853 * @dev: DRM device (needed to create new mode)
855 * @timing: EDID detailed timing info
856 * @quirks: quirks to apply
858 * An EDID detailed timing block contains enough info for us to create and
859 * return a new struct drm_display_mode.
861 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
863 struct detailed_timing *timing,
866 struct drm_display_mode *mode;
867 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
868 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
869 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
870 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
871 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
872 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
873 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
874 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
875 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
877 /* ignore tiny modes */
878 if (hactive < 64 || vactive < 64)
881 if (pt->misc & DRM_EDID_PT_STEREO) {
882 printk(KERN_WARNING "stereo mode not supported\n");
885 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
886 printk(KERN_WARNING "composite sync not supported\n");
889 /* it is incorrect if hsync/vsync width is zero */
890 if (!hsync_pulse_width || !vsync_pulse_width) {
891 DRM_DEBUG_KMS("Incorrect Detailed timing. "
892 "Wrong Hsync/Vsync pulse width\n");
895 mode = drm_mode_create(dev);
899 mode->type = DRM_MODE_TYPE_DRIVER;
901 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
902 timing->pixel_clock = cpu_to_le16(1088);
904 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
906 mode->hdisplay = hactive;
907 mode->hsync_start = mode->hdisplay + hsync_offset;
908 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
909 mode->htotal = mode->hdisplay + hblank;
911 mode->vdisplay = vactive;
912 mode->vsync_start = mode->vdisplay + vsync_offset;
913 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
914 mode->vtotal = mode->vdisplay + vblank;
916 /* Some EDIDs have bogus h/vtotal values */
917 if (mode->hsync_end > mode->htotal)
918 mode->htotal = mode->hsync_end + 1;
919 if (mode->vsync_end > mode->vtotal)
920 mode->vtotal = mode->vsync_end + 1;
922 drm_mode_set_name(mode);
924 drm_mode_do_interlace_quirk(mode, pt);
926 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
927 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
930 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
931 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
932 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
933 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
935 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
936 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
938 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
939 mode->width_mm *= 10;
940 mode->height_mm *= 10;
943 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
944 mode->width_mm = edid->width_cm * 10;
945 mode->height_mm = edid->height_cm * 10;
952 * Detailed mode info for the EDID "established modes" data to use.
954 static struct drm_display_mode edid_est_modes[] = {
955 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
956 968, 1056, 0, 600, 601, 605, 628, 0,
957 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
958 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
959 896, 1024, 0, 600, 601, 603, 625, 0,
960 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
961 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
962 720, 840, 0, 480, 481, 484, 500, 0,
963 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
964 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
965 704, 832, 0, 480, 489, 491, 520, 0,
966 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
967 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
968 768, 864, 0, 480, 483, 486, 525, 0,
969 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
970 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
971 752, 800, 0, 480, 490, 492, 525, 0,
972 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
973 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
974 846, 900, 0, 400, 421, 423, 449, 0,
975 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
976 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
977 846, 900, 0, 400, 412, 414, 449, 0,
978 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
979 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
980 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
981 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
982 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
983 1136, 1312, 0, 768, 769, 772, 800, 0,
984 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
985 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
986 1184, 1328, 0, 768, 771, 777, 806, 0,
987 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
988 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
989 1184, 1344, 0, 768, 771, 777, 806, 0,
990 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
991 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
992 1208, 1264, 0, 768, 768, 776, 817, 0,
993 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
994 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
995 928, 1152, 0, 624, 625, 628, 667, 0,
996 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
997 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
998 896, 1056, 0, 600, 601, 604, 625, 0,
999 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
1000 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
1001 976, 1040, 0, 600, 637, 643, 666, 0,
1002 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
1003 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1004 1344, 1600, 0, 864, 865, 868, 900, 0,
1005 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
1009 * add_established_modes - get est. modes from EDID and add them
1010 * @edid: EDID block to scan
1012 * Each EDID block contains a bitmap of the supported "established modes" list
1013 * (defined above). Tease them out and add them to the global modes list.
1015 static int add_established_modes(struct drm_connector *connector, struct edid *edid)
1017 struct drm_device *dev = connector->dev;
1018 unsigned long est_bits = edid->established_timings.t1 |
1019 (edid->established_timings.t2 << 8) |
1020 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1023 for (i = 0; i <= EDID_EST_TIMINGS; i++)
1024 if (est_bits & (1<<i)) {
1025 struct drm_display_mode *newmode;
1026 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1028 drm_mode_probed_add(connector, newmode);
1036 * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
1037 * @edid: EDID block to scan
1039 static int standard_timing_level(struct edid *edid)
1041 if (edid->revision >= 2) {
1042 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1050 * add_standard_modes - get std. modes from EDID and add them
1051 * @edid: EDID block to scan
1053 * Standard modes can be calculated using the CVT standard. Grab them from
1054 * @edid, calculate them, and add them to the list.
1056 static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
1058 struct drm_device *dev = connector->dev;
1062 timing_level = standard_timing_level(edid);
1064 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1065 struct std_timing *t = &edid->standard_timings[i];
1066 struct drm_display_mode *newmode;
1068 newmode = drm_mode_std(dev, &edid->standard_timings[i],
1069 edid->revision, timing_level);
1071 drm_mode_probed_add(connector, newmode);
1080 mode_is_rb(struct drm_display_mode *mode)
1082 return (mode->htotal - mode->hdisplay == 160) &&
1083 (mode->hsync_end - mode->hdisplay == 80) &&
1084 (mode->hsync_end - mode->hsync_start == 32) &&
1085 (mode->vsync_start - mode->vdisplay == 3);
1089 mode_in_hsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
1091 int hsync, hmin, hmax;
1094 if (edid->revision >= 4)
1095 hmin += ((t[4] & 0x04) ? 255 : 0);
1097 if (edid->revision >= 4)
1098 hmax += ((t[4] & 0x08) ? 255 : 0);
1099 hsync = drm_mode_hsync(mode);
1101 return (hsync <= hmax && hsync >= hmin);
1105 mode_in_vsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
1107 int vsync, vmin, vmax;
1110 if (edid->revision >= 4)
1111 vmin += ((t[4] & 0x01) ? 255 : 0);
1113 if (edid->revision >= 4)
1114 vmax += ((t[4] & 0x02) ? 255 : 0);
1115 vsync = drm_mode_vrefresh(mode);
1117 return (vsync <= vmax && vsync >= vmin);
1121 range_pixel_clock(struct edid *edid, u8 *t)
1124 if (t[9] == 0 || t[9] == 255)
1127 /* 1.4 with CVT support gives us real precision, yay */
1128 if (edid->revision >= 4 && t[10] == 0x04)
1129 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1131 /* 1.3 is pathetic, so fuzz up a bit */
1132 return t[9] * 10000 + 5001;
1136 * XXX fix this for GTF secondary curve formula
1139 mode_in_range(struct drm_display_mode *mode, struct edid *edid,
1140 struct detailed_timing *timing)
1143 u8 *t = (u8 *)timing;
1145 if (!mode_in_hsync_range(mode, edid, t))
1148 if (!mode_in_vsync_range(mode, edid, t))
1151 if ((max_clock = range_pixel_clock(edid, t)))
1152 if (mode->clock > max_clock)
1155 /* 1.4 max horizontal check */
1156 if (edid->revision >= 4 && t[10] == 0x04)
1157 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1160 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1167 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
1168 * need to account for them.
1171 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1172 struct detailed_timing *timing)
1175 struct drm_display_mode *newmode;
1176 struct drm_device *dev = connector->dev;
1178 for (i = 0; i < drm_num_dmt_modes; i++) {
1179 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
1180 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1182 drm_mode_probed_add(connector, newmode);
1191 static int drm_cvt_modes(struct drm_connector *connector,
1192 struct detailed_timing *timing)
1194 int i, j, modes = 0;
1195 struct drm_display_mode *newmode;
1196 struct drm_device *dev = connector->dev;
1197 struct cvt_timing *cvt;
1198 const int rates[] = { 60, 85, 75, 60, 50 };
1199 const u8 empty[3] = { 0, 0, 0 };
1201 for (i = 0; i < 4; i++) {
1202 int uninitialized_var(width), height;
1203 cvt = &(timing->data.other_data.data.cvt[i]);
1205 if (!memcmp(cvt->code, empty, 3))
1208 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1209 switch (cvt->code[1] & 0x0c) {
1211 width = height * 4 / 3;
1214 width = height * 16 / 9;
1217 width = height * 16 / 10;
1220 width = height * 15 / 9;
1224 for (j = 1; j < 5; j++) {
1225 if (cvt->code[2] & (1 << j)) {
1226 newmode = drm_cvt_mode(dev, width, height,
1230 drm_mode_probed_add(connector, newmode);
1240 static const struct {
1247 { 640, 350, 85, 0 },
1248 { 640, 400, 85, 0 },
1249 { 720, 400, 85, 0 },
1250 { 640, 480, 85, 0 },
1251 { 848, 480, 60, 0 },
1252 { 800, 600, 85, 0 },
1253 { 1024, 768, 85, 0 },
1254 { 1152, 864, 75, 0 },
1256 { 1280, 768, 60, 1 },
1257 { 1280, 768, 60, 0 },
1258 { 1280, 768, 75, 0 },
1259 { 1280, 768, 85, 0 },
1260 { 1280, 960, 60, 0 },
1261 { 1280, 960, 85, 0 },
1262 { 1280, 1024, 60, 0 },
1263 { 1280, 1024, 85, 0 },
1265 { 1360, 768, 60, 0 },
1266 { 1440, 900, 60, 1 },
1267 { 1440, 900, 60, 0 },
1268 { 1440, 900, 75, 0 },
1269 { 1440, 900, 85, 0 },
1270 { 1400, 1050, 60, 1 },
1271 { 1400, 1050, 60, 0 },
1272 { 1400, 1050, 75, 0 },
1274 { 1400, 1050, 85, 0 },
1275 { 1680, 1050, 60, 1 },
1276 { 1680, 1050, 60, 0 },
1277 { 1680, 1050, 75, 0 },
1278 { 1680, 1050, 85, 0 },
1279 { 1600, 1200, 60, 0 },
1280 { 1600, 1200, 65, 0 },
1281 { 1600, 1200, 70, 0 },
1283 { 1600, 1200, 75, 0 },
1284 { 1600, 1200, 85, 0 },
1285 { 1792, 1344, 60, 0 },
1286 { 1792, 1344, 85, 0 },
1287 { 1856, 1392, 60, 0 },
1288 { 1856, 1392, 75, 0 },
1289 { 1920, 1200, 60, 1 },
1290 { 1920, 1200, 60, 0 },
1292 { 1920, 1200, 75, 0 },
1293 { 1920, 1200, 85, 0 },
1294 { 1920, 1440, 60, 0 },
1295 { 1920, 1440, 75, 0 },
1297 static const int num_est3_modes = sizeof(est3_modes) / sizeof(est3_modes[0]);
1300 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1302 int i, j, m, modes = 0;
1303 struct drm_display_mode *mode;
1304 u8 *est = ((u8 *)timing) + 5;
1306 for (i = 0; i < 6; i++) {
1307 for (j = 7; j > 0; j--) {
1308 m = (i * 8) + (7 - j);
1309 if (m > num_est3_modes)
1311 if (est[i] & (1 << j)) {
1312 mode = drm_find_dmt(connector->dev,
1316 /*, est3_modes[m].rb */);
1318 drm_mode_probed_add(connector, mode);
1328 static int add_detailed_modes(struct drm_connector *connector,
1329 struct detailed_timing *timing,
1330 struct edid *edid, u32 quirks, int preferred)
1333 struct detailed_non_pixel *data = &timing->data.other_data;
1334 int timing_level = standard_timing_level(edid);
1335 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
1336 struct drm_display_mode *newmode;
1337 struct drm_device *dev = connector->dev;
1339 if (timing->pixel_clock) {
1340 newmode = drm_mode_detailed(dev, edid, timing, quirks);
1345 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1347 drm_mode_probed_add(connector, newmode);
1351 /* other timing types */
1352 switch (data->type) {
1353 case EDID_DETAIL_MONITOR_RANGE:
1355 modes += drm_gtf_modes_for_range(connector, edid,
1358 case EDID_DETAIL_STD_MODES:
1359 /* Six modes per detailed section */
1360 for (i = 0; i < 6; i++) {
1361 struct std_timing *std;
1362 struct drm_display_mode *newmode;
1364 std = &data->data.timings[i];
1365 newmode = drm_mode_std(dev, std, edid->revision,
1368 drm_mode_probed_add(connector, newmode);
1373 case EDID_DETAIL_CVT_3BYTE:
1374 modes += drm_cvt_modes(connector, timing);
1376 case EDID_DETAIL_EST_TIMINGS:
1377 modes += drm_est3_modes(connector, timing);
1387 * add_detailed_info - get detailed mode info from EDID data
1388 * @connector: attached connector
1389 * @edid: EDID block to scan
1390 * @quirks: quirks to apply
1392 * Some of the detailed timing sections may contain mode information. Grab
1393 * it and add it to the list.
1395 static int add_detailed_info(struct drm_connector *connector,
1396 struct edid *edid, u32 quirks)
1400 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
1401 struct detailed_timing *timing = &edid->detailed_timings[i];
1402 int preferred = (i == 0);
1404 if (preferred && edid->version == 1 && edid->revision < 4)
1405 preferred = (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1407 /* In 1.0, only timings are allowed */
1408 if (!timing->pixel_clock && edid->version == 1 &&
1409 edid->revision == 0)
1412 modes += add_detailed_modes(connector, timing, edid, quirks,
1420 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1422 * @connector: attached connector
1423 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1424 * @quirks: quirks to apply
1426 * Some of the detailed timing sections may contain mode information. Grab
1427 * it and add it to the list.
1429 static int add_detailed_info_eedid(struct drm_connector *connector,
1430 struct edid *edid, u32 quirks)
1433 char *edid_ext = NULL;
1434 struct detailed_timing *timing;
1435 int start_offset, end_offset;
1438 if (edid->version == 1 && edid->revision < 3)
1440 if (!edid->extensions)
1443 /* Find CEA extension */
1444 for (i = 0; i < edid->extensions; i++) {
1445 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1446 if (edid_ext[0] == 0x02)
1450 if (i == edid->extensions)
1453 /* Get the start offset of detailed timing block */
1454 start_offset = edid_ext[2];
1455 if (start_offset == 0) {
1456 /* If the start_offset is zero, it means that neither detailed
1457 * info nor data block exist. In such case it is also
1458 * unnecessary to parse the detailed timing info.
1463 timing_level = standard_timing_level(edid);
1464 end_offset = EDID_LENGTH;
1465 end_offset -= sizeof(struct detailed_timing);
1466 for (i = start_offset; i < end_offset;
1467 i += sizeof(struct detailed_timing)) {
1468 timing = (struct detailed_timing *)(edid_ext + i);
1469 modes += add_detailed_modes(connector, timing, edid, quirks, 0);
1475 #define HDMI_IDENTIFIER 0x000C03
1476 #define VENDOR_BLOCK 0x03
1478 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1479 * @edid: monitor EDID information
1481 * Parse the CEA extension according to CEA-861-B.
1482 * Return true if HDMI, false if not or unknown.
1484 bool drm_detect_hdmi_monitor(struct edid *edid)
1486 char *edid_ext = NULL;
1488 int start_offset, end_offset;
1489 bool is_hdmi = false;
1491 /* No EDID or EDID extensions */
1492 if (edid == NULL || edid->extensions == 0)
1495 /* Find CEA extension */
1496 for (i = 0; i < edid->extensions; i++) {
1497 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1498 /* This block is CEA extension */
1499 if (edid_ext[0] == 0x02)
1503 if (i == edid->extensions)
1506 /* Data block offset in CEA extension block */
1508 end_offset = edid_ext[2];
1511 * Because HDMI identifier is in Vendor Specific Block,
1512 * search it from all data blocks of CEA extension.
1514 for (i = start_offset; i < end_offset;
1515 /* Increased by data block len */
1516 i += ((edid_ext[i] & 0x1f) + 1)) {
1517 /* Find vendor specific block */
1518 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1519 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1520 edid_ext[i + 3] << 16;
1521 /* Find HDMI identifier */
1522 if (hdmi_id == HDMI_IDENTIFIER)
1531 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1534 * drm_add_edid_modes - add modes from EDID data, if available
1535 * @connector: connector we're probing
1538 * Add the specified modes to the connector's mode list.
1540 * Return number of modes added or 0 if we couldn't find any.
1542 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1550 if (!drm_edid_is_valid(edid)) {
1551 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1552 drm_get_connector_name(connector));
1556 quirks = edid_get_quirks(edid);
1559 * EDID spec says modes should be preferred in this order:
1560 * - preferred detailed mode
1561 * - other detailed modes from base block
1562 * - detailed modes from extension blocks
1563 * - CVT 3-byte code modes
1564 * - standard timing codes
1565 * - established timing codes
1566 * - modes inferred from GTF or CVT range information
1568 * We don't quite implement this yet, but we're close.
1570 * XXX order for additional mode types in extension blocks?
1572 num_modes += add_detailed_info(connector, edid, quirks);
1573 num_modes += add_detailed_info_eedid(connector, edid, quirks);
1574 num_modes += add_standard_modes(connector, edid);
1575 num_modes += add_established_modes(connector, edid);
1577 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1578 edid_fixup_preferred(connector, quirks);
1580 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1581 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1582 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1583 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1584 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1585 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1586 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1587 connector->display_info.width_mm = edid->width_cm * 10;
1588 connector->display_info.height_mm = edid->height_cm * 10;
1589 connector->display_info.gamma = edid->gamma;
1590 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1591 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1592 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1593 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1594 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1595 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1596 connector->display_info.gamma = edid->gamma;
1600 EXPORT_SYMBOL(drm_add_edid_modes);
1603 * drm_add_modes_noedid - add modes for the connectors without EDID
1604 * @connector: connector we're probing
1605 * @hdisplay: the horizontal display limit
1606 * @vdisplay: the vertical display limit
1608 * Add the specified modes to the connector's mode list. Only when the
1609 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1611 * Return number of modes added or 0 if we couldn't find any.
1613 int drm_add_modes_noedid(struct drm_connector *connector,
1614 int hdisplay, int vdisplay)
1616 int i, count, num_modes = 0;
1617 struct drm_display_mode *mode, *ptr;
1618 struct drm_device *dev = connector->dev;
1620 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1626 for (i = 0; i < count; i++) {
1627 ptr = &drm_dmt_modes[i];
1628 if (hdisplay && vdisplay) {
1630 * Only when two are valid, they will be used to check
1631 * whether the mode should be added to the mode list of
1634 if (ptr->hdisplay > hdisplay ||
1635 ptr->vdisplay > vdisplay)
1638 if (drm_mode_vrefresh(ptr) > 61)
1640 mode = drm_mode_duplicate(dev, ptr);
1642 drm_mode_probed_add(connector, mode);
1648 EXPORT_SYMBOL(drm_add_modes_noedid);