SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/crypto/talitos.c

   1 /*
   2  * talitos - Freescale Integrated Security Engine (SEC) device driver
   3  *
   4  * Copyright (c) 2008 Freescale Semiconductor, Inc.
   5  *
   6  * Scatterlist Crypto API glue code copied from files with the following:
   7  * Copyright (c) 2006-2007 Herbert Xu <herbert@gondor.apana.org.au>
   8  *
   9  * Crypto algorithm registration code copied from hifn driver:
  10  * 2007+ Copyright (c) Evgeniy Polyakov <johnpol@2ka.mipt.ru>
  11  * All rights reserved.
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License as published by
  15  * the Free Software Foundation; either version 2 of the License, or
  16  * (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  26  */
  27
  28 #include <linux/kernel.h>
  29 #include <linux/module.h>
  30 #include <linux/mod_devicetable.h>
  31 #include <linux/device.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/crypto.h>
  34 #include <linux/hw_random.h>
  35 #include <linux/of_platform.h>
  36 #include <linux/dma-mapping.h>
  37 #include <linux/io.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/rtnetlink.h>
  40
  41 #include <crypto/algapi.h>
  42 #include <crypto/aes.h>
  43 #include <crypto/sha.h>
  44 #include <crypto/aead.h>
  45 #include <crypto/authenc.h>
  46
  47 #include "talitos.h"
  48
  49 #define TALITOS_TIMEOUT 100000
  50 #define TALITOS_MAX_DATA_LEN 65535
  51
  52 #define DESC_TYPE(desc_hdr) ((be32_to_cpu(desc_hdr) >> 3) & 0x1f)
  53 #define PRIMARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 28) & 0xf)
  54 #define SECONDARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 16) & 0xf)
  55
  56 /* descriptor pointer entry */
  57 struct talitos_ptr {
  58         __be16 len;     /* length */
  59         u8 j_extent;    /* jump to sg link table and/or extent */
  60         u8 eptr;        /* extended address */
  61         __be32 ptr;     /* address */
  62 };
  63
  64 /* descriptor */
  65 struct talitos_desc {
  66         __be32 hdr;                     /* header high bits */
  67         __be32 hdr_lo;                  /* header low bits */
  68         struct talitos_ptr ptr[7];      /* ptr/len pair array */
  69 };
  70
  71 /**
  72  * talitos_request - descriptor submission request
  73  * @desc: descriptor pointer (kernel virtual)
  74  * @dma_desc: descriptor's physical bus address
  75  * @callback: whom to call when descriptor processing is done
  76  * @context: caller context (optional)
  77  */
  78 struct talitos_request {
  79         struct talitos_desc *desc;
  80         dma_addr_t dma_desc;
  81         void (*callback) (struct device *dev, struct talitos_desc *desc,
  82                           void *context, int error);
  83         void *context;
  84 };
  85
  86 struct talitos_private {
  87         struct device *dev;
  88         struct of_device *ofdev;
  89         void __iomem *reg;
  90         int irq;
  91
  92         /* SEC version geometry (from device tree node) */
  93         unsigned int num_channels;
  94         unsigned int chfifo_len;
  95         unsigned int exec_units;
  96         unsigned int desc_types;
  97
  98         /* next channel to be assigned next incoming descriptor */
  99         atomic_t last_chan;
 100
 101         /* per-channel request fifo */
 102         struct talitos_request **fifo;
 103
 104         /*
 105          * length of the request fifo
 106          * fifo_len is chfifo_len rounded up to next power of 2
 107          * so we can use bitwise ops to wrap
 108          */
 109         unsigned int fifo_len;
 110
 111         /* per-channel index to next free descriptor request */
 112         int *head;
 113
 114         /* per-channel index to next in-progress/done descriptor request */
 115         int *tail;
 116
 117         /* per-channel request submission (head) and release (tail) locks */
 118         spinlock_t *head_lock;
 119         spinlock_t *tail_lock;
 120
 121         /* request callback tasklet */
 122         struct tasklet_struct done_task;
 123         struct tasklet_struct error_task;
 124
 125         /* list of registered algorithms */
 126         struct list_head alg_list;
 127
 128         /* hwrng device */
 129         struct hwrng rng;
 130 };
 131
 132 /*
 133  * map virtual single (contiguous) pointer to h/w descriptor pointer
 134  */
 135 static void map_single_talitos_ptr(struct device *dev,
 136                                    struct talitos_ptr *talitos_ptr,
 137                                    unsigned short len, void *data,
 138                                    unsigned char extent,
 139                                    enum dma_data_direction dir)
 140 {
 141         talitos_ptr->len = cpu_to_be16(len);
 142         talitos_ptr->ptr = cpu_to_be32(dma_map_single(dev, data, len, dir));
 143         talitos_ptr->j_extent = extent;
 144 }
 145
 146 /*
 147  * unmap bus single (contiguous) h/w descriptor pointer
 148  */
 149 static void unmap_single_talitos_ptr(struct device *dev,
 150                                      struct talitos_ptr *talitos_ptr,
 151                                      enum dma_data_direction dir)
 152 {
 153         dma_unmap_single(dev, be32_to_cpu(talitos_ptr->ptr),
 154                          be16_to_cpu(talitos_ptr->len), dir);
 155 }
 156
 157 static int reset_channel(struct device *dev, int ch)
 158 {
 159         struct talitos_private *priv = dev_get_drvdata(dev);
 160         unsigned int timeout = TALITOS_TIMEOUT;
 161
 162         setbits32(priv->reg + TALITOS_CCCR(ch), TALITOS_CCCR_RESET);
 163
 164         while ((in_be32(priv->reg + TALITOS_CCCR(ch)) & TALITOS_CCCR_RESET)
 165                && --timeout)
 166                 cpu_relax();
 167
 168         if (timeout == 0) {
 169                 dev_err(dev, "failed to reset channel %d\n", ch);
 170                 return -EIO;
 171         }
 172
 173         /* set done writeback and IRQ */
 174         setbits32(priv->reg + TALITOS_CCCR_LO(ch), TALITOS_CCCR_LO_CDWE |
 175                   TALITOS_CCCR_LO_CDIE);
 176
 177         return 0;
 178 }
 179
 180 static int reset_device(struct device *dev)
 181 {
 182         struct talitos_private *priv = dev_get_drvdata(dev);
 183         unsigned int timeout = TALITOS_TIMEOUT;
 184
 185         setbits32(priv->reg + TALITOS_MCR, TALITOS_MCR_SWR);
 186
 187         while ((in_be32(priv->reg + TALITOS_MCR) & TALITOS_MCR_SWR)
 188                && --timeout)
 189                 cpu_relax();
 190
 191         if (timeout == 0) {
 192                 dev_err(dev, "failed to reset device\n");
 193                 return -EIO;
 194         }
 195
 196         return 0;
 197 }
 198
 199 /*
 200  * Reset and initialize the device
 201  */
 202 static int init_device(struct device *dev)
 203 {
 204         struct talitos_private *priv = dev_get_drvdata(dev);
 205         int ch, err;
 206
 207         /*
 208          * Master reset
 209          * errata documentation: warning: certain SEC interrupts
 210          * are not fully cleared by writing the MCR:SWR bit,
 211          * set bit twice to completely reset
 212          */
 213         err = reset_device(dev);
 214         if (err)
 215                 return err;
 216
 217         err = reset_device(dev);
 218         if (err)
 219                 return err;
 220
 221         /* reset channels */
 222         for (ch = 0; ch < priv->num_channels; ch++) {
 223                 err = reset_channel(dev, ch);
 224                 if (err)
 225                         return err;
 226         }
 227
 228         /* enable channel done and error interrupts */
 229         setbits32(priv->reg + TALITOS_IMR, TALITOS_IMR_INIT);
 230         setbits32(priv->reg + TALITOS_IMR_LO, TALITOS_IMR_LO_INIT);
 231
 232         return 0;
 233 }
 234
 235 /**
 236  * talitos_submit - submits a descriptor to the device for processing
 237  * @dev:        the SEC device to be used
 238  * @desc:       the descriptor to be processed by the device
 239  * @callback:   whom to call when processing is complete
 240  * @context:    a handle for use by caller (optional)
 241  *
 242  * desc must contain valid dma-mapped (bus physical) address pointers.
 243  * callback must check err and feedback in descriptor header
 244  * for device processing status.
 245  */
 246 static int talitos_submit(struct device *dev, struct talitos_desc *desc,
 247                           void (*callback)(struct device *dev,
 248                                            struct talitos_desc *desc,
 249                                            void *context, int error),
 250                           void *context)
 251 {
 252         struct talitos_private *priv = dev_get_drvdata(dev);
 253         struct talitos_request *request;
 254         unsigned long flags, ch;
 255         int head;
 256
 257         /* select done notification */
 258         desc->hdr |= DESC_HDR_DONE_NOTIFY;
 259
 260         /* emulate SEC's round-robin channel fifo polling scheme */
 261         ch = atomic_inc_return(&priv->last_chan) & (priv->num_channels - 1);
 262
 263         spin_lock_irqsave(&priv->head_lock[ch], flags);
 264
 265         head = priv->head[ch];
 266         request = &priv->fifo[ch][head];
 267
 268         if (request->desc) {
 269                 /* request queue is full */
 270                 spin_unlock_irqrestore(&priv->head_lock[ch], flags);
 271                 return -EAGAIN;
 272         }
 273
 274         /* map descriptor and save caller data */
 275         request->dma_desc = dma_map_single(dev, desc, sizeof(*desc),
 276                                            DMA_BIDIRECTIONAL);
 277         request->callback = callback;
 278         request->context = context;
 279
 280         /* increment fifo head */
 281         priv->head[ch] = (priv->head[ch] + 1) & (priv->fifo_len - 1);
 282
 283         smp_wmb();
 284         request->desc = desc;
 285
 286         /* GO! */
 287         wmb();
 288         out_be32(priv->reg + TALITOS_FF_LO(ch), request->dma_desc);
 289
 290         spin_unlock_irqrestore(&priv->head_lock[ch], flags);
 291
 292         return -EINPROGRESS;
 293 }
 294
 295 /*
 296  * process what was done, notify callback of error if not
 297  */
 298 static void flush_channel(struct device *dev, int ch, int error, int reset_ch)
 299 {
 300         struct talitos_private *priv = dev_get_drvdata(dev);
 301         struct talitos_request *request, saved_req;
 302         unsigned long flags;
 303         int tail, status;
 304
 305         spin_lock_irqsave(&priv->tail_lock[ch], flags);
 306
 307         tail = priv->tail[ch];
 308         while (priv->fifo[ch][tail].desc) {
 309                 request = &priv->fifo[ch][tail];
 310
 311                 /* descriptors with their done bits set don't get the error */
 312                 rmb();
 313                 if ((request->desc->hdr & DESC_HDR_DONE) == DESC_HDR_DONE)
 314                         status = 0;
 315                 else
 316                         if (!error)
 317                                 break;
 318                         else
 319                                 status = error;
 320
 321                 dma_unmap_single(dev, request->dma_desc,
 322                         sizeof(struct talitos_desc), DMA_BIDIRECTIONAL);
 323
 324                 /* copy entries so we can call callback outside lock */
 325                 saved_req.desc = request->desc;
 326                 saved_req.callback = request->callback;
 327                 saved_req.context = request->context;
 328
 329                 /* release request entry in fifo */
 330                 smp_wmb();
 331                 request->desc = NULL;
 332
 333                 /* increment fifo tail */
 334                 priv->tail[ch] = (tail + 1) & (priv->fifo_len - 1);
 335
 336                 spin_unlock_irqrestore(&priv->tail_lock[ch], flags);
 337                 saved_req.callback(dev, saved_req.desc, saved_req.context,
 338                                    status);
 339                 /* channel may resume processing in single desc error case */
 340                 if (error && !reset_ch && status == error)
 341                         return;
 342                 spin_lock_irqsave(&priv->tail_lock[ch], flags);
 343                 tail = priv->tail[ch];
 344         }
 345
 346         spin_unlock_irqrestore(&priv->tail_lock[ch], flags);
 347 }
 348
 349 /*
 350  * process completed requests for channels that have done status
 351  */
 352 static void talitos_done(unsigned long data)
 353 {
 354         struct device *dev = (struct device *)data;
 355         struct talitos_private *priv = dev_get_drvdata(dev);
 356         int ch;
 357
 358         for (ch = 0; ch < priv->num_channels; ch++)
 359                 flush_channel(dev, ch, 0, 0);
 360 }
 361
 362 /*
 363  * locate current (offending) descriptor
 364  */
 365 static struct talitos_desc *current_desc(struct device *dev, int ch)
 366 {
 367         struct talitos_private *priv = dev_get_drvdata(dev);
 368         int tail = priv->tail[ch];
 369         dma_addr_t cur_desc;
 370
 371         cur_desc = in_be32(priv->reg + TALITOS_CDPR_LO(ch));
 372
 373         while (priv->fifo[ch][tail].dma_desc != cur_desc) {
 374                 tail = (tail + 1) & (priv->fifo_len - 1);
 375                 if (tail == priv->tail[ch]) {
 376                         dev_err(dev, "couldn't locate current descriptor\n");
 377                         return NULL;
 378                 }
 379         }
 380
 381         return priv->fifo[ch][tail].desc;
 382 }
 383
 384 /*
 385  * user diagnostics; report root cause of error based on execution unit status
 386  */
 387 static void report_eu_error(struct device *dev, int ch, struct talitos_desc *desc)
 388 {
 389         struct talitos_private *priv = dev_get_drvdata(dev);
 390         int i;
 391
 392         switch (desc->hdr & DESC_HDR_SEL0_MASK) {
 393         case DESC_HDR_SEL0_AFEU:
 394                 dev_err(dev, "AFEUISR 0x%08x_%08x\n",
 395                         in_be32(priv->reg + TALITOS_AFEUISR),
 396                         in_be32(priv->reg + TALITOS_AFEUISR_LO));
 397                 break;
 398         case DESC_HDR_SEL0_DEU:
 399                 dev_err(dev, "DEUISR 0x%08x_%08x\n",
 400                         in_be32(priv->reg + TALITOS_DEUISR),
 401                         in_be32(priv->reg + TALITOS_DEUISR_LO));
 402                 break;
 403         case DESC_HDR_SEL0_MDEUA:
 404         case DESC_HDR_SEL0_MDEUB:
 405                 dev_err(dev, "MDEUISR 0x%08x_%08x\n",
 406                         in_be32(priv->reg + TALITOS_MDEUISR),
 407                         in_be32(priv->reg + TALITOS_MDEUISR_LO));
 408                 break;
 409         case DESC_HDR_SEL0_RNG:
 410                 dev_err(dev, "RNGUISR 0x%08x_%08x\n",
 411                         in_be32(priv->reg + TALITOS_RNGUISR),
 412                         in_be32(priv->reg + TALITOS_RNGUISR_LO));
 413                 break;
 414         case DESC_HDR_SEL0_PKEU:
 415                 dev_err(dev, "PKEUISR 0x%08x_%08x\n",
 416                         in_be32(priv->reg + TALITOS_PKEUISR),
 417                         in_be32(priv->reg + TALITOS_PKEUISR_LO));
 418                 break;
 419         case DESC_HDR_SEL0_AESU:
 420                 dev_err(dev, "AESUISR 0x%08x_%08x\n",
 421                         in_be32(priv->reg + TALITOS_AESUISR),
 422                         in_be32(priv->reg + TALITOS_AESUISR_LO));
 423                 break;
 424         case DESC_HDR_SEL0_CRCU:
 425                 dev_err(dev, "CRCUISR 0x%08x_%08x\n",
 426                         in_be32(priv->reg + TALITOS_CRCUISR),
 427                         in_be32(priv->reg + TALITOS_CRCUISR_LO));
 428                 break;
 429         case DESC_HDR_SEL0_KEU:
 430                 dev_err(dev, "KEUISR 0x%08x_%08x\n",
 431                         in_be32(priv->reg + TALITOS_KEUISR),
 432                         in_be32(priv->reg + TALITOS_KEUISR_LO));
 433                 break;
 434         }
 435
 436         switch (desc->hdr & DESC_HDR_SEL1_MASK) {
 437         case DESC_HDR_SEL1_MDEUA:
 438         case DESC_HDR_SEL1_MDEUB:
 439                 dev_err(dev, "MDEUISR 0x%08x_%08x\n",
 440                         in_be32(priv->reg + TALITOS_MDEUISR),
 441                         in_be32(priv->reg + TALITOS_MDEUISR_LO));
 442                 break;
 443         case DESC_HDR_SEL1_CRCU:
 444                 dev_err(dev, "CRCUISR 0x%08x_%08x\n",
 445                         in_be32(priv->reg + TALITOS_CRCUISR),
 446                         in_be32(priv->reg + TALITOS_CRCUISR_LO));
 447                 break;
 448         }
 449
 450         for (i = 0; i < 8; i++)
 451                 dev_err(dev, "DESCBUF 0x%08x_%08x\n",
 452                         in_be32(priv->reg + TALITOS_DESCBUF(ch) + 8*i),
 453                         in_be32(priv->reg + TALITOS_DESCBUF_LO(ch) + 8*i));
 454 }
 455
 456 /*
 457  * recover from error interrupts
 458  */
 459 static void talitos_error(unsigned long data)
 460 {
 461         struct device *dev = (struct device *)data;
 462         struct talitos_private *priv = dev_get_drvdata(dev);
 463         unsigned int timeout = TALITOS_TIMEOUT;
 464         int ch, error, reset_dev = 0, reset_ch = 0;
 465         u32 isr, isr_lo, v, v_lo;
 466
 467         isr = in_be32(priv->reg + TALITOS_ISR);
 468         isr_lo = in_be32(priv->reg + TALITOS_ISR_LO);
 469
 470         for (ch = 0; ch < priv->num_channels; ch++) {
 471                 /* skip channels without errors */
 472                 if (!(isr & (1 << (ch * 2 + 1))))
 473                         continue;
 474
 475                 error = -EINVAL;
 476
 477                 v = in_be32(priv->reg + TALITOS_CCPSR(ch));
 478                 v_lo = in_be32(priv->reg + TALITOS_CCPSR_LO(ch));
 479
 480                 if (v_lo & TALITOS_CCPSR_LO_DOF) {
 481                         dev_err(dev, "double fetch fifo overflow error\n");
 482                         error = -EAGAIN;
 483                         reset_ch = 1;
 484                 }
 485                 if (v_lo & TALITOS_CCPSR_LO_SOF) {
 486                         /* h/w dropped descriptor */
 487                         dev_err(dev, "single fetch fifo overflow error\n");
 488                         error = -EAGAIN;
 489                 }
 490                 if (v_lo & TALITOS_CCPSR_LO_MDTE)
 491                         dev_err(dev, "master data transfer error\n");
 492                 if (v_lo & TALITOS_CCPSR_LO_SGDLZ)
 493                         dev_err(dev, "s/g data length zero error\n");
 494                 if (v_lo & TALITOS_CCPSR_LO_FPZ)
 495                         dev_err(dev, "fetch pointer zero error\n");
 496                 if (v_lo & TALITOS_CCPSR_LO_IDH)
 497                         dev_err(dev, "illegal descriptor header error\n");
 498                 if (v_lo & TALITOS_CCPSR_LO_IEU)
 499                         dev_err(dev, "invalid execution unit error\n");
 500                 if (v_lo & TALITOS_CCPSR_LO_EU)
 501                         report_eu_error(dev, ch, current_desc(dev, ch));
 502                 if (v_lo & TALITOS_CCPSR_LO_GB)
 503                         dev_err(dev, "gather boundary error\n");
 504                 if (v_lo & TALITOS_CCPSR_LO_GRL)
 505                         dev_err(dev, "gather return/length error\n");
 506                 if (v_lo & TALITOS_CCPSR_LO_SB)
 507                         dev_err(dev, "scatter boundary error\n");
 508                 if (v_lo & TALITOS_CCPSR_LO_SRL)
 509                         dev_err(dev, "scatter return/length error\n");
 510
 511                 flush_channel(dev, ch, error, reset_ch);
 512
 513                 if (reset_ch) {
 514                         reset_channel(dev, ch);
 515                 } else {
 516                         setbits32(priv->reg + TALITOS_CCCR(ch),
 517                                   TALITOS_CCCR_CONT);
 518                         setbits32(priv->reg + TALITOS_CCCR_LO(ch), 0);
 519                         while ((in_be32(priv->reg + TALITOS_CCCR(ch)) &
 520                                TALITOS_CCCR_CONT) && --timeout)
 521                                 cpu_relax();
 522                         if (timeout == 0) {
 523                                 dev_err(dev, "failed to restart channel %d\n",
 524                                         ch);
 525                                 reset_dev = 1;
 526                         }
 527                 }
 528         }
 529         if (reset_dev || isr & ~TALITOS_ISR_CHERR || isr_lo) {
 530                 dev_err(dev, "done overflow, internal time out, or rngu error: "
 531                         "ISR 0x%08x_%08x\n", isr, isr_lo);
 532
 533                 /* purge request queues */
 534                 for (ch = 0; ch < priv->num_channels; ch++)
 535                         flush_channel(dev, ch, -EIO, 1);
 536
 537                 /* reset and reinitialize the device */
 538                 init_device(dev);
 539         }
 540 }
 541
 542 static irqreturn_t talitos_interrupt(int irq, void *data)
 543 {
 544         struct device *dev = data;
 545         struct talitos_private *priv = dev_get_drvdata(dev);
 546         u32 isr, isr_lo;
 547
 548         isr = in_be32(priv->reg + TALITOS_ISR);
 549         isr_lo = in_be32(priv->reg + TALITOS_ISR_LO);
 550
 551         /* ack */
 552         out_be32(priv->reg + TALITOS_ICR, isr);
 553         out_be32(priv->reg + TALITOS_ICR_LO, isr_lo);
 554
 555         if (unlikely((isr & ~TALITOS_ISR_CHDONE) || isr_lo))
 556                 talitos_error((unsigned long)data);
 557         else
 558                 if (likely(isr & TALITOS_ISR_CHDONE))
 559                         tasklet_schedule(&priv->done_task);
 560
 561         return (isr || isr_lo) ? IRQ_HANDLED : IRQ_NONE;
 562 }
 563
 564 /*
 565  * hwrng
 566  */
 567 static int talitos_rng_data_present(struct hwrng *rng, int wait)
 568 {
 569         struct device *dev = (struct device *)rng->priv;
 570         struct talitos_private *priv = dev_get_drvdata(dev);
 571         u32 ofl;
 572         int i;
 573
 574         for (i = 0; i < 20; i++) {
 575                 ofl = in_be32(priv->reg + TALITOS_RNGUSR_LO) &
 576                       TALITOS_RNGUSR_LO_OFL;
 577                 if (ofl || !wait)
 578                         break;
 579                 udelay(10);
 580         }
 581
 582         return !!ofl;
 583 }
 584
 585 static int talitos_rng_data_read(struct hwrng *rng, u32 *data)
 586 {
 587         struct device *dev = (struct device *)rng->priv;
 588         struct talitos_private *priv = dev_get_drvdata(dev);
 589
 590         /* rng fifo requires 64-bit accesses */
 591         *data = in_be32(priv->reg + TALITOS_RNGU_FIFO);
 592         *data = in_be32(priv->reg + TALITOS_RNGU_FIFO_LO);
 593
 594         return sizeof(u32);
 595 }
 596
 597 static int talitos_rng_init(struct hwrng *rng)
 598 {
 599         struct device *dev = (struct device *)rng->priv;
 600         struct talitos_private *priv = dev_get_drvdata(dev);
 601         unsigned int timeout = TALITOS_TIMEOUT;
 602
 603         setbits32(priv->reg + TALITOS_RNGURCR_LO, TALITOS_RNGURCR_LO_SR);
 604         while (!(in_be32(priv->reg + TALITOS_RNGUSR_LO) & TALITOS_RNGUSR_LO_RD)
 605                && --timeout)
 606                 cpu_relax();
 607         if (timeout == 0) {
 608                 dev_err(dev, "failed to reset rng hw\n");
 609                 return -ENODEV;
 610         }
 611
 612         /* start generating */
 613         setbits32(priv->reg + TALITOS_RNGUDSR_LO, 0);
 614
 615         return 0;
 616 }
 617
 618 static int talitos_register_rng(struct device *dev)
 619 {
 620         struct talitos_private *priv = dev_get_drvdata(dev);
 621
 622         priv->rng.name          = dev_driver_string(dev),
 623         priv->rng.init          = talitos_rng_init,
 624         priv->rng.data_present  = talitos_rng_data_present,
 625         priv->rng.data_read     = talitos_rng_data_read,
 626         priv->rng.priv          = (unsigned long)dev;
 627
 628         return hwrng_register(&priv->rng);
 629 }
 630
 631 static void talitos_unregister_rng(struct device *dev)
 632 {
 633         struct talitos_private *priv = dev_get_drvdata(dev);
 634
 635         hwrng_unregister(&priv->rng);
 636 }
 637
 638 /*
 639  * crypto alg
 640  */
 641 #define TALITOS_CRA_PRIORITY            3000
 642 #define TALITOS_MAX_KEY_SIZE            64
 643 #define TALITOS_MAX_AUTH_SIZE           20
 644 #define TALITOS_AES_MIN_BLOCK_SIZE      16
 645 #define TALITOS_3DES_MIN_BLOCK_SIZE     24
 646
 647 #define TALITOS_AES_IV_LENGTH           16
 648 #define TALITOS_3DES_IV_LENGTH          8
 649 #define TALITOS_MAX_IV_LENGTH           16
 650
 651 struct talitos_ctx {
 652         struct device *dev;
 653         __be32 desc_hdr_template;
 654         u8 key[TALITOS_MAX_KEY_SIZE];
 655         u8 iv[TALITOS_MAX_IV_LENGTH];
 656         unsigned int keylen;
 657         unsigned int enckeylen;
 658         unsigned int authkeylen;
 659         unsigned int authsize;
 660 };
 661
 662 static int aead_authenc_setauthsize(struct crypto_aead *authenc,
 663                                                  unsigned int authsize)
 664 {
 665         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
 666
 667         ctx->authsize = authsize;
 668
 669         return 0;
 670 }
 671
 672 static int aead_authenc_setkey(struct crypto_aead *authenc,
 673                                             const u8 *key, unsigned int keylen)
 674 {
 675         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
 676         struct rtattr *rta = (void *)key;
 677         struct crypto_authenc_key_param *param;
 678         unsigned int authkeylen;
 679         unsigned int enckeylen;
 680
 681         if (!RTA_OK(rta, keylen))
 682                 goto badkey;
 683
 684         if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
 685                 goto badkey;
 686
 687         if (RTA_PAYLOAD(rta) < sizeof(*param))
 688                 goto badkey;
 689
 690         param = RTA_DATA(rta);
 691         enckeylen = be32_to_cpu(param->enckeylen);
 692
 693         key += RTA_ALIGN(rta->rta_len);
 694         keylen -= RTA_ALIGN(rta->rta_len);
 695
 696         if (keylen < enckeylen)
 697                 goto badkey;
 698
 699         authkeylen = keylen - enckeylen;
 700
 701         if (keylen > TALITOS_MAX_KEY_SIZE)
 702                 goto badkey;
 703
 704         memcpy(&ctx->key, key, keylen);
 705
 706         ctx->keylen = keylen;
 707         ctx->enckeylen = enckeylen;
 708         ctx->authkeylen = authkeylen;
 709
 710         return 0;
 711
 712 badkey:
 713         crypto_aead_set_flags(authenc, CRYPTO_TFM_RES_BAD_KEY_LEN);
 714         return -EINVAL;
 715 }
 716
 717 /*
 718  * ipsec_esp_edesc - s/w-extended ipsec_esp descriptor
 719  * @src_nents: number of segments in input scatterlist
 720  * @dst_nents: number of segments in output scatterlist
 721  * @dma_len: length of dma mapped link_tbl space
 722  * @dma_link_tbl: bus physical address of link_tbl
 723  * @desc: h/w descriptor
 724  * @link_tbl: input and output h/w link tables (if {src,dst}_nents > 1)
 725  *
 726  * if decrypting (with authcheck), or either one of src_nents or dst_nents
 727  * is greater than 1, an integrity check value is concatenated to the end
 728  * of link_tbl data
 729  */
 730 struct ipsec_esp_edesc {
 731         int src_nents;
 732         int dst_nents;
 733         int dma_len;
 734         dma_addr_t dma_link_tbl;
 735         struct talitos_desc desc;
 736         struct talitos_ptr link_tbl[0];
 737 };
 738
 739 static void ipsec_esp_unmap(struct device *dev,
 740                             struct ipsec_esp_edesc *edesc,
 741                             struct aead_request *areq)
 742 {
 743         unmap_single_talitos_ptr(dev, &edesc->desc.ptr[6], DMA_FROM_DEVICE);
 744         unmap_single_talitos_ptr(dev, &edesc->desc.ptr[3], DMA_TO_DEVICE);
 745         unmap_single_talitos_ptr(dev, &edesc->desc.ptr[2], DMA_TO_DEVICE);
 746         unmap_single_talitos_ptr(dev, &edesc->desc.ptr[0], DMA_TO_DEVICE);
 747
 748         dma_unmap_sg(dev, areq->assoc, 1, DMA_TO_DEVICE);
 749
 750         if (areq->src != areq->dst) {
 751                 dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
 752                              DMA_TO_DEVICE);
 753                 dma_unmap_sg(dev, areq->dst, edesc->dst_nents ? : 1,
 754                              DMA_FROM_DEVICE);
 755         } else {
 756                 dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
 757                              DMA_BIDIRECTIONAL);
 758         }
 759
 760         if (edesc->dma_len)
 761                 dma_unmap_single(dev, edesc->dma_link_tbl, edesc->dma_len,
 762                                  DMA_BIDIRECTIONAL);
 763 }
 764
 765 /*
 766  * ipsec_esp descriptor callbacks
 767  */
 768 static void ipsec_esp_encrypt_done(struct device *dev,
 769                                    struct talitos_desc *desc, void *context,
 770                                    int err)
 771 {
 772         struct aead_request *areq = context;
 773         struct ipsec_esp_edesc *edesc =
 774                  container_of(desc, struct ipsec_esp_edesc, desc);
 775         struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
 776         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
 777         struct scatterlist *sg;
 778         void *icvdata;
 779
 780         ipsec_esp_unmap(dev, edesc, areq);
 781
 782         /* copy the generated ICV to dst */
 783         if (edesc->dma_len) {
 784                 icvdata = &edesc->link_tbl[edesc->src_nents +
 785                                            edesc->dst_nents + 1];
 786                 sg = sg_last(areq->dst, edesc->dst_nents);
 787                 memcpy((char *)sg_virt(sg) + sg->length - ctx->authsize,
 788                        icvdata, ctx->authsize);
 789         }
 790
 791         kfree(edesc);
 792
 793         aead_request_complete(areq, err);
 794 }
 795
 796 static void ipsec_esp_decrypt_done(struct device *dev,
 797                                    struct talitos_desc *desc, void *context,
 798                                    int err)
 799 {
 800         struct aead_request *req = context;
 801         struct ipsec_esp_edesc *edesc =
 802                  container_of(desc, struct ipsec_esp_edesc, desc);
 803         struct crypto_aead *authenc = crypto_aead_reqtfm(req);
 804         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
 805         struct scatterlist *sg;
 806         void *icvdata;
 807
 808         ipsec_esp_unmap(dev, edesc, req);
 809
 810         if (!err) {
 811                 /* auth check */
 812                 if (edesc->dma_len)
 813                         icvdata = &edesc->link_tbl[edesc->src_nents +
 814                                                    edesc->dst_nents + 1];
 815                 else
 816                         icvdata = &edesc->link_tbl[0];
 817
 818                 sg = sg_last(req->dst, edesc->dst_nents ? : 1);
 819                 err = memcmp(icvdata, (char *)sg_virt(sg) + sg->length -
 820                              ctx->authsize, ctx->authsize) ? -EBADMSG : 0;
 821         }
 822
 823         kfree(edesc);
 824
 825         aead_request_complete(req, err);
 826 }
 827
 828 /*
 829  * convert scatterlist to SEC h/w link table format
 830  * stop at cryptlen bytes
 831  */
 832 static int sg_to_link_tbl(struct scatterlist *sg, int sg_count,
 833                            int cryptlen, struct talitos_ptr *link_tbl_ptr)
 834 {
 835         int n_sg = sg_count;
 836
 837         while (n_sg--) {
 838                 link_tbl_ptr->ptr = cpu_to_be32(sg_dma_address(sg));
 839                 link_tbl_ptr->len = cpu_to_be16(sg_dma_len(sg));
 840                 link_tbl_ptr->j_extent = 0;
 841                 link_tbl_ptr++;
 842                 cryptlen -= sg_dma_len(sg);
 843                 sg = sg_next(sg);
 844         }
 845
 846         /* adjust (decrease) last one (or two) entry's len to cryptlen */
 847         link_tbl_ptr--;
 848         while (link_tbl_ptr->len <= (-cryptlen)) {
 849                 /* Empty this entry, and move to previous one */
 850                 cryptlen += be16_to_cpu(link_tbl_ptr->len);
 851                 link_tbl_ptr->len = 0;
 852                 sg_count--;
 853                 link_tbl_ptr--;
 854         }
 855         link_tbl_ptr->len = cpu_to_be16(be16_to_cpu(link_tbl_ptr->len)
 856                                         + cryptlen);
 857
 858         /* tag end of link table */
 859         link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
 860
 861         return sg_count;
 862 }
 863
 864 /*
 865  * fill in and submit ipsec_esp descriptor
 866  */
 867 static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
 868                      u8 *giv, u64 seq,
 869                      void (*callback) (struct device *dev,
 870                                        struct talitos_desc *desc,
 871                                        void *context, int error))
 872 {
 873         struct crypto_aead *aead = crypto_aead_reqtfm(areq);
 874         struct talitos_ctx *ctx = crypto_aead_ctx(aead);
 875         struct device *dev = ctx->dev;
 876         struct talitos_desc *desc = &edesc->desc;
 877         unsigned int cryptlen = areq->cryptlen;
 878         unsigned int authsize = ctx->authsize;
 879         unsigned int ivsize;
 880         int sg_count;
 881
 882         /* hmac key */
 883         map_single_talitos_ptr(dev, &desc->ptr[0], ctx->authkeylen, &ctx->key,
 884                                0, DMA_TO_DEVICE);
 885         /* hmac data */
 886         map_single_talitos_ptr(dev, &desc->ptr[1], sg_virt(areq->src) -
 887                                sg_virt(areq->assoc), sg_virt(areq->assoc), 0,
 888                                DMA_TO_DEVICE);
 889         /* cipher iv */
 890         ivsize = crypto_aead_ivsize(aead);
 891         map_single_talitos_ptr(dev, &desc->ptr[2], ivsize, giv ?: areq->iv, 0,
 892                                DMA_TO_DEVICE);
 893
 894         /* cipher key */
 895         map_single_talitos_ptr(dev, &desc->ptr[3], ctx->enckeylen,
 896                                (char *)&ctx->key + ctx->authkeylen, 0,
 897                                DMA_TO_DEVICE);
 898
 899         /*
 900          * cipher in
 901          * map and adjust cipher len to aead request cryptlen.
 902          * extent is bytes of HMAC postpended to ciphertext,
 903          * typically 12 for ipsec
 904          */
 905         desc->ptr[4].len = cpu_to_be16(cryptlen);
 906         desc->ptr[4].j_extent = authsize;
 907
 908         if (areq->src == areq->dst)
 909                 sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
 910                                       DMA_BIDIRECTIONAL);
 911         else
 912                 sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
 913                                       DMA_TO_DEVICE);
 914
 915         if (sg_count == 1) {
 916                 desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
 917         } else {
 918                 sg_count = sg_to_link_tbl(areq->src, sg_count, cryptlen,
 919                                           &edesc->link_tbl[0]);
 920                 if (sg_count > 1) {
 921                         desc->ptr[4].j_extent |= DESC_PTR_LNKTBL_JUMP;
 922                         desc->ptr[4].ptr = cpu_to_be32(edesc->dma_link_tbl);
 923                         dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
 924                                                    edesc->dma_len, DMA_BIDIRECTIONAL);
 925                 } else {
 926                         /* Only one segment now, so no link tbl needed */
 927                         desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
 928                 }
 929         }
 930
 931         /* cipher out */
 932         desc->ptr[5].len = cpu_to_be16(cryptlen);
 933         desc->ptr[5].j_extent = authsize;
 934
 935         if (areq->src != areq->dst) {
 936                 sg_count = dma_map_sg(dev, areq->dst, edesc->dst_nents ? : 1,
 937                                       DMA_FROM_DEVICE);
 938         }
 939
 940         if (sg_count == 1) {
 941                 desc->ptr[5].ptr = cpu_to_be32(sg_dma_address(areq->dst));
 942         } else {
 943                 struct talitos_ptr *link_tbl_ptr =
 944                         &edesc->link_tbl[edesc->src_nents];
 945                 struct scatterlist *sg;
 946
 947                 desc->ptr[5].ptr = cpu_to_be32((struct talitos_ptr *)
 948                                                edesc->dma_link_tbl +
 949                                                edesc->src_nents);
 950                 if (areq->src == areq->dst) {
 951                         memcpy(link_tbl_ptr, &edesc->link_tbl[0],
 952                                edesc->src_nents * sizeof(struct talitos_ptr));
 953                 } else {
 954                         sg_count = sg_to_link_tbl(areq->dst, sg_count, cryptlen,
 955                                                   link_tbl_ptr);
 956                 }
 957                 link_tbl_ptr += sg_count - 1;
 958
 959                 /* handle case where sg_last contains the ICV exclusively */
 960                 sg = sg_last(areq->dst, edesc->dst_nents);
 961                 if (sg->length == ctx->authsize)
 962                         link_tbl_ptr--;
 963
 964                 link_tbl_ptr->j_extent = 0;
 965                 link_tbl_ptr++;
 966                 link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
 967                 link_tbl_ptr->len = cpu_to_be16(authsize);
 968
 969                 /* icv data follows link tables */
 970                 link_tbl_ptr->ptr = cpu_to_be32((struct talitos_ptr *)
 971                                                 edesc->dma_link_tbl +
 972                                                 edesc->src_nents +
 973                                                 edesc->dst_nents + 1);
 974
 975                 desc->ptr[5].j_extent |= DESC_PTR_LNKTBL_JUMP;
 976                 dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
 977                                            edesc->dma_len, DMA_BIDIRECTIONAL);
 978         }
 979
 980         /* iv out */
 981         map_single_talitos_ptr(dev, &desc->ptr[6], ivsize, ctx->iv, 0,
 982                                DMA_FROM_DEVICE);
 983
 984         return talitos_submit(dev, desc, callback, areq);
 985 }
 986
 987
 988 /*
 989  * derive number of elements in scatterlist
 990  */
 991 static int sg_count(struct scatterlist *sg_list, int nbytes)
 992 {
 993         struct scatterlist *sg = sg_list;
 994         int sg_nents = 0;
 995
 996         while (nbytes) {
 997                 sg_nents++;
 998                 nbytes -= sg->length;
 999                 sg = sg_next(sg);
1000         }
1001
1002         return sg_nents;
1003 }
1004
1005 /*
1006  * allocate and map the ipsec_esp extended descriptor
1007  */
1008 static struct ipsec_esp_edesc *ipsec_esp_edesc_alloc(struct aead_request *areq,
1009                                                      int icv_stashing)
1010 {
1011         struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
1012         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
1013         struct ipsec_esp_edesc *edesc;
1014         int src_nents, dst_nents, alloc_len, dma_len;
1015
1016         if (areq->cryptlen + ctx->authsize > TALITOS_MAX_DATA_LEN) {
1017                 dev_err(ctx->dev, "cryptlen exceeds h/w max limit\n");
1018                 return ERR_PTR(-EINVAL);
1019         }
1020
1021         src_nents = sg_count(areq->src, areq->cryptlen + ctx->authsize);
1022         src_nents = (src_nents == 1) ? 0 : src_nents;
1023
1024         if (areq->dst == areq->src) {
1025                 dst_nents = src_nents;
1026         } else {
1027                 dst_nents = sg_count(areq->dst, areq->cryptlen + ctx->authsize);
1028                 dst_nents = (dst_nents == 1) ? 0 : src_nents;
1029         }
1030
1031         /*
1032          * allocate space for base edesc plus the link tables,
1033          * allowing for a separate entry for the generated ICV (+ 1),
1034          * and the ICV data itself
1035          */
1036         alloc_len = sizeof(struct ipsec_esp_edesc);
1037         if (src_nents || dst_nents) {
1038                 dma_len = (src_nents + dst_nents + 1) *
1039                                  sizeof(struct talitos_ptr) + ctx->authsize;
1040                 alloc_len += dma_len;
1041         } else {
1042                 dma_len = 0;
1043                 alloc_len += icv_stashing ? ctx->authsize : 0;
1044         }
1045
1046         edesc = kmalloc(alloc_len, GFP_DMA);
1047         if (!edesc) {
1048                 dev_err(ctx->dev, "could not allocate edescriptor\n");
1049                 return ERR_PTR(-ENOMEM);
1050         }
1051
1052         edesc->src_nents = src_nents;
1053         edesc->dst_nents = dst_nents;
1054         edesc->dma_len = dma_len;
1055         edesc->dma_link_tbl = dma_map_single(ctx->dev, &edesc->link_tbl[0],
1056                                              edesc->dma_len, DMA_BIDIRECTIONAL);
1057
1058         return edesc;
1059 }
1060
1061 static int aead_authenc_encrypt(struct aead_request *req)
1062 {
1063         struct crypto_aead *authenc = crypto_aead_reqtfm(req);
1064         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
1065         struct ipsec_esp_edesc *edesc;
1066
1067         /* allocate extended descriptor */
1068         edesc = ipsec_esp_edesc_alloc(req, 0);
1069         if (IS_ERR(edesc))
1070                 return PTR_ERR(edesc);
1071
1072         /* set encrypt */
1073         edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_MODE0_ENCRYPT;
1074
1075         return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_encrypt_done);
1076 }
1077
1078 static int aead_authenc_decrypt(struct aead_request *req)
1079 {
1080         struct crypto_aead *authenc = crypto_aead_reqtfm(req);
1081         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
1082         unsigned int authsize = ctx->authsize;
1083         struct ipsec_esp_edesc *edesc;
1084         struct scatterlist *sg;
1085         void *icvdata;
1086
1087         req->cryptlen -= authsize;
1088
1089         /* allocate extended descriptor */
1090         edesc = ipsec_esp_edesc_alloc(req, 1);
1091         if (IS_ERR(edesc))
1092                 return PTR_ERR(edesc);
1093
1094         /* stash incoming ICV for later cmp with ICV generated by the h/w */
1095         if (edesc->dma_len)
1096                 icvdata = &edesc->link_tbl[edesc->src_nents +
1097                                            edesc->dst_nents + 1];
1098         else
1099                 icvdata = &edesc->link_tbl[0];
1100
1101         sg = sg_last(req->src, edesc->src_nents ? : 1);
1102
1103         memcpy(icvdata, (char *)sg_virt(sg) + sg->length - ctx->authsize,
1104                ctx->authsize);
1105
1106         /* decrypt */
1107         edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_DIR_INBOUND;
1108
1109         return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_decrypt_done);
1110 }
1111
1112 static int aead_authenc_givencrypt(
1113         struct aead_givcrypt_request *req)
1114 {
1115         struct aead_request *areq = &req->areq;
1116         struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
1117         struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
1118         struct ipsec_esp_edesc *edesc;
1119
1120         /* allocate extended descriptor */
1121         edesc = ipsec_esp_edesc_alloc(areq, 0);
1122         if (IS_ERR(edesc))
1123                 return PTR_ERR(edesc);
1124
1125         /* set encrypt */
1126         edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_MODE0_ENCRYPT;
1127
1128         memcpy(req->giv, ctx->iv, crypto_aead_ivsize(authenc));
1129
1130         return ipsec_esp(edesc, areq, req->giv, req->seq,
1131                          ipsec_esp_encrypt_done);
1132 }
1133
1134 struct talitos_alg_template {
1135         char name[CRYPTO_MAX_ALG_NAME];
1136         char driver_name[CRYPTO_MAX_ALG_NAME];
1137         unsigned int blocksize;
1138         struct aead_alg aead;
1139         struct device *dev;
1140         __be32 desc_hdr_template;
1141 };
1142
1143 static struct talitos_alg_template driver_algs[] = {
1144         /* single-pass ipsec_esp descriptor */
1145         {
1146                 .name = "authenc(hmac(sha1),cbc(aes))",
1147                 .driver_name = "authenc-hmac-sha1-cbc-aes-talitos",
1148                 .blocksize = TALITOS_AES_MIN_BLOCK_SIZE,
1149                 .aead = {
1150                         .setkey = aead_authenc_setkey,
1151                         .setauthsize = aead_authenc_setauthsize,
1152                         .encrypt = aead_authenc_encrypt,
1153                         .decrypt = aead_authenc_decrypt,
1154                         .givencrypt = aead_authenc_givencrypt,
1155                         .geniv = "<built-in>",
1156                         .ivsize = TALITOS_AES_IV_LENGTH,
1157                         .maxauthsize = TALITOS_MAX_AUTH_SIZE,
1158                         },
1159                 .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
1160                                      DESC_HDR_SEL0_AESU |
1161                                      DESC_HDR_MODE0_AESU_CBC |
1162                                      DESC_HDR_SEL1_MDEUA |
1163                                      DESC_HDR_MODE1_MDEU_INIT |
1164                                      DESC_HDR_MODE1_MDEU_PAD |
1165                                      DESC_HDR_MODE1_MDEU_SHA1_HMAC,
1166         },
1167         {
1168                 .name = "authenc(hmac(sha1),cbc(des3_ede))",
1169                 .driver_name = "authenc-hmac-sha1-cbc-3des-talitos",
1170                 .blocksize = TALITOS_3DES_MIN_BLOCK_SIZE,
1171                 .aead = {
1172                         .setkey = aead_authenc_setkey,
1173                         .setauthsize = aead_authenc_setauthsize,
1174                         .encrypt = aead_authenc_encrypt,
1175                         .decrypt = aead_authenc_decrypt,
1176                         .givencrypt = aead_authenc_givencrypt,
1177                         .geniv = "<built-in>",
1178                         .ivsize = TALITOS_3DES_IV_LENGTH,
1179                         .maxauthsize = TALITOS_MAX_AUTH_SIZE,
1180                         },
1181                 .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
1182                                      DESC_HDR_SEL0_DEU |
1183                                      DESC_HDR_MODE0_DEU_CBC |
1184                                      DESC_HDR_MODE0_DEU_3DES |
1185                                      DESC_HDR_SEL1_MDEUA |
1186                                      DESC_HDR_MODE1_MDEU_INIT |
1187                                      DESC_HDR_MODE1_MDEU_PAD |
1188                                      DESC_HDR_MODE1_MDEU_SHA1_HMAC,
1189         }
1190 };
1191
1192 struct talitos_crypto_alg {
1193         struct list_head entry;
1194         struct device *dev;
1195         __be32 desc_hdr_template;
1196         struct crypto_alg crypto_alg;
1197 };
1198
1199 static int talitos_cra_init(struct crypto_tfm *tfm)
1200 {
1201         struct crypto_alg *alg = tfm->__crt_alg;
1202         struct talitos_crypto_alg *talitos_alg =
1203                  container_of(alg, struct talitos_crypto_alg, crypto_alg);
1204         struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
1205
1206         /* update context with ptr to dev */
1207         ctx->dev = talitos_alg->dev;
1208         /* copy descriptor header template value */
1209         ctx->desc_hdr_template = talitos_alg->desc_hdr_template;
1210
1211         /* random first IV */
1212         get_random_bytes(ctx->iv, TALITOS_MAX_IV_LENGTH);
1213
1214         return 0;
1215 }
1216
1217 /*
1218  * given the alg's descriptor header template, determine whether descriptor
1219  * type and primary/secondary execution units required match the hw
1220  * capabilities description provided in the device tree node.
1221  */
1222 static int hw_supports(struct device *dev, __be32 desc_hdr_template)
1223 {
1224         struct talitos_private *priv = dev_get_drvdata(dev);
1225         int ret;
1226
1227         ret = (1 << DESC_TYPE(desc_hdr_template) & priv->desc_types) &&
1228               (1 << PRIMARY_EU(desc_hdr_template) & priv->exec_units);
1229
1230         if (SECONDARY_EU(desc_hdr_template))
1231                 ret = ret && (1 << SECONDARY_EU(desc_hdr_template)
1232                               & priv->exec_units);
1233
1234         return ret;
1235 }
1236
1237 static int __devexit talitos_remove(struct of_device *ofdev)
1238 {
1239         struct device *dev = &ofdev->dev;
1240         struct talitos_private *priv = dev_get_drvdata(dev);
1241         struct talitos_crypto_alg *t_alg, *n;
1242         int i;
1243
1244         list_for_each_entry_safe(t_alg, n, &priv->alg_list, entry) {
1245                 crypto_unregister_alg(&t_alg->crypto_alg);
1246                 list_del(&t_alg->entry);
1247                 kfree(t_alg);
1248         }
1249
1250         if (hw_supports(dev, DESC_HDR_SEL0_RNG))
1251                 talitos_unregister_rng(dev);
1252
1253         kfree(priv->tail);
1254         kfree(priv->head);
1255
1256         if (priv->fifo)
1257                 for (i = 0; i < priv->num_channels; i++)
1258                         kfree(priv->fifo[i]);
1259
1260         kfree(priv->fifo);
1261         kfree(priv->head_lock);
1262         kfree(priv->tail_lock);
1263
1264         if (priv->irq != NO_IRQ) {
1265                 free_irq(priv->irq, dev);
1266                 irq_dispose_mapping(priv->irq);
1267         }
1268
1269         tasklet_kill(&priv->done_task);
1270         tasklet_kill(&priv->error_task);
1271
1272         iounmap(priv->reg);
1273
1274         dev_set_drvdata(dev, NULL);
1275
1276         kfree(priv);
1277
1278         return 0;
1279 }
1280
1281 static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev,
1282                                                     struct talitos_alg_template
1283                                                            *template)
1284 {
1285         struct talitos_crypto_alg *t_alg;
1286         struct crypto_alg *alg;
1287
1288         t_alg = kzalloc(sizeof(struct talitos_crypto_alg), GFP_KERNEL);
1289         if (!t_alg)
1290                 return ERR_PTR(-ENOMEM);
1291
1292         alg = &t_alg->crypto_alg;
1293
1294         snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name);
1295         snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
1296                  template->driver_name);
1297         alg->cra_module = THIS_MODULE;
1298         alg->cra_init = talitos_cra_init;
1299         alg->cra_priority = TALITOS_CRA_PRIORITY;
1300         alg->cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;
1301         alg->cra_blocksize = template->blocksize;
1302         alg->cra_alignmask = 0;
1303         alg->cra_type = &crypto_aead_type;
1304         alg->cra_ctxsize = sizeof(struct talitos_ctx);
1305         alg->cra_u.aead = template->aead;
1306
1307         t_alg->desc_hdr_template = template->desc_hdr_template;
1308         t_alg->dev = dev;
1309
1310         return t_alg;
1311 }
1312
1313 static int talitos_probe(struct of_device *ofdev,
1314                          const struct of_device_id *match)
1315 {
1316         struct device *dev = &ofdev->dev;
1317         struct device_node *np = ofdev->node;
1318         struct talitos_private *priv;
1319         const unsigned int *prop;
1320         int i, err;
1321
1322         priv = kzalloc(sizeof(struct talitos_private), GFP_KERNEL);
1323         if (!priv)
1324                 return -ENOMEM;
1325
1326         dev_set_drvdata(dev, priv);
1327
1328         priv->ofdev = ofdev;
1329
1330         tasklet_init(&priv->done_task, talitos_done, (unsigned long)dev);
1331         tasklet_init(&priv->error_task, talitos_error, (unsigned long)dev);
1332
1333         priv->irq = irq_of_parse_and_map(np, 0);
1334
1335         if (priv->irq == NO_IRQ) {
1336                 dev_err(dev, "failed to map irq\n");
1337                 err = -EINVAL;
1338                 goto err_out;
1339         }
1340
1341         /* get the irq line */
1342         err = request_irq(priv->irq, talitos_interrupt, 0,
1343                           dev_driver_string(dev), dev);
1344         if (err) {
1345                 dev_err(dev, "failed to request irq %d\n", priv->irq);
1346                 irq_dispose_mapping(priv->irq);
1347                 priv->irq = NO_IRQ;
1348                 goto err_out;
1349         }
1350
1351         priv->reg = of_iomap(np, 0);
1352         if (!priv->reg) {
1353                 dev_err(dev, "failed to of_iomap\n");
1354                 err = -ENOMEM;
1355                 goto err_out;
1356         }
1357
1358         /* get SEC version capabilities from device tree */
1359         prop = of_get_property(np, "fsl,num-channels", NULL);
1360         if (prop)
1361                 priv->num_channels = *prop;
1362
1363         prop = of_get_property(np, "fsl,channel-fifo-len", NULL);
1364         if (prop)
1365                 priv->chfifo_len = *prop;
1366
1367         prop = of_get_property(np, "fsl,exec-units-mask", NULL);
1368         if (prop)
1369                 priv->exec_units = *prop;
1370
1371         prop = of_get_property(np, "fsl,descriptor-types-mask", NULL);
1372         if (prop)
1373                 priv->desc_types = *prop;
1374
1375         if (!is_power_of_2(priv->num_channels) || !priv->chfifo_len ||
1376             !priv->exec_units || !priv->desc_types) {
1377                 dev_err(dev, "invalid property data in device tree node\n");
1378                 err = -EINVAL;
1379                 goto err_out;
1380         }
1381
1382         of_node_put(np);
1383         np = NULL;
1384
1385         priv->head_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
1386                                   GFP_KERNEL);
1387         priv->tail_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
1388                                   GFP_KERNEL);
1389         if (!priv->head_lock || !priv->tail_lock) {
1390                 dev_err(dev, "failed to allocate fifo locks\n");
1391                 err = -ENOMEM;
1392                 goto err_out;
1393         }
1394
1395         for (i = 0; i < priv->num_channels; i++) {
1396                 spin_lock_init(&priv->head_lock[i]);
1397                 spin_lock_init(&priv->tail_lock[i]);
1398         }
1399
1400         priv->fifo = kmalloc(sizeof(struct talitos_request *) *
1401                              priv->num_channels, GFP_KERNEL);
1402         if (!priv->fifo) {
1403                 dev_err(dev, "failed to allocate request fifo\n");
1404                 err = -ENOMEM;
1405                 goto err_out;
1406         }
1407
1408         priv->fifo_len = roundup_pow_of_two(priv->chfifo_len);
1409
1410         for (i = 0; i < priv->num_channels; i++) {
1411                 priv->fifo[i] = kzalloc(sizeof(struct talitos_request) *
1412                                         priv->fifo_len, GFP_KERNEL);
1413                 if (!priv->fifo[i]) {
1414                         dev_err(dev, "failed to allocate request fifo %d\n", i);
1415                         err = -ENOMEM;
1416                         goto err_out;
1417                 }
1418         }
1419
1420         priv->head = kzalloc(sizeof(int) * priv->num_channels, GFP_KERNEL);
1421         priv->tail = kzalloc(sizeof(int) * priv->num_channels, GFP_KERNEL);
1422         if (!priv->head || !priv->tail) {
1423                 dev_err(dev, "failed to allocate request index space\n");
1424                 err = -ENOMEM;
1425                 goto err_out;
1426         }
1427
1428         /* reset and initialize the h/w */
1429         err = init_device(dev);
1430         if (err) {
1431                 dev_err(dev, "failed to initialize device\n");
1432                 goto err_out;
1433         }
1434
1435         /* register the RNG, if available */
1436         if (hw_supports(dev, DESC_HDR_SEL0_RNG)) {
1437                 err = talitos_register_rng(dev);
1438                 if (err) {
1439                         dev_err(dev, "failed to register hwrng: %d\n", err);
1440                         goto err_out;
1441                 } else
1442                         dev_info(dev, "hwrng\n");
1443         }
1444
1445         /* register crypto algorithms the device supports */
1446         INIT_LIST_HEAD(&priv->alg_list);
1447
1448         for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
1449                 if (hw_supports(dev, driver_algs[i].desc_hdr_template)) {
1450                         struct talitos_crypto_alg *t_alg;
1451
1452                         t_alg = talitos_alg_alloc(dev, &driver_algs[i]);
1453                         if (IS_ERR(t_alg)) {
1454                                 err = PTR_ERR(t_alg);
1455                                 goto err_out;
1456                         }
1457
1458                         err = crypto_register_alg(&t_alg->crypto_alg);
1459                         if (err) {
1460                                 dev_err(dev, "%s alg registration failed\n",
1461                                         t_alg->crypto_alg.cra_driver_name);
1462                                 kfree(t_alg);
1463                         } else {
1464                                 list_add_tail(&t_alg->entry, &priv->alg_list);
1465                                 dev_info(dev, "%s\n",
1466                                          t_alg->crypto_alg.cra_driver_name);
1467                         }
1468                 }
1469         }
1470
1471         return 0;
1472
1473 err_out:
1474         talitos_remove(ofdev);
1475         if (np)
1476                 of_node_put(np);
1477
1478         return err;
1479 }
1480
1481 static struct of_device_id talitos_match[] = {
1482         {
1483                 .compatible = "fsl,sec2.0",
1484         },
1485         {},
1486 };
1487 MODULE_DEVICE_TABLE(of, talitos_match);
1488
1489 static struct of_platform_driver talitos_driver = {
1490         .name = "talitos",
1491         .match_table = talitos_match,
1492         .probe = talitos_probe,
1493         .remove = __devexit_p(talitos_remove),
1494 };
1495
1496 static int __init talitos_init(void)
1497 {
1498         return of_register_platform_driver(&talitos_driver);
1499 }
1500 module_init(talitos_init);
1501
1502 static void __exit talitos_exit(void)
1503 {
1504         of_unregister_platform_driver(&talitos_driver);
1505 }
1506 module_exit(talitos_exit);
1507
1508 MODULE_LICENSE("GPL");
1509 MODULE_AUTHOR("Kim Phillips <kim.phillips@freescale.com>");
1510 MODULE_DESCRIPTION("Freescale integrated security engine (SEC) driver");