1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/pagemap.h>
41 #define I810_BUF_FREE 2
42 #define I810_BUF_CLIENT 1
43 #define I810_BUF_HARDWARE 0
45 #define I810_BUF_UNMAPPED 0
46 #define I810_BUF_MAPPED 1
48 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,2)
49 #define down_write down
53 static drm_buf_t *i810_freelist_get(drm_device_t *dev)
55 drm_device_dma_t *dma = dev->dma;
59 /* Linear search might not be the best solution */
61 for (i = 0; i < dma->buf_count; i++) {
62 drm_buf_t *buf = dma->buflist[ i ];
63 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
64 /* In use is already a pointer */
65 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
67 if (used == I810_BUF_FREE) {
74 /* This should only be called if the buffer is not sent to the hardware
75 * yet, the hardware updates in use for us once its on the ring buffer.
78 static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf)
80 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
83 /* In use is already a pointer */
84 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
85 if (used != I810_BUF_CLIENT) {
86 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
93 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
95 drm_file_t *priv = filp->private_data;
97 drm_i810_private_t *dev_priv;
99 drm_i810_buf_priv_t *buf_priv;
102 dev = priv->head->dev;
103 dev_priv = dev->dev_private;
104 buf = dev_priv->mmap_buffer;
105 buf_priv = buf->dev_private;
107 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
110 buf_priv->currently_mapped = I810_BUF_MAPPED;
113 if (io_remap_pfn_range(vma, vma->vm_start,
114 VM_OFFSET(vma) >> PAGE_SHIFT,
115 vma->vm_end - vma->vm_start,
116 vma->vm_page_prot)) return -EAGAIN;
120 static struct file_operations i810_buffer_fops = {
123 .release = drm_release,
125 .mmap = i810_mmap_buffers,
126 .fasync = drm_fasync,
129 static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
131 drm_file_t *priv = filp->private_data;
132 drm_device_t *dev = priv->head->dev;
133 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
134 drm_i810_private_t *dev_priv = dev->dev_private;
135 struct file_operations *old_fops;
138 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
141 down_write( ¤t->mm->mmap_sem );
142 old_fops = filp->f_op;
143 filp->f_op = &i810_buffer_fops;
144 dev_priv->mmap_buffer = buf;
145 buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total,
146 PROT_READ|PROT_WRITE,
149 dev_priv->mmap_buffer = NULL;
150 filp->f_op = old_fops;
151 if ((unsigned long)buf_priv->virtual > -1024UL) {
153 DRM_ERROR("mmap error\n");
154 retcode = (signed int)buf_priv->virtual;
155 buf_priv->virtual = NULL;
157 up_write( ¤t->mm->mmap_sem );
162 static int i810_unmap_buffer(drm_buf_t *buf)
164 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
167 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
170 down_write(¤t->mm->mmap_sem);
171 retcode = do_munmap(current->mm,
172 (unsigned long)buf_priv->virtual,
173 (size_t) buf->total);
174 up_write(¤t->mm->mmap_sem);
176 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
177 buf_priv->virtual = NULL;
182 static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
186 drm_i810_buf_priv_t *buf_priv;
189 buf = i810_freelist_get(dev);
192 DRM_DEBUG("retcode=%d\n", retcode);
196 retcode = i810_map_buffer(buf, filp);
198 i810_freelist_put(dev, buf);
199 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
203 buf_priv = buf->dev_private;
205 d->request_idx = buf->idx;
206 d->request_size = buf->total;
207 d->virtual = buf_priv->virtual;
212 static int i810_dma_cleanup(drm_device_t *dev)
214 drm_device_dma_t *dma = dev->dma;
216 /* Make sure interrupts are disabled here because the uninstall ioctl
217 * may not have been called from userspace and after dev_private
218 * is freed, it's too late.
220 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
221 drm_irq_uninstall(dev);
223 if (dev->dev_private) {
225 drm_i810_private_t *dev_priv =
226 (drm_i810_private_t *) dev->dev_private;
228 if (dev_priv->ring.virtual_start) {
229 drm_ioremapfree((void *) dev_priv->ring.virtual_start,
230 dev_priv->ring.Size, dev);
232 if (dev_priv->hw_status_page) {
233 pci_free_consistent(dev->pdev, PAGE_SIZE,
234 dev_priv->hw_status_page,
235 dev_priv->dma_status_page);
236 /* Need to rewrite hardware status page */
237 I810_WRITE(0x02080, 0x1ffff000);
239 drm_free(dev->dev_private, sizeof(drm_i810_private_t),
241 dev->dev_private = NULL;
243 for (i = 0; i < dma->buf_count; i++) {
244 drm_buf_t *buf = dma->buflist[ i ];
245 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
246 if ( buf_priv->kernel_virtual && buf->total )
247 drm_ioremapfree(buf_priv->kernel_virtual, buf->total, dev);
253 static int i810_wait_ring(drm_device_t *dev, int n)
255 drm_i810_private_t *dev_priv = dev->dev_private;
256 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
259 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
261 end = jiffies + (HZ*3);
262 while (ring->space < n) {
263 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
264 ring->space = ring->head - (ring->tail+8);
265 if (ring->space < 0) ring->space += ring->Size;
267 if (ring->head != last_head) {
268 end = jiffies + (HZ*3);
269 last_head = ring->head;
273 if (time_before(end, jiffies)) {
274 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
275 DRM_ERROR("lockup\n");
285 static void i810_kernel_lost_context(drm_device_t *dev)
287 drm_i810_private_t *dev_priv = dev->dev_private;
288 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
290 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
291 ring->tail = I810_READ(LP_RING + RING_TAIL);
292 ring->space = ring->head - (ring->tail+8);
293 if (ring->space < 0) ring->space += ring->Size;
296 static int i810_freelist_init(drm_device_t *dev, drm_i810_private_t *dev_priv)
298 drm_device_dma_t *dma = dev->dma;
300 u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx);
303 if (dma->buf_count > 1019) {
304 /* Not enough space in the status page for the freelist */
308 for (i = 0; i < dma->buf_count; i++) {
309 drm_buf_t *buf = dma->buflist[ i ];
310 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
312 buf_priv->in_use = hw_status++;
313 buf_priv->my_use_idx = my_idx;
316 *buf_priv->in_use = I810_BUF_FREE;
318 buf_priv->kernel_virtual = drm_ioremap(buf->bus_address,
324 static int i810_dma_initialize(drm_device_t *dev,
325 drm_i810_private_t *dev_priv,
326 drm_i810_init_t *init)
328 struct list_head *list;
330 memset(dev_priv, 0, sizeof(drm_i810_private_t));
332 list_for_each(list, &dev->maplist->head) {
333 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head);
335 r_list->map->type == _DRM_SHM &&
336 r_list->map->flags & _DRM_CONTAINS_LOCK ) {
337 dev_priv->sarea_map = r_list->map;
341 if (!dev_priv->sarea_map) {
342 dev->dev_private = (void *)dev_priv;
343 i810_dma_cleanup(dev);
344 DRM_ERROR("can not find sarea!\n");
347 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
348 if (!dev_priv->mmio_map) {
349 dev->dev_private = (void *)dev_priv;
350 i810_dma_cleanup(dev);
351 DRM_ERROR("can not find mmio map!\n");
354 dev->agp_buffer_token = init->buffers_offset;
355 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
356 if (!dev->agp_buffer_map) {
357 dev->dev_private = (void *)dev_priv;
358 i810_dma_cleanup(dev);
359 DRM_ERROR("can not find dma buffer map!\n");
363 dev_priv->sarea_priv = (drm_i810_sarea_t *)
364 ((u8 *)dev_priv->sarea_map->handle +
365 init->sarea_priv_offset);
367 dev_priv->ring.Start = init->ring_start;
368 dev_priv->ring.End = init->ring_end;
369 dev_priv->ring.Size = init->ring_size;
371 dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base +
373 init->ring_size, dev);
375 if (dev_priv->ring.virtual_start == NULL) {
376 dev->dev_private = (void *) dev_priv;
377 i810_dma_cleanup(dev);
378 DRM_ERROR("can not ioremap virtual address for"
383 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
385 dev_priv->w = init->w;
386 dev_priv->h = init->h;
387 dev_priv->pitch = init->pitch;
388 dev_priv->back_offset = init->back_offset;
389 dev_priv->depth_offset = init->depth_offset;
390 dev_priv->front_offset = init->front_offset;
392 dev_priv->overlay_offset = init->overlay_offset;
393 dev_priv->overlay_physical = init->overlay_physical;
395 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
396 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
397 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
399 /* Program Hardware Status Page */
400 dev_priv->hw_status_page =
401 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
402 &dev_priv->dma_status_page);
403 if (!dev_priv->hw_status_page) {
404 dev->dev_private = (void *)dev_priv;
405 i810_dma_cleanup(dev);
406 DRM_ERROR("Can not allocate hardware status page\n");
409 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
410 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
412 I810_WRITE(0x02080, dev_priv->dma_status_page);
413 DRM_DEBUG("Enabled hardware status page\n");
415 /* Now we need to init our freelist */
416 if (i810_freelist_init(dev, dev_priv) != 0) {
417 dev->dev_private = (void *)dev_priv;
418 i810_dma_cleanup(dev);
419 DRM_ERROR("Not enough space in the status page for"
423 dev->dev_private = (void *)dev_priv;
428 /* i810 DRM version 1.1 used a smaller init structure with different
429 * ordering of values than is currently used (drm >= 1.2). There is
430 * no defined way to detect the XFree version to correct this problem,
431 * however by checking using this procedure we can detect the correct
434 * #1 Read the Smaller init structure from user-space
435 * #2 Verify the overlay_physical is a valid physical address, or NULL
436 * If it isn't then we have a v1.1 client. Fix up params.
437 * If it is, then we have a 1.2 client... get the rest of the data.
439 static int i810_dma_init_compat(drm_i810_init_t *init, unsigned long arg)
442 /* Get v1.1 init data */
443 if (copy_from_user(init, (drm_i810_pre12_init_t __user *)arg,
444 sizeof(drm_i810_pre12_init_t))) {
448 if ((!init->overlay_physical) || (init->overlay_physical > 4096)) {
450 /* This is a v1.2 client, just get the v1.2 init data */
451 DRM_INFO("Using POST v1.2 init.\n");
452 if (copy_from_user(init, (drm_i810_init_t __user *)arg,
453 sizeof(drm_i810_init_t))) {
458 /* This is a v1.1 client, fix the params */
459 DRM_INFO("Using PRE v1.2 init.\n");
460 init->pitch_bits = init->h;
461 init->pitch = init->w;
462 init->h = init->overlay_physical;
463 init->w = init->overlay_offset;
464 init->overlay_physical = 0;
465 init->overlay_offset = 0;
471 static int i810_dma_init(struct inode *inode, struct file *filp,
472 unsigned int cmd, unsigned long arg)
474 drm_file_t *priv = filp->private_data;
475 drm_device_t *dev = priv->head->dev;
476 drm_i810_private_t *dev_priv;
477 drm_i810_init_t init;
480 /* Get only the init func */
481 if (copy_from_user(&init, (void __user *)arg, sizeof(drm_i810_init_func_t)))
486 /* This case is for backward compatibility. It
487 * handles XFree 4.1.0 and 4.2.0, and has to
488 * do some parameter checking as described below.
489 * It will someday go away.
491 retcode = i810_dma_init_compat(&init, arg);
495 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
497 if (dev_priv == NULL)
499 retcode = i810_dma_initialize(dev, dev_priv, &init);
503 case I810_INIT_DMA_1_4:
504 DRM_INFO("Using v1.4 init.\n");
505 if (copy_from_user(&init, (drm_i810_init_t __user *)arg,
506 sizeof(drm_i810_init_t))) {
509 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
511 if (dev_priv == NULL)
513 retcode = i810_dma_initialize(dev, dev_priv, &init);
516 case I810_CLEANUP_DMA:
517 DRM_INFO("DMA Cleanup\n");
518 retcode = i810_dma_cleanup(dev);
527 /* Most efficient way to verify state for the i810 is as it is
528 * emitted. Non-conformant state is silently dropped.
530 * Use 'volatile' & local var tmp to force the emitted values to be
531 * identical to the verified ones.
533 static void i810EmitContextVerified( drm_device_t *dev,
534 volatile unsigned int *code )
536 drm_i810_private_t *dev_priv = dev->dev_private;
541 BEGIN_LP_RING( I810_CTX_SETUP_SIZE );
543 OUT_RING( GFX_OP_COLOR_FACTOR );
544 OUT_RING( code[I810_CTXREG_CF1] );
546 OUT_RING( GFX_OP_STIPPLE );
547 OUT_RING( code[I810_CTXREG_ST1] );
549 for ( i = 4 ; i < I810_CTX_SETUP_SIZE ; i++ ) {
552 if ((tmp & (7<<29)) == (3<<29) &&
553 (tmp & (0x1f<<24)) < (0x1d<<24))
558 else printk("constext state dropped!!!\n");
567 static void i810EmitTexVerified( drm_device_t *dev,
568 volatile unsigned int *code )
570 drm_i810_private_t *dev_priv = dev->dev_private;
575 BEGIN_LP_RING( I810_TEX_SETUP_SIZE );
577 OUT_RING( GFX_OP_MAP_INFO );
578 OUT_RING( code[I810_TEXREG_MI1] );
579 OUT_RING( code[I810_TEXREG_MI2] );
580 OUT_RING( code[I810_TEXREG_MI3] );
582 for ( i = 4 ; i < I810_TEX_SETUP_SIZE ; i++ ) {
585 if ((tmp & (7<<29)) == (3<<29) &&
586 (tmp & (0x1f<<24)) < (0x1d<<24))
591 else printk("texture state dropped!!!\n");
601 /* Need to do some additional checking when setting the dest buffer.
603 static void i810EmitDestVerified( drm_device_t *dev,
604 volatile unsigned int *code )
606 drm_i810_private_t *dev_priv = dev->dev_private;
610 BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 );
612 tmp = code[I810_DESTREG_DI1];
613 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
614 OUT_RING( CMD_OP_DESTBUFFER_INFO );
617 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
618 tmp, dev_priv->front_di1, dev_priv->back_di1);
622 OUT_RING( CMD_OP_Z_BUFFER_INFO );
623 OUT_RING( dev_priv->zi1 );
625 OUT_RING( GFX_OP_DESTBUFFER_VARS );
626 OUT_RING( code[I810_DESTREG_DV1] );
628 OUT_RING( GFX_OP_DRAWRECT_INFO );
629 OUT_RING( code[I810_DESTREG_DR1] );
630 OUT_RING( code[I810_DESTREG_DR2] );
631 OUT_RING( code[I810_DESTREG_DR3] );
632 OUT_RING( code[I810_DESTREG_DR4] );
640 static void i810EmitState( drm_device_t *dev )
642 drm_i810_private_t *dev_priv = dev->dev_private;
643 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
644 unsigned int dirty = sarea_priv->dirty;
646 DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
648 if (dirty & I810_UPLOAD_BUFFERS) {
649 i810EmitDestVerified( dev, sarea_priv->BufferState );
650 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
653 if (dirty & I810_UPLOAD_CTX) {
654 i810EmitContextVerified( dev, sarea_priv->ContextState );
655 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
658 if (dirty & I810_UPLOAD_TEX0) {
659 i810EmitTexVerified( dev, sarea_priv->TexState[0] );
660 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
663 if (dirty & I810_UPLOAD_TEX1) {
664 i810EmitTexVerified( dev, sarea_priv->TexState[1] );
665 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
673 static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
674 unsigned int clear_color,
675 unsigned int clear_zval )
677 drm_i810_private_t *dev_priv = dev->dev_private;
678 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
679 int nbox = sarea_priv->nbox;
680 drm_clip_rect_t *pbox = sarea_priv->boxes;
681 int pitch = dev_priv->pitch;
686 if ( dev_priv->current_page == 1 ) {
687 unsigned int tmp = flags;
689 flags &= ~(I810_FRONT | I810_BACK);
690 if (tmp & I810_FRONT) flags |= I810_BACK;
691 if (tmp & I810_BACK) flags |= I810_FRONT;
694 i810_kernel_lost_context(dev);
696 if (nbox > I810_NR_SAREA_CLIPRECTS)
697 nbox = I810_NR_SAREA_CLIPRECTS;
699 for (i = 0 ; i < nbox ; i++, pbox++) {
700 unsigned int x = pbox->x1;
701 unsigned int y = pbox->y1;
702 unsigned int width = (pbox->x2 - x) * cpp;
703 unsigned int height = pbox->y2 - y;
704 unsigned int start = y * pitch + x * cpp;
706 if (pbox->x1 > pbox->x2 ||
707 pbox->y1 > pbox->y2 ||
708 pbox->x2 > dev_priv->w ||
709 pbox->y2 > dev_priv->h)
712 if ( flags & I810_FRONT ) {
714 OUT_RING( BR00_BITBLT_CLIENT |
715 BR00_OP_COLOR_BLT | 0x3 );
716 OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
717 OUT_RING( (height << 16) | width );
719 OUT_RING( clear_color );
724 if ( flags & I810_BACK ) {
726 OUT_RING( BR00_BITBLT_CLIENT |
727 BR00_OP_COLOR_BLT | 0x3 );
728 OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
729 OUT_RING( (height << 16) | width );
730 OUT_RING( dev_priv->back_offset + start );
731 OUT_RING( clear_color );
736 if ( flags & I810_DEPTH ) {
738 OUT_RING( BR00_BITBLT_CLIENT |
739 BR00_OP_COLOR_BLT | 0x3 );
740 OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
741 OUT_RING( (height << 16) | width );
742 OUT_RING( dev_priv->depth_offset + start );
743 OUT_RING( clear_zval );
750 static void i810_dma_dispatch_swap( drm_device_t *dev )
752 drm_i810_private_t *dev_priv = dev->dev_private;
753 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
754 int nbox = sarea_priv->nbox;
755 drm_clip_rect_t *pbox = sarea_priv->boxes;
756 int pitch = dev_priv->pitch;
761 DRM_DEBUG("swapbuffers\n");
763 i810_kernel_lost_context(dev);
765 if (nbox > I810_NR_SAREA_CLIPRECTS)
766 nbox = I810_NR_SAREA_CLIPRECTS;
768 for (i = 0 ; i < nbox; i++, pbox++)
770 unsigned int w = pbox->x2 - pbox->x1;
771 unsigned int h = pbox->y2 - pbox->y1;
772 unsigned int dst = pbox->x1*cpp + pbox->y1*pitch;
773 unsigned int start = dst;
775 if (pbox->x1 > pbox->x2 ||
776 pbox->y1 > pbox->y2 ||
777 pbox->x2 > dev_priv->w ||
778 pbox->y2 > dev_priv->h)
782 OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 );
783 OUT_RING( pitch | (0xCC << 16));
784 OUT_RING( (h << 16) | (w * cpp));
785 if (dev_priv->current_page == 0)
786 OUT_RING(dev_priv->front_offset + start);
788 OUT_RING(dev_priv->back_offset + start);
790 if (dev_priv->current_page == 0)
791 OUT_RING(dev_priv->back_offset + start);
793 OUT_RING(dev_priv->front_offset + start);
799 static void i810_dma_dispatch_vertex(drm_device_t *dev,
804 drm_i810_private_t *dev_priv = dev->dev_private;
805 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
806 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
807 drm_clip_rect_t *box = sarea_priv->boxes;
808 int nbox = sarea_priv->nbox;
809 unsigned long address = (unsigned long)buf->bus_address;
810 unsigned long start = address - dev->agp->base;
814 i810_kernel_lost_context(dev);
816 if (nbox > I810_NR_SAREA_CLIPRECTS)
817 nbox = I810_NR_SAREA_CLIPRECTS;
822 if (sarea_priv->dirty)
823 i810EmitState( dev );
825 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
826 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
828 *(u32 *)buf_priv->kernel_virtual = ((GFX_OP_PRIMITIVE | prim | ((used/4)-2)));
831 *(u32 *)((u32)buf_priv->kernel_virtual + used) = 0;
835 i810_unmap_buffer(buf);
842 OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
844 OUT_RING( GFX_OP_SCISSOR_INFO );
845 OUT_RING( box[i].x1 | (box[i].y1<<16) );
846 OUT_RING( (box[i].x2-1) | ((box[i].y2-1)<<16) );
851 OUT_RING( CMD_OP_BATCH_BUFFER );
852 OUT_RING( start | BB1_PROTECTED );
853 OUT_RING( start + used - 4 );
857 } while (++i < nbox);
863 (void) cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
867 OUT_RING( CMD_STORE_DWORD_IDX );
869 OUT_RING( dev_priv->counter );
870 OUT_RING( CMD_STORE_DWORD_IDX );
871 OUT_RING( buf_priv->my_use_idx );
872 OUT_RING( I810_BUF_FREE );
873 OUT_RING( CMD_REPORT_HEAD );
879 static void i810_dma_dispatch_flip( drm_device_t *dev )
881 drm_i810_private_t *dev_priv = dev->dev_private;
882 int pitch = dev_priv->pitch;
885 DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n",
887 dev_priv->current_page,
888 dev_priv->sarea_priv->pf_current_page);
890 i810_kernel_lost_context(dev);
893 OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
897 BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 );
898 /* On i815 at least ASYNC is buggy */
899 /* pitch<<5 is from 11.2.8 p158,
900 its the pitch / 8 then left shifted 8,
901 so (pitch >> 3) << 8 */
902 OUT_RING( CMD_OP_FRONTBUFFER_INFO | (pitch<<5) /*| ASYNC_FLIP */ );
903 if ( dev_priv->current_page == 0 ) {
904 OUT_RING( dev_priv->back_offset );
905 dev_priv->current_page = 1;
907 OUT_RING( dev_priv->front_offset );
908 dev_priv->current_page = 0;
914 OUT_RING( CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP );
918 /* Increment the frame counter. The client-side 3D driver must
919 * throttle the framerate by waiting for this value before
920 * performing the swapbuffer ioctl.
922 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
926 static void i810_dma_quiescent(drm_device_t *dev)
928 drm_i810_private_t *dev_priv = dev->dev_private;
931 /* printk("%s\n", __FUNCTION__); */
933 i810_kernel_lost_context(dev);
936 OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
937 OUT_RING( CMD_REPORT_HEAD );
942 i810_wait_ring( dev, dev_priv->ring.Size - 8 );
945 static int i810_flush_queue(drm_device_t *dev)
947 drm_i810_private_t *dev_priv = dev->dev_private;
948 drm_device_dma_t *dma = dev->dma;
952 /* printk("%s\n", __FUNCTION__); */
954 i810_kernel_lost_context(dev);
957 OUT_RING( CMD_REPORT_HEAD );
961 i810_wait_ring( dev, dev_priv->ring.Size - 8 );
963 for (i = 0; i < dma->buf_count; i++) {
964 drm_buf_t *buf = dma->buflist[ i ];
965 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
967 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
970 if (used == I810_BUF_HARDWARE)
971 DRM_DEBUG("reclaimed from HARDWARE\n");
972 if (used == I810_BUF_CLIENT)
973 DRM_DEBUG("still on client\n");
979 /* Must be called with the lock held */
980 void i810_reclaim_buffers(drm_device_t *dev, struct file *filp)
982 drm_device_dma_t *dma = dev->dma;
986 if (!dev->dev_private) return;
987 if (!dma->buflist) return;
989 i810_flush_queue(dev);
991 for (i = 0; i < dma->buf_count; i++) {
992 drm_buf_t *buf = dma->buflist[ i ];
993 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
995 if (buf->filp == filp && buf_priv) {
996 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
999 if (used == I810_BUF_CLIENT)
1000 DRM_DEBUG("reclaimed from client\n");
1001 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
1002 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
1007 static int i810_flush_ioctl(struct inode *inode, struct file *filp,
1008 unsigned int cmd, unsigned long arg)
1010 drm_file_t *priv = filp->private_data;
1011 drm_device_t *dev = priv->head->dev;
1013 LOCK_TEST_WITH_RETURN(dev, filp);
1015 i810_flush_queue(dev);
1020 static int i810_dma_vertex(struct inode *inode, struct file *filp,
1021 unsigned int cmd, unsigned long arg)
1023 drm_file_t *priv = filp->private_data;
1024 drm_device_t *dev = priv->head->dev;
1025 drm_device_dma_t *dma = dev->dma;
1026 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1027 u32 *hw_status = dev_priv->hw_status_page;
1028 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1029 dev_priv->sarea_priv;
1030 drm_i810_vertex_t vertex;
1032 if (copy_from_user(&vertex, (drm_i810_vertex_t __user *)arg, sizeof(vertex)))
1035 LOCK_TEST_WITH_RETURN(dev, filp);
1037 DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
1038 vertex.idx, vertex.used, vertex.discard);
1040 if (vertex.idx < 0 || vertex.idx > dma->buf_count)
1043 i810_dma_dispatch_vertex( dev,
1044 dma->buflist[ vertex.idx ],
1045 vertex.discard, vertex.used );
1047 atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]);
1048 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1049 sarea_priv->last_enqueue = dev_priv->counter-1;
1050 sarea_priv->last_dispatch = (int) hw_status[5];
1057 static int i810_clear_bufs(struct inode *inode, struct file *filp,
1058 unsigned int cmd, unsigned long arg)
1060 drm_file_t *priv = filp->private_data;
1061 drm_device_t *dev = priv->head->dev;
1062 drm_i810_clear_t clear;
1064 if (copy_from_user(&clear, (drm_i810_clear_t __user *)arg, sizeof(clear)))
1067 LOCK_TEST_WITH_RETURN(dev, filp);
1069 /* GH: Someone's doing nasty things... */
1070 if (!dev->dev_private) {
1074 i810_dma_dispatch_clear( dev, clear.flags,
1076 clear.clear_depth );
1080 static int i810_swap_bufs(struct inode *inode, struct file *filp,
1081 unsigned int cmd, unsigned long arg)
1083 drm_file_t *priv = filp->private_data;
1084 drm_device_t *dev = priv->head->dev;
1086 DRM_DEBUG("i810_swap_bufs\n");
1088 LOCK_TEST_WITH_RETURN(dev, filp);
1090 i810_dma_dispatch_swap( dev );
1094 static int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd,
1097 drm_file_t *priv = filp->private_data;
1098 drm_device_t *dev = priv->head->dev;
1099 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1100 u32 *hw_status = dev_priv->hw_status_page;
1101 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1102 dev_priv->sarea_priv;
1104 sarea_priv->last_dispatch = (int) hw_status[5];
1108 static int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1111 drm_file_t *priv = filp->private_data;
1112 drm_device_t *dev = priv->head->dev;
1115 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1116 u32 *hw_status = dev_priv->hw_status_page;
1117 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1118 dev_priv->sarea_priv;
1120 if (copy_from_user(&d, (drm_i810_dma_t __user *)arg, sizeof(d)))
1123 LOCK_TEST_WITH_RETURN(dev, filp);
1127 retcode = i810_dma_get_buffer(dev, &d, filp);
1129 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1130 current->pid, retcode, d.granted);
1132 if (copy_to_user((drm_dma_t __user *)arg, &d, sizeof(d)))
1134 sarea_priv->last_dispatch = (int) hw_status[5];
1139 static int i810_copybuf(struct inode *inode,
1140 struct file *filp, unsigned int cmd, unsigned long arg)
1142 /* Never copy - 2.4.x doesn't need it */
1146 static int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
1149 /* Never copy - 2.4.x doesn't need it */
1153 static void i810_dma_dispatch_mc(drm_device_t *dev, drm_buf_t *buf, int used,
1154 unsigned int last_render)
1156 drm_i810_private_t *dev_priv = dev->dev_private;
1157 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1158 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1159 unsigned long address = (unsigned long)buf->bus_address;
1160 unsigned long start = address - dev->agp->base;
1164 i810_kernel_lost_context(dev);
1166 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
1168 if (u != I810_BUF_CLIENT) {
1169 DRM_DEBUG("MC found buffer that isn't mine!\n");
1175 sarea_priv->dirty = 0x7f;
1177 DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n",
1180 dev_priv->counter++;
1181 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1182 DRM_DEBUG("i810_dma_dispatch_mc\n");
1183 DRM_DEBUG("start : %lx\n", start);
1184 DRM_DEBUG("used : %d\n", used);
1185 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1187 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1189 *(u32 *)((u32)buf_priv->virtual + used) = 0;
1193 i810_unmap_buffer(buf);
1196 OUT_RING( CMD_OP_BATCH_BUFFER );
1197 OUT_RING( start | BB1_PROTECTED );
1198 OUT_RING( start + used - 4 );
1204 OUT_RING( CMD_STORE_DWORD_IDX );
1205 OUT_RING( buf_priv->my_use_idx );
1206 OUT_RING( I810_BUF_FREE );
1209 OUT_RING( CMD_STORE_DWORD_IDX );
1211 OUT_RING( last_render );
1216 static int i810_dma_mc(struct inode *inode, struct file *filp,
1217 unsigned int cmd, unsigned long arg)
1219 drm_file_t *priv = filp->private_data;
1220 drm_device_t *dev = priv->head->dev;
1221 drm_device_dma_t *dma = dev->dma;
1222 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1223 u32 *hw_status = dev_priv->hw_status_page;
1224 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1225 dev_priv->sarea_priv;
1228 if (copy_from_user(&mc, (drm_i810_mc_t __user *)arg, sizeof(mc)))
1231 LOCK_TEST_WITH_RETURN(dev, filp);
1233 if (mc.idx >= dma->buf_count || mc.idx < 0)
1236 i810_dma_dispatch_mc(dev, dma->buflist[mc.idx], mc.used,
1239 atomic_add(mc.used, &dev->counts[_DRM_STAT_SECONDARY]);
1240 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1241 sarea_priv->last_enqueue = dev_priv->counter-1;
1242 sarea_priv->last_dispatch = (int) hw_status[5];
1247 static int i810_rstatus(struct inode *inode, struct file *filp,
1248 unsigned int cmd, unsigned long arg)
1250 drm_file_t *priv = filp->private_data;
1251 drm_device_t *dev = priv->head->dev;
1252 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1254 return (int)(((u32 *)(dev_priv->hw_status_page))[4]);
1257 static int i810_ov0_info(struct inode *inode, struct file *filp,
1258 unsigned int cmd, unsigned long arg)
1260 drm_file_t *priv = filp->private_data;
1261 drm_device_t *dev = priv->head->dev;
1262 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1263 drm_i810_overlay_t data;
1265 data.offset = dev_priv->overlay_offset;
1266 data.physical = dev_priv->overlay_physical;
1267 if (copy_to_user((drm_i810_overlay_t __user *)arg,&data,sizeof(data)))
1272 static int i810_fstatus(struct inode *inode, struct file *filp,
1273 unsigned int cmd, unsigned long arg)
1275 drm_file_t *priv = filp->private_data;
1276 drm_device_t *dev = priv->head->dev;
1277 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1279 LOCK_TEST_WITH_RETURN(dev, filp);
1281 return I810_READ(0x30008);
1284 static int i810_ov0_flip(struct inode *inode, struct file *filp,
1285 unsigned int cmd, unsigned long arg)
1287 drm_file_t *priv = filp->private_data;
1288 drm_device_t *dev = priv->head->dev;
1289 drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
1291 LOCK_TEST_WITH_RETURN(dev, filp);
1293 //Tell the overlay to update
1294 I810_WRITE(0x30000,dev_priv->overlay_physical | 0x80000000);
1300 /* Not sure why this isn't set all the time:
1302 static void i810_do_init_pageflip( drm_device_t *dev )
1304 drm_i810_private_t *dev_priv = dev->dev_private;
1306 DRM_DEBUG("%s\n", __FUNCTION__);
1307 dev_priv->page_flipping = 1;
1308 dev_priv->current_page = 0;
1309 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1312 static int i810_do_cleanup_pageflip( drm_device_t *dev )
1314 drm_i810_private_t *dev_priv = dev->dev_private;
1316 DRM_DEBUG("%s\n", __FUNCTION__);
1317 if (dev_priv->current_page != 0)
1318 i810_dma_dispatch_flip( dev );
1320 dev_priv->page_flipping = 0;
1324 static int i810_flip_bufs(struct inode *inode, struct file *filp,
1325 unsigned int cmd, unsigned long arg)
1327 drm_file_t *priv = filp->private_data;
1328 drm_device_t *dev = priv->head->dev;
1329 drm_i810_private_t *dev_priv = dev->dev_private;
1331 DRM_DEBUG("%s\n", __FUNCTION__);
1333 LOCK_TEST_WITH_RETURN(dev, filp);
1335 if (!dev_priv->page_flipping)
1336 i810_do_init_pageflip( dev );
1338 i810_dma_dispatch_flip( dev );
1342 void i810_driver_pretakedown(drm_device_t *dev)
1344 i810_dma_cleanup( dev );
1347 void i810_driver_prerelease(drm_device_t *dev, DRMFILE filp)
1349 if (dev->dev_private) {
1350 drm_i810_private_t *dev_priv = dev->dev_private;
1351 if (dev_priv->page_flipping) {
1352 i810_do_cleanup_pageflip(dev);
1357 void i810_driver_release(drm_device_t *dev, struct file *filp)
1359 i810_reclaim_buffers(dev, filp);
1362 int i810_driver_dma_quiescent(drm_device_t *dev)
1364 i810_dma_quiescent( dev );
1368 drm_ioctl_desc_t i810_ioctls[] = {
1369 [DRM_IOCTL_NR(DRM_I810_INIT)] = { i810_dma_init, 1, 1 },
1370 [DRM_IOCTL_NR(DRM_I810_VERTEX)] = { i810_dma_vertex, 1, 0 },
1371 [DRM_IOCTL_NR(DRM_I810_CLEAR)] = { i810_clear_bufs, 1, 0 },
1372 [DRM_IOCTL_NR(DRM_I810_FLUSH)] = { i810_flush_ioctl, 1, 0 },
1373 [DRM_IOCTL_NR(DRM_I810_GETAGE)] = { i810_getage, 1, 0 },
1374 [DRM_IOCTL_NR(DRM_I810_GETBUF)] = { i810_getbuf, 1, 0 },
1375 [DRM_IOCTL_NR(DRM_I810_SWAP)] = { i810_swap_bufs, 1, 0 },
1376 [DRM_IOCTL_NR(DRM_I810_COPY)] = { i810_copybuf, 1, 0 },
1377 [DRM_IOCTL_NR(DRM_I810_DOCOPY)] = { i810_docopy, 1, 0 },
1378 [DRM_IOCTL_NR(DRM_I810_OV0INFO)] = { i810_ov0_info, 1, 0 },
1379 [DRM_IOCTL_NR(DRM_I810_FSTATUS)] = { i810_fstatus, 1, 0 },
1380 [DRM_IOCTL_NR(DRM_I810_OV0FLIP)] = { i810_ov0_flip, 1, 0 },
1381 [DRM_IOCTL_NR(DRM_I810_MC)] = { i810_dma_mc, 1, 1 },
1382 [DRM_IOCTL_NR(DRM_I810_RSTATUS)] = { i810_rstatus, 1, 0 },
1383 [DRM_IOCTL_NR(DRM_I810_FLIP)] = { i810_flip_bufs, 1, 0 }
1386 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1389 * Determine if the device really is AGP or not.
1391 * All Intel graphics chipsets are treated as AGP, even if they are really
1394 * \param dev The device to be tested.
1397 * A value of 1 is always retured to indictate every i810 is AGP.
1399 int i810_driver_device_is_agp(drm_device_t * dev)