2 * libata-sff.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/pci.h>
37 #include <linux/libata.h>
42 * ata_check_status - Read device status reg & clear interrupt
43 * @ap: port where the device is
45 * Reads ATA taskfile status register for currently-selected device
46 * and return its value. This also clears pending interrupts
50 * Inherited from caller.
52 u8 ata_check_status(struct ata_port *ap)
54 return ioread8(ap->ioaddr.status_addr);
58 * ata_altstatus - Read device alternate status reg
59 * @ap: port where the device is
61 * Reads ATA taskfile alternate status register for
62 * currently-selected device and return its value.
64 * Note: may NOT be used as the check_altstatus() entry in
65 * ata_port_operations.
68 * Inherited from caller.
70 u8 ata_altstatus(struct ata_port *ap)
72 if (ap->ops->check_altstatus)
73 return ap->ops->check_altstatus(ap);
75 return ioread8(ap->ioaddr.altstatus_addr);
79 * ata_irq_on - Enable interrupts on a port.
80 * @ap: Port on which interrupts are enabled.
82 * Enable interrupts on a legacy IDE device using MMIO or PIO,
83 * wait for idle, clear any pending interrupts.
86 * Inherited from caller.
88 u8 ata_irq_on(struct ata_port *ap)
90 struct ata_ioports *ioaddr = &ap->ioaddr;
94 ap->last_ctl = ap->ctl;
97 iowrite8(ap->ctl, ioaddr->ctl_addr);
98 tmp = ata_wait_idle(ap);
100 ap->ops->irq_clear(ap);
106 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
107 * @ap: Port associated with this ATA transaction.
109 * Clear interrupt and error flags in DMA status register.
111 * May be used as the irq_clear() entry in ata_port_operations.
114 * spin_lock_irqsave(host lock)
116 void ata_bmdma_irq_clear(struct ata_port *ap)
118 void __iomem *mmio = ap->ioaddr.bmdma_addr;
123 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
127 * ata_tf_load - send taskfile registers to host controller
128 * @ap: Port to which output is sent
129 * @tf: ATA taskfile register set
131 * Outputs ATA taskfile to standard ATA host controller.
134 * Inherited from caller.
136 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
138 struct ata_ioports *ioaddr = &ap->ioaddr;
139 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
141 if (tf->ctl != ap->last_ctl) {
142 if (ioaddr->ctl_addr)
143 iowrite8(tf->ctl, ioaddr->ctl_addr);
144 ap->last_ctl = tf->ctl;
148 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
149 WARN_ON(!ioaddr->ctl_addr);
150 iowrite8(tf->hob_feature, ioaddr->feature_addr);
151 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
152 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
153 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
154 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
155 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
164 iowrite8(tf->feature, ioaddr->feature_addr);
165 iowrite8(tf->nsect, ioaddr->nsect_addr);
166 iowrite8(tf->lbal, ioaddr->lbal_addr);
167 iowrite8(tf->lbam, ioaddr->lbam_addr);
168 iowrite8(tf->lbah, ioaddr->lbah_addr);
169 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
177 if (tf->flags & ATA_TFLAG_DEVICE) {
178 iowrite8(tf->device, ioaddr->device_addr);
179 VPRINTK("device 0x%X\n", tf->device);
186 * ata_tf_read - input device's ATA taskfile shadow registers
187 * @ap: Port from which input is read
188 * @tf: ATA taskfile register set for storing input
190 * Reads ATA taskfile registers for currently-selected device
191 * into @tf. Assumes the device has a fully SFF compliant task file
192 * layout and behaviour. If you device does not (eg has a different
193 * status method) then you will need to provide a replacement tf_read
196 * Inherited from caller.
198 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
200 struct ata_ioports *ioaddr = &ap->ioaddr;
202 tf->command = ata_check_status(ap);
203 tf->feature = ioread8(ioaddr->error_addr);
204 tf->nsect = ioread8(ioaddr->nsect_addr);
205 tf->lbal = ioread8(ioaddr->lbal_addr);
206 tf->lbam = ioread8(ioaddr->lbam_addr);
207 tf->lbah = ioread8(ioaddr->lbah_addr);
208 tf->device = ioread8(ioaddr->device_addr);
210 if (tf->flags & ATA_TFLAG_LBA48) {
211 if (likely(ioaddr->ctl_addr)) {
212 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
213 tf->hob_feature = ioread8(ioaddr->error_addr);
214 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
215 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
216 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
217 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
218 iowrite8(tf->ctl, ioaddr->ctl_addr);
219 ap->last_ctl = tf->ctl;
226 * ata_exec_command - issue ATA command to host controller
227 * @ap: port to which command is being issued
228 * @tf: ATA taskfile register set
230 * Issues ATA command, with proper synchronization with interrupt
231 * handler / other threads.
234 * spin_lock_irqsave(host lock)
236 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
238 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
240 iowrite8(tf->command, ap->ioaddr.command_addr);
245 * ata_bmdma_freeze - Freeze BMDMA controller port
246 * @ap: port to freeze
248 * Freeze BMDMA controller port.
251 * Inherited from caller.
253 void ata_bmdma_freeze(struct ata_port *ap)
255 struct ata_ioports *ioaddr = &ap->ioaddr;
258 ap->last_ctl = ap->ctl;
260 if (ioaddr->ctl_addr)
261 iowrite8(ap->ctl, ioaddr->ctl_addr);
263 /* Under certain circumstances, some controllers raise IRQ on
264 * ATA_NIEN manipulation. Also, many controllers fail to mask
265 * previously pending IRQ on ATA_NIEN assertion. Clear it.
269 ap->ops->irq_clear(ap);
273 * ata_bmdma_thaw - Thaw BMDMA controller port
276 * Thaw BMDMA controller port.
279 * Inherited from caller.
281 void ata_bmdma_thaw(struct ata_port *ap)
283 /* clear & re-enable interrupts */
285 ap->ops->irq_clear(ap);
290 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
291 * @ap: port to handle error for
293 * Stock error handler for BMDMA controller. It can handle both
294 * PATA and SATA controllers. Many controllers should be able to
295 * use this EH as-is or with some added handling before and
299 * Kernel thread context (may sleep)
301 void ata_bmdma_error_handler(struct ata_port *ap)
303 ata_reset_fn_t softreset = ap->ops->softreset;
304 ata_reset_fn_t hardreset = ap->ops->hardreset;
305 struct ata_queued_cmd *qc;
309 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
310 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
313 /* reset PIO HSM and stop DMA engine */
314 spin_lock_irqsave(ap->lock, flags);
316 ap->hsm_task_state = HSM_ST_IDLE;
318 if (qc && (qc->tf.protocol == ATA_PROT_DMA ||
319 qc->tf.protocol == ATAPI_PROT_DMA)) {
322 host_stat = ap->ops->bmdma_status(ap);
324 /* BMDMA controllers indicate host bus error by
325 * setting DMA_ERR bit and timing out. As it wasn't
326 * really a timeout event, adjust error mask and
327 * cancel frozen state.
329 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
330 qc->err_mask = AC_ERR_HOST_BUS;
334 ap->ops->bmdma_stop(qc);
339 ap->ops->irq_clear(ap);
341 spin_unlock_irqrestore(ap->lock, flags);
344 ata_eh_thaw_port(ap);
346 /* PIO and DMA engines have been stopped, perform recovery */
348 /* ata_std_softreset and sata_std_hardreset are inherited to
349 * all SFF drivers from ata_sff_port_ops. Ignore softreset if
350 * ctl isn't accessible. Ignore hardreset if SCR access isn't
353 if (softreset == ata_std_softreset && !ap->ioaddr.ctl_addr)
355 if (hardreset == sata_std_hardreset && !sata_scr_valid(&ap->link))
358 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
363 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for
365 * @qc: internal command to clean up
368 * Kernel thread context (may sleep)
370 void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
372 if (qc->ap->ioaddr.bmdma_addr)
377 * ata_sff_port_start - Set port up for dma.
378 * @ap: Port to initialize
380 * Called just after data structures for each port are
381 * initialized. Allocates space for PRD table if the device
382 * is DMA capable SFF.
384 * May be used as the port_start() entry in ata_port_operations.
387 * Inherited from caller.
389 int ata_sff_port_start(struct ata_port *ap)
391 if (ap->ioaddr.bmdma_addr)
392 return ata_port_start(ap);
397 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
398 * @qc: Info associated with this ATA transaction.
401 * spin_lock_irqsave(host lock)
403 void ata_bmdma_setup(struct ata_queued_cmd *qc)
405 struct ata_port *ap = qc->ap;
406 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
409 /* load PRD table addr. */
410 mb(); /* make sure PRD table writes are visible to controller */
411 iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
413 /* specify data direction, triple-check start bit is clear */
414 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
415 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
417 dmactl |= ATA_DMA_WR;
418 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
420 /* issue r/w command */
421 ap->ops->exec_command(ap, &qc->tf);
425 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
426 * @qc: Info associated with this ATA transaction.
429 * spin_lock_irqsave(host lock)
431 void ata_bmdma_start(struct ata_queued_cmd *qc)
433 struct ata_port *ap = qc->ap;
436 /* start host DMA transaction */
437 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
438 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
440 /* Strictly, one may wish to issue an ioread8() here, to
441 * flush the mmio write. However, control also passes
442 * to the hardware at this point, and it will interrupt
443 * us when we are to resume control. So, in effect,
444 * we don't care when the mmio write flushes.
445 * Further, a read of the DMA status register _immediately_
446 * following the write may not be what certain flaky hardware
447 * is expected, so I think it is best to not add a readb()
448 * without first all the MMIO ATA cards/mobos.
449 * Or maybe I'm just being paranoid.
451 * FIXME: The posting of this write means I/O starts are
452 * unneccessarily delayed for MMIO
457 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
458 * @qc: Command we are ending DMA for
460 * Clears the ATA_DMA_START flag in the dma control register
462 * May be used as the bmdma_stop() entry in ata_port_operations.
465 * spin_lock_irqsave(host lock)
467 void ata_bmdma_stop(struct ata_queued_cmd *qc)
469 struct ata_port *ap = qc->ap;
470 void __iomem *mmio = ap->ioaddr.bmdma_addr;
472 /* clear start/stop bit */
473 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
476 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
477 ata_altstatus(ap); /* dummy read */
481 * ata_bmdma_status - Read PCI IDE BMDMA status
482 * @ap: Port associated with this ATA transaction.
484 * Read and return BMDMA status register.
486 * May be used as the bmdma_status() entry in ata_port_operations.
489 * spin_lock_irqsave(host lock)
491 u8 ata_bmdma_status(struct ata_port *ap)
493 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
497 * ata_noop_irq_clear - Noop placeholder for irq_clear
498 * @ap: Port associated with this ATA transaction.
500 void ata_noop_irq_clear(struct ata_port *ap)
507 * ata_pci_clear_simplex - attempt to kick device out of simplex
510 * Some PCI ATA devices report simplex mode but in fact can be told to
511 * enter non simplex mode. This implements the necessary logic to
512 * perform the task on such devices. Calling it on other devices will
513 * have -undefined- behaviour.
515 int ata_pci_clear_simplex(struct pci_dev *pdev)
517 unsigned long bmdma = pci_resource_start(pdev, 4);
523 simplex = inb(bmdma + 0x02);
524 outb(simplex & 0x60, bmdma + 0x02);
525 simplex = inb(bmdma + 0x02);
531 unsigned long ata_pci_default_filter(struct ata_device *adev, unsigned long xfer_mask)
533 /* Filter out DMA modes if the device has been configured by
534 the BIOS as PIO only */
536 if (adev->link->ap->ioaddr.bmdma_addr == NULL)
537 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
542 * ata_pci_init_bmdma - acquire PCI BMDMA resources and init ATA host
543 * @host: target ATA host
545 * Acquire PCI BMDMA resources and initialize @host accordingly.
548 * Inherited from calling layer (may sleep).
551 * 0 on success, -errno otherwise.
553 int ata_pci_init_bmdma(struct ata_host *host)
555 struct device *gdev = host->dev;
556 struct pci_dev *pdev = to_pci_dev(gdev);
559 /* No BAR4 allocation: No DMA */
560 if (pci_resource_start(pdev, 4) == 0)
563 /* TODO: If we get no DMA mask we should fall back to PIO */
564 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
567 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
571 /* request and iomap DMA region */
572 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
574 dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n");
577 host->iomap = pcim_iomap_table(pdev);
579 for (i = 0; i < 2; i++) {
580 struct ata_port *ap = host->ports[i];
581 void __iomem *bmdma = host->iomap[4] + 8 * i;
583 if (ata_port_is_dummy(ap))
586 ap->ioaddr.bmdma_addr = bmdma;
587 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
588 (ioread8(bmdma + 2) & 0x80))
589 host->flags |= ATA_HOST_SIMPLEX;
591 ata_port_desc(ap, "bmdma 0x%llx",
592 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
598 static int ata_resources_present(struct pci_dev *pdev, int port)
602 /* Check the PCI resources for this channel are enabled */
604 for (i = 0; i < 2; i ++) {
605 if (pci_resource_start(pdev, port + i) == 0 ||
606 pci_resource_len(pdev, port + i) == 0)
613 * ata_pci_init_sff_host - acquire native PCI ATA resources and init host
614 * @host: target ATA host
616 * Acquire native PCI ATA resources for @host and initialize the
617 * first two ports of @host accordingly. Ports marked dummy are
618 * skipped and allocation failure makes the port dummy.
620 * Note that native PCI resources are valid even for legacy hosts
621 * as we fix up pdev resources array early in boot, so this
622 * function can be used for both native and legacy SFF hosts.
625 * Inherited from calling layer (may sleep).
628 * 0 if at least one port is initialized, -ENODEV if no port is
631 int ata_pci_init_sff_host(struct ata_host *host)
633 struct device *gdev = host->dev;
634 struct pci_dev *pdev = to_pci_dev(gdev);
635 unsigned int mask = 0;
638 /* request, iomap BARs and init port addresses accordingly */
639 for (i = 0; i < 2; i++) {
640 struct ata_port *ap = host->ports[i];
642 void __iomem * const *iomap;
644 if (ata_port_is_dummy(ap))
647 /* Discard disabled ports. Some controllers show
648 * their unused channels this way. Disabled ports are
651 if (!ata_resources_present(pdev, i)) {
652 ap->ops = &ata_dummy_port_ops;
656 rc = pcim_iomap_regions(pdev, 0x3 << base,
657 dev_driver_string(gdev));
659 dev_printk(KERN_WARNING, gdev,
660 "failed to request/iomap BARs for port %d "
661 "(errno=%d)\n", i, rc);
663 pcim_pin_device(pdev);
664 ap->ops = &ata_dummy_port_ops;
667 host->iomap = iomap = pcim_iomap_table(pdev);
669 ap->ioaddr.cmd_addr = iomap[base];
670 ap->ioaddr.altstatus_addr =
671 ap->ioaddr.ctl_addr = (void __iomem *)
672 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
673 ata_std_ports(&ap->ioaddr);
675 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
676 (unsigned long long)pci_resource_start(pdev, base),
677 (unsigned long long)pci_resource_start(pdev, base + 1));
683 dev_printk(KERN_ERR, gdev, "no available native port\n");
691 * ata_pci_prepare_sff_host - helper to prepare native PCI ATA host
692 * @pdev: target PCI device
693 * @ppi: array of port_info, must be enough for two ports
694 * @r_host: out argument for the initialized ATA host
696 * Helper to allocate ATA host for @pdev, acquire all native PCI
697 * resources and initialize it accordingly in one go.
700 * Inherited from calling layer (may sleep).
703 * 0 on success, -errno otherwise.
705 int ata_pci_prepare_sff_host(struct pci_dev *pdev,
706 const struct ata_port_info * const * ppi,
707 struct ata_host **r_host)
709 struct ata_host *host;
712 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
715 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
717 dev_printk(KERN_ERR, &pdev->dev,
718 "failed to allocate ATA host\n");
723 rc = ata_pci_init_sff_host(host);
727 /* init DMA related stuff */
728 rc = ata_pci_init_bmdma(host);
732 devres_remove_group(&pdev->dev, NULL);
737 /* This is necessary because PCI and iomap resources are
738 * merged and releasing the top group won't release the
739 * acquired resources if some of those have been acquired
740 * before entering this function.
742 pcim_iounmap_regions(pdev, 0xf);
744 devres_release_group(&pdev->dev, NULL);
749 * ata_pci_activate_sff_host - start SFF host, request IRQ and register it
750 * @host: target SFF ATA host
751 * @irq_handler: irq_handler used when requesting IRQ(s)
752 * @sht: scsi_host_template to use when registering the host
754 * This is the counterpart of ata_host_activate() for SFF ATA
755 * hosts. This separate helper is necessary because SFF hosts
756 * use two separate interrupts in legacy mode.
759 * Inherited from calling layer (may sleep).
762 * 0 on success, -errno otherwise.
764 int ata_pci_activate_sff_host(struct ata_host *host,
765 irq_handler_t irq_handler,
766 struct scsi_host_template *sht)
768 struct device *dev = host->dev;
769 struct pci_dev *pdev = to_pci_dev(dev);
770 const char *drv_name = dev_driver_string(host->dev);
771 int legacy_mode = 0, rc;
773 rc = ata_host_start(host);
777 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
780 /* TODO: What if one channel is in native mode ... */
781 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
782 mask = (1 << 2) | (1 << 0);
783 if ((tmp8 & mask) != mask)
785 #if defined(CONFIG_NO_ATA_LEGACY)
786 /* Some platforms with PCI limits cannot address compat
787 port space. In that case we punt if their firmware has
788 left a device in compatibility mode */
790 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
796 if (!devres_open_group(dev, NULL, GFP_KERNEL))
799 if (!legacy_mode && pdev->irq) {
800 rc = devm_request_irq(dev, pdev->irq, irq_handler,
801 IRQF_SHARED, drv_name, host);
805 ata_port_desc(host->ports[0], "irq %d", pdev->irq);
806 ata_port_desc(host->ports[1], "irq %d", pdev->irq);
807 } else if (legacy_mode) {
808 if (!ata_port_is_dummy(host->ports[0])) {
809 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
810 irq_handler, IRQF_SHARED,
815 ata_port_desc(host->ports[0], "irq %d",
816 ATA_PRIMARY_IRQ(pdev));
819 if (!ata_port_is_dummy(host->ports[1])) {
820 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
821 irq_handler, IRQF_SHARED,
826 ata_port_desc(host->ports[1], "irq %d",
827 ATA_SECONDARY_IRQ(pdev));
831 rc = ata_host_register(host, sht);
834 devres_remove_group(dev, NULL);
836 devres_release_group(dev, NULL);
842 * ata_pci_init_one - Initialize/register PCI IDE host controller
843 * @pdev: Controller to be initialized
844 * @ppi: array of port_info, must be enough for two ports
845 * @sht: scsi_host_template to use when registering the host
846 * @host_priv: host private_data
848 * This is a helper function which can be called from a driver's
849 * xxx_init_one() probe function if the hardware uses traditional
850 * IDE taskfile registers.
852 * This function calls pci_enable_device(), reserves its register
853 * regions, sets the dma mask, enables bus master mode, and calls
857 * Nobody makes a single channel controller that appears solely as
858 * the secondary legacy port on PCI.
861 * Inherited from PCI layer (may sleep).
864 * Zero on success, negative on errno-based value on error.
866 int ata_pci_init_one(struct pci_dev *pdev,
867 const struct ata_port_info * const * ppi,
868 struct scsi_host_template *sht, void *host_priv)
870 struct device *dev = &pdev->dev;
871 const struct ata_port_info *pi = NULL;
872 struct ata_host *host = NULL;
877 /* look up the first valid port_info */
878 for (i = 0; i < 2 && ppi[i]; i++) {
879 if (ppi[i]->port_ops != &ata_dummy_port_ops) {
886 dev_printk(KERN_ERR, &pdev->dev,
887 "no valid port_info specified\n");
891 if (!devres_open_group(dev, NULL, GFP_KERNEL))
894 rc = pcim_enable_device(pdev);
898 /* prepare and activate SFF host */
899 rc = ata_pci_prepare_sff_host(pdev, ppi, &host);
902 host->private_data = host_priv;
904 pci_set_master(pdev);
905 rc = ata_pci_activate_sff_host(host, ata_interrupt, sht);
908 devres_remove_group(&pdev->dev, NULL);
910 devres_release_group(&pdev->dev, NULL);
915 #endif /* CONFIG_PCI */