2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.21" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 unsigned int ata_print_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_ignore_hpa = 0;
93 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
94 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
96 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
97 module_param(ata_probe_timeout, int, 0444);
98 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
100 int libata_noacpi = 1;
101 module_param_named(noacpi, libata_noacpi, int, 0444);
102 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set");
104 MODULE_AUTHOR("Jeff Garzik");
105 MODULE_DESCRIPTION("Library module for ATA devices");
106 MODULE_LICENSE("GPL");
107 MODULE_VERSION(DRV_VERSION);
111 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
112 * @tf: Taskfile to convert
113 * @fis: Buffer into which data will output
114 * @pmp: Port multiplier port
116 * Converts a standard ATA taskfile to a Serial ATA
117 * FIS structure (Register - Host to Device).
120 * Inherited from caller.
123 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
125 fis[0] = 0x27; /* Register - Host to Device FIS */
126 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
127 bit 7 indicates Command FIS */
128 fis[2] = tf->command;
129 fis[3] = tf->feature;
136 fis[8] = tf->hob_lbal;
137 fis[9] = tf->hob_lbam;
138 fis[10] = tf->hob_lbah;
139 fis[11] = tf->hob_feature;
142 fis[13] = tf->hob_nsect;
153 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
154 * @fis: Buffer from which data will be input
155 * @tf: Taskfile to output
157 * Converts a serial ATA FIS structure to a standard ATA taskfile.
160 * Inherited from caller.
163 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
165 tf->command = fis[2]; /* status */
166 tf->feature = fis[3]; /* error */
173 tf->hob_lbal = fis[8];
174 tf->hob_lbam = fis[9];
175 tf->hob_lbah = fis[10];
178 tf->hob_nsect = fis[13];
181 static const u8 ata_rw_cmds[] = {
185 ATA_CMD_READ_MULTI_EXT,
186 ATA_CMD_WRITE_MULTI_EXT,
190 ATA_CMD_WRITE_MULTI_FUA_EXT,
194 ATA_CMD_PIO_READ_EXT,
195 ATA_CMD_PIO_WRITE_EXT,
208 ATA_CMD_WRITE_FUA_EXT
212 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
213 * @tf: command to examine and configure
214 * @dev: device tf belongs to
216 * Examine the device configuration and tf->flags to calculate
217 * the proper read/write commands and protocol to use.
222 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
226 int index, fua, lba48, write;
228 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
229 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
230 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
232 if (dev->flags & ATA_DFLAG_PIO) {
233 tf->protocol = ATA_PROT_PIO;
234 index = dev->multi_count ? 0 : 8;
235 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
236 /* Unable to use DMA due to host limitation */
237 tf->protocol = ATA_PROT_PIO;
238 index = dev->multi_count ? 0 : 8;
240 tf->protocol = ATA_PROT_DMA;
244 cmd = ata_rw_cmds[index + fua + lba48 + write];
253 * ata_tf_read_block - Read block address from ATA taskfile
254 * @tf: ATA taskfile of interest
255 * @dev: ATA device @tf belongs to
260 * Read block address from @tf. This function can handle all
261 * three address formats - LBA, LBA48 and CHS. tf->protocol and
262 * flags select the address format to use.
265 * Block address read from @tf.
267 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
271 if (tf->flags & ATA_TFLAG_LBA) {
272 if (tf->flags & ATA_TFLAG_LBA48) {
273 block |= (u64)tf->hob_lbah << 40;
274 block |= (u64)tf->hob_lbam << 32;
275 block |= tf->hob_lbal << 24;
277 block |= (tf->device & 0xf) << 24;
279 block |= tf->lbah << 16;
280 block |= tf->lbam << 8;
285 cyl = tf->lbam | (tf->lbah << 8);
286 head = tf->device & 0xf;
289 block = (cyl * dev->heads + head) * dev->sectors + sect;
296 * ata_build_rw_tf - Build ATA taskfile for given read/write request
297 * @tf: Target ATA taskfile
298 * @dev: ATA device @tf belongs to
299 * @block: Block address
300 * @n_block: Number of blocks
301 * @tf_flags: RW/FUA etc...
307 * Build ATA taskfile @tf for read/write request described by
308 * @block, @n_block, @tf_flags and @tag on @dev.
312 * 0 on success, -ERANGE if the request is too large for @dev,
313 * -EINVAL if the request is invalid.
315 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
316 u64 block, u32 n_block, unsigned int tf_flags,
319 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
320 tf->flags |= tf_flags;
322 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
324 if (!lba_48_ok(block, n_block))
327 tf->protocol = ATA_PROT_NCQ;
328 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
330 if (tf->flags & ATA_TFLAG_WRITE)
331 tf->command = ATA_CMD_FPDMA_WRITE;
333 tf->command = ATA_CMD_FPDMA_READ;
335 tf->nsect = tag << 3;
336 tf->hob_feature = (n_block >> 8) & 0xff;
337 tf->feature = n_block & 0xff;
339 tf->hob_lbah = (block >> 40) & 0xff;
340 tf->hob_lbam = (block >> 32) & 0xff;
341 tf->hob_lbal = (block >> 24) & 0xff;
342 tf->lbah = (block >> 16) & 0xff;
343 tf->lbam = (block >> 8) & 0xff;
344 tf->lbal = block & 0xff;
347 if (tf->flags & ATA_TFLAG_FUA)
348 tf->device |= 1 << 7;
349 } else if (dev->flags & ATA_DFLAG_LBA) {
350 tf->flags |= ATA_TFLAG_LBA;
352 if (lba_28_ok(block, n_block)) {
354 tf->device |= (block >> 24) & 0xf;
355 } else if (lba_48_ok(block, n_block)) {
356 if (!(dev->flags & ATA_DFLAG_LBA48))
360 tf->flags |= ATA_TFLAG_LBA48;
362 tf->hob_nsect = (n_block >> 8) & 0xff;
364 tf->hob_lbah = (block >> 40) & 0xff;
365 tf->hob_lbam = (block >> 32) & 0xff;
366 tf->hob_lbal = (block >> 24) & 0xff;
368 /* request too large even for LBA48 */
371 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
374 tf->nsect = n_block & 0xff;
376 tf->lbah = (block >> 16) & 0xff;
377 tf->lbam = (block >> 8) & 0xff;
378 tf->lbal = block & 0xff;
380 tf->device |= ATA_LBA;
383 u32 sect, head, cyl, track;
385 /* The request -may- be too large for CHS addressing. */
386 if (!lba_28_ok(block, n_block))
389 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
392 /* Convert LBA to CHS */
393 track = (u32)block / dev->sectors;
394 cyl = track / dev->heads;
395 head = track % dev->heads;
396 sect = (u32)block % dev->sectors + 1;
398 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
399 (u32)block, track, cyl, head, sect);
401 /* Check whether the converted CHS can fit.
405 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
408 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
419 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
420 * @pio_mask: pio_mask
421 * @mwdma_mask: mwdma_mask
422 * @udma_mask: udma_mask
424 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
425 * unsigned int xfer_mask.
433 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
434 unsigned int mwdma_mask,
435 unsigned int udma_mask)
437 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
438 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
439 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
443 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
444 * @xfer_mask: xfer_mask to unpack
445 * @pio_mask: resulting pio_mask
446 * @mwdma_mask: resulting mwdma_mask
447 * @udma_mask: resulting udma_mask
449 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
450 * Any NULL distination masks will be ignored.
452 static void ata_unpack_xfermask(unsigned int xfer_mask,
453 unsigned int *pio_mask,
454 unsigned int *mwdma_mask,
455 unsigned int *udma_mask)
458 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
460 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
462 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
465 static const struct ata_xfer_ent {
469 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
470 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
471 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
476 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
477 * @xfer_mask: xfer_mask of interest
479 * Return matching XFER_* value for @xfer_mask. Only the highest
480 * bit of @xfer_mask is considered.
486 * Matching XFER_* value, 0 if no match found.
488 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
490 int highbit = fls(xfer_mask) - 1;
491 const struct ata_xfer_ent *ent;
493 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
494 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
495 return ent->base + highbit - ent->shift;
500 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
501 * @xfer_mode: XFER_* of interest
503 * Return matching xfer_mask for @xfer_mode.
509 * Matching xfer_mask, 0 if no match found.
511 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
513 const struct ata_xfer_ent *ent;
515 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
516 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
517 return 1 << (ent->shift + xfer_mode - ent->base);
522 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
523 * @xfer_mode: XFER_* of interest
525 * Return matching xfer_shift for @xfer_mode.
531 * Matching xfer_shift, -1 if no match found.
533 static int ata_xfer_mode2shift(unsigned int xfer_mode)
535 const struct ata_xfer_ent *ent;
537 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
538 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
544 * ata_mode_string - convert xfer_mask to string
545 * @xfer_mask: mask of bits supported; only highest bit counts.
547 * Determine string which represents the highest speed
548 * (highest bit in @modemask).
554 * Constant C string representing highest speed listed in
555 * @mode_mask, or the constant C string "<n/a>".
557 static const char *ata_mode_string(unsigned int xfer_mask)
559 static const char * const xfer_mode_str[] = {
583 highbit = fls(xfer_mask) - 1;
584 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
585 return xfer_mode_str[highbit];
589 static const char *sata_spd_string(unsigned int spd)
591 static const char * const spd_str[] = {
596 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
598 return spd_str[spd - 1];
601 void ata_dev_disable(struct ata_device *dev)
603 if (ata_dev_enabled(dev)) {
604 if (ata_msg_drv(dev->ap))
605 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
606 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
613 * ata_devchk - PATA device presence detection
614 * @ap: ATA channel to examine
615 * @device: Device to examine (starting at zero)
617 * This technique was originally described in
618 * Hale Landis's ATADRVR (www.ata-atapi.com), and
619 * later found its way into the ATA/ATAPI spec.
621 * Write a pattern to the ATA shadow registers,
622 * and if a device is present, it will respond by
623 * correctly storing and echoing back the
624 * ATA shadow register contents.
630 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
632 struct ata_ioports *ioaddr = &ap->ioaddr;
635 ap->ops->dev_select(ap, device);
637 iowrite8(0x55, ioaddr->nsect_addr);
638 iowrite8(0xaa, ioaddr->lbal_addr);
640 iowrite8(0xaa, ioaddr->nsect_addr);
641 iowrite8(0x55, ioaddr->lbal_addr);
643 iowrite8(0x55, ioaddr->nsect_addr);
644 iowrite8(0xaa, ioaddr->lbal_addr);
646 nsect = ioread8(ioaddr->nsect_addr);
647 lbal = ioread8(ioaddr->lbal_addr);
649 if ((nsect == 0x55) && (lbal == 0xaa))
650 return 1; /* we found a device */
652 return 0; /* nothing found */
656 * ata_dev_classify - determine device type based on ATA-spec signature
657 * @tf: ATA taskfile register set for device to be identified
659 * Determine from taskfile register contents whether a device is
660 * ATA or ATAPI, as per "Signature and persistence" section
661 * of ATA/PI spec (volume 1, sect 5.14).
667 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
668 * the event of failure.
671 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
673 /* Apple's open source Darwin code hints that some devices only
674 * put a proper signature into the LBA mid/high registers,
675 * So, we only check those. It's sufficient for uniqueness.
678 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
679 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
680 DPRINTK("found ATA device by sig\n");
684 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
685 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
686 DPRINTK("found ATAPI device by sig\n");
687 return ATA_DEV_ATAPI;
690 DPRINTK("unknown device\n");
691 return ATA_DEV_UNKNOWN;
695 * ata_dev_try_classify - Parse returned ATA device signature
696 * @ap: ATA channel to examine
697 * @device: Device to examine (starting at zero)
698 * @r_err: Value of error register on completion
700 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
701 * an ATA/ATAPI-defined set of values is placed in the ATA
702 * shadow registers, indicating the results of device detection
705 * Select the ATA device, and read the values from the ATA shadow
706 * registers. Then parse according to the Error register value,
707 * and the spec-defined values examined by ata_dev_classify().
713 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
717 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
719 struct ata_taskfile tf;
723 ap->ops->dev_select(ap, device);
725 memset(&tf, 0, sizeof(tf));
727 ap->ops->tf_read(ap, &tf);
732 /* see if device passed diags: if master then continue and warn later */
733 if (err == 0 && device == 0)
734 /* diagnostic fail : do nothing _YET_ */
735 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
738 else if ((device == 0) && (err == 0x81))
743 /* determine if device is ATA or ATAPI */
744 class = ata_dev_classify(&tf);
746 if (class == ATA_DEV_UNKNOWN)
748 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
754 * ata_id_string - Convert IDENTIFY DEVICE page into string
755 * @id: IDENTIFY DEVICE results we will examine
756 * @s: string into which data is output
757 * @ofs: offset into identify device page
758 * @len: length of string to return. must be an even number.
760 * The strings in the IDENTIFY DEVICE page are broken up into
761 * 16-bit chunks. Run through the string, and output each
762 * 8-bit chunk linearly, regardless of platform.
768 void ata_id_string(const u16 *id, unsigned char *s,
769 unsigned int ofs, unsigned int len)
788 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
789 * @id: IDENTIFY DEVICE results we will examine
790 * @s: string into which data is output
791 * @ofs: offset into identify device page
792 * @len: length of string to return. must be an odd number.
794 * This function is identical to ata_id_string except that it
795 * trims trailing spaces and terminates the resulting string with
796 * null. @len must be actual maximum length (even number) + 1.
801 void ata_id_c_string(const u16 *id, unsigned char *s,
802 unsigned int ofs, unsigned int len)
808 ata_id_string(id, s, ofs, len - 1);
810 p = s + strnlen(s, len - 1);
811 while (p > s && p[-1] == ' ')
816 static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
820 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
821 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
822 sectors |= (tf->hob_lbal & 0xff) << 24;
823 sectors |= (tf->lbah & 0xff) << 16;
824 sectors |= (tf->lbam & 0xff) << 8;
825 sectors |= (tf->lbal & 0xff);
830 static u64 ata_tf_to_lba(struct ata_taskfile *tf)
834 sectors |= (tf->device & 0x0f) << 24;
835 sectors |= (tf->lbah & 0xff) << 16;
836 sectors |= (tf->lbam & 0xff) << 8;
837 sectors |= (tf->lbal & 0xff);
843 * ata_read_native_max_address_ext - LBA48 native max query
844 * @dev: Device to query
846 * Perform an LBA48 size query upon the device in question. Return the
847 * actual LBA48 size or zero if the command fails.
850 static u64 ata_read_native_max_address_ext(struct ata_device *dev)
853 struct ata_taskfile tf;
855 ata_tf_init(dev, &tf);
857 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
858 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | ATA_TFLAG_ISADDR;
859 tf.protocol |= ATA_PROT_NODATA;
862 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
866 return ata_tf_to_lba48(&tf);
870 * ata_read_native_max_address - LBA28 native max query
871 * @dev: Device to query
873 * Performa an LBA28 size query upon the device in question. Return the
874 * actual LBA28 size or zero if the command fails.
877 static u64 ata_read_native_max_address(struct ata_device *dev)
880 struct ata_taskfile tf;
882 ata_tf_init(dev, &tf);
884 tf.command = ATA_CMD_READ_NATIVE_MAX;
885 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
886 tf.protocol |= ATA_PROT_NODATA;
889 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
893 return ata_tf_to_lba(&tf);
897 * ata_set_native_max_address_ext - LBA48 native max set
898 * @dev: Device to query
899 * @new_sectors: new max sectors value to set for the device
901 * Perform an LBA48 size set max upon the device in question. Return the
902 * actual LBA48 size or zero if the command fails.
905 static u64 ata_set_native_max_address_ext(struct ata_device *dev, u64 new_sectors)
908 struct ata_taskfile tf;
912 ata_tf_init(dev, &tf);
914 tf.command = ATA_CMD_SET_MAX_EXT;
915 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | ATA_TFLAG_ISADDR;
916 tf.protocol |= ATA_PROT_NODATA;
919 tf.lbal = (new_sectors >> 0) & 0xff;
920 tf.lbam = (new_sectors >> 8) & 0xff;
921 tf.lbah = (new_sectors >> 16) & 0xff;
923 tf.hob_lbal = (new_sectors >> 24) & 0xff;
924 tf.hob_lbam = (new_sectors >> 32) & 0xff;
925 tf.hob_lbah = (new_sectors >> 40) & 0xff;
927 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
931 return ata_tf_to_lba48(&tf);
935 * ata_set_native_max_address - LBA28 native max set
936 * @dev: Device to query
937 * @new_sectors: new max sectors value to set for the device
939 * Perform an LBA28 size set max upon the device in question. Return the
940 * actual LBA28 size or zero if the command fails.
943 static u64 ata_set_native_max_address(struct ata_device *dev, u64 new_sectors)
946 struct ata_taskfile tf;
950 ata_tf_init(dev, &tf);
952 tf.command = ATA_CMD_SET_MAX;
953 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
954 tf.protocol |= ATA_PROT_NODATA;
956 tf.lbal = (new_sectors >> 0) & 0xff;
957 tf.lbam = (new_sectors >> 8) & 0xff;
958 tf.lbah = (new_sectors >> 16) & 0xff;
959 tf.device |= ((new_sectors >> 24) & 0x0f) | 0x40;
961 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
965 return ata_tf_to_lba(&tf);
969 * ata_hpa_resize - Resize a device with an HPA set
970 * @dev: Device to resize
972 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
973 * it if required to the full size of the media. The caller must check
974 * the drive has the HPA feature set enabled.
977 static u64 ata_hpa_resize(struct ata_device *dev)
979 u64 sectors = dev->n_sectors;
982 if (ata_id_has_lba48(dev->id))
983 hpa_sectors = ata_read_native_max_address_ext(dev);
985 hpa_sectors = ata_read_native_max_address(dev);
987 if (hpa_sectors > sectors) {
988 ata_dev_printk(dev, KERN_INFO,
989 "Host Protected Area detected:\n"
990 "\tcurrent size: %lld sectors\n"
991 "\tnative size: %lld sectors\n",
992 (long long)sectors, (long long)hpa_sectors);
994 if (ata_ignore_hpa) {
995 if (ata_id_has_lba48(dev->id))
996 hpa_sectors = ata_set_native_max_address_ext(dev, hpa_sectors);
998 hpa_sectors = ata_set_native_max_address(dev,
1002 ata_dev_printk(dev, KERN_INFO, "native size "
1003 "increased to %lld sectors\n",
1004 (long long)hpa_sectors);
1008 } else if (hpa_sectors < sectors)
1009 ata_dev_printk(dev, KERN_WARNING, "%s 1: hpa sectors (%lld) "
1010 "is smaller than sectors (%lld)\n", __FUNCTION__,
1011 (long long)hpa_sectors, (long long)sectors);
1016 static u64 ata_id_n_sectors(const u16 *id)
1018 if (ata_id_has_lba(id)) {
1019 if (ata_id_has_lba48(id))
1020 return ata_id_u64(id, 100);
1022 return ata_id_u32(id, 60);
1024 if (ata_id_current_chs_valid(id))
1025 return ata_id_u32(id, 57);
1027 return id[1] * id[3] * id[6];
1032 * ata_id_to_dma_mode - Identify DMA mode from id block
1033 * @dev: device to identify
1034 * @unknown: mode to assume if we cannot tell
1036 * Set up the timing values for the device based upon the identify
1037 * reported values for the DMA mode. This function is used by drivers
1038 * which rely upon firmware configured modes, but wish to report the
1039 * mode correctly when possible.
1041 * In addition we emit similarly formatted messages to the default
1042 * ata_dev_set_mode handler, in order to provide consistency of
1046 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
1051 /* Pack the DMA modes */
1052 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
1053 if (dev->id[53] & 0x04)
1054 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
1056 /* Select the mode in use */
1057 mode = ata_xfer_mask2mode(mask);
1060 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
1061 ata_mode_string(mask));
1063 /* SWDMA perhaps ? */
1065 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
1068 /* Configure the device reporting */
1069 dev->xfer_mode = mode;
1070 dev->xfer_shift = ata_xfer_mode2shift(mode);
1074 * ata_noop_dev_select - Select device 0/1 on ATA bus
1075 * @ap: ATA channel to manipulate
1076 * @device: ATA device (numbered from zero) to select
1078 * This function performs no actual function.
1080 * May be used as the dev_select() entry in ata_port_operations.
1085 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
1091 * ata_std_dev_select - Select device 0/1 on ATA bus
1092 * @ap: ATA channel to manipulate
1093 * @device: ATA device (numbered from zero) to select
1095 * Use the method defined in the ATA specification to
1096 * make either device 0, or device 1, active on the
1097 * ATA channel. Works with both PIO and MMIO.
1099 * May be used as the dev_select() entry in ata_port_operations.
1105 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1110 tmp = ATA_DEVICE_OBS;
1112 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1114 iowrite8(tmp, ap->ioaddr.device_addr);
1115 ata_pause(ap); /* needed; also flushes, for mmio */
1119 * ata_dev_select - Select device 0/1 on ATA bus
1120 * @ap: ATA channel to manipulate
1121 * @device: ATA device (numbered from zero) to select
1122 * @wait: non-zero to wait for Status register BSY bit to clear
1123 * @can_sleep: non-zero if context allows sleeping
1125 * Use the method defined in the ATA specification to
1126 * make either device 0, or device 1, active on the
1129 * This is a high-level version of ata_std_dev_select(),
1130 * which additionally provides the services of inserting
1131 * the proper pauses and status polling, where needed.
1137 void ata_dev_select(struct ata_port *ap, unsigned int device,
1138 unsigned int wait, unsigned int can_sleep)
1140 if (ata_msg_probe(ap))
1141 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
1142 "device %u, wait %u\n", device, wait);
1147 ap->ops->dev_select(ap, device);
1150 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1157 * ata_dump_id - IDENTIFY DEVICE info debugging output
1158 * @id: IDENTIFY DEVICE page to dump
1160 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1167 static inline void ata_dump_id(const u16 *id)
1169 DPRINTK("49==0x%04x "
1179 DPRINTK("80==0x%04x "
1189 DPRINTK("88==0x%04x "
1196 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1197 * @id: IDENTIFY data to compute xfer mask from
1199 * Compute the xfermask for this device. This is not as trivial
1200 * as it seems if we must consider early devices correctly.
1202 * FIXME: pre IDE drive timing (do we care ?).
1210 static unsigned int ata_id_xfermask(const u16 *id)
1212 unsigned int pio_mask, mwdma_mask, udma_mask;
1214 /* Usual case. Word 53 indicates word 64 is valid */
1215 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1216 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1220 /* If word 64 isn't valid then Word 51 high byte holds
1221 * the PIO timing number for the maximum. Turn it into
1224 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1225 if (mode < 5) /* Valid PIO range */
1226 pio_mask = (2 << mode) - 1;
1230 /* But wait.. there's more. Design your standards by
1231 * committee and you too can get a free iordy field to
1232 * process. However its the speeds not the modes that
1233 * are supported... Note drivers using the timing API
1234 * will get this right anyway
1238 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1240 if (ata_id_is_cfa(id)) {
1242 * Process compact flash extended modes
1244 int pio = id[163] & 0x7;
1245 int dma = (id[163] >> 3) & 7;
1248 pio_mask |= (1 << 5);
1250 pio_mask |= (1 << 6);
1252 mwdma_mask |= (1 << 3);
1254 mwdma_mask |= (1 << 4);
1258 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1259 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1261 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1265 * ata_port_queue_task - Queue port_task
1266 * @ap: The ata_port to queue port_task for
1267 * @fn: workqueue function to be scheduled
1268 * @data: data for @fn to use
1269 * @delay: delay time for workqueue function
1271 * Schedule @fn(@data) for execution after @delay jiffies using
1272 * port_task. There is one port_task per port and it's the
1273 * user(low level driver)'s responsibility to make sure that only
1274 * one task is active at any given time.
1276 * libata core layer takes care of synchronization between
1277 * port_task and EH. ata_port_queue_task() may be ignored for EH
1281 * Inherited from caller.
1283 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1284 unsigned long delay)
1286 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1287 ap->port_task_data = data;
1289 /* may fail if ata_port_flush_task() in progress */
1290 queue_delayed_work(ata_wq, &ap->port_task, delay);
1294 * ata_port_flush_task - Flush port_task
1295 * @ap: The ata_port to flush port_task for
1297 * After this function completes, port_task is guranteed not to
1298 * be running or scheduled.
1301 * Kernel thread context (may sleep)
1303 void ata_port_flush_task(struct ata_port *ap)
1307 cancel_rearming_delayed_work(&ap->port_task);
1309 if (ata_msg_ctl(ap))
1310 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1313 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1315 struct completion *waiting = qc->private_data;
1321 * ata_exec_internal_sg - execute libata internal command
1322 * @dev: Device to which the command is sent
1323 * @tf: Taskfile registers for the command and the result
1324 * @cdb: CDB for packet command
1325 * @dma_dir: Data tranfer direction of the command
1326 * @sg: sg list for the data buffer of the command
1327 * @n_elem: Number of sg entries
1329 * Executes libata internal command with timeout. @tf contains
1330 * command on entry and result on return. Timeout and error
1331 * conditions are reported via return value. No recovery action
1332 * is taken after a command times out. It's caller's duty to
1333 * clean up after timeout.
1336 * None. Should be called with kernel context, might sleep.
1339 * Zero on success, AC_ERR_* mask on failure
1341 unsigned ata_exec_internal_sg(struct ata_device *dev,
1342 struct ata_taskfile *tf, const u8 *cdb,
1343 int dma_dir, struct scatterlist *sg,
1344 unsigned int n_elem)
1346 struct ata_port *ap = dev->ap;
1347 u8 command = tf->command;
1348 struct ata_queued_cmd *qc;
1349 unsigned int tag, preempted_tag;
1350 u32 preempted_sactive, preempted_qc_active;
1351 DECLARE_COMPLETION_ONSTACK(wait);
1352 unsigned long flags;
1353 unsigned int err_mask;
1356 spin_lock_irqsave(ap->lock, flags);
1358 /* no internal command while frozen */
1359 if (ap->pflags & ATA_PFLAG_FROZEN) {
1360 spin_unlock_irqrestore(ap->lock, flags);
1361 return AC_ERR_SYSTEM;
1364 /* initialize internal qc */
1366 /* XXX: Tag 0 is used for drivers with legacy EH as some
1367 * drivers choke if any other tag is given. This breaks
1368 * ata_tag_internal() test for those drivers. Don't use new
1369 * EH stuff without converting to it.
1371 if (ap->ops->error_handler)
1372 tag = ATA_TAG_INTERNAL;
1376 if (test_and_set_bit(tag, &ap->qc_allocated))
1378 qc = __ata_qc_from_tag(ap, tag);
1386 preempted_tag = ap->active_tag;
1387 preempted_sactive = ap->sactive;
1388 preempted_qc_active = ap->qc_active;
1389 ap->active_tag = ATA_TAG_POISON;
1393 /* prepare & issue qc */
1396 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1397 qc->flags |= ATA_QCFLAG_RESULT_TF;
1398 qc->dma_dir = dma_dir;
1399 if (dma_dir != DMA_NONE) {
1400 unsigned int i, buflen = 0;
1402 for (i = 0; i < n_elem; i++)
1403 buflen += sg[i].length;
1405 ata_sg_init(qc, sg, n_elem);
1406 qc->nbytes = buflen;
1409 qc->private_data = &wait;
1410 qc->complete_fn = ata_qc_complete_internal;
1414 spin_unlock_irqrestore(ap->lock, flags);
1416 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1418 ata_port_flush_task(ap);
1421 spin_lock_irqsave(ap->lock, flags);
1423 /* We're racing with irq here. If we lose, the
1424 * following test prevents us from completing the qc
1425 * twice. If we win, the port is frozen and will be
1426 * cleaned up by ->post_internal_cmd().
1428 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1429 qc->err_mask |= AC_ERR_TIMEOUT;
1431 if (ap->ops->error_handler)
1432 ata_port_freeze(ap);
1434 ata_qc_complete(qc);
1436 if (ata_msg_warn(ap))
1437 ata_dev_printk(dev, KERN_WARNING,
1438 "qc timeout (cmd 0x%x)\n", command);
1441 spin_unlock_irqrestore(ap->lock, flags);
1444 /* do post_internal_cmd */
1445 if (ap->ops->post_internal_cmd)
1446 ap->ops->post_internal_cmd(qc);
1448 /* perform minimal error analysis */
1449 if (qc->flags & ATA_QCFLAG_FAILED) {
1450 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1451 qc->err_mask |= AC_ERR_DEV;
1454 qc->err_mask |= AC_ERR_OTHER;
1456 if (qc->err_mask & ~AC_ERR_OTHER)
1457 qc->err_mask &= ~AC_ERR_OTHER;
1461 spin_lock_irqsave(ap->lock, flags);
1463 *tf = qc->result_tf;
1464 err_mask = qc->err_mask;
1467 ap->active_tag = preempted_tag;
1468 ap->sactive = preempted_sactive;
1469 ap->qc_active = preempted_qc_active;
1471 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1472 * Until those drivers are fixed, we detect the condition
1473 * here, fail the command with AC_ERR_SYSTEM and reenable the
1476 * Note that this doesn't change any behavior as internal
1477 * command failure results in disabling the device in the
1478 * higher layer for LLDDs without new reset/EH callbacks.
1480 * Kill the following code as soon as those drivers are fixed.
1482 if (ap->flags & ATA_FLAG_DISABLED) {
1483 err_mask |= AC_ERR_SYSTEM;
1487 spin_unlock_irqrestore(ap->lock, flags);
1493 * ata_exec_internal - execute libata internal command
1494 * @dev: Device to which the command is sent
1495 * @tf: Taskfile registers for the command and the result
1496 * @cdb: CDB for packet command
1497 * @dma_dir: Data tranfer direction of the command
1498 * @buf: Data buffer of the command
1499 * @buflen: Length of data buffer
1501 * Wrapper around ata_exec_internal_sg() which takes simple
1502 * buffer instead of sg list.
1505 * None. Should be called with kernel context, might sleep.
1508 * Zero on success, AC_ERR_* mask on failure
1510 unsigned ata_exec_internal(struct ata_device *dev,
1511 struct ata_taskfile *tf, const u8 *cdb,
1512 int dma_dir, void *buf, unsigned int buflen)
1514 struct scatterlist *psg = NULL, sg;
1515 unsigned int n_elem = 0;
1517 if (dma_dir != DMA_NONE) {
1519 sg_init_one(&sg, buf, buflen);
1524 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1528 * ata_do_simple_cmd - execute simple internal command
1529 * @dev: Device to which the command is sent
1530 * @cmd: Opcode to execute
1532 * Execute a 'simple' command, that only consists of the opcode
1533 * 'cmd' itself, without filling any other registers
1536 * Kernel thread context (may sleep).
1539 * Zero on success, AC_ERR_* mask on failure
1541 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1543 struct ata_taskfile tf;
1545 ata_tf_init(dev, &tf);
1548 tf.flags |= ATA_TFLAG_DEVICE;
1549 tf.protocol = ATA_PROT_NODATA;
1551 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1555 * ata_pio_need_iordy - check if iordy needed
1558 * Check if the current speed of the device requires IORDY. Used
1559 * by various controllers for chip configuration.
1562 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1564 /* Controller doesn't support IORDY. Probably a pointless check
1565 as the caller should know this */
1566 if (adev->ap->flags & ATA_FLAG_NO_IORDY)
1568 /* PIO3 and higher it is mandatory */
1569 if (adev->pio_mode > XFER_PIO_2)
1571 /* We turn it on when possible */
1572 if (ata_id_has_iordy(adev->id))
1578 * ata_pio_mask_no_iordy - Return the non IORDY mask
1581 * Compute the highest mode possible if we are not using iordy. Return
1582 * -1 if no iordy mode is available.
1585 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1587 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1588 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1589 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1590 /* Is the speed faster than the drive allows non IORDY ? */
1592 /* This is cycle times not frequency - watch the logic! */
1593 if (pio > 240) /* PIO2 is 240nS per cycle */
1594 return 3 << ATA_SHIFT_PIO;
1595 return 7 << ATA_SHIFT_PIO;
1598 return 3 << ATA_SHIFT_PIO;
1602 * ata_dev_read_id - Read ID data from the specified device
1603 * @dev: target device
1604 * @p_class: pointer to class of the target device (may be changed)
1605 * @flags: ATA_READID_* flags
1606 * @id: buffer to read IDENTIFY data into
1608 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1609 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1610 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1611 * for pre-ATA4 drives.
1614 * Kernel thread context (may sleep)
1617 * 0 on success, -errno otherwise.
1619 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1620 unsigned int flags, u16 *id)
1622 struct ata_port *ap = dev->ap;
1623 unsigned int class = *p_class;
1624 struct ata_taskfile tf;
1625 unsigned int err_mask = 0;
1627 int may_fallback = 1, tried_spinup = 0;
1630 if (ata_msg_ctl(ap))
1631 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1633 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1635 ata_tf_init(dev, &tf);
1639 tf.command = ATA_CMD_ID_ATA;
1642 tf.command = ATA_CMD_ID_ATAPI;
1646 reason = "unsupported class";
1650 tf.protocol = ATA_PROT_PIO;
1652 /* Some devices choke if TF registers contain garbage. Make
1653 * sure those are properly initialized.
1655 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1657 /* Device presence detection is unreliable on some
1658 * controllers. Always poll IDENTIFY if available.
1660 tf.flags |= ATA_TFLAG_POLLING;
1662 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1663 id, sizeof(id[0]) * ATA_ID_WORDS);
1665 if (err_mask & AC_ERR_NODEV_HINT) {
1666 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1667 ap->print_id, dev->devno);
1671 /* Device or controller might have reported the wrong
1672 * device class. Give a shot at the other IDENTIFY if
1673 * the current one is aborted by the device.
1676 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1679 if (class == ATA_DEV_ATA)
1680 class = ATA_DEV_ATAPI;
1682 class = ATA_DEV_ATA;
1687 reason = "I/O error";
1691 /* Falling back doesn't make sense if ID data was read
1692 * successfully at least once.
1696 swap_buf_le16(id, ATA_ID_WORDS);
1700 reason = "device reports invalid type";
1702 if (class == ATA_DEV_ATA) {
1703 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1706 if (ata_id_is_ata(id))
1710 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1713 * Drive powered-up in standby mode, and requires a specific
1714 * SET_FEATURES spin-up subcommand before it will accept
1715 * anything other than the original IDENTIFY command.
1717 ata_tf_init(dev, &tf);
1718 tf.command = ATA_CMD_SET_FEATURES;
1719 tf.feature = SETFEATURES_SPINUP;
1720 tf.protocol = ATA_PROT_NODATA;
1721 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1722 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1725 reason = "SPINUP failed";
1729 * If the drive initially returned incomplete IDENTIFY info,
1730 * we now must reissue the IDENTIFY command.
1732 if (id[2] == 0x37c8)
1736 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1738 * The exact sequence expected by certain pre-ATA4 drives is:
1741 * INITIALIZE DEVICE PARAMETERS
1743 * Some drives were very specific about that exact sequence.
1745 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1746 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1749 reason = "INIT_DEV_PARAMS failed";
1753 /* current CHS translation info (id[53-58]) might be
1754 * changed. reread the identify device info.
1756 flags &= ~ATA_READID_POSTRESET;
1766 if (ata_msg_warn(ap))
1767 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1768 "(%s, err_mask=0x%x)\n", reason, err_mask);
1772 static inline u8 ata_dev_knobble(struct ata_device *dev)
1774 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1777 static void ata_dev_config_ncq(struct ata_device *dev,
1778 char *desc, size_t desc_sz)
1780 struct ata_port *ap = dev->ap;
1781 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1783 if (!ata_id_has_ncq(dev->id)) {
1787 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1788 snprintf(desc, desc_sz, "NCQ (not used)");
1791 if (ap->flags & ATA_FLAG_NCQ) {
1792 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1793 dev->flags |= ATA_DFLAG_NCQ;
1796 if (hdepth >= ddepth)
1797 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1799 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1803 * ata_dev_configure - Configure the specified ATA/ATAPI device
1804 * @dev: Target device to configure
1806 * Configure @dev according to @dev->id. Generic and low-level
1807 * driver specific fixups are also applied.
1810 * Kernel thread context (may sleep)
1813 * 0 on success, -errno otherwise
1815 int ata_dev_configure(struct ata_device *dev)
1817 struct ata_port *ap = dev->ap;
1818 struct ata_eh_context *ehc = &ap->eh_context;
1819 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1820 const u16 *id = dev->id;
1821 unsigned int xfer_mask;
1822 char revbuf[7]; /* XYZ-99\0 */
1823 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1824 char modelbuf[ATA_ID_PROD_LEN+1];
1827 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1828 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
1833 if (ata_msg_probe(ap))
1834 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1836 /* let ACPI work its magic */
1837 rc = ata_acpi_on_devcfg(dev);
1841 /* print device capabilities */
1842 if (ata_msg_probe(ap))
1843 ata_dev_printk(dev, KERN_DEBUG,
1844 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1845 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1847 id[49], id[82], id[83], id[84],
1848 id[85], id[86], id[87], id[88]);
1850 /* initialize to-be-configured parameters */
1851 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1852 dev->max_sectors = 0;
1860 * common ATA, ATAPI feature tests
1863 /* find max transfer mode; for printk only */
1864 xfer_mask = ata_id_xfermask(id);
1866 if (ata_msg_probe(ap))
1869 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1870 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1873 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1876 /* ATA-specific feature tests */
1877 if (dev->class == ATA_DEV_ATA) {
1878 if (ata_id_is_cfa(id)) {
1879 if (id[162] & 1) /* CPRM may make this media unusable */
1880 ata_dev_printk(dev, KERN_WARNING,
1881 "supports DRM functions and may "
1882 "not be fully accessable.\n");
1883 snprintf(revbuf, 7, "CFA");
1886 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1888 dev->n_sectors = ata_id_n_sectors(id);
1890 if (dev->id[59] & 0x100)
1891 dev->multi_count = dev->id[59] & 0xff;
1893 if (ata_id_has_lba(id)) {
1894 const char *lba_desc;
1898 dev->flags |= ATA_DFLAG_LBA;
1899 if (ata_id_has_lba48(id)) {
1900 dev->flags |= ATA_DFLAG_LBA48;
1903 if (dev->n_sectors >= (1UL << 28) &&
1904 ata_id_has_flush_ext(id))
1905 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1908 if (ata_id_hpa_enabled(dev->id))
1909 dev->n_sectors = ata_hpa_resize(dev);
1912 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1914 /* print device info to dmesg */
1915 if (ata_msg_drv(ap) && print_info) {
1916 ata_dev_printk(dev, KERN_INFO,
1917 "%s: %s, %s, max %s\n",
1918 revbuf, modelbuf, fwrevbuf,
1919 ata_mode_string(xfer_mask));
1920 ata_dev_printk(dev, KERN_INFO,
1921 "%Lu sectors, multi %u: %s %s\n",
1922 (unsigned long long)dev->n_sectors,
1923 dev->multi_count, lba_desc, ncq_desc);
1928 /* Default translation */
1929 dev->cylinders = id[1];
1931 dev->sectors = id[6];
1933 if (ata_id_current_chs_valid(id)) {
1934 /* Current CHS translation is valid. */
1935 dev->cylinders = id[54];
1936 dev->heads = id[55];
1937 dev->sectors = id[56];
1940 /* print device info to dmesg */
1941 if (ata_msg_drv(ap) && print_info) {
1942 ata_dev_printk(dev, KERN_INFO,
1943 "%s: %s, %s, max %s\n",
1944 revbuf, modelbuf, fwrevbuf,
1945 ata_mode_string(xfer_mask));
1946 ata_dev_printk(dev, KERN_INFO,
1947 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
1948 (unsigned long long)dev->n_sectors,
1949 dev->multi_count, dev->cylinders,
1950 dev->heads, dev->sectors);
1957 /* ATAPI-specific feature tests */
1958 else if (dev->class == ATA_DEV_ATAPI) {
1959 char *cdb_intr_string = "";
1961 rc = atapi_cdb_len(id);
1962 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1963 if (ata_msg_warn(ap))
1964 ata_dev_printk(dev, KERN_WARNING,
1965 "unsupported CDB len\n");
1969 dev->cdb_len = (unsigned int) rc;
1971 if (ata_id_cdb_intr(dev->id)) {
1972 dev->flags |= ATA_DFLAG_CDB_INTR;
1973 cdb_intr_string = ", CDB intr";
1976 /* print device info to dmesg */
1977 if (ata_msg_drv(ap) && print_info)
1978 ata_dev_printk(dev, KERN_INFO,
1979 "ATAPI: %s, %s, max %s%s\n",
1981 ata_mode_string(xfer_mask),
1985 /* determine max_sectors */
1986 dev->max_sectors = ATA_MAX_SECTORS;
1987 if (dev->flags & ATA_DFLAG_LBA48)
1988 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1990 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1991 /* Let the user know. We don't want to disallow opens for
1992 rescue purposes, or in case the vendor is just a blithering
1995 ata_dev_printk(dev, KERN_WARNING,
1996 "Drive reports diagnostics failure. This may indicate a drive\n");
1997 ata_dev_printk(dev, KERN_WARNING,
1998 "fault or invalid emulation. Contact drive vendor for information.\n");
2002 /* limit bridge transfers to udma5, 200 sectors */
2003 if (ata_dev_knobble(dev)) {
2004 if (ata_msg_drv(ap) && print_info)
2005 ata_dev_printk(dev, KERN_INFO,
2006 "applying bridge limits\n");
2007 dev->udma_mask &= ATA_UDMA5;
2008 dev->max_sectors = ATA_MAX_SECTORS;
2011 if (ata_device_blacklisted(dev) & ATA_HORKAGE_MAX_SEC_128)
2012 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2015 if (ap->ops->dev_config)
2016 ap->ops->dev_config(dev);
2018 if (ata_msg_probe(ap))
2019 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
2020 __FUNCTION__, ata_chk_status(ap));
2024 if (ata_msg_probe(ap))
2025 ata_dev_printk(dev, KERN_DEBUG,
2026 "%s: EXIT, err\n", __FUNCTION__);
2031 * ata_cable_40wire - return 40 wire cable type
2034 * Helper method for drivers which want to hardwire 40 wire cable
2038 int ata_cable_40wire(struct ata_port *ap)
2040 return ATA_CBL_PATA40;
2044 * ata_cable_80wire - return 80 wire cable type
2047 * Helper method for drivers which want to hardwire 80 wire cable
2051 int ata_cable_80wire(struct ata_port *ap)
2053 return ATA_CBL_PATA80;
2057 * ata_cable_unknown - return unknown PATA cable.
2060 * Helper method for drivers which have no PATA cable detection.
2063 int ata_cable_unknown(struct ata_port *ap)
2065 return ATA_CBL_PATA_UNK;
2069 * ata_cable_sata - return SATA cable type
2072 * Helper method for drivers which have SATA cables
2075 int ata_cable_sata(struct ata_port *ap)
2077 return ATA_CBL_SATA;
2081 * ata_bus_probe - Reset and probe ATA bus
2084 * Master ATA bus probing function. Initiates a hardware-dependent
2085 * bus reset, then attempts to identify any devices found on
2089 * PCI/etc. bus probe sem.
2092 * Zero on success, negative errno otherwise.
2095 int ata_bus_probe(struct ata_port *ap)
2097 unsigned int classes[ATA_MAX_DEVICES];
2098 int tries[ATA_MAX_DEVICES];
2100 struct ata_device *dev;
2104 for (i = 0; i < ATA_MAX_DEVICES; i++)
2105 tries[i] = ATA_PROBE_MAX_TRIES;
2108 /* reset and determine device classes */
2109 ap->ops->phy_reset(ap);
2111 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2112 dev = &ap->device[i];
2114 if (!(ap->flags & ATA_FLAG_DISABLED) &&
2115 dev->class != ATA_DEV_UNKNOWN)
2116 classes[dev->devno] = dev->class;
2118 classes[dev->devno] = ATA_DEV_NONE;
2120 dev->class = ATA_DEV_UNKNOWN;
2125 /* after the reset the device state is PIO 0 and the controller
2126 state is undefined. Record the mode */
2128 for (i = 0; i < ATA_MAX_DEVICES; i++)
2129 ap->device[i].pio_mode = XFER_PIO_0;
2131 /* read IDENTIFY page and configure devices. We have to do the identify
2132 specific sequence bass-ackwards so that PDIAG- is released by
2135 for (i = ATA_MAX_DEVICES - 1; i >= 0; i--) {
2136 dev = &ap->device[i];
2139 dev->class = classes[i];
2141 if (!ata_dev_enabled(dev))
2144 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2150 /* Now ask for the cable type as PDIAG- should have been released */
2151 if (ap->ops->cable_detect)
2152 ap->cbl = ap->ops->cable_detect(ap);
2154 /* After the identify sequence we can now set up the devices. We do
2155 this in the normal order so that the user doesn't get confused */
2157 for(i = 0; i < ATA_MAX_DEVICES; i++) {
2158 dev = &ap->device[i];
2159 if (!ata_dev_enabled(dev))
2162 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
2163 rc = ata_dev_configure(dev);
2164 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
2169 /* configure transfer mode */
2170 rc = ata_set_mode(ap, &dev);
2174 for (i = 0; i < ATA_MAX_DEVICES; i++)
2175 if (ata_dev_enabled(&ap->device[i]))
2178 /* no device present, disable port */
2179 ata_port_disable(ap);
2180 ap->ops->port_disable(ap);
2184 tries[dev->devno]--;
2188 /* eeek, something went very wrong, give up */
2189 tries[dev->devno] = 0;
2193 /* give it just one more chance */
2194 tries[dev->devno] = min(tries[dev->devno], 1);
2196 if (tries[dev->devno] == 1) {
2197 /* This is the last chance, better to slow
2198 * down than lose it.
2200 sata_down_spd_limit(ap);
2201 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2205 if (!tries[dev->devno])
2206 ata_dev_disable(dev);
2212 * ata_port_probe - Mark port as enabled
2213 * @ap: Port for which we indicate enablement
2215 * Modify @ap data structure such that the system
2216 * thinks that the entire port is enabled.
2218 * LOCKING: host lock, or some other form of
2222 void ata_port_probe(struct ata_port *ap)
2224 ap->flags &= ~ATA_FLAG_DISABLED;
2228 * sata_print_link_status - Print SATA link status
2229 * @ap: SATA port to printk link status about
2231 * This function prints link speed and status of a SATA link.
2236 void sata_print_link_status(struct ata_port *ap)
2238 u32 sstatus, scontrol, tmp;
2240 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
2242 sata_scr_read(ap, SCR_CONTROL, &scontrol);
2244 if (ata_port_online(ap)) {
2245 tmp = (sstatus >> 4) & 0xf;
2246 ata_port_printk(ap, KERN_INFO,
2247 "SATA link up %s (SStatus %X SControl %X)\n",
2248 sata_spd_string(tmp), sstatus, scontrol);
2250 ata_port_printk(ap, KERN_INFO,
2251 "SATA link down (SStatus %X SControl %X)\n",
2257 * __sata_phy_reset - Wake/reset a low-level SATA PHY
2258 * @ap: SATA port associated with target SATA PHY.
2260 * This function issues commands to standard SATA Sxxx
2261 * PHY registers, to wake up the phy (and device), and
2262 * clear any reset condition.
2265 * PCI/etc. bus probe sem.
2268 void __sata_phy_reset(struct ata_port *ap)
2271 unsigned long timeout = jiffies + (HZ * 5);
2273 if (ap->flags & ATA_FLAG_SATA_RESET) {
2274 /* issue phy wake/reset */
2275 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
2276 /* Couldn't find anything in SATA I/II specs, but
2277 * AHCI-1.1 10.4.2 says at least 1 ms. */
2280 /* phy wake/clear reset */
2281 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
2283 /* wait for phy to become ready, if necessary */
2286 sata_scr_read(ap, SCR_STATUS, &sstatus);
2287 if ((sstatus & 0xf) != 1)
2289 } while (time_before(jiffies, timeout));
2291 /* print link status */
2292 sata_print_link_status(ap);
2294 /* TODO: phy layer with polling, timeouts, etc. */
2295 if (!ata_port_offline(ap))
2298 ata_port_disable(ap);
2300 if (ap->flags & ATA_FLAG_DISABLED)
2303 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2304 ata_port_disable(ap);
2308 ap->cbl = ATA_CBL_SATA;
2312 * sata_phy_reset - Reset SATA bus.
2313 * @ap: SATA port associated with target SATA PHY.
2315 * This function resets the SATA bus, and then probes
2316 * the bus for devices.
2319 * PCI/etc. bus probe sem.
2322 void sata_phy_reset(struct ata_port *ap)
2324 __sata_phy_reset(ap);
2325 if (ap->flags & ATA_FLAG_DISABLED)
2331 * ata_dev_pair - return other device on cable
2334 * Obtain the other device on the same cable, or if none is
2335 * present NULL is returned
2338 struct ata_device *ata_dev_pair(struct ata_device *adev)
2340 struct ata_port *ap = adev->ap;
2341 struct ata_device *pair = &ap->device[1 - adev->devno];
2342 if (!ata_dev_enabled(pair))
2348 * ata_port_disable - Disable port.
2349 * @ap: Port to be disabled.
2351 * Modify @ap data structure such that the system
2352 * thinks that the entire port is disabled, and should
2353 * never attempt to probe or communicate with devices
2356 * LOCKING: host lock, or some other form of
2360 void ata_port_disable(struct ata_port *ap)
2362 ap->device[0].class = ATA_DEV_NONE;
2363 ap->device[1].class = ATA_DEV_NONE;
2364 ap->flags |= ATA_FLAG_DISABLED;
2368 * sata_down_spd_limit - adjust SATA spd limit downward
2369 * @ap: Port to adjust SATA spd limit for
2371 * Adjust SATA spd limit of @ap downward. Note that this
2372 * function only adjusts the limit. The change must be applied
2373 * using sata_set_spd().
2376 * Inherited from caller.
2379 * 0 on success, negative errno on failure
2381 int sata_down_spd_limit(struct ata_port *ap)
2383 u32 sstatus, spd, mask;
2386 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2390 mask = ap->sata_spd_limit;
2393 highbit = fls(mask) - 1;
2394 mask &= ~(1 << highbit);
2396 spd = (sstatus >> 4) & 0xf;
2400 mask &= (1 << spd) - 1;
2404 ap->sata_spd_limit = mask;
2406 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2407 sata_spd_string(fls(mask)));
2412 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2416 if (ap->sata_spd_limit == UINT_MAX)
2419 limit = fls(ap->sata_spd_limit);
2421 spd = (*scontrol >> 4) & 0xf;
2422 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2424 return spd != limit;
2428 * sata_set_spd_needed - is SATA spd configuration needed
2429 * @ap: Port in question
2431 * Test whether the spd limit in SControl matches
2432 * @ap->sata_spd_limit. This function is used to determine
2433 * whether hardreset is necessary to apply SATA spd
2437 * Inherited from caller.
2440 * 1 if SATA spd configuration is needed, 0 otherwise.
2442 int sata_set_spd_needed(struct ata_port *ap)
2446 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2449 return __sata_set_spd_needed(ap, &scontrol);
2453 * sata_set_spd - set SATA spd according to spd limit
2454 * @ap: Port to set SATA spd for
2456 * Set SATA spd of @ap according to sata_spd_limit.
2459 * Inherited from caller.
2462 * 0 if spd doesn't need to be changed, 1 if spd has been
2463 * changed. Negative errno if SCR registers are inaccessible.
2465 int sata_set_spd(struct ata_port *ap)
2470 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2473 if (!__sata_set_spd_needed(ap, &scontrol))
2476 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2483 * This mode timing computation functionality is ported over from
2484 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2487 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2488 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2489 * for UDMA6, which is currently supported only by Maxtor drives.
2491 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2494 static const struct ata_timing ata_timing[] = {
2496 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2497 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2498 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2499 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2501 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2502 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2503 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2504 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2505 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2507 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2509 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2510 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2511 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2513 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2514 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2515 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2517 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2518 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2519 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2520 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2522 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2523 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2524 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2526 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2531 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2532 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2534 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2536 q->setup = EZ(t->setup * 1000, T);
2537 q->act8b = EZ(t->act8b * 1000, T);
2538 q->rec8b = EZ(t->rec8b * 1000, T);
2539 q->cyc8b = EZ(t->cyc8b * 1000, T);
2540 q->active = EZ(t->active * 1000, T);
2541 q->recover = EZ(t->recover * 1000, T);
2542 q->cycle = EZ(t->cycle * 1000, T);
2543 q->udma = EZ(t->udma * 1000, UT);
2546 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2547 struct ata_timing *m, unsigned int what)
2549 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2550 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2551 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2552 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2553 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2554 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2555 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2556 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2559 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2561 const struct ata_timing *t;
2563 for (t = ata_timing; t->mode != speed; t++)
2564 if (t->mode == 0xFF)
2569 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2570 struct ata_timing *t, int T, int UT)
2572 const struct ata_timing *s;
2573 struct ata_timing p;
2579 if (!(s = ata_timing_find_mode(speed)))
2582 memcpy(t, s, sizeof(*s));
2585 * If the drive is an EIDE drive, it can tell us it needs extended
2586 * PIO/MW_DMA cycle timing.
2589 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2590 memset(&p, 0, sizeof(p));
2591 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2592 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2593 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2594 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2595 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2597 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2601 * Convert the timing to bus clock counts.
2604 ata_timing_quantize(t, t, T, UT);
2607 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2608 * S.M.A.R.T * and some other commands. We have to ensure that the
2609 * DMA cycle timing is slower/equal than the fastest PIO timing.
2612 if (speed > XFER_PIO_6) {
2613 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2614 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2618 * Lengthen active & recovery time so that cycle time is correct.
2621 if (t->act8b + t->rec8b < t->cyc8b) {
2622 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2623 t->rec8b = t->cyc8b - t->act8b;
2626 if (t->active + t->recover < t->cycle) {
2627 t->active += (t->cycle - (t->active + t->recover)) / 2;
2628 t->recover = t->cycle - t->active;
2631 /* In a few cases quantisation may produce enough errors to
2632 leave t->cycle too low for the sum of active and recovery
2633 if so we must correct this */
2634 if (t->active + t->recover > t->cycle)
2635 t->cycle = t->active + t->recover;
2641 * ata_down_xfermask_limit - adjust dev xfer masks downward
2642 * @dev: Device to adjust xfer masks
2643 * @sel: ATA_DNXFER_* selector
2645 * Adjust xfer masks of @dev downward. Note that this function
2646 * does not apply the change. Invoking ata_set_mode() afterwards
2647 * will apply the limit.
2650 * Inherited from caller.
2653 * 0 on success, negative errno on failure
2655 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
2658 unsigned int orig_mask, xfer_mask;
2659 unsigned int pio_mask, mwdma_mask, udma_mask;
2662 quiet = !!(sel & ATA_DNXFER_QUIET);
2663 sel &= ~ATA_DNXFER_QUIET;
2665 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
2668 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
2671 case ATA_DNXFER_PIO:
2672 highbit = fls(pio_mask) - 1;
2673 pio_mask &= ~(1 << highbit);
2676 case ATA_DNXFER_DMA:
2678 highbit = fls(udma_mask) - 1;
2679 udma_mask &= ~(1 << highbit);
2682 } else if (mwdma_mask) {
2683 highbit = fls(mwdma_mask) - 1;
2684 mwdma_mask &= ~(1 << highbit);
2690 case ATA_DNXFER_40C:
2691 udma_mask &= ATA_UDMA_MASK_40C;
2694 case ATA_DNXFER_FORCE_PIO0:
2696 case ATA_DNXFER_FORCE_PIO:
2705 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
2707 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
2711 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
2712 snprintf(buf, sizeof(buf), "%s:%s",
2713 ata_mode_string(xfer_mask),
2714 ata_mode_string(xfer_mask & ATA_MASK_PIO));
2716 snprintf(buf, sizeof(buf), "%s",
2717 ata_mode_string(xfer_mask));
2719 ata_dev_printk(dev, KERN_WARNING,
2720 "limiting speed to %s\n", buf);
2723 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2729 static int ata_dev_set_mode(struct ata_device *dev)
2731 struct ata_eh_context *ehc = &dev->ap->eh_context;
2732 unsigned int err_mask;
2735 dev->flags &= ~ATA_DFLAG_PIO;
2736 if (dev->xfer_shift == ATA_SHIFT_PIO)
2737 dev->flags |= ATA_DFLAG_PIO;
2739 err_mask = ata_dev_set_xfermode(dev);
2740 /* Old CFA may refuse this command, which is just fine */
2741 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2742 err_mask &= ~AC_ERR_DEV;
2745 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2746 "(err_mask=0x%x)\n", err_mask);
2750 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2751 rc = ata_dev_revalidate(dev, 0);
2752 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2756 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2757 dev->xfer_shift, (int)dev->xfer_mode);
2759 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2760 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2765 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
2766 * @ap: port on which timings will be programmed
2767 * @r_failed_dev: out paramter for failed device
2769 * Standard implementation of the function used to tune and set
2770 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2771 * ata_dev_set_mode() fails, pointer to the failing device is
2772 * returned in @r_failed_dev.
2775 * PCI/etc. bus probe sem.
2778 * 0 on success, negative errno otherwise
2781 int ata_do_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2783 struct ata_device *dev;
2784 int i, rc = 0, used_dma = 0, found = 0;
2787 /* step 1: calculate xfer_mask */
2788 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2789 unsigned int pio_mask, dma_mask;
2791 dev = &ap->device[i];
2793 if (!ata_dev_enabled(dev))
2796 ata_dev_xfermask(dev);
2798 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2799 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2800 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2801 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2810 /* step 2: always set host PIO timings */
2811 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2812 dev = &ap->device[i];
2813 if (!ata_dev_enabled(dev))
2816 if (!dev->pio_mode) {
2817 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2822 dev->xfer_mode = dev->pio_mode;
2823 dev->xfer_shift = ATA_SHIFT_PIO;
2824 if (ap->ops->set_piomode)
2825 ap->ops->set_piomode(ap, dev);
2828 /* step 3: set host DMA timings */
2829 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2830 dev = &ap->device[i];
2832 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2835 dev->xfer_mode = dev->dma_mode;
2836 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2837 if (ap->ops->set_dmamode)
2838 ap->ops->set_dmamode(ap, dev);
2841 /* step 4: update devices' xfer mode */
2842 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2843 dev = &ap->device[i];
2845 /* don't update suspended devices' xfer mode */
2846 if (!ata_dev_enabled(dev))
2849 rc = ata_dev_set_mode(dev);
2854 /* Record simplex status. If we selected DMA then the other
2855 * host channels are not permitted to do so.
2857 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2858 ap->host->simplex_claimed = ap;
2862 *r_failed_dev = dev;
2867 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2868 * @ap: port on which timings will be programmed
2869 * @r_failed_dev: out paramter for failed device
2871 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2872 * ata_set_mode() fails, pointer to the failing device is
2873 * returned in @r_failed_dev.
2876 * PCI/etc. bus probe sem.
2879 * 0 on success, negative errno otherwise
2881 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2883 /* has private set_mode? */
2884 if (ap->ops->set_mode)
2885 return ap->ops->set_mode(ap, r_failed_dev);
2886 return ata_do_set_mode(ap, r_failed_dev);
2890 * ata_tf_to_host - issue ATA taskfile to host controller
2891 * @ap: port to which command is being issued
2892 * @tf: ATA taskfile register set
2894 * Issues ATA taskfile register set to ATA host controller,
2895 * with proper synchronization with interrupt handler and
2899 * spin_lock_irqsave(host lock)
2902 static inline void ata_tf_to_host(struct ata_port *ap,
2903 const struct ata_taskfile *tf)
2905 ap->ops->tf_load(ap, tf);
2906 ap->ops->exec_command(ap, tf);
2910 * ata_busy_sleep - sleep until BSY clears, or timeout
2911 * @ap: port containing status register to be polled
2912 * @tmout_pat: impatience timeout
2913 * @tmout: overall timeout
2915 * Sleep until ATA Status register bit BSY clears,
2916 * or a timeout occurs.
2919 * Kernel thread context (may sleep).
2922 * 0 on success, -errno otherwise.
2924 int ata_busy_sleep(struct ata_port *ap,
2925 unsigned long tmout_pat, unsigned long tmout)
2927 unsigned long timer_start, timeout;
2930 status = ata_busy_wait(ap, ATA_BUSY, 300);
2931 timer_start = jiffies;
2932 timeout = timer_start + tmout_pat;
2933 while (status != 0xff && (status & ATA_BUSY) &&
2934 time_before(jiffies, timeout)) {
2936 status = ata_busy_wait(ap, ATA_BUSY, 3);
2939 if (status != 0xff && (status & ATA_BUSY))
2940 ata_port_printk(ap, KERN_WARNING,
2941 "port is slow to respond, please be patient "
2942 "(Status 0x%x)\n", status);
2944 timeout = timer_start + tmout;
2945 while (status != 0xff && (status & ATA_BUSY) &&
2946 time_before(jiffies, timeout)) {
2948 status = ata_chk_status(ap);
2954 if (status & ATA_BUSY) {
2955 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2956 "(%lu secs, Status 0x%x)\n",
2957 tmout / HZ, status);
2965 * ata_wait_ready - sleep until BSY clears, or timeout
2966 * @ap: port containing status register to be polled
2967 * @deadline: deadline jiffies for the operation
2969 * Sleep until ATA Status register bit BSY clears, or timeout
2973 * Kernel thread context (may sleep).
2976 * 0 on success, -errno otherwise.
2978 int ata_wait_ready(struct ata_port *ap, unsigned long deadline)
2980 unsigned long start = jiffies;
2984 u8 status = ata_chk_status(ap);
2985 unsigned long now = jiffies;
2987 if (!(status & ATA_BUSY))
2989 if (!ata_port_online(ap) && status == 0xff)
2991 if (time_after(now, deadline))
2994 if (!warned && time_after(now, start + 5 * HZ) &&
2995 (deadline - now > 3 * HZ)) {
2996 ata_port_printk(ap, KERN_WARNING,
2997 "port is slow to respond, please be patient "
2998 "(Status 0x%x)\n", status);
3006 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
3007 unsigned long deadline)
3009 struct ata_ioports *ioaddr = &ap->ioaddr;
3010 unsigned int dev0 = devmask & (1 << 0);
3011 unsigned int dev1 = devmask & (1 << 1);
3014 /* if device 0 was found in ata_devchk, wait for its
3018 rc = ata_wait_ready(ap, deadline);
3026 /* if device 1 was found in ata_devchk, wait for register
3027 * access briefly, then wait for BSY to clear.
3032 ap->ops->dev_select(ap, 1);
3034 /* Wait for register access. Some ATAPI devices fail
3035 * to set nsect/lbal after reset, so don't waste too
3036 * much time on it. We're gonna wait for !BSY anyway.
3038 for (i = 0; i < 2; i++) {
3041 nsect = ioread8(ioaddr->nsect_addr);
3042 lbal = ioread8(ioaddr->lbal_addr);
3043 if ((nsect == 1) && (lbal == 1))
3045 msleep(50); /* give drive a breather */
3048 rc = ata_wait_ready(ap, deadline);
3056 /* is all this really necessary? */
3057 ap->ops->dev_select(ap, 0);
3059 ap->ops->dev_select(ap, 1);
3061 ap->ops->dev_select(ap, 0);
3066 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
3067 unsigned long deadline)
3069 struct ata_ioports *ioaddr = &ap->ioaddr;
3071 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
3073 /* software reset. causes dev0 to be selected */
3074 iowrite8(ap->ctl, ioaddr->ctl_addr);
3075 udelay(20); /* FIXME: flush */
3076 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
3077 udelay(20); /* FIXME: flush */
3078 iowrite8(ap->ctl, ioaddr->ctl_addr);
3080 /* spec mandates ">= 2ms" before checking status.
3081 * We wait 150ms, because that was the magic delay used for
3082 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
3083 * between when the ATA command register is written, and then
3084 * status is checked. Because waiting for "a while" before
3085 * checking status is fine, post SRST, we perform this magic
3086 * delay here as well.
3088 * Old drivers/ide uses the 2mS rule and then waits for ready
3092 /* Before we perform post reset processing we want to see if
3093 * the bus shows 0xFF because the odd clown forgets the D7
3094 * pulldown resistor.
3096 if (ata_check_status(ap) == 0xFF)
3099 return ata_bus_post_reset(ap, devmask, deadline);
3103 * ata_bus_reset - reset host port and associated ATA channel
3104 * @ap: port to reset
3106 * This is typically the first time we actually start issuing
3107 * commands to the ATA channel. We wait for BSY to clear, then
3108 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
3109 * result. Determine what devices, if any, are on the channel
3110 * by looking at the device 0/1 error register. Look at the signature
3111 * stored in each device's taskfile registers, to determine if
3112 * the device is ATA or ATAPI.
3115 * PCI/etc. bus probe sem.
3116 * Obtains host lock.
3119 * Sets ATA_FLAG_DISABLED if bus reset fails.
3122 void ata_bus_reset(struct ata_port *ap)
3124 struct ata_ioports *ioaddr = &ap->ioaddr;
3125 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3127 unsigned int dev0, dev1 = 0, devmask = 0;
3130 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
3132 /* determine if device 0/1 are present */
3133 if (ap->flags & ATA_FLAG_SATA_RESET)
3136 dev0 = ata_devchk(ap, 0);
3138 dev1 = ata_devchk(ap, 1);
3142 devmask |= (1 << 0);
3144 devmask |= (1 << 1);
3146 /* select device 0 again */
3147 ap->ops->dev_select(ap, 0);
3149 /* issue bus reset */
3150 if (ap->flags & ATA_FLAG_SRST) {
3151 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
3152 if (rc && rc != -ENODEV)
3157 * determine by signature whether we have ATA or ATAPI devices
3159 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
3160 if ((slave_possible) && (err != 0x81))
3161 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
3163 /* re-enable interrupts */
3164 ap->ops->irq_on(ap);
3166 /* is double-select really necessary? */
3167 if (ap->device[1].class != ATA_DEV_NONE)
3168 ap->ops->dev_select(ap, 1);
3169 if (ap->device[0].class != ATA_DEV_NONE)
3170 ap->ops->dev_select(ap, 0);
3172 /* if no devices were detected, disable this port */
3173 if ((ap->device[0].class == ATA_DEV_NONE) &&
3174 (ap->device[1].class == ATA_DEV_NONE))
3177 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
3178 /* set up device control for ATA_FLAG_SATA_RESET */
3179 iowrite8(ap->ctl, ioaddr->ctl_addr);
3186 ata_port_printk(ap, KERN_ERR, "disabling port\n");
3187 ap->ops->port_disable(ap);
3193 * sata_phy_debounce - debounce SATA phy status
3194 * @ap: ATA port to debounce SATA phy status for
3195 * @params: timing parameters { interval, duratinon, timeout } in msec
3196 * @deadline: deadline jiffies for the operation
3198 * Make sure SStatus of @ap reaches stable state, determined by
3199 * holding the same value where DET is not 1 for @duration polled
3200 * every @interval, before @timeout. Timeout constraints the
3201 * beginning of the stable state. Because DET gets stuck at 1 on
3202 * some controllers after hot unplugging, this functions waits
3203 * until timeout then returns 0 if DET is stable at 1.
3205 * @timeout is further limited by @deadline. The sooner of the
3209 * Kernel thread context (may sleep)
3212 * 0 on success, -errno on failure.
3214 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params,
3215 unsigned long deadline)
3217 unsigned long interval_msec = params[0];
3218 unsigned long duration = msecs_to_jiffies(params[1]);
3219 unsigned long last_jiffies, t;
3223 t = jiffies + msecs_to_jiffies(params[2]);
3224 if (time_before(t, deadline))
3227 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
3232 last_jiffies = jiffies;
3235 msleep(interval_msec);
3236 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
3242 if (cur == 1 && time_before(jiffies, deadline))
3244 if (time_after(jiffies, last_jiffies + duration))
3249 /* unstable, start over */
3251 last_jiffies = jiffies;
3253 /* check deadline */
3254 if (time_after(jiffies, deadline))
3260 * sata_phy_resume - resume SATA phy
3261 * @ap: ATA port to resume SATA phy for
3262 * @params: timing parameters { interval, duratinon, timeout } in msec
3263 * @deadline: deadline jiffies for the operation
3265 * Resume SATA phy of @ap and debounce it.
3268 * Kernel thread context (may sleep)
3271 * 0 on success, -errno on failure.
3273 int sata_phy_resume(struct ata_port *ap, const unsigned long *params,
3274 unsigned long deadline)
3279 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3282 scontrol = (scontrol & 0x0f0) | 0x300;
3284 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
3287 /* Some PHYs react badly if SStatus is pounded immediately
3288 * after resuming. Delay 200ms before debouncing.
3292 return sata_phy_debounce(ap, params, deadline);
3296 * ata_std_prereset - prepare for reset
3297 * @ap: ATA port to be reset
3298 * @deadline: deadline jiffies for the operation
3300 * @ap is about to be reset. Initialize it. Failure from
3301 * prereset makes libata abort whole reset sequence and give up
3302 * that port, so prereset should be best-effort. It does its
3303 * best to prepare for reset sequence but if things go wrong, it
3304 * should just whine, not fail.
3307 * Kernel thread context (may sleep)
3310 * 0 on success, -errno otherwise.
3312 int ata_std_prereset(struct ata_port *ap, unsigned long deadline)
3314 struct ata_eh_context *ehc = &ap->eh_context;
3315 const unsigned long *timing = sata_ehc_deb_timing(ehc);
3318 /* handle link resume */
3319 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
3320 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
3321 ehc->i.action |= ATA_EH_HARDRESET;
3323 /* if we're about to do hardreset, nothing more to do */
3324 if (ehc->i.action & ATA_EH_HARDRESET)
3327 /* if SATA, resume phy */
3328 if (ap->flags & ATA_FLAG_SATA) {
3329 rc = sata_phy_resume(ap, timing, deadline);
3330 /* whine about phy resume failure but proceed */
3331 if (rc && rc != -EOPNOTSUPP)
3332 ata_port_printk(ap, KERN_WARNING, "failed to resume "
3333 "link for reset (errno=%d)\n", rc);
3336 /* Wait for !BSY if the controller can wait for the first D2H
3337 * Reg FIS and we don't know that no device is attached.
3339 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) {
3340 rc = ata_wait_ready(ap, deadline);
3341 if (rc && rc != -ENODEV) {
3342 ata_port_printk(ap, KERN_WARNING, "device not ready "
3343 "(errno=%d), forcing hardreset\n", rc);
3344 ehc->i.action |= ATA_EH_HARDRESET;
3352 * ata_std_softreset - reset host port via ATA SRST
3353 * @ap: port to reset
3354 * @classes: resulting classes of attached devices
3355 * @deadline: deadline jiffies for the operation
3357 * Reset host port using ATA SRST.
3360 * Kernel thread context (may sleep)
3363 * 0 on success, -errno otherwise.
3365 int ata_std_softreset(struct ata_port *ap, unsigned int *classes,
3366 unsigned long deadline)
3368 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3369 unsigned int devmask = 0;
3375 if (ata_port_offline(ap)) {
3376 classes[0] = ATA_DEV_NONE;
3380 /* determine if device 0/1 are present */
3381 if (ata_devchk(ap, 0))
3382 devmask |= (1 << 0);
3383 if (slave_possible && ata_devchk(ap, 1))
3384 devmask |= (1 << 1);
3386 /* select device 0 again */
3387 ap->ops->dev_select(ap, 0);
3389 /* issue bus reset */
3390 DPRINTK("about to softreset, devmask=%x\n", devmask);
3391 rc = ata_bus_softreset(ap, devmask, deadline);
3392 /* if link is occupied, -ENODEV too is an error */
3393 if (rc && (rc != -ENODEV || sata_scr_valid(ap))) {
3394 ata_port_printk(ap, KERN_ERR, "SRST failed (errno=%d)\n", rc);
3398 /* determine by signature whether we have ATA or ATAPI devices */
3399 classes[0] = ata_dev_try_classify(ap, 0, &err);
3400 if (slave_possible && err != 0x81)
3401 classes[1] = ata_dev_try_classify(ap, 1, &err);
3404 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3409 * sata_port_hardreset - reset port via SATA phy reset
3410 * @ap: port to reset
3411 * @timing: timing parameters { interval, duratinon, timeout } in msec
3412 * @deadline: deadline jiffies for the operation
3414 * SATA phy-reset host port using DET bits of SControl register.
3417 * Kernel thread context (may sleep)
3420 * 0 on success, -errno otherwise.
3422 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing,
3423 unsigned long deadline)
3430 if (sata_set_spd_needed(ap)) {
3431 /* SATA spec says nothing about how to reconfigure
3432 * spd. To be on the safe side, turn off phy during
3433 * reconfiguration. This works for at least ICH7 AHCI
3436 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3439 scontrol = (scontrol & 0x0f0) | 0x304;
3441 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
3447 /* issue phy wake/reset */
3448 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3451 scontrol = (scontrol & 0x0f0) | 0x301;
3453 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
3456 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3457 * 10.4.2 says at least 1 ms.
3461 /* bring phy back */
3462 rc = sata_phy_resume(ap, timing, deadline);
3464 DPRINTK("EXIT, rc=%d\n", rc);
3469 * sata_std_hardreset - reset host port via SATA phy reset
3470 * @ap: port to reset
3471 * @class: resulting class of attached device
3472 * @deadline: deadline jiffies for the operation
3474 * SATA phy-reset host port using DET bits of SControl register,
3475 * wait for !BSY and classify the attached device.
3478 * Kernel thread context (may sleep)
3481 * 0 on success, -errno otherwise.
3483 int sata_std_hardreset(struct ata_port *ap, unsigned int *class,
3484 unsigned long deadline)
3486 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3492 rc = sata_port_hardreset(ap, timing, deadline);
3494 ata_port_printk(ap, KERN_ERR,
3495 "COMRESET failed (errno=%d)\n", rc);
3499 /* TODO: phy layer with polling, timeouts, etc. */
3500 if (ata_port_offline(ap)) {
3501 *class = ATA_DEV_NONE;
3502 DPRINTK("EXIT, link offline\n");
3506 /* wait a while before checking status, see SRST for more info */
3509 rc = ata_wait_ready(ap, deadline);
3510 /* link occupied, -ENODEV too is an error */
3512 ata_port_printk(ap, KERN_ERR,
3513 "COMRESET failed (errno=%d)\n", rc);
3517 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3519 *class = ata_dev_try_classify(ap, 0, NULL);
3521 DPRINTK("EXIT, class=%u\n", *class);
3526 * ata_std_postreset - standard postreset callback
3527 * @ap: the target ata_port
3528 * @classes: classes of attached devices
3530 * This function is invoked after a successful reset. Note that
3531 * the device might have been reset more than once using
3532 * different reset methods before postreset is invoked.
3535 * Kernel thread context (may sleep)
3537 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3543 /* print link status */
3544 sata_print_link_status(ap);
3547 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3548 sata_scr_write(ap, SCR_ERROR, serror);
3550 /* re-enable interrupts */
3551 if (!ap->ops->error_handler)
3552 ap->ops->irq_on(ap);
3554 /* is double-select really necessary? */
3555 if (classes[0] != ATA_DEV_NONE)
3556 ap->ops->dev_select(ap, 1);
3557 if (classes[1] != ATA_DEV_NONE)
3558 ap->ops->dev_select(ap, 0);
3560 /* bail out if no device is present */
3561 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3562 DPRINTK("EXIT, no device\n");
3566 /* set up device control */
3567 if (ap->ioaddr.ctl_addr)
3568 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3574 * ata_dev_same_device - Determine whether new ID matches configured device
3575 * @dev: device to compare against
3576 * @new_class: class of the new device
3577 * @new_id: IDENTIFY page of the new device
3579 * Compare @new_class and @new_id against @dev and determine
3580 * whether @dev is the device indicated by @new_class and
3587 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3589 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3592 const u16 *old_id = dev->id;
3593 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3594 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3596 if (dev->class != new_class) {
3597 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3598 dev->class, new_class);
3602 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3603 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3604 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3605 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3607 if (strcmp(model[0], model[1])) {
3608 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3609 "'%s' != '%s'\n", model[0], model[1]);
3613 if (strcmp(serial[0], serial[1])) {
3614 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3615 "'%s' != '%s'\n", serial[0], serial[1]);
3623 * ata_dev_reread_id - Re-read IDENTIFY data
3624 * @dev: target ATA device
3625 * @readid_flags: read ID flags
3627 * Re-read IDENTIFY page and make sure @dev is still attached to
3631 * Kernel thread context (may sleep)
3634 * 0 on success, negative errno otherwise
3636 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
3638 unsigned int class = dev->class;
3639 u16 *id = (void *)dev->ap->sector_buf;
3643 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3647 /* is the device still there? */
3648 if (!ata_dev_same_device(dev, class, id))
3651 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3656 * ata_dev_revalidate - Revalidate ATA device
3657 * @dev: device to revalidate
3658 * @readid_flags: read ID flags
3660 * Re-read IDENTIFY page, make sure @dev is still attached to the
3661 * port and reconfigure it according to the new IDENTIFY page.
3664 * Kernel thread context (may sleep)
3667 * 0 on success, negative errno otherwise
3669 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3671 u64 n_sectors = dev->n_sectors;
3674 if (!ata_dev_enabled(dev))
3678 rc = ata_dev_reread_id(dev, readid_flags);
3682 /* configure device according to the new ID */
3683 rc = ata_dev_configure(dev);
3687 /* verify n_sectors hasn't changed */
3688 if (dev->class == ATA_DEV_ATA && dev->n_sectors != n_sectors) {
3689 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3691 (unsigned long long)n_sectors,
3692 (unsigned long long)dev->n_sectors);
3700 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3704 struct ata_blacklist_entry {
3705 const char *model_num;
3706 const char *model_rev;
3707 unsigned long horkage;
3710 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3711 /* Devices with DMA related problems under Linux */
3712 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3713 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3714 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3715 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3716 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3717 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3718 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3719 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3720 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3721 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3722 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3723 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3724 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3725 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3726 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3727 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3728 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3729 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3730 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3731 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3732 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3733 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3734 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3735 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3736 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3737 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3738 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3739 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3740 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3741 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
3742 { "IOMEGA ZIP 250 ATAPI", NULL, ATA_HORKAGE_NODMA }, /* temporary fix */
3743 { "IOMEGA ZIP 250 ATAPI Floppy",
3744 NULL, ATA_HORKAGE_NODMA },
3746 /* Weird ATAPI devices */
3747 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
3749 /* Devices we expect to fail diagnostics */
3751 /* Devices where NCQ should be avoided */
3753 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3754 /* http://thread.gmane.org/gmane.linux.ide/14907 */
3755 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
3757 { "Maxtor 6L250S0", "BANC1G10", ATA_HORKAGE_NONCQ },
3758 { "Maxtor 6B200M0", "BANC1B10", ATA_HORKAGE_NONCQ },
3759 /* NCQ hard hangs device under heavier load, needs hard power cycle */
3760 { "Maxtor 6B250S0", "BANC1B70", ATA_HORKAGE_NONCQ },
3761 /* Blacklist entries taken from Silicon Image 3124/3132
3762 Windows driver .inf file - also several Linux problem reports */
3763 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
3764 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
3765 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
3766 /* Drives which do spurious command completion */
3767 { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, },
3768 { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, },
3769 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
3770 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
3772 /* Devices with NCQ limits */
3778 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3780 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3781 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3782 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3784 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3785 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3787 while (ad->model_num) {
3788 if (!strcmp(ad->model_num, model_num)) {
3789 if (ad->model_rev == NULL)
3791 if (!strcmp(ad->model_rev, model_rev))
3799 static int ata_dma_blacklisted(const struct ata_device *dev)
3801 /* We don't support polling DMA.
3802 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3803 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3805 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3806 (dev->flags & ATA_DFLAG_CDB_INTR))
3808 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3812 * ata_dev_xfermask - Compute supported xfermask of the given device
3813 * @dev: Device to compute xfermask for
3815 * Compute supported xfermask of @dev and store it in
3816 * dev->*_mask. This function is responsible for applying all
3817 * known limits including host controller limits, device
3823 static void ata_dev_xfermask(struct ata_device *dev)
3825 struct ata_port *ap = dev->ap;
3826 struct ata_host *host = ap->host;
3827 unsigned long xfer_mask;
3829 /* controller modes available */
3830 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3831 ap->mwdma_mask, ap->udma_mask);
3833 /* drive modes available */
3834 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3835 dev->mwdma_mask, dev->udma_mask);
3836 xfer_mask &= ata_id_xfermask(dev->id);
3839 * CFA Advanced TrueIDE timings are not allowed on a shared
3842 if (ata_dev_pair(dev)) {
3843 /* No PIO5 or PIO6 */
3844 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3845 /* No MWDMA3 or MWDMA 4 */
3846 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3849 if (ata_dma_blacklisted(dev)) {
3850 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3851 ata_dev_printk(dev, KERN_WARNING,
3852 "device is on DMA blacklist, disabling DMA\n");
3855 if ((host->flags & ATA_HOST_SIMPLEX) &&
3856 host->simplex_claimed && host->simplex_claimed != ap) {
3857 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3858 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3859 "other device, disabling DMA\n");
3862 if (ap->flags & ATA_FLAG_NO_IORDY)
3863 xfer_mask &= ata_pio_mask_no_iordy(dev);
3865 if (ap->ops->mode_filter)
3866 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
3868 /* Apply cable rule here. Don't apply it early because when
3869 * we handle hot plug the cable type can itself change.
3870 * Check this last so that we know if the transfer rate was
3871 * solely limited by the cable.
3872 * Unknown or 80 wire cables reported host side are checked
3873 * drive side as well. Cases where we know a 40wire cable
3874 * is used safely for 80 are not checked here.
3876 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
3877 /* UDMA/44 or higher would be available */
3878 if((ap->cbl == ATA_CBL_PATA40) ||
3879 (ata_drive_40wire(dev->id) &&
3880 (ap->cbl == ATA_CBL_PATA_UNK ||
3881 ap->cbl == ATA_CBL_PATA80))) {
3882 ata_dev_printk(dev, KERN_WARNING,
3883 "limited to UDMA/33 due to 40-wire cable\n");
3884 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3887 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3888 &dev->mwdma_mask, &dev->udma_mask);
3892 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3893 * @dev: Device to which command will be sent
3895 * Issue SET FEATURES - XFER MODE command to device @dev
3899 * PCI/etc. bus probe sem.
3902 * 0 on success, AC_ERR_* mask otherwise.
3905 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3907 struct ata_taskfile tf;
3908 unsigned int err_mask;
3910 /* set up set-features taskfile */
3911 DPRINTK("set features - xfer mode\n");
3913 /* Some controllers and ATAPI devices show flaky interrupt
3914 * behavior after setting xfer mode. Use polling instead.
3916 ata_tf_init(dev, &tf);
3917 tf.command = ATA_CMD_SET_FEATURES;
3918 tf.feature = SETFEATURES_XFER;
3919 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
3920 tf.protocol = ATA_PROT_NODATA;
3921 tf.nsect = dev->xfer_mode;
3923 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3925 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3930 * ata_dev_init_params - Issue INIT DEV PARAMS command
3931 * @dev: Device to which command will be sent
3932 * @heads: Number of heads (taskfile parameter)
3933 * @sectors: Number of sectors (taskfile parameter)
3936 * Kernel thread context (may sleep)
3939 * 0 on success, AC_ERR_* mask otherwise.
3941 static unsigned int ata_dev_init_params(struct ata_device *dev,
3942 u16 heads, u16 sectors)
3944 struct ata_taskfile tf;
3945 unsigned int err_mask;
3947 /* Number of sectors per track 1-255. Number of heads 1-16 */
3948 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3949 return AC_ERR_INVALID;
3951 /* set up init dev params taskfile */
3952 DPRINTK("init dev params \n");
3954 ata_tf_init(dev, &tf);
3955 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3956 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3957 tf.protocol = ATA_PROT_NODATA;
3959 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3961 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3963 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3968 * ata_sg_clean - Unmap DMA memory associated with command
3969 * @qc: Command containing DMA memory to be released
3971 * Unmap all mapped DMA memory associated with this command.
3974 * spin_lock_irqsave(host lock)
3976 void ata_sg_clean(struct ata_queued_cmd *qc)
3978 struct ata_port *ap = qc->ap;
3979 struct scatterlist *sg = qc->__sg;
3980 int dir = qc->dma_dir;
3981 void *pad_buf = NULL;
3983 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3984 WARN_ON(sg == NULL);
3986 if (qc->flags & ATA_QCFLAG_SINGLE)
3987 WARN_ON(qc->n_elem > 1);
3989 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3991 /* if we padded the buffer out to 32-bit bound, and data
3992 * xfer direction is from-device, we must copy from the
3993 * pad buffer back into the supplied buffer
3995 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3996 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3998 if (qc->flags & ATA_QCFLAG_SG) {
4000 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
4001 /* restore last sg */
4002 sg[qc->orig_n_elem - 1].length += qc->pad_len;
4004 struct scatterlist *psg = &qc->pad_sgent;
4005 void *addr = kmap_atomic(psg->page, KM_IRQ0);
4006 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
4007 kunmap_atomic(addr, KM_IRQ0);
4011 dma_unmap_single(ap->dev,
4012 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
4015 sg->length += qc->pad_len;
4017 memcpy(qc->buf_virt + sg->length - qc->pad_len,
4018 pad_buf, qc->pad_len);
4021 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4026 * ata_fill_sg - Fill PCI IDE PRD table
4027 * @qc: Metadata associated with taskfile to be transferred
4029 * Fill PCI IDE PRD (scatter-gather) table with segments
4030 * associated with the current disk command.
4033 * spin_lock_irqsave(host lock)
4036 static void ata_fill_sg(struct ata_queued_cmd *qc)
4038 struct ata_port *ap = qc->ap;
4039 struct scatterlist *sg;
4042 WARN_ON(qc->__sg == NULL);
4043 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4046 ata_for_each_sg(sg, qc) {
4050 /* determine if physical DMA addr spans 64K boundary.
4051 * Note h/w doesn't support 64-bit, so we unconditionally
4052 * truncate dma_addr_t to u32.
4054 addr = (u32) sg_dma_address(sg);
4055 sg_len = sg_dma_len(sg);
4058 offset = addr & 0xffff;
4060 if ((offset + sg_len) > 0x10000)
4061 len = 0x10000 - offset;
4063 ap->prd[idx].addr = cpu_to_le32(addr);
4064 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
4065 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4074 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4078 * ata_fill_sg_dumb - Fill PCI IDE PRD table
4079 * @qc: Metadata associated with taskfile to be transferred
4081 * Fill PCI IDE PRD (scatter-gather) table with segments
4082 * associated with the current disk command. Perform the fill
4083 * so that we avoid writing any length 64K records for
4084 * controllers that don't follow the spec.
4087 * spin_lock_irqsave(host lock)
4090 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
4092 struct ata_port *ap = qc->ap;
4093 struct scatterlist *sg;
4096 WARN_ON(qc->__sg == NULL);
4097 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4100 ata_for_each_sg(sg, qc) {
4102 u32 sg_len, len, blen;
4104 /* determine if physical DMA addr spans 64K boundary.
4105 * Note h/w doesn't support 64-bit, so we unconditionally
4106 * truncate dma_addr_t to u32.
4108 addr = (u32) sg_dma_address(sg);
4109 sg_len = sg_dma_len(sg);
4112 offset = addr & 0xffff;
4114 if ((offset + sg_len) > 0x10000)
4115 len = 0x10000 - offset;
4117 blen = len & 0xffff;
4118 ap->prd[idx].addr = cpu_to_le32(addr);
4120 /* Some PATA chipsets like the CS5530 can't
4121 cope with 0x0000 meaning 64K as the spec says */
4122 ap->prd[idx].flags_len = cpu_to_le32(0x8000);
4124 ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);
4126 ap->prd[idx].flags_len = cpu_to_le32(blen);
4127 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4136 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4140 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
4141 * @qc: Metadata associated with taskfile to check
4143 * Allow low-level driver to filter ATA PACKET commands, returning
4144 * a status indicating whether or not it is OK to use DMA for the
4145 * supplied PACKET command.
4148 * spin_lock_irqsave(host lock)
4150 * RETURNS: 0 when ATAPI DMA can be used
4153 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
4155 struct ata_port *ap = qc->ap;
4157 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4158 * few ATAPI devices choke on such DMA requests.
4160 if (unlikely(qc->nbytes & 15))
4163 if (ap->ops->check_atapi_dma)
4164 return ap->ops->check_atapi_dma(qc);
4170 * ata_qc_prep - Prepare taskfile for submission
4171 * @qc: Metadata associated with taskfile to be prepared
4173 * Prepare ATA taskfile for submission.
4176 * spin_lock_irqsave(host lock)
4178 void ata_qc_prep(struct ata_queued_cmd *qc)
4180 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4187 * ata_dumb_qc_prep - Prepare taskfile for submission
4188 * @qc: Metadata associated with taskfile to be prepared
4190 * Prepare ATA taskfile for submission.
4193 * spin_lock_irqsave(host lock)
4195 void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
4197 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4200 ata_fill_sg_dumb(qc);
4203 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
4206 * ata_sg_init_one - Associate command with memory buffer
4207 * @qc: Command to be associated
4208 * @buf: Memory buffer
4209 * @buflen: Length of memory buffer, in bytes.
4211 * Initialize the data-related elements of queued_cmd @qc
4212 * to point to a single memory buffer, @buf of byte length @buflen.
4215 * spin_lock_irqsave(host lock)
4218 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
4220 qc->flags |= ATA_QCFLAG_SINGLE;
4222 qc->__sg = &qc->sgent;
4224 qc->orig_n_elem = 1;
4226 qc->nbytes = buflen;
4228 sg_init_one(&qc->sgent, buf, buflen);
4232 * ata_sg_init - Associate command with scatter-gather table.
4233 * @qc: Command to be associated
4234 * @sg: Scatter-gather table.
4235 * @n_elem: Number of elements in s/g table.
4237 * Initialize the data-related elements of queued_cmd @qc
4238 * to point to a scatter-gather table @sg, containing @n_elem
4242 * spin_lock_irqsave(host lock)
4245 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4246 unsigned int n_elem)
4248 qc->flags |= ATA_QCFLAG_SG;
4250 qc->n_elem = n_elem;
4251 qc->orig_n_elem = n_elem;
4255 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
4256 * @qc: Command with memory buffer to be mapped.
4258 * DMA-map the memory buffer associated with queued_cmd @qc.
4261 * spin_lock_irqsave(host lock)
4264 * Zero on success, negative on error.
4267 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
4269 struct ata_port *ap = qc->ap;
4270 int dir = qc->dma_dir;
4271 struct scatterlist *sg = qc->__sg;
4272 dma_addr_t dma_address;
4275 /* we must lengthen transfers to end on a 32-bit boundary */
4276 qc->pad_len = sg->length & 3;
4278 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4279 struct scatterlist *psg = &qc->pad_sgent;
4281 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4283 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4285 if (qc->tf.flags & ATA_TFLAG_WRITE)
4286 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
4289 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4290 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4292 sg->length -= qc->pad_len;
4293 if (sg->length == 0)
4296 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
4297 sg->length, qc->pad_len);
4305 dma_address = dma_map_single(ap->dev, qc->buf_virt,
4307 if (dma_mapping_error(dma_address)) {
4309 sg->length += qc->pad_len;
4313 sg_dma_address(sg) = dma_address;
4314 sg_dma_len(sg) = sg->length;
4317 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
4318 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4324 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4325 * @qc: Command with scatter-gather table to be mapped.
4327 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4330 * spin_lock_irqsave(host lock)
4333 * Zero on success, negative on error.
4337 static int ata_sg_setup(struct ata_queued_cmd *qc)
4339 struct ata_port *ap = qc->ap;
4340 struct scatterlist *sg = qc->__sg;
4341 struct scatterlist *lsg = &sg[qc->n_elem - 1];
4342 int n_elem, pre_n_elem, dir, trim_sg = 0;
4344 VPRINTK("ENTER, ata%u\n", ap->print_id);
4345 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
4347 /* we must lengthen transfers to end on a 32-bit boundary */
4348 qc->pad_len = lsg->length & 3;
4350 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4351 struct scatterlist *psg = &qc->pad_sgent;
4352 unsigned int offset;
4354 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4356 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4359 * psg->page/offset are used to copy to-be-written
4360 * data in this function or read data in ata_sg_clean.
4362 offset = lsg->offset + lsg->length - qc->pad_len;
4363 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
4364 psg->offset = offset_in_page(offset);
4366 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4367 void *addr = kmap_atomic(psg->page, KM_IRQ0);
4368 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
4369 kunmap_atomic(addr, KM_IRQ0);
4372 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4373 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4375 lsg->length -= qc->pad_len;
4376 if (lsg->length == 0)
4379 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
4380 qc->n_elem - 1, lsg->length, qc->pad_len);
4383 pre_n_elem = qc->n_elem;
4384 if (trim_sg && pre_n_elem)
4393 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
4395 /* restore last sg */
4396 lsg->length += qc->pad_len;
4400 DPRINTK("%d sg elements mapped\n", n_elem);
4403 qc->n_elem = n_elem;
4409 * swap_buf_le16 - swap halves of 16-bit words in place
4410 * @buf: Buffer to swap
4411 * @buf_words: Number of 16-bit words in buffer.
4413 * Swap halves of 16-bit words if needed to convert from
4414 * little-endian byte order to native cpu byte order, or
4418 * Inherited from caller.
4420 void swap_buf_le16(u16 *buf, unsigned int buf_words)
4425 for (i = 0; i < buf_words; i++)
4426 buf[i] = le16_to_cpu(buf[i]);
4427 #endif /* __BIG_ENDIAN */
4431 * ata_data_xfer - Transfer data by PIO
4432 * @adev: device to target
4434 * @buflen: buffer length
4435 * @write_data: read/write
4437 * Transfer data from/to the device data register by PIO.
4440 * Inherited from caller.
4442 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
4443 unsigned int buflen, int write_data)
4445 struct ata_port *ap = adev->ap;
4446 unsigned int words = buflen >> 1;
4448 /* Transfer multiple of 2 bytes */
4450 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
4452 ioread16_rep(ap->ioaddr.data_addr, buf, words);
4454 /* Transfer trailing 1 byte, if any. */
4455 if (unlikely(buflen & 0x01)) {
4456 u16 align_buf[1] = { 0 };
4457 unsigned char *trailing_buf = buf + buflen - 1;
4460 memcpy(align_buf, trailing_buf, 1);
4461 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
4463 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
4464 memcpy(trailing_buf, align_buf, 1);
4470 * ata_data_xfer_noirq - Transfer data by PIO
4471 * @adev: device to target
4473 * @buflen: buffer length
4474 * @write_data: read/write
4476 * Transfer data from/to the device data register by PIO. Do the
4477 * transfer with interrupts disabled.
4480 * Inherited from caller.
4482 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
4483 unsigned int buflen, int write_data)
4485 unsigned long flags;
4486 local_irq_save(flags);
4487 ata_data_xfer(adev, buf, buflen, write_data);
4488 local_irq_restore(flags);
4493 * ata_pio_sector - Transfer a sector of data.
4494 * @qc: Command on going
4496 * Transfer qc->sect_size bytes of data from/to the ATA device.
4499 * Inherited from caller.
4502 static void ata_pio_sector(struct ata_queued_cmd *qc)
4504 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4505 struct scatterlist *sg = qc->__sg;
4506 struct ata_port *ap = qc->ap;
4508 unsigned int offset;
4511 if (qc->curbytes == qc->nbytes - qc->sect_size)
4512 ap->hsm_task_state = HSM_ST_LAST;
4514 page = sg[qc->cursg].page;
4515 offset = sg[qc->cursg].offset + qc->cursg_ofs;
4517 /* get the current page and offset */
4518 page = nth_page(page, (offset >> PAGE_SHIFT));
4519 offset %= PAGE_SIZE;
4521 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4523 if (PageHighMem(page)) {
4524 unsigned long flags;
4526 /* FIXME: use a bounce buffer */
4527 local_irq_save(flags);
4528 buf = kmap_atomic(page, KM_IRQ0);
4530 /* do the actual data transfer */
4531 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4533 kunmap_atomic(buf, KM_IRQ0);
4534 local_irq_restore(flags);
4536 buf = page_address(page);
4537 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4540 qc->curbytes += qc->sect_size;
4541 qc->cursg_ofs += qc->sect_size;
4543 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
4550 * ata_pio_sectors - Transfer one or many sectors.
4551 * @qc: Command on going
4553 * Transfer one or many sectors of data from/to the
4554 * ATA device for the DRQ request.
4557 * Inherited from caller.
4560 static void ata_pio_sectors(struct ata_queued_cmd *qc)
4562 if (is_multi_taskfile(&qc->tf)) {
4563 /* READ/WRITE MULTIPLE */
4566 WARN_ON(qc->dev->multi_count == 0);
4568 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
4569 qc->dev->multi_count);
4577 * atapi_send_cdb - Write CDB bytes to hardware
4578 * @ap: Port to which ATAPI device is attached.
4579 * @qc: Taskfile currently active
4581 * When device has indicated its readiness to accept
4582 * a CDB, this function is called. Send the CDB.
4588 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
4591 DPRINTK("send cdb\n");
4592 WARN_ON(qc->dev->cdb_len < 12);
4594 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
4595 ata_altstatus(ap); /* flush */
4597 switch (qc->tf.protocol) {
4598 case ATA_PROT_ATAPI:
4599 ap->hsm_task_state = HSM_ST;
4601 case ATA_PROT_ATAPI_NODATA:
4602 ap->hsm_task_state = HSM_ST_LAST;
4604 case ATA_PROT_ATAPI_DMA:
4605 ap->hsm_task_state = HSM_ST_LAST;
4606 /* initiate bmdma */
4607 ap->ops->bmdma_start(qc);
4613 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4614 * @qc: Command on going
4615 * @bytes: number of bytes
4617 * Transfer Transfer data from/to the ATAPI device.
4620 * Inherited from caller.
4624 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4626 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4627 struct scatterlist *sg = qc->__sg;
4628 struct ata_port *ap = qc->ap;
4631 unsigned int offset, count;
4633 if (qc->curbytes + bytes >= qc->nbytes)
4634 ap->hsm_task_state = HSM_ST_LAST;
4637 if (unlikely(qc->cursg >= qc->n_elem)) {
4639 * The end of qc->sg is reached and the device expects
4640 * more data to transfer. In order not to overrun qc->sg
4641 * and fulfill length specified in the byte count register,
4642 * - for read case, discard trailing data from the device
4643 * - for write case, padding zero data to the device
4645 u16 pad_buf[1] = { 0 };
4646 unsigned int words = bytes >> 1;
4649 if (words) /* warning if bytes > 1 */
4650 ata_dev_printk(qc->dev, KERN_WARNING,
4651 "%u bytes trailing data\n", bytes);
4653 for (i = 0; i < words; i++)
4654 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4656 ap->hsm_task_state = HSM_ST_LAST;
4660 sg = &qc->__sg[qc->cursg];
4663 offset = sg->offset + qc->cursg_ofs;
4665 /* get the current page and offset */
4666 page = nth_page(page, (offset >> PAGE_SHIFT));
4667 offset %= PAGE_SIZE;
4669 /* don't overrun current sg */
4670 count = min(sg->length - qc->cursg_ofs, bytes);
4672 /* don't cross page boundaries */
4673 count = min(count, (unsigned int)PAGE_SIZE - offset);
4675 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4677 if (PageHighMem(page)) {
4678 unsigned long flags;
4680 /* FIXME: use bounce buffer */
4681 local_irq_save(flags);
4682 buf = kmap_atomic(page, KM_IRQ0);
4684 /* do the actual data transfer */
4685 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4687 kunmap_atomic(buf, KM_IRQ0);
4688 local_irq_restore(flags);
4690 buf = page_address(page);
4691 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4695 qc->curbytes += count;
4696 qc->cursg_ofs += count;
4698 if (qc->cursg_ofs == sg->length) {
4708 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4709 * @qc: Command on going
4711 * Transfer Transfer data from/to the ATAPI device.
4714 * Inherited from caller.
4717 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4719 struct ata_port *ap = qc->ap;
4720 struct ata_device *dev = qc->dev;
4721 unsigned int ireason, bc_lo, bc_hi, bytes;
4722 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4724 /* Abuse qc->result_tf for temp storage of intermediate TF
4725 * here to save some kernel stack usage.
4726 * For normal completion, qc->result_tf is not relevant. For
4727 * error, qc->result_tf is later overwritten by ata_qc_complete().
4728 * So, the correctness of qc->result_tf is not affected.
4730 ap->ops->tf_read(ap, &qc->result_tf);
4731 ireason = qc->result_tf.nsect;
4732 bc_lo = qc->result_tf.lbam;
4733 bc_hi = qc->result_tf.lbah;
4734 bytes = (bc_hi << 8) | bc_lo;
4736 /* shall be cleared to zero, indicating xfer of data */
4737 if (ireason & (1 << 0))
4740 /* make sure transfer direction matches expected */
4741 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4742 if (do_write != i_write)
4745 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
4747 __atapi_pio_bytes(qc, bytes);
4752 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4753 qc->err_mask |= AC_ERR_HSM;
4754 ap->hsm_task_state = HSM_ST_ERR;
4758 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4759 * @ap: the target ata_port
4763 * 1 if ok in workqueue, 0 otherwise.
4766 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4768 if (qc->tf.flags & ATA_TFLAG_POLLING)
4771 if (ap->hsm_task_state == HSM_ST_FIRST) {
4772 if (qc->tf.protocol == ATA_PROT_PIO &&
4773 (qc->tf.flags & ATA_TFLAG_WRITE))
4776 if (is_atapi_taskfile(&qc->tf) &&
4777 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4785 * ata_hsm_qc_complete - finish a qc running on standard HSM
4786 * @qc: Command to complete
4787 * @in_wq: 1 if called from workqueue, 0 otherwise
4789 * Finish @qc which is running on standard HSM.
4792 * If @in_wq is zero, spin_lock_irqsave(host lock).
4793 * Otherwise, none on entry and grabs host lock.
4795 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4797 struct ata_port *ap = qc->ap;
4798 unsigned long flags;
4800 if (ap->ops->error_handler) {
4802 spin_lock_irqsave(ap->lock, flags);
4804 /* EH might have kicked in while host lock is
4807 qc = ata_qc_from_tag(ap, qc->tag);
4809 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4810 ap->ops->irq_on(ap);
4811 ata_qc_complete(qc);
4813 ata_port_freeze(ap);
4816 spin_unlock_irqrestore(ap->lock, flags);
4818 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4819 ata_qc_complete(qc);
4821 ata_port_freeze(ap);
4825 spin_lock_irqsave(ap->lock, flags);
4826 ap->ops->irq_on(ap);
4827 ata_qc_complete(qc);
4828 spin_unlock_irqrestore(ap->lock, flags);
4830 ata_qc_complete(qc);
4835 * ata_hsm_move - move the HSM to the next state.
4836 * @ap: the target ata_port
4838 * @status: current device status
4839 * @in_wq: 1 if called from workqueue, 0 otherwise
4842 * 1 when poll next status needed, 0 otherwise.
4844 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4845 u8 status, int in_wq)
4847 unsigned long flags = 0;
4850 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4852 /* Make sure ata_qc_issue_prot() does not throw things
4853 * like DMA polling into the workqueue. Notice that
4854 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4856 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4859 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4860 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
4862 switch (ap->hsm_task_state) {
4864 /* Send first data block or PACKET CDB */
4866 /* If polling, we will stay in the work queue after
4867 * sending the data. Otherwise, interrupt handler
4868 * takes over after sending the data.
4870 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4872 /* check device status */
4873 if (unlikely((status & ATA_DRQ) == 0)) {
4874 /* handle BSY=0, DRQ=0 as error */
4875 if (likely(status & (ATA_ERR | ATA_DF)))
4876 /* device stops HSM for abort/error */
4877 qc->err_mask |= AC_ERR_DEV;
4879 /* HSM violation. Let EH handle this */
4880 qc->err_mask |= AC_ERR_HSM;
4882 ap->hsm_task_state = HSM_ST_ERR;
4886 /* Device should not ask for data transfer (DRQ=1)
4887 * when it finds something wrong.
4888 * We ignore DRQ here and stop the HSM by
4889 * changing hsm_task_state to HSM_ST_ERR and
4890 * let the EH abort the command or reset the device.
4892 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4893 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device "
4894 "error, dev_stat 0x%X\n", status);
4895 qc->err_mask |= AC_ERR_HSM;
4896 ap->hsm_task_state = HSM_ST_ERR;
4900 /* Send the CDB (atapi) or the first data block (ata pio out).
4901 * During the state transition, interrupt handler shouldn't
4902 * be invoked before the data transfer is complete and
4903 * hsm_task_state is changed. Hence, the following locking.
4906 spin_lock_irqsave(ap->lock, flags);
4908 if (qc->tf.protocol == ATA_PROT_PIO) {
4909 /* PIO data out protocol.
4910 * send first data block.
4913 /* ata_pio_sectors() might change the state
4914 * to HSM_ST_LAST. so, the state is changed here
4915 * before ata_pio_sectors().
4917 ap->hsm_task_state = HSM_ST;
4918 ata_pio_sectors(qc);
4919 ata_altstatus(ap); /* flush */
4922 atapi_send_cdb(ap, qc);
4925 spin_unlock_irqrestore(ap->lock, flags);
4927 /* if polling, ata_pio_task() handles the rest.
4928 * otherwise, interrupt handler takes over from here.
4933 /* complete command or read/write the data register */
4934 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4935 /* ATAPI PIO protocol */
4936 if ((status & ATA_DRQ) == 0) {
4937 /* No more data to transfer or device error.
4938 * Device error will be tagged in HSM_ST_LAST.
4940 ap->hsm_task_state = HSM_ST_LAST;
4944 /* Device should not ask for data transfer (DRQ=1)
4945 * when it finds something wrong.
4946 * We ignore DRQ here and stop the HSM by
4947 * changing hsm_task_state to HSM_ST_ERR and
4948 * let the EH abort the command or reset the device.
4950 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4951 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
4952 "device error, dev_stat 0x%X\n",
4954 qc->err_mask |= AC_ERR_HSM;
4955 ap->hsm_task_state = HSM_ST_ERR;
4959 atapi_pio_bytes(qc);
4961 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4962 /* bad ireason reported by device */
4966 /* ATA PIO protocol */
4967 if (unlikely((status & ATA_DRQ) == 0)) {
4968 /* handle BSY=0, DRQ=0 as error */
4969 if (likely(status & (ATA_ERR | ATA_DF)))
4970 /* device stops HSM for abort/error */
4971 qc->err_mask |= AC_ERR_DEV;
4973 /* HSM violation. Let EH handle this.
4974 * Phantom devices also trigger this
4975 * condition. Mark hint.
4977 qc->err_mask |= AC_ERR_HSM |
4980 ap->hsm_task_state = HSM_ST_ERR;
4984 /* For PIO reads, some devices may ask for
4985 * data transfer (DRQ=1) alone with ERR=1.
4986 * We respect DRQ here and transfer one
4987 * block of junk data before changing the
4988 * hsm_task_state to HSM_ST_ERR.
4990 * For PIO writes, ERR=1 DRQ=1 doesn't make
4991 * sense since the data block has been
4992 * transferred to the device.
4994 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4995 /* data might be corrputed */
4996 qc->err_mask |= AC_ERR_DEV;
4998 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4999 ata_pio_sectors(qc);
5001 status = ata_wait_idle(ap);
5004 if (status & (ATA_BUSY | ATA_DRQ))
5005 qc->err_mask |= AC_ERR_HSM;
5007 /* ata_pio_sectors() might change the
5008 * state to HSM_ST_LAST. so, the state
5009 * is changed after ata_pio_sectors().
5011 ap->hsm_task_state = HSM_ST_ERR;
5015 ata_pio_sectors(qc);
5017 if (ap->hsm_task_state == HSM_ST_LAST &&
5018 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
5021 status = ata_wait_idle(ap);
5026 ata_altstatus(ap); /* flush */
5031 if (unlikely(!ata_ok(status))) {
5032 qc->err_mask |= __ac_err_mask(status);
5033 ap->hsm_task_state = HSM_ST_ERR;
5037 /* no more data to transfer */
5038 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
5039 ap->print_id, qc->dev->devno, status);
5041 WARN_ON(qc->err_mask);
5043 ap->hsm_task_state = HSM_ST_IDLE;
5045 /* complete taskfile transaction */
5046 ata_hsm_qc_complete(qc, in_wq);
5052 /* make sure qc->err_mask is available to
5053 * know what's wrong and recover
5055 WARN_ON(qc->err_mask == 0);
5057 ap->hsm_task_state = HSM_ST_IDLE;
5059 /* complete taskfile transaction */
5060 ata_hsm_qc_complete(qc, in_wq);
5072 static void ata_pio_task(struct work_struct *work)
5074 struct ata_port *ap =
5075 container_of(work, struct ata_port, port_task.work);
5076 struct ata_queued_cmd *qc = ap->port_task_data;
5081 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
5084 * This is purely heuristic. This is a fast path.
5085 * Sometimes when we enter, BSY will be cleared in
5086 * a chk-status or two. If not, the drive is probably seeking
5087 * or something. Snooze for a couple msecs, then
5088 * chk-status again. If still busy, queue delayed work.
5090 status = ata_busy_wait(ap, ATA_BUSY, 5);
5091 if (status & ATA_BUSY) {
5093 status = ata_busy_wait(ap, ATA_BUSY, 10);
5094 if (status & ATA_BUSY) {
5095 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
5101 poll_next = ata_hsm_move(ap, qc, status, 1);
5103 /* another command or interrupt handler
5104 * may be running at this point.
5111 * ata_qc_new - Request an available ATA command, for queueing
5112 * @ap: Port associated with device @dev
5113 * @dev: Device from whom we request an available command structure
5119 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
5121 struct ata_queued_cmd *qc = NULL;
5124 /* no command while frozen */
5125 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
5128 /* the last tag is reserved for internal command. */
5129 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
5130 if (!test_and_set_bit(i, &ap->qc_allocated)) {
5131 qc = __ata_qc_from_tag(ap, i);
5142 * ata_qc_new_init - Request an available ATA command, and initialize it
5143 * @dev: Device from whom we request an available command structure
5149 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
5151 struct ata_port *ap = dev->ap;
5152 struct ata_queued_cmd *qc;
5154 qc = ata_qc_new(ap);
5167 * ata_qc_free - free unused ata_queued_cmd
5168 * @qc: Command to complete
5170 * Designed to free unused ata_queued_cmd object
5171 * in case something prevents using it.
5174 * spin_lock_irqsave(host lock)
5176 void ata_qc_free(struct ata_queued_cmd *qc)
5178 struct ata_port *ap = qc->ap;
5181 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5185 if (likely(ata_tag_valid(tag))) {
5186 qc->tag = ATA_TAG_POISON;
5187 clear_bit(tag, &ap->qc_allocated);
5191 void __ata_qc_complete(struct ata_queued_cmd *qc)
5193 struct ata_port *ap = qc->ap;
5195 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5196 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
5198 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
5201 /* command should be marked inactive atomically with qc completion */
5202 if (qc->tf.protocol == ATA_PROT_NCQ)
5203 ap->sactive &= ~(1 << qc->tag);
5205 ap->active_tag = ATA_TAG_POISON;
5207 /* atapi: mark qc as inactive to prevent the interrupt handler
5208 * from completing the command twice later, before the error handler
5209 * is called. (when rc != 0 and atapi request sense is needed)
5211 qc->flags &= ~ATA_QCFLAG_ACTIVE;
5212 ap->qc_active &= ~(1 << qc->tag);
5214 /* call completion callback */
5215 qc->complete_fn(qc);
5218 static void fill_result_tf(struct ata_queued_cmd *qc)
5220 struct ata_port *ap = qc->ap;
5222 qc->result_tf.flags = qc->tf.flags;
5223 ap->ops->tf_read(ap, &qc->result_tf);
5227 * ata_qc_complete - Complete an active ATA command
5228 * @qc: Command to complete
5229 * @err_mask: ATA Status register contents
5231 * Indicate to the mid and upper layers that an ATA
5232 * command has completed, with either an ok or not-ok status.
5235 * spin_lock_irqsave(host lock)
5237 void ata_qc_complete(struct ata_queued_cmd *qc)
5239 struct ata_port *ap = qc->ap;
5241 /* XXX: New EH and old EH use different mechanisms to
5242 * synchronize EH with regular execution path.
5244 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
5245 * Normal execution path is responsible for not accessing a
5246 * failed qc. libata core enforces the rule by returning NULL
5247 * from ata_qc_from_tag() for failed qcs.
5249 * Old EH depends on ata_qc_complete() nullifying completion
5250 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
5251 * not synchronize with interrupt handler. Only PIO task is
5254 if (ap->ops->error_handler) {
5255 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
5257 if (unlikely(qc->err_mask))
5258 qc->flags |= ATA_QCFLAG_FAILED;
5260 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
5261 if (!ata_tag_internal(qc->tag)) {
5262 /* always fill result TF for failed qc */
5264 ata_qc_schedule_eh(qc);
5269 /* read result TF if requested */
5270 if (qc->flags & ATA_QCFLAG_RESULT_TF)
5273 __ata_qc_complete(qc);
5275 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
5278 /* read result TF if failed or requested */
5279 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
5282 __ata_qc_complete(qc);
5287 * ata_qc_complete_multiple - Complete multiple qcs successfully
5288 * @ap: port in question
5289 * @qc_active: new qc_active mask
5290 * @finish_qc: LLDD callback invoked before completing a qc
5292 * Complete in-flight commands. This functions is meant to be
5293 * called from low-level driver's interrupt routine to complete
5294 * requests normally. ap->qc_active and @qc_active is compared
5295 * and commands are completed accordingly.
5298 * spin_lock_irqsave(host lock)
5301 * Number of completed commands on success, -errno otherwise.
5303 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
5304 void (*finish_qc)(struct ata_queued_cmd *))
5310 done_mask = ap->qc_active ^ qc_active;
5312 if (unlikely(done_mask & qc_active)) {
5313 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
5314 "(%08x->%08x)\n", ap->qc_active, qc_active);
5318 for (i = 0; i < ATA_MAX_QUEUE; i++) {
5319 struct ata_queued_cmd *qc;
5321 if (!(done_mask & (1 << i)))
5324 if ((qc = ata_qc_from_tag(ap, i))) {
5327 ata_qc_complete(qc);
5335 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
5337 struct ata_port *ap = qc->ap;
5339 switch (qc->tf.protocol) {
5342 case ATA_PROT_ATAPI_DMA:
5345 case ATA_PROT_ATAPI:
5347 if (ap->flags & ATA_FLAG_PIO_DMA)
5360 * ata_qc_issue - issue taskfile to device
5361 * @qc: command to issue to device
5363 * Prepare an ATA command to submission to device.
5364 * This includes mapping the data into a DMA-able
5365 * area, filling in the S/G table, and finally
5366 * writing the taskfile to hardware, starting the command.
5369 * spin_lock_irqsave(host lock)
5371 void ata_qc_issue(struct ata_queued_cmd *qc)
5373 struct ata_port *ap = qc->ap;
5375 /* Make sure only one non-NCQ command is outstanding. The
5376 * check is skipped for old EH because it reuses active qc to
5377 * request ATAPI sense.
5379 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
5381 if (qc->tf.protocol == ATA_PROT_NCQ) {
5382 WARN_ON(ap->sactive & (1 << qc->tag));
5383 ap->sactive |= 1 << qc->tag;
5385 WARN_ON(ap->sactive);
5386 ap->active_tag = qc->tag;
5389 qc->flags |= ATA_QCFLAG_ACTIVE;
5390 ap->qc_active |= 1 << qc->tag;
5392 if (ata_should_dma_map(qc)) {
5393 if (qc->flags & ATA_QCFLAG_SG) {
5394 if (ata_sg_setup(qc))
5396 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
5397 if (ata_sg_setup_one(qc))
5401 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5404 ap->ops->qc_prep(qc);
5406 qc->err_mask |= ap->ops->qc_issue(qc);
5407 if (unlikely(qc->err_mask))
5412 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5413 qc->err_mask |= AC_ERR_SYSTEM;
5415 ata_qc_complete(qc);
5419 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
5420 * @qc: command to issue to device
5422 * Using various libata functions and hooks, this function
5423 * starts an ATA command. ATA commands are grouped into
5424 * classes called "protocols", and issuing each type of protocol
5425 * is slightly different.
5427 * May be used as the qc_issue() entry in ata_port_operations.
5430 * spin_lock_irqsave(host lock)
5433 * Zero on success, AC_ERR_* mask on failure
5436 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
5438 struct ata_port *ap = qc->ap;
5440 /* Use polling pio if the LLD doesn't handle
5441 * interrupt driven pio and atapi CDB interrupt.
5443 if (ap->flags & ATA_FLAG_PIO_POLLING) {
5444 switch (qc->tf.protocol) {
5446 case ATA_PROT_NODATA:
5447 case ATA_PROT_ATAPI:
5448 case ATA_PROT_ATAPI_NODATA:
5449 qc->tf.flags |= ATA_TFLAG_POLLING;
5451 case ATA_PROT_ATAPI_DMA:
5452 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
5453 /* see ata_dma_blacklisted() */
5461 /* select the device */
5462 ata_dev_select(ap, qc->dev->devno, 1, 0);
5464 /* start the command */
5465 switch (qc->tf.protocol) {
5466 case ATA_PROT_NODATA:
5467 if (qc->tf.flags & ATA_TFLAG_POLLING)
5468 ata_qc_set_polling(qc);
5470 ata_tf_to_host(ap, &qc->tf);
5471 ap->hsm_task_state = HSM_ST_LAST;
5473 if (qc->tf.flags & ATA_TFLAG_POLLING)
5474 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5479 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5481 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5482 ap->ops->bmdma_setup(qc); /* set up bmdma */
5483 ap->ops->bmdma_start(qc); /* initiate bmdma */
5484 ap->hsm_task_state = HSM_ST_LAST;
5488 if (qc->tf.flags & ATA_TFLAG_POLLING)
5489 ata_qc_set_polling(qc);
5491 ata_tf_to_host(ap, &qc->tf);
5493 if (qc->tf.flags & ATA_TFLAG_WRITE) {
5494 /* PIO data out protocol */
5495 ap->hsm_task_state = HSM_ST_FIRST;
5496 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5498 /* always send first data block using
5499 * the ata_pio_task() codepath.
5502 /* PIO data in protocol */
5503 ap->hsm_task_state = HSM_ST;
5505 if (qc->tf.flags & ATA_TFLAG_POLLING)
5506 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5508 /* if polling, ata_pio_task() handles the rest.
5509 * otherwise, interrupt handler takes over from here.
5515 case ATA_PROT_ATAPI:
5516 case ATA_PROT_ATAPI_NODATA:
5517 if (qc->tf.flags & ATA_TFLAG_POLLING)
5518 ata_qc_set_polling(qc);
5520 ata_tf_to_host(ap, &qc->tf);
5522 ap->hsm_task_state = HSM_ST_FIRST;
5524 /* send cdb by polling if no cdb interrupt */
5525 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
5526 (qc->tf.flags & ATA_TFLAG_POLLING))
5527 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5530 case ATA_PROT_ATAPI_DMA:
5531 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5533 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5534 ap->ops->bmdma_setup(qc); /* set up bmdma */
5535 ap->hsm_task_state = HSM_ST_FIRST;
5537 /* send cdb by polling if no cdb interrupt */
5538 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5539 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5544 return AC_ERR_SYSTEM;
5551 * ata_host_intr - Handle host interrupt for given (port, task)
5552 * @ap: Port on which interrupt arrived (possibly...)
5553 * @qc: Taskfile currently active in engine
5555 * Handle host interrupt for given queued command. Currently,
5556 * only DMA interrupts are handled. All other commands are
5557 * handled via polling with interrupts disabled (nIEN bit).
5560 * spin_lock_irqsave(host lock)
5563 * One if interrupt was handled, zero if not (shared irq).
5566 inline unsigned int ata_host_intr (struct ata_port *ap,
5567 struct ata_queued_cmd *qc)
5569 struct ata_eh_info *ehi = &ap->eh_info;
5570 u8 status, host_stat = 0;
5572 VPRINTK("ata%u: protocol %d task_state %d\n",
5573 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
5575 /* Check whether we are expecting interrupt in this state */
5576 switch (ap->hsm_task_state) {
5578 /* Some pre-ATAPI-4 devices assert INTRQ
5579 * at this state when ready to receive CDB.
5582 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
5583 * The flag was turned on only for atapi devices.
5584 * No need to check is_atapi_taskfile(&qc->tf) again.
5586 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5590 if (qc->tf.protocol == ATA_PROT_DMA ||
5591 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
5592 /* check status of DMA engine */
5593 host_stat = ap->ops->bmdma_status(ap);
5594 VPRINTK("ata%u: host_stat 0x%X\n",
5595 ap->print_id, host_stat);
5597 /* if it's not our irq... */
5598 if (!(host_stat & ATA_DMA_INTR))
5601 /* before we do anything else, clear DMA-Start bit */
5602 ap->ops->bmdma_stop(qc);
5604 if (unlikely(host_stat & ATA_DMA_ERR)) {
5605 /* error when transfering data to/from memory */
5606 qc->err_mask |= AC_ERR_HOST_BUS;
5607 ap->hsm_task_state = HSM_ST_ERR;
5617 /* check altstatus */
5618 status = ata_altstatus(ap);
5619 if (status & ATA_BUSY)
5622 /* check main status, clearing INTRQ */
5623 status = ata_chk_status(ap);
5624 if (unlikely(status & ATA_BUSY))
5627 /* ack bmdma irq events */
5628 ap->ops->irq_clear(ap);
5630 ata_hsm_move(ap, qc, status, 0);
5632 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5633 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5634 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5636 return 1; /* irq handled */
5639 ap->stats.idle_irq++;
5642 if ((ap->stats.idle_irq % 1000) == 0) {
5643 ap->ops->irq_ack(ap, 0); /* debug trap */
5644 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5648 return 0; /* irq not handled */
5652 * ata_interrupt - Default ATA host interrupt handler
5653 * @irq: irq line (unused)
5654 * @dev_instance: pointer to our ata_host information structure
5656 * Default interrupt handler for PCI IDE devices. Calls
5657 * ata_host_intr() for each port that is not disabled.
5660 * Obtains host lock during operation.
5663 * IRQ_NONE or IRQ_HANDLED.
5666 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5668 struct ata_host *host = dev_instance;
5670 unsigned int handled = 0;
5671 unsigned long flags;
5673 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5674 spin_lock_irqsave(&host->lock, flags);
5676 for (i = 0; i < host->n_ports; i++) {
5677 struct ata_port *ap;
5679 ap = host->ports[i];
5681 !(ap->flags & ATA_FLAG_DISABLED)) {
5682 struct ata_queued_cmd *qc;
5684 qc = ata_qc_from_tag(ap, ap->active_tag);
5685 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5686 (qc->flags & ATA_QCFLAG_ACTIVE))
5687 handled |= ata_host_intr(ap, qc);
5691 spin_unlock_irqrestore(&host->lock, flags);
5693 return IRQ_RETVAL(handled);
5697 * sata_scr_valid - test whether SCRs are accessible
5698 * @ap: ATA port to test SCR accessibility for
5700 * Test whether SCRs are accessible for @ap.
5706 * 1 if SCRs are accessible, 0 otherwise.
5708 int sata_scr_valid(struct ata_port *ap)
5710 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
5714 * sata_scr_read - read SCR register of the specified port
5715 * @ap: ATA port to read SCR for
5717 * @val: Place to store read value
5719 * Read SCR register @reg of @ap into *@val. This function is
5720 * guaranteed to succeed if the cable type of the port is SATA
5721 * and the port implements ->scr_read.
5727 * 0 on success, negative errno on failure.
5729 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5731 if (sata_scr_valid(ap)) {
5732 *val = ap->ops->scr_read(ap, reg);
5739 * sata_scr_write - write SCR register of the specified port
5740 * @ap: ATA port to write SCR for
5741 * @reg: SCR to write
5742 * @val: value to write
5744 * Write @val to SCR register @reg of @ap. This function is
5745 * guaranteed to succeed if the cable type of the port is SATA
5746 * and the port implements ->scr_read.
5752 * 0 on success, negative errno on failure.
5754 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5756 if (sata_scr_valid(ap)) {
5757 ap->ops->scr_write(ap, reg, val);
5764 * sata_scr_write_flush - write SCR register of the specified port and flush
5765 * @ap: ATA port to write SCR for
5766 * @reg: SCR to write
5767 * @val: value to write
5769 * This function is identical to sata_scr_write() except that this
5770 * function performs flush after writing to the register.
5776 * 0 on success, negative errno on failure.
5778 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5780 if (sata_scr_valid(ap)) {
5781 ap->ops->scr_write(ap, reg, val);
5782 ap->ops->scr_read(ap, reg);
5789 * ata_port_online - test whether the given port is online
5790 * @ap: ATA port to test
5792 * Test whether @ap is online. Note that this function returns 0
5793 * if online status of @ap cannot be obtained, so
5794 * ata_port_online(ap) != !ata_port_offline(ap).
5800 * 1 if the port online status is available and online.
5802 int ata_port_online(struct ata_port *ap)
5806 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5812 * ata_port_offline - test whether the given port is offline
5813 * @ap: ATA port to test
5815 * Test whether @ap is offline. Note that this function returns
5816 * 0 if offline status of @ap cannot be obtained, so
5817 * ata_port_online(ap) != !ata_port_offline(ap).
5823 * 1 if the port offline status is available and offline.
5825 int ata_port_offline(struct ata_port *ap)
5829 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5834 int ata_flush_cache(struct ata_device *dev)
5836 unsigned int err_mask;
5839 if (!ata_try_flush_cache(dev))
5842 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5843 cmd = ATA_CMD_FLUSH_EXT;
5845 cmd = ATA_CMD_FLUSH;
5847 err_mask = ata_do_simple_cmd(dev, cmd);
5849 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5857 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5858 unsigned int action, unsigned int ehi_flags,
5861 unsigned long flags;
5864 for (i = 0; i < host->n_ports; i++) {
5865 struct ata_port *ap = host->ports[i];
5867 /* Previous resume operation might still be in
5868 * progress. Wait for PM_PENDING to clear.
5870 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5871 ata_port_wait_eh(ap);
5872 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5875 /* request PM ops to EH */
5876 spin_lock_irqsave(ap->lock, flags);
5881 ap->pm_result = &rc;
5884 ap->pflags |= ATA_PFLAG_PM_PENDING;
5885 ap->eh_info.action |= action;
5886 ap->eh_info.flags |= ehi_flags;
5888 ata_port_schedule_eh(ap);
5890 spin_unlock_irqrestore(ap->lock, flags);
5892 /* wait and check result */
5894 ata_port_wait_eh(ap);
5895 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5905 * ata_host_suspend - suspend host
5906 * @host: host to suspend
5909 * Suspend @host. Actual operation is performed by EH. This
5910 * function requests EH to perform PM operations and waits for EH
5914 * Kernel thread context (may sleep).
5917 * 0 on success, -errno on failure.
5919 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5923 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5925 host->dev->power.power_state = mesg;
5930 * ata_host_resume - resume host
5931 * @host: host to resume
5933 * Resume @host. Actual operation is performed by EH. This
5934 * function requests EH to perform PM operations and returns.
5935 * Note that all resume operations are performed parallely.
5938 * Kernel thread context (may sleep).
5940 void ata_host_resume(struct ata_host *host)
5942 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5943 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5944 host->dev->power.power_state = PMSG_ON;
5949 * ata_port_start - Set port up for dma.
5950 * @ap: Port to initialize
5952 * Called just after data structures for each port are
5953 * initialized. Allocates space for PRD table.
5955 * May be used as the port_start() entry in ata_port_operations.
5958 * Inherited from caller.
5960 int ata_port_start(struct ata_port *ap)
5962 struct device *dev = ap->dev;
5965 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5970 rc = ata_pad_alloc(ap, dev);
5974 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5975 (unsigned long long)ap->prd_dma);
5980 * ata_dev_init - Initialize an ata_device structure
5981 * @dev: Device structure to initialize
5983 * Initialize @dev in preparation for probing.
5986 * Inherited from caller.
5988 void ata_dev_init(struct ata_device *dev)
5990 struct ata_port *ap = dev->ap;
5991 unsigned long flags;
5993 /* SATA spd limit is bound to the first device */
5994 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5996 /* High bits of dev->flags are used to record warm plug
5997 * requests which occur asynchronously. Synchronize using
6000 spin_lock_irqsave(ap->lock, flags);
6001 dev->flags &= ~ATA_DFLAG_INIT_MASK;
6002 spin_unlock_irqrestore(ap->lock, flags);
6004 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
6005 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
6006 dev->pio_mask = UINT_MAX;
6007 dev->mwdma_mask = UINT_MAX;
6008 dev->udma_mask = UINT_MAX;
6012 * ata_port_alloc - allocate and initialize basic ATA port resources
6013 * @host: ATA host this allocated port belongs to
6015 * Allocate and initialize basic ATA port resources.
6018 * Allocate ATA port on success, NULL on failure.
6021 * Inherited from calling layer (may sleep).
6023 struct ata_port *ata_port_alloc(struct ata_host *host)
6025 struct ata_port *ap;
6030 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
6034 ap->pflags |= ATA_PFLAG_INITIALIZING;
6035 ap->lock = &host->lock;
6036 ap->flags = ATA_FLAG_DISABLED;
6038 ap->ctl = ATA_DEVCTL_OBS;
6040 ap->dev = host->dev;
6042 ap->hw_sata_spd_limit = UINT_MAX;
6043 ap->active_tag = ATA_TAG_POISON;
6044 ap->last_ctl = 0xFF;
6046 #if defined(ATA_VERBOSE_DEBUG)
6047 /* turn on all debugging levels */
6048 ap->msg_enable = 0x00FF;
6049 #elif defined(ATA_DEBUG)
6050 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
6052 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
6055 INIT_DELAYED_WORK(&ap->port_task, NULL);
6056 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
6057 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
6058 INIT_LIST_HEAD(&ap->eh_done_q);
6059 init_waitqueue_head(&ap->eh_wait_q);
6061 ap->cbl = ATA_CBL_NONE;
6063 for (i = 0; i < ATA_MAX_DEVICES; i++) {
6064 struct ata_device *dev = &ap->device[i];
6071 ap->stats.unhandled_irq = 1;
6072 ap->stats.idle_irq = 1;
6077 static void ata_host_release(struct device *gendev, void *res)
6079 struct ata_host *host = dev_get_drvdata(gendev);
6082 for (i = 0; i < host->n_ports; i++) {
6083 struct ata_port *ap = host->ports[i];
6088 if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop)
6089 ap->ops->port_stop(ap);
6092 if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop)
6093 host->ops->host_stop(host);
6095 for (i = 0; i < host->n_ports; i++) {
6096 struct ata_port *ap = host->ports[i];
6102 scsi_host_put(ap->scsi_host);
6105 host->ports[i] = NULL;
6108 dev_set_drvdata(gendev, NULL);
6112 * ata_host_alloc - allocate and init basic ATA host resources
6113 * @dev: generic device this host is associated with
6114 * @max_ports: maximum number of ATA ports associated with this host
6116 * Allocate and initialize basic ATA host resources. LLD calls
6117 * this function to allocate a host, initializes it fully and
6118 * attaches it using ata_host_register().
6120 * @max_ports ports are allocated and host->n_ports is
6121 * initialized to @max_ports. The caller is allowed to decrease
6122 * host->n_ports before calling ata_host_register(). The unused
6123 * ports will be automatically freed on registration.
6126 * Allocate ATA host on success, NULL on failure.
6129 * Inherited from calling layer (may sleep).
6131 struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
6133 struct ata_host *host;
6139 if (!devres_open_group(dev, NULL, GFP_KERNEL))
6142 /* alloc a container for our list of ATA ports (buses) */
6143 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
6144 /* alloc a container for our list of ATA ports (buses) */
6145 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
6149 devres_add(dev, host);
6150 dev_set_drvdata(dev, host);
6152 spin_lock_init(&host->lock);
6154 host->n_ports = max_ports;
6156 /* allocate ports bound to this host */
6157 for (i = 0; i < max_ports; i++) {
6158 struct ata_port *ap;
6160 ap = ata_port_alloc(host);
6165 host->ports[i] = ap;
6168 devres_remove_group(dev, NULL);
6172 devres_release_group(dev, NULL);
6177 * ata_host_alloc_pinfo - alloc host and init with port_info array
6178 * @dev: generic device this host is associated with
6179 * @ppi: array of ATA port_info to initialize host with
6180 * @n_ports: number of ATA ports attached to this host
6182 * Allocate ATA host and initialize with info from @ppi. If NULL
6183 * terminated, @ppi may contain fewer entries than @n_ports. The
6184 * last entry will be used for the remaining ports.
6187 * Allocate ATA host on success, NULL on failure.
6190 * Inherited from calling layer (may sleep).
6192 struct ata_host *ata_host_alloc_pinfo(struct device *dev,
6193 const struct ata_port_info * const * ppi,
6196 const struct ata_port_info *pi;
6197 struct ata_host *host;
6200 host = ata_host_alloc(dev, n_ports);
6204 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
6205 struct ata_port *ap = host->ports[i];
6210 ap->pio_mask = pi->pio_mask;
6211 ap->mwdma_mask = pi->mwdma_mask;
6212 ap->udma_mask = pi->udma_mask;
6213 ap->flags |= pi->flags;
6214 ap->ops = pi->port_ops;
6216 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
6217 host->ops = pi->port_ops;
6218 if (!host->private_data && pi->private_data)
6219 host->private_data = pi->private_data;
6226 * ata_host_start - start and freeze ports of an ATA host
6227 * @host: ATA host to start ports for
6229 * Start and then freeze ports of @host. Started status is
6230 * recorded in host->flags, so this function can be called
6231 * multiple times. Ports are guaranteed to get started only
6232 * once. If host->ops isn't initialized yet, its set to the
6233 * first non-dummy port ops.
6236 * Inherited from calling layer (may sleep).
6239 * 0 if all ports are started successfully, -errno otherwise.
6241 int ata_host_start(struct ata_host *host)
6245 if (host->flags & ATA_HOST_STARTED)
6248 for (i = 0; i < host->n_ports; i++) {
6249 struct ata_port *ap = host->ports[i];
6251 if (!host->ops && !ata_port_is_dummy(ap))
6252 host->ops = ap->ops;
6254 if (ap->ops->port_start) {
6255 rc = ap->ops->port_start(ap);
6257 ata_port_printk(ap, KERN_ERR, "failed to "
6258 "start port (errno=%d)\n", rc);
6263 ata_eh_freeze_port(ap);
6266 host->flags |= ATA_HOST_STARTED;
6271 struct ata_port *ap = host->ports[i];
6273 if (ap->ops->port_stop)
6274 ap->ops->port_stop(ap);
6280 * ata_sas_host_init - Initialize a host struct
6281 * @host: host to initialize
6282 * @dev: device host is attached to
6283 * @flags: host flags
6287 * PCI/etc. bus probe sem.
6290 /* KILLME - the only user left is ipr */
6291 void ata_host_init(struct ata_host *host, struct device *dev,
6292 unsigned long flags, const struct ata_port_operations *ops)
6294 spin_lock_init(&host->lock);
6296 host->flags = flags;
6301 * ata_host_register - register initialized ATA host
6302 * @host: ATA host to register
6303 * @sht: template for SCSI host
6305 * Register initialized ATA host. @host is allocated using
6306 * ata_host_alloc() and fully initialized by LLD. This function
6307 * starts ports, registers @host with ATA and SCSI layers and
6308 * probe registered devices.
6311 * Inherited from calling layer (may sleep).
6314 * 0 on success, -errno otherwise.
6316 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6320 /* host must have been started */
6321 if (!(host->flags & ATA_HOST_STARTED)) {
6322 dev_printk(KERN_ERR, host->dev,
6323 "BUG: trying to register unstarted host\n");
6328 /* Blow away unused ports. This happens when LLD can't
6329 * determine the exact number of ports to allocate at
6332 for (i = host->n_ports; host->ports[i]; i++)
6333 kfree(host->ports[i]);
6335 /* give ports names and add SCSI hosts */
6336 for (i = 0; i < host->n_ports; i++)
6337 host->ports[i]->print_id = ata_print_id++;
6339 rc = ata_scsi_add_hosts(host, sht);
6343 /* associate with ACPI nodes */
6344 ata_acpi_associate(host);
6346 /* set cable, sata_spd_limit and report */
6347 for (i = 0; i < host->n_ports; i++) {
6348 struct ata_port *ap = host->ports[i];
6351 unsigned long xfer_mask;
6353 /* set SATA cable type if still unset */
6354 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6355 ap->cbl = ATA_CBL_SATA;
6357 /* init sata_spd_limit to the current value */
6358 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
6359 int spd = (scontrol >> 4) & 0xf;
6361 ap->hw_sata_spd_limit &= (1 << spd) - 1;
6363 ap->sata_spd_limit = ap->hw_sata_spd_limit;
6365 /* report the secondary IRQ for second channel legacy */
6366 irq_line = host->irq;
6367 if (i == 1 && host->irq2)
6368 irq_line = host->irq2;
6370 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6373 /* print per-port info to dmesg */
6374 if (!ata_port_is_dummy(ap))
6375 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
6376 "ctl 0x%p bmdma 0x%p irq %d\n",
6377 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6378 ata_mode_string(xfer_mask),
6379 ap->ioaddr.cmd_addr,
6380 ap->ioaddr.ctl_addr,
6381 ap->ioaddr.bmdma_addr,
6384 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
6387 /* perform each probe synchronously */
6388 DPRINTK("probe begin\n");
6389 for (i = 0; i < host->n_ports; i++) {
6390 struct ata_port *ap = host->ports[i];
6394 if (ap->ops->error_handler) {
6395 struct ata_eh_info *ehi = &ap->eh_info;
6396 unsigned long flags;
6400 /* kick EH for boot probing */
6401 spin_lock_irqsave(ap->lock, flags);
6403 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
6404 ehi->action |= ATA_EH_SOFTRESET;
6405 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
6407 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
6408 ap->pflags |= ATA_PFLAG_LOADING;
6409 ata_port_schedule_eh(ap);
6411 spin_unlock_irqrestore(ap->lock, flags);
6413 /* wait for EH to finish */
6414 ata_port_wait_eh(ap);
6416 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
6417 rc = ata_bus_probe(ap);
6418 DPRINTK("ata%u: bus probe end\n", ap->print_id);
6421 /* FIXME: do something useful here?
6422 * Current libata behavior will
6423 * tear down everything when
6424 * the module is removed
6425 * or the h/w is unplugged.
6431 /* probes are done, now scan each port's disk(s) */
6432 DPRINTK("host probe begin\n");
6433 for (i = 0; i < host->n_ports; i++) {
6434 struct ata_port *ap = host->ports[i];
6436 ata_scsi_scan_host(ap);
6443 * ata_host_activate - start host, request IRQ and register it
6444 * @host: target ATA host
6445 * @irq: IRQ to request
6446 * @irq_handler: irq_handler used when requesting IRQ
6447 * @irq_flags: irq_flags used when requesting IRQ
6448 * @sht: scsi_host_template to use when registering the host
6450 * After allocating an ATA host and initializing it, most libata
6451 * LLDs perform three steps to activate the host - start host,
6452 * request IRQ and register it. This helper takes necessasry
6453 * arguments and performs the three steps in one go.
6456 * Inherited from calling layer (may sleep).
6459 * 0 on success, -errno otherwise.
6461 int ata_host_activate(struct ata_host *host, int irq,
6462 irq_handler_t irq_handler, unsigned long irq_flags,
6463 struct scsi_host_template *sht)
6467 rc = ata_host_start(host);
6471 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6472 dev_driver_string(host->dev), host);
6476 /* Used to print device info at probe */
6479 rc = ata_host_register(host, sht);
6480 /* if failed, just free the IRQ and leave ports alone */
6482 devm_free_irq(host->dev, irq, host);
6488 * ata_port_detach - Detach ATA port in prepration of device removal
6489 * @ap: ATA port to be detached
6491 * Detach all ATA devices and the associated SCSI devices of @ap;
6492 * then, remove the associated SCSI host. @ap is guaranteed to
6493 * be quiescent on return from this function.
6496 * Kernel thread context (may sleep).
6498 void ata_port_detach(struct ata_port *ap)
6500 unsigned long flags;
6503 if (!ap->ops->error_handler)
6506 /* tell EH we're leaving & flush EH */
6507 spin_lock_irqsave(ap->lock, flags);
6508 ap->pflags |= ATA_PFLAG_UNLOADING;
6509 spin_unlock_irqrestore(ap->lock, flags);
6511 ata_port_wait_eh(ap);
6513 /* EH is now guaranteed to see UNLOADING, so no new device
6514 * will be attached. Disable all existing devices.
6516 spin_lock_irqsave(ap->lock, flags);
6518 for (i = 0; i < ATA_MAX_DEVICES; i++)
6519 ata_dev_disable(&ap->device[i]);
6521 spin_unlock_irqrestore(ap->lock, flags);
6523 /* Final freeze & EH. All in-flight commands are aborted. EH
6524 * will be skipped and retrials will be terminated with bad
6527 spin_lock_irqsave(ap->lock, flags);
6528 ata_port_freeze(ap); /* won't be thawed */
6529 spin_unlock_irqrestore(ap->lock, flags);
6531 ata_port_wait_eh(ap);
6532 cancel_rearming_delayed_work(&ap->hotplug_task);
6535 /* remove the associated SCSI host */
6536 scsi_remove_host(ap->scsi_host);
6540 * ata_host_detach - Detach all ports of an ATA host
6541 * @host: Host to detach
6543 * Detach all ports of @host.
6546 * Kernel thread context (may sleep).
6548 void ata_host_detach(struct ata_host *host)
6552 for (i = 0; i < host->n_ports; i++)
6553 ata_port_detach(host->ports[i]);
6557 * ata_std_ports - initialize ioaddr with standard port offsets.
6558 * @ioaddr: IO address structure to be initialized
6560 * Utility function which initializes data_addr, error_addr,
6561 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
6562 * device_addr, status_addr, and command_addr to standard offsets
6563 * relative to cmd_addr.
6565 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
6568 void ata_std_ports(struct ata_ioports *ioaddr)
6570 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
6571 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
6572 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
6573 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
6574 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
6575 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
6576 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
6577 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
6578 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
6579 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
6586 * ata_pci_remove_one - PCI layer callback for device removal
6587 * @pdev: PCI device that was removed
6589 * PCI layer indicates to libata via this hook that hot-unplug or
6590 * module unload event has occurred. Detach all ports. Resource
6591 * release is handled via devres.
6594 * Inherited from PCI layer (may sleep).
6596 void ata_pci_remove_one(struct pci_dev *pdev)
6598 struct device *dev = pci_dev_to_dev(pdev);
6599 struct ata_host *host = dev_get_drvdata(dev);
6601 ata_host_detach(host);
6604 /* move to PCI subsystem */
6605 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
6607 unsigned long tmp = 0;
6609 switch (bits->width) {
6612 pci_read_config_byte(pdev, bits->reg, &tmp8);
6618 pci_read_config_word(pdev, bits->reg, &tmp16);
6624 pci_read_config_dword(pdev, bits->reg, &tmp32);
6635 return (tmp == bits->val) ? 1 : 0;
6639 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6641 pci_save_state(pdev);
6642 pci_disable_device(pdev);
6644 if (mesg.event == PM_EVENT_SUSPEND)
6645 pci_set_power_state(pdev, PCI_D3hot);
6648 int ata_pci_device_do_resume(struct pci_dev *pdev)
6652 pci_set_power_state(pdev, PCI_D0);
6653 pci_restore_state(pdev);
6655 rc = pcim_enable_device(pdev);
6657 dev_printk(KERN_ERR, &pdev->dev,
6658 "failed to enable device after resume (%d)\n", rc);
6662 pci_set_master(pdev);
6666 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6668 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6671 rc = ata_host_suspend(host, mesg);
6675 ata_pci_device_do_suspend(pdev, mesg);
6680 int ata_pci_device_resume(struct pci_dev *pdev)
6682 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6685 rc = ata_pci_device_do_resume(pdev);
6687 ata_host_resume(host);
6690 #endif /* CONFIG_PM */
6692 #endif /* CONFIG_PCI */
6695 static int __init ata_init(void)
6697 ata_probe_timeout *= HZ;
6698 ata_wq = create_workqueue("ata");
6702 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6704 destroy_workqueue(ata_wq);
6708 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6712 static void __exit ata_exit(void)
6714 destroy_workqueue(ata_wq);
6715 destroy_workqueue(ata_aux_wq);
6718 subsys_initcall(ata_init);
6719 module_exit(ata_exit);
6721 static unsigned long ratelimit_time;
6722 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6724 int ata_ratelimit(void)
6727 unsigned long flags;
6729 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6731 if (time_after(jiffies, ratelimit_time)) {
6733 ratelimit_time = jiffies + (HZ/5);
6737 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6743 * ata_wait_register - wait until register value changes
6744 * @reg: IO-mapped register
6745 * @mask: Mask to apply to read register value
6746 * @val: Wait condition
6747 * @interval_msec: polling interval in milliseconds
6748 * @timeout_msec: timeout in milliseconds
6750 * Waiting for some bits of register to change is a common
6751 * operation for ATA controllers. This function reads 32bit LE
6752 * IO-mapped register @reg and tests for the following condition.
6754 * (*@reg & mask) != val
6756 * If the condition is met, it returns; otherwise, the process is
6757 * repeated after @interval_msec until timeout.
6760 * Kernel thread context (may sleep)
6763 * The final register value.
6765 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6766 unsigned long interval_msec,
6767 unsigned long timeout_msec)
6769 unsigned long timeout;
6772 tmp = ioread32(reg);
6774 /* Calculate timeout _after_ the first read to make sure
6775 * preceding writes reach the controller before starting to
6776 * eat away the timeout.
6778 timeout = jiffies + (timeout_msec * HZ) / 1000;
6780 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6781 msleep(interval_msec);
6782 tmp = ioread32(reg);
6791 static void ata_dummy_noret(struct ata_port *ap) { }
6792 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6793 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6795 static u8 ata_dummy_check_status(struct ata_port *ap)
6800 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6802 return AC_ERR_SYSTEM;
6805 const struct ata_port_operations ata_dummy_port_ops = {
6806 .port_disable = ata_port_disable,
6807 .check_status = ata_dummy_check_status,
6808 .check_altstatus = ata_dummy_check_status,
6809 .dev_select = ata_noop_dev_select,
6810 .qc_prep = ata_noop_qc_prep,
6811 .qc_issue = ata_dummy_qc_issue,
6812 .freeze = ata_dummy_noret,
6813 .thaw = ata_dummy_noret,
6814 .error_handler = ata_dummy_noret,
6815 .post_internal_cmd = ata_dummy_qc_noret,
6816 .irq_clear = ata_dummy_noret,
6817 .port_start = ata_dummy_ret0,
6818 .port_stop = ata_dummy_noret,
6821 const struct ata_port_info ata_dummy_port_info = {
6822 .port_ops = &ata_dummy_port_ops,
6826 * libata is essentially a library of internal helper functions for
6827 * low-level ATA host controller drivers. As such, the API/ABI is
6828 * likely to change as new drivers are added and updated.
6829 * Do not depend on ABI/API stability.
6832 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6833 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6834 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6835 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6836 EXPORT_SYMBOL_GPL(ata_dummy_port_info);
6837 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6838 EXPORT_SYMBOL_GPL(ata_std_ports);
6839 EXPORT_SYMBOL_GPL(ata_host_init);
6840 EXPORT_SYMBOL_GPL(ata_host_alloc);
6841 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
6842 EXPORT_SYMBOL_GPL(ata_host_start);
6843 EXPORT_SYMBOL_GPL(ata_host_register);
6844 EXPORT_SYMBOL_GPL(ata_host_activate);
6845 EXPORT_SYMBOL_GPL(ata_host_detach);
6846 EXPORT_SYMBOL_GPL(ata_sg_init);
6847 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6848 EXPORT_SYMBOL_GPL(ata_hsm_move);
6849 EXPORT_SYMBOL_GPL(ata_qc_complete);
6850 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6851 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6852 EXPORT_SYMBOL_GPL(ata_tf_load);
6853 EXPORT_SYMBOL_GPL(ata_tf_read);
6854 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6855 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6856 EXPORT_SYMBOL_GPL(sata_print_link_status);
6857 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6858 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6859 EXPORT_SYMBOL_GPL(ata_check_status);
6860 EXPORT_SYMBOL_GPL(ata_altstatus);
6861 EXPORT_SYMBOL_GPL(ata_exec_command);
6862 EXPORT_SYMBOL_GPL(ata_port_start);
6863 EXPORT_SYMBOL_GPL(ata_sff_port_start);
6864 EXPORT_SYMBOL_GPL(ata_interrupt);
6865 EXPORT_SYMBOL_GPL(ata_do_set_mode);
6866 EXPORT_SYMBOL_GPL(ata_data_xfer);
6867 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6868 EXPORT_SYMBOL_GPL(ata_qc_prep);
6869 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
6870 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6871 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6872 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6873 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6874 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6875 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6876 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6877 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6878 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6879 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6880 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6881 EXPORT_SYMBOL_GPL(ata_port_probe);
6882 EXPORT_SYMBOL_GPL(ata_dev_disable);
6883 EXPORT_SYMBOL_GPL(sata_set_spd);
6884 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6885 EXPORT_SYMBOL_GPL(sata_phy_resume);
6886 EXPORT_SYMBOL_GPL(sata_phy_reset);
6887 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6888 EXPORT_SYMBOL_GPL(ata_bus_reset);
6889 EXPORT_SYMBOL_GPL(ata_std_prereset);
6890 EXPORT_SYMBOL_GPL(ata_std_softreset);
6891 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6892 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6893 EXPORT_SYMBOL_GPL(ata_std_postreset);
6894 EXPORT_SYMBOL_GPL(ata_dev_classify);
6895 EXPORT_SYMBOL_GPL(ata_dev_pair);
6896 EXPORT_SYMBOL_GPL(ata_port_disable);
6897 EXPORT_SYMBOL_GPL(ata_ratelimit);
6898 EXPORT_SYMBOL_GPL(ata_wait_register);
6899 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6900 EXPORT_SYMBOL_GPL(ata_wait_ready);
6901 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6902 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6903 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6904 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6905 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6906 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6907 EXPORT_SYMBOL_GPL(ata_host_intr);
6908 EXPORT_SYMBOL_GPL(sata_scr_valid);
6909 EXPORT_SYMBOL_GPL(sata_scr_read);
6910 EXPORT_SYMBOL_GPL(sata_scr_write);
6911 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6912 EXPORT_SYMBOL_GPL(ata_port_online);
6913 EXPORT_SYMBOL_GPL(ata_port_offline);
6915 EXPORT_SYMBOL_GPL(ata_host_suspend);
6916 EXPORT_SYMBOL_GPL(ata_host_resume);
6917 #endif /* CONFIG_PM */
6918 EXPORT_SYMBOL_GPL(ata_id_string);
6919 EXPORT_SYMBOL_GPL(ata_id_c_string);
6920 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
6921 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6922 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6924 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6925 EXPORT_SYMBOL_GPL(ata_timing_compute);
6926 EXPORT_SYMBOL_GPL(ata_timing_merge);
6929 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6930 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host);
6931 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma);
6932 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host);
6933 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6934 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6936 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6937 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6938 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6939 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6940 #endif /* CONFIG_PM */
6941 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6942 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6943 #endif /* CONFIG_PCI */
6945 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6946 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6947 EXPORT_SYMBOL_GPL(ata_port_abort);
6948 EXPORT_SYMBOL_GPL(ata_port_freeze);
6949 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6950 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6951 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6952 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6953 EXPORT_SYMBOL_GPL(ata_do_eh);
6954 EXPORT_SYMBOL_GPL(ata_irq_on);
6955 EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6956 EXPORT_SYMBOL_GPL(ata_irq_ack);
6957 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);
6958 EXPORT_SYMBOL_GPL(ata_dev_try_classify);
6960 EXPORT_SYMBOL_GPL(ata_cable_40wire);
6961 EXPORT_SYMBOL_GPL(ata_cable_80wire);
6962 EXPORT_SYMBOL_GPL(ata_cable_unknown);
6963 EXPORT_SYMBOL_GPL(ata_cable_sata);