2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include <scsi/scsi_cmnd.h>
55 #include <scsi/scsi_host.h>
56 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
63 /* debounce timing parameters in msecs { interval, duration, timeout } */
64 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
65 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
66 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
68 static unsigned int ata_dev_init_params(struct ata_device *dev,
69 u16 heads, u16 sectors);
70 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
71 static unsigned int ata_dev_set_feature(struct ata_device *dev,
72 u8 enable, u8 feature);
73 static void ata_dev_xfermask(struct ata_device *dev);
74 static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
76 unsigned int ata_print_id = 1;
77 static struct workqueue_struct *ata_wq;
79 struct workqueue_struct *ata_aux_wq;
81 int atapi_enabled = 1;
82 module_param(atapi_enabled, int, 0444);
83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
86 module_param(atapi_dmadir, int, 0444);
87 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 int atapi_passthru16 = 1;
90 module_param(atapi_passthru16, int, 0444);
91 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)");
94 module_param_named(fua, libata_fua, int, 0444);
95 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
97 static int ata_ignore_hpa;
98 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
99 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
101 static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
102 module_param_named(dma, libata_dma_mask, int, 0444);
103 MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
105 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
106 module_param(ata_probe_timeout, int, 0444);
107 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
109 int libata_noacpi = 0;
110 module_param_named(noacpi, libata_noacpi, int, 0444);
111 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set");
113 MODULE_AUTHOR("Jeff Garzik");
114 MODULE_DESCRIPTION("Library module for ATA devices");
115 MODULE_LICENSE("GPL");
116 MODULE_VERSION(DRV_VERSION);
120 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
121 * @tf: Taskfile to convert
122 * @pmp: Port multiplier port
123 * @is_cmd: This FIS is for command
124 * @fis: Buffer into which data will output
126 * Converts a standard ATA taskfile to a Serial ATA
127 * FIS structure (Register - Host to Device).
130 * Inherited from caller.
132 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
134 fis[0] = 0x27; /* Register - Host to Device FIS */
135 fis[1] = pmp & 0xf; /* Port multiplier number*/
137 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
139 fis[2] = tf->command;
140 fis[3] = tf->feature;
147 fis[8] = tf->hob_lbal;
148 fis[9] = tf->hob_lbam;
149 fis[10] = tf->hob_lbah;
150 fis[11] = tf->hob_feature;
153 fis[13] = tf->hob_nsect;
164 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
165 * @fis: Buffer from which data will be input
166 * @tf: Taskfile to output
168 * Converts a serial ATA FIS structure to a standard ATA taskfile.
171 * Inherited from caller.
174 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
176 tf->command = fis[2]; /* status */
177 tf->feature = fis[3]; /* error */
184 tf->hob_lbal = fis[8];
185 tf->hob_lbam = fis[9];
186 tf->hob_lbah = fis[10];
189 tf->hob_nsect = fis[13];
192 static const u8 ata_rw_cmds[] = {
196 ATA_CMD_READ_MULTI_EXT,
197 ATA_CMD_WRITE_MULTI_EXT,
201 ATA_CMD_WRITE_MULTI_FUA_EXT,
205 ATA_CMD_PIO_READ_EXT,
206 ATA_CMD_PIO_WRITE_EXT,
219 ATA_CMD_WRITE_FUA_EXT
223 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
224 * @tf: command to examine and configure
225 * @dev: device tf belongs to
227 * Examine the device configuration and tf->flags to calculate
228 * the proper read/write commands and protocol to use.
233 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
237 int index, fua, lba48, write;
239 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
240 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
241 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
243 if (dev->flags & ATA_DFLAG_PIO) {
244 tf->protocol = ATA_PROT_PIO;
245 index = dev->multi_count ? 0 : 8;
246 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
247 /* Unable to use DMA due to host limitation */
248 tf->protocol = ATA_PROT_PIO;
249 index = dev->multi_count ? 0 : 8;
251 tf->protocol = ATA_PROT_DMA;
255 cmd = ata_rw_cmds[index + fua + lba48 + write];
264 * ata_tf_read_block - Read block address from ATA taskfile
265 * @tf: ATA taskfile of interest
266 * @dev: ATA device @tf belongs to
271 * Read block address from @tf. This function can handle all
272 * three address formats - LBA, LBA48 and CHS. tf->protocol and
273 * flags select the address format to use.
276 * Block address read from @tf.
278 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
282 if (tf->flags & ATA_TFLAG_LBA) {
283 if (tf->flags & ATA_TFLAG_LBA48) {
284 block |= (u64)tf->hob_lbah << 40;
285 block |= (u64)tf->hob_lbam << 32;
286 block |= tf->hob_lbal << 24;
288 block |= (tf->device & 0xf) << 24;
290 block |= tf->lbah << 16;
291 block |= tf->lbam << 8;
296 cyl = tf->lbam | (tf->lbah << 8);
297 head = tf->device & 0xf;
300 block = (cyl * dev->heads + head) * dev->sectors + sect;
307 * ata_build_rw_tf - Build ATA taskfile for given read/write request
308 * @tf: Target ATA taskfile
309 * @dev: ATA device @tf belongs to
310 * @block: Block address
311 * @n_block: Number of blocks
312 * @tf_flags: RW/FUA etc...
318 * Build ATA taskfile @tf for read/write request described by
319 * @block, @n_block, @tf_flags and @tag on @dev.
323 * 0 on success, -ERANGE if the request is too large for @dev,
324 * -EINVAL if the request is invalid.
326 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
327 u64 block, u32 n_block, unsigned int tf_flags,
330 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
331 tf->flags |= tf_flags;
333 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
335 if (!lba_48_ok(block, n_block))
338 tf->protocol = ATA_PROT_NCQ;
339 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
341 if (tf->flags & ATA_TFLAG_WRITE)
342 tf->command = ATA_CMD_FPDMA_WRITE;
344 tf->command = ATA_CMD_FPDMA_READ;
346 tf->nsect = tag << 3;
347 tf->hob_feature = (n_block >> 8) & 0xff;
348 tf->feature = n_block & 0xff;
350 tf->hob_lbah = (block >> 40) & 0xff;
351 tf->hob_lbam = (block >> 32) & 0xff;
352 tf->hob_lbal = (block >> 24) & 0xff;
353 tf->lbah = (block >> 16) & 0xff;
354 tf->lbam = (block >> 8) & 0xff;
355 tf->lbal = block & 0xff;
358 if (tf->flags & ATA_TFLAG_FUA)
359 tf->device |= 1 << 7;
360 } else if (dev->flags & ATA_DFLAG_LBA) {
361 tf->flags |= ATA_TFLAG_LBA;
363 if (lba_28_ok(block, n_block)) {
365 tf->device |= (block >> 24) & 0xf;
366 } else if (lba_48_ok(block, n_block)) {
367 if (!(dev->flags & ATA_DFLAG_LBA48))
371 tf->flags |= ATA_TFLAG_LBA48;
373 tf->hob_nsect = (n_block >> 8) & 0xff;
375 tf->hob_lbah = (block >> 40) & 0xff;
376 tf->hob_lbam = (block >> 32) & 0xff;
377 tf->hob_lbal = (block >> 24) & 0xff;
379 /* request too large even for LBA48 */
382 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
385 tf->nsect = n_block & 0xff;
387 tf->lbah = (block >> 16) & 0xff;
388 tf->lbam = (block >> 8) & 0xff;
389 tf->lbal = block & 0xff;
391 tf->device |= ATA_LBA;
394 u32 sect, head, cyl, track;
396 /* The request -may- be too large for CHS addressing. */
397 if (!lba_28_ok(block, n_block))
400 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
403 /* Convert LBA to CHS */
404 track = (u32)block / dev->sectors;
405 cyl = track / dev->heads;
406 head = track % dev->heads;
407 sect = (u32)block % dev->sectors + 1;
409 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
410 (u32)block, track, cyl, head, sect);
412 /* Check whether the converted CHS can fit.
416 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
419 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
430 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
431 * @pio_mask: pio_mask
432 * @mwdma_mask: mwdma_mask
433 * @udma_mask: udma_mask
435 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
436 * unsigned int xfer_mask.
444 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
445 unsigned int mwdma_mask,
446 unsigned int udma_mask)
448 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
449 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
450 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
454 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
455 * @xfer_mask: xfer_mask to unpack
456 * @pio_mask: resulting pio_mask
457 * @mwdma_mask: resulting mwdma_mask
458 * @udma_mask: resulting udma_mask
460 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
461 * Any NULL distination masks will be ignored.
463 static void ata_unpack_xfermask(unsigned int xfer_mask,
464 unsigned int *pio_mask,
465 unsigned int *mwdma_mask,
466 unsigned int *udma_mask)
469 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
471 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
473 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
476 static const struct ata_xfer_ent {
480 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
481 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
482 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
487 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
488 * @xfer_mask: xfer_mask of interest
490 * Return matching XFER_* value for @xfer_mask. Only the highest
491 * bit of @xfer_mask is considered.
497 * Matching XFER_* value, 0 if no match found.
499 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
501 int highbit = fls(xfer_mask) - 1;
502 const struct ata_xfer_ent *ent;
504 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
505 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
506 return ent->base + highbit - ent->shift;
511 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
512 * @xfer_mode: XFER_* of interest
514 * Return matching xfer_mask for @xfer_mode.
520 * Matching xfer_mask, 0 if no match found.
522 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
524 const struct ata_xfer_ent *ent;
526 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
527 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
528 return 1 << (ent->shift + xfer_mode - ent->base);
533 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
534 * @xfer_mode: XFER_* of interest
536 * Return matching xfer_shift for @xfer_mode.
542 * Matching xfer_shift, -1 if no match found.
544 static int ata_xfer_mode2shift(unsigned int xfer_mode)
546 const struct ata_xfer_ent *ent;
548 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
549 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
555 * ata_mode_string - convert xfer_mask to string
556 * @xfer_mask: mask of bits supported; only highest bit counts.
558 * Determine string which represents the highest speed
559 * (highest bit in @modemask).
565 * Constant C string representing highest speed listed in
566 * @mode_mask, or the constant C string "<n/a>".
568 static const char *ata_mode_string(unsigned int xfer_mask)
570 static const char * const xfer_mode_str[] = {
594 highbit = fls(xfer_mask) - 1;
595 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
596 return xfer_mode_str[highbit];
600 static const char *sata_spd_string(unsigned int spd)
602 static const char * const spd_str[] = {
607 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
609 return spd_str[spd - 1];
612 void ata_dev_disable(struct ata_device *dev)
614 if (ata_dev_enabled(dev)) {
615 if (ata_msg_drv(dev->link->ap))
616 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
617 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
623 static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy)
625 struct ata_link *link = dev->link;
626 struct ata_port *ap = link->ap;
628 unsigned int err_mask;
632 * disallow DIPM for drivers which haven't set
633 * ATA_FLAG_IPM. This is because when DIPM is enabled,
634 * phy ready will be set in the interrupt status on
635 * state changes, which will cause some drivers to
636 * think there are errors - additionally drivers will
637 * need to disable hot plug.
639 if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) {
640 ap->pm_policy = NOT_AVAILABLE;
645 * For DIPM, we will only enable it for the
648 * Why? Because Disks are too stupid to know that
649 * If the host rejects a request to go to SLUMBER
650 * they should retry at PARTIAL, and instead it
651 * just would give up. So, for medium_power to
652 * work at all, we need to only allow HIPM.
654 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
660 /* no restrictions on IPM transitions */
661 scontrol &= ~(0x3 << 8);
662 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
667 if (dev->flags & ATA_DFLAG_DIPM)
668 err_mask = ata_dev_set_feature(dev,
669 SETFEATURES_SATA_ENABLE, SATA_DIPM);
672 /* allow IPM to PARTIAL */
673 scontrol &= ~(0x1 << 8);
674 scontrol |= (0x2 << 8);
675 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
680 * we don't have to disable DIPM since IPM flags
681 * disallow transitions to SLUMBER, which effectively
682 * disable DIPM if it does not support PARTIAL
686 case MAX_PERFORMANCE:
687 /* disable all IPM transitions */
688 scontrol |= (0x3 << 8);
689 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
694 * we don't have to disable DIPM since IPM flags
695 * disallow all transitions which effectively
696 * disable DIPM anyway.
701 /* FIXME: handle SET FEATURES failure */
708 * ata_dev_enable_pm - enable SATA interface power management
709 * @dev: device to enable power management
710 * @policy: the link power management policy
712 * Enable SATA Interface power management. This will enable
713 * Device Interface Power Management (DIPM) for min_power
714 * policy, and then call driver specific callbacks for
715 * enabling Host Initiated Power management.
718 * Returns: -EINVAL if IPM is not supported, 0 otherwise.
720 void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy)
723 struct ata_port *ap = dev->link->ap;
725 /* set HIPM first, then DIPM */
726 if (ap->ops->enable_pm)
727 rc = ap->ops->enable_pm(ap, policy);
730 rc = ata_dev_set_dipm(dev, policy);
734 ap->pm_policy = MAX_PERFORMANCE;
736 ap->pm_policy = policy;
737 return /* rc */; /* hopefully we can use 'rc' eventually */
742 * ata_dev_disable_pm - disable SATA interface power management
743 * @dev: device to disable power management
745 * Disable SATA Interface power management. This will disable
746 * Device Interface Power Management (DIPM) without changing
747 * policy, call driver specific callbacks for disabling Host
748 * Initiated Power management.
753 static void ata_dev_disable_pm(struct ata_device *dev)
755 struct ata_port *ap = dev->link->ap;
757 ata_dev_set_dipm(dev, MAX_PERFORMANCE);
758 if (ap->ops->disable_pm)
759 ap->ops->disable_pm(ap);
761 #endif /* CONFIG_PM */
763 void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy)
765 ap->pm_policy = policy;
766 ap->link.eh_info.action |= ATA_EHI_LPM;
767 ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY;
768 ata_port_schedule_eh(ap);
772 static void ata_lpm_enable(struct ata_host *host)
774 struct ata_link *link;
776 struct ata_device *dev;
779 for (i = 0; i < host->n_ports; i++) {
781 ata_port_for_each_link(link, ap) {
782 ata_link_for_each_dev(dev, link)
783 ata_dev_disable_pm(dev);
788 static void ata_lpm_disable(struct ata_host *host)
792 for (i = 0; i < host->n_ports; i++) {
793 struct ata_port *ap = host->ports[i];
794 ata_lpm_schedule(ap, ap->pm_policy);
797 #endif /* CONFIG_PM */
801 * ata_devchk - PATA device presence detection
802 * @ap: ATA channel to examine
803 * @device: Device to examine (starting at zero)
805 * This technique was originally described in
806 * Hale Landis's ATADRVR (www.ata-atapi.com), and
807 * later found its way into the ATA/ATAPI spec.
809 * Write a pattern to the ATA shadow registers,
810 * and if a device is present, it will respond by
811 * correctly storing and echoing back the
812 * ATA shadow register contents.
818 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
820 struct ata_ioports *ioaddr = &ap->ioaddr;
823 ap->ops->dev_select(ap, device);
825 iowrite8(0x55, ioaddr->nsect_addr);
826 iowrite8(0xaa, ioaddr->lbal_addr);
828 iowrite8(0xaa, ioaddr->nsect_addr);
829 iowrite8(0x55, ioaddr->lbal_addr);
831 iowrite8(0x55, ioaddr->nsect_addr);
832 iowrite8(0xaa, ioaddr->lbal_addr);
834 nsect = ioread8(ioaddr->nsect_addr);
835 lbal = ioread8(ioaddr->lbal_addr);
837 if ((nsect == 0x55) && (lbal == 0xaa))
838 return 1; /* we found a device */
840 return 0; /* nothing found */
844 * ata_dev_classify - determine device type based on ATA-spec signature
845 * @tf: ATA taskfile register set for device to be identified
847 * Determine from taskfile register contents whether a device is
848 * ATA or ATAPI, as per "Signature and persistence" section
849 * of ATA/PI spec (volume 1, sect 5.14).
855 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
856 * %ATA_DEV_UNKNOWN the event of failure.
858 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
860 /* Apple's open source Darwin code hints that some devices only
861 * put a proper signature into the LBA mid/high registers,
862 * So, we only check those. It's sufficient for uniqueness.
864 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
865 * signatures for ATA and ATAPI devices attached on SerialATA,
866 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
867 * spec has never mentioned about using different signatures
868 * for ATA/ATAPI devices. Then, Serial ATA II: Port
869 * Multiplier specification began to use 0x69/0x96 to identify
870 * port multpliers and 0x3c/0xc3 to identify SEMB device.
871 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
872 * 0x69/0x96 shortly and described them as reserved for
875 * We follow the current spec and consider that 0x69/0x96
876 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
878 if ((tf->lbam == 0) && (tf->lbah == 0)) {
879 DPRINTK("found ATA device by sig\n");
883 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
884 DPRINTK("found ATAPI device by sig\n");
885 return ATA_DEV_ATAPI;
888 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
889 DPRINTK("found PMP device by sig\n");
893 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
894 printk(KERN_INFO "ata: SEMB device ignored\n");
895 return ATA_DEV_SEMB_UNSUP; /* not yet */
898 DPRINTK("unknown device\n");
899 return ATA_DEV_UNKNOWN;
903 * ata_dev_try_classify - Parse returned ATA device signature
904 * @dev: ATA device to classify (starting at zero)
905 * @present: device seems present
906 * @r_err: Value of error register on completion
908 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
909 * an ATA/ATAPI-defined set of values is placed in the ATA
910 * shadow registers, indicating the results of device detection
913 * Select the ATA device, and read the values from the ATA shadow
914 * registers. Then parse according to the Error register value,
915 * and the spec-defined values examined by ata_dev_classify().
921 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
923 unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
926 struct ata_port *ap = dev->link->ap;
927 struct ata_taskfile tf;
931 ap->ops->dev_select(ap, dev->devno);
933 memset(&tf, 0, sizeof(tf));
935 ap->ops->tf_read(ap, &tf);
940 /* see if device passed diags: if master then continue and warn later */
941 if (err == 0 && dev->devno == 0)
942 /* diagnostic fail : do nothing _YET_ */
943 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
946 else if ((dev->devno == 0) && (err == 0x81))
951 /* determine if device is ATA or ATAPI */
952 class = ata_dev_classify(&tf);
954 if (class == ATA_DEV_UNKNOWN) {
955 /* If the device failed diagnostic, it's likely to
956 * have reported incorrect device signature too.
957 * Assume ATA device if the device seems present but
958 * device signature is invalid with diagnostic
961 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
964 class = ATA_DEV_NONE;
965 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
966 class = ATA_DEV_NONE;
972 * ata_id_string - Convert IDENTIFY DEVICE page into string
973 * @id: IDENTIFY DEVICE results we will examine
974 * @s: string into which data is output
975 * @ofs: offset into identify device page
976 * @len: length of string to return. must be an even number.
978 * The strings in the IDENTIFY DEVICE page are broken up into
979 * 16-bit chunks. Run through the string, and output each
980 * 8-bit chunk linearly, regardless of platform.
986 void ata_id_string(const u16 *id, unsigned char *s,
987 unsigned int ofs, unsigned int len)
1006 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
1007 * @id: IDENTIFY DEVICE results we will examine
1008 * @s: string into which data is output
1009 * @ofs: offset into identify device page
1010 * @len: length of string to return. must be an odd number.
1012 * This function is identical to ata_id_string except that it
1013 * trims trailing spaces and terminates the resulting string with
1014 * null. @len must be actual maximum length (even number) + 1.
1019 void ata_id_c_string(const u16 *id, unsigned char *s,
1020 unsigned int ofs, unsigned int len)
1024 WARN_ON(!(len & 1));
1026 ata_id_string(id, s, ofs, len - 1);
1028 p = s + strnlen(s, len - 1);
1029 while (p > s && p[-1] == ' ')
1034 static u64 ata_id_n_sectors(const u16 *id)
1036 if (ata_id_has_lba(id)) {
1037 if (ata_id_has_lba48(id))
1038 return ata_id_u64(id, 100);
1040 return ata_id_u32(id, 60);
1042 if (ata_id_current_chs_valid(id))
1043 return ata_id_u32(id, 57);
1045 return id[1] * id[3] * id[6];
1049 static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
1053 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1054 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
1055 sectors |= (tf->hob_lbal & 0xff) << 24;
1056 sectors |= (tf->lbah & 0xff) << 16;
1057 sectors |= (tf->lbam & 0xff) << 8;
1058 sectors |= (tf->lbal & 0xff);
1063 static u64 ata_tf_to_lba(struct ata_taskfile *tf)
1067 sectors |= (tf->device & 0x0f) << 24;
1068 sectors |= (tf->lbah & 0xff) << 16;
1069 sectors |= (tf->lbam & 0xff) << 8;
1070 sectors |= (tf->lbal & 0xff);
1076 * ata_read_native_max_address - Read native max address
1077 * @dev: target device
1078 * @max_sectors: out parameter for the result native max address
1080 * Perform an LBA48 or LBA28 native size query upon the device in
1084 * 0 on success, -EACCES if command is aborted by the drive.
1085 * -EIO on other errors.
1087 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1089 unsigned int err_mask;
1090 struct ata_taskfile tf;
1091 int lba48 = ata_id_has_lba48(dev->id);
1093 ata_tf_init(dev, &tf);
1095 /* always clear all address registers */
1096 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1099 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1100 tf.flags |= ATA_TFLAG_LBA48;
1102 tf.command = ATA_CMD_READ_NATIVE_MAX;
1104 tf.protocol |= ATA_PROT_NODATA;
1105 tf.device |= ATA_LBA;
1107 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1109 ata_dev_printk(dev, KERN_WARNING, "failed to read native "
1110 "max address (err_mask=0x%x)\n", err_mask);
1111 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1117 *max_sectors = ata_tf_to_lba48(&tf);
1119 *max_sectors = ata_tf_to_lba(&tf);
1120 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
1126 * ata_set_max_sectors - Set max sectors
1127 * @dev: target device
1128 * @new_sectors: new max sectors value to set for the device
1130 * Set max sectors of @dev to @new_sectors.
1133 * 0 on success, -EACCES if command is aborted or denied (due to
1134 * previous non-volatile SET_MAX) by the drive. -EIO on other
1137 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1139 unsigned int err_mask;
1140 struct ata_taskfile tf;
1141 int lba48 = ata_id_has_lba48(dev->id);
1145 ata_tf_init(dev, &tf);
1147 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1150 tf.command = ATA_CMD_SET_MAX_EXT;
1151 tf.flags |= ATA_TFLAG_LBA48;
1153 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1154 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1155 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1157 tf.command = ATA_CMD_SET_MAX;
1159 tf.device |= (new_sectors >> 24) & 0xf;
1162 tf.protocol |= ATA_PROT_NODATA;
1163 tf.device |= ATA_LBA;
1165 tf.lbal = (new_sectors >> 0) & 0xff;
1166 tf.lbam = (new_sectors >> 8) & 0xff;
1167 tf.lbah = (new_sectors >> 16) & 0xff;
1169 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1171 ata_dev_printk(dev, KERN_WARNING, "failed to set "
1172 "max address (err_mask=0x%x)\n", err_mask);
1173 if (err_mask == AC_ERR_DEV &&
1174 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1183 * ata_hpa_resize - Resize a device with an HPA set
1184 * @dev: Device to resize
1186 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1187 * it if required to the full size of the media. The caller must check
1188 * the drive has the HPA feature set enabled.
1191 * 0 on success, -errno on failure.
1193 static int ata_hpa_resize(struct ata_device *dev)
1195 struct ata_eh_context *ehc = &dev->link->eh_context;
1196 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1197 u64 sectors = ata_id_n_sectors(dev->id);
1201 /* do we need to do it? */
1202 if (dev->class != ATA_DEV_ATA ||
1203 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1204 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
1207 /* read native max address */
1208 rc = ata_read_native_max_address(dev, &native_sectors);
1210 /* If HPA isn't going to be unlocked, skip HPA
1211 * resizing from the next try.
1213 if (!ata_ignore_hpa) {
1214 ata_dev_printk(dev, KERN_WARNING, "HPA support seems "
1215 "broken, will skip HPA handling\n");
1216 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1218 /* we can continue if device aborted the command */
1226 /* nothing to do? */
1227 if (native_sectors <= sectors || !ata_ignore_hpa) {
1228 if (!print_info || native_sectors == sectors)
1231 if (native_sectors > sectors)
1232 ata_dev_printk(dev, KERN_INFO,
1233 "HPA detected: current %llu, native %llu\n",
1234 (unsigned long long)sectors,
1235 (unsigned long long)native_sectors);
1236 else if (native_sectors < sectors)
1237 ata_dev_printk(dev, KERN_WARNING,
1238 "native sectors (%llu) is smaller than "
1240 (unsigned long long)native_sectors,
1241 (unsigned long long)sectors);
1245 /* let's unlock HPA */
1246 rc = ata_set_max_sectors(dev, native_sectors);
1247 if (rc == -EACCES) {
1248 /* if device aborted the command, skip HPA resizing */
1249 ata_dev_printk(dev, KERN_WARNING, "device aborted resize "
1250 "(%llu -> %llu), skipping HPA handling\n",
1251 (unsigned long long)sectors,
1252 (unsigned long long)native_sectors);
1253 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1258 /* re-read IDENTIFY data */
1259 rc = ata_dev_reread_id(dev, 0);
1261 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY "
1262 "data after HPA resizing\n");
1267 u64 new_sectors = ata_id_n_sectors(dev->id);
1268 ata_dev_printk(dev, KERN_INFO,
1269 "HPA unlocked: %llu -> %llu, native %llu\n",
1270 (unsigned long long)sectors,
1271 (unsigned long long)new_sectors,
1272 (unsigned long long)native_sectors);
1279 * ata_id_to_dma_mode - Identify DMA mode from id block
1280 * @dev: device to identify
1281 * @unknown: mode to assume if we cannot tell
1283 * Set up the timing values for the device based upon the identify
1284 * reported values for the DMA mode. This function is used by drivers
1285 * which rely upon firmware configured modes, but wish to report the
1286 * mode correctly when possible.
1288 * In addition we emit similarly formatted messages to the default
1289 * ata_dev_set_mode handler, in order to provide consistency of
1293 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
1298 /* Pack the DMA modes */
1299 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
1300 if (dev->id[53] & 0x04)
1301 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
1303 /* Select the mode in use */
1304 mode = ata_xfer_mask2mode(mask);
1307 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
1308 ata_mode_string(mask));
1310 /* SWDMA perhaps ? */
1312 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
1315 /* Configure the device reporting */
1316 dev->xfer_mode = mode;
1317 dev->xfer_shift = ata_xfer_mode2shift(mode);
1321 * ata_noop_dev_select - Select device 0/1 on ATA bus
1322 * @ap: ATA channel to manipulate
1323 * @device: ATA device (numbered from zero) to select
1325 * This function performs no actual function.
1327 * May be used as the dev_select() entry in ata_port_operations.
1332 void ata_noop_dev_select(struct ata_port *ap, unsigned int device)
1338 * ata_std_dev_select - Select device 0/1 on ATA bus
1339 * @ap: ATA channel to manipulate
1340 * @device: ATA device (numbered from zero) to select
1342 * Use the method defined in the ATA specification to
1343 * make either device 0, or device 1, active on the
1344 * ATA channel. Works with both PIO and MMIO.
1346 * May be used as the dev_select() entry in ata_port_operations.
1352 void ata_std_dev_select(struct ata_port *ap, unsigned int device)
1357 tmp = ATA_DEVICE_OBS;
1359 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1361 iowrite8(tmp, ap->ioaddr.device_addr);
1362 ata_pause(ap); /* needed; also flushes, for mmio */
1366 * ata_dev_select - Select device 0/1 on ATA bus
1367 * @ap: ATA channel to manipulate
1368 * @device: ATA device (numbered from zero) to select
1369 * @wait: non-zero to wait for Status register BSY bit to clear
1370 * @can_sleep: non-zero if context allows sleeping
1372 * Use the method defined in the ATA specification to
1373 * make either device 0, or device 1, active on the
1376 * This is a high-level version of ata_std_dev_select(),
1377 * which additionally provides the services of inserting
1378 * the proper pauses and status polling, where needed.
1384 void ata_dev_select(struct ata_port *ap, unsigned int device,
1385 unsigned int wait, unsigned int can_sleep)
1387 if (ata_msg_probe(ap))
1388 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
1389 "device %u, wait %u\n", device, wait);
1394 ap->ops->dev_select(ap, device);
1397 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
1404 * ata_dump_id - IDENTIFY DEVICE info debugging output
1405 * @id: IDENTIFY DEVICE page to dump
1407 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1414 static inline void ata_dump_id(const u16 *id)
1416 DPRINTK("49==0x%04x "
1426 DPRINTK("80==0x%04x "
1436 DPRINTK("88==0x%04x "
1443 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1444 * @id: IDENTIFY data to compute xfer mask from
1446 * Compute the xfermask for this device. This is not as trivial
1447 * as it seems if we must consider early devices correctly.
1449 * FIXME: pre IDE drive timing (do we care ?).
1457 static unsigned int ata_id_xfermask(const u16 *id)
1459 unsigned int pio_mask, mwdma_mask, udma_mask;
1461 /* Usual case. Word 53 indicates word 64 is valid */
1462 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1463 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1467 /* If word 64 isn't valid then Word 51 high byte holds
1468 * the PIO timing number for the maximum. Turn it into
1471 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1472 if (mode < 5) /* Valid PIO range */
1473 pio_mask = (2 << mode) - 1;
1477 /* But wait.. there's more. Design your standards by
1478 * committee and you too can get a free iordy field to
1479 * process. However its the speeds not the modes that
1480 * are supported... Note drivers using the timing API
1481 * will get this right anyway
1485 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1487 if (ata_id_is_cfa(id)) {
1489 * Process compact flash extended modes
1491 int pio = id[163] & 0x7;
1492 int dma = (id[163] >> 3) & 7;
1495 pio_mask |= (1 << 5);
1497 pio_mask |= (1 << 6);
1499 mwdma_mask |= (1 << 3);
1501 mwdma_mask |= (1 << 4);
1505 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1506 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1508 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1512 * ata_port_queue_task - Queue port_task
1513 * @ap: The ata_port to queue port_task for
1514 * @fn: workqueue function to be scheduled
1515 * @data: data for @fn to use
1516 * @delay: delay time for workqueue function
1518 * Schedule @fn(@data) for execution after @delay jiffies using
1519 * port_task. There is one port_task per port and it's the
1520 * user(low level driver)'s responsibility to make sure that only
1521 * one task is active at any given time.
1523 * libata core layer takes care of synchronization between
1524 * port_task and EH. ata_port_queue_task() may be ignored for EH
1528 * Inherited from caller.
1530 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1531 unsigned long delay)
1533 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1534 ap->port_task_data = data;
1536 /* may fail if ata_port_flush_task() in progress */
1537 queue_delayed_work(ata_wq, &ap->port_task, delay);
1541 * ata_port_flush_task - Flush port_task
1542 * @ap: The ata_port to flush port_task for
1544 * After this function completes, port_task is guranteed not to
1545 * be running or scheduled.
1548 * Kernel thread context (may sleep)
1550 void ata_port_flush_task(struct ata_port *ap)
1554 cancel_rearming_delayed_work(&ap->port_task);
1556 if (ata_msg_ctl(ap))
1557 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1560 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1562 struct completion *waiting = qc->private_data;
1568 * ata_exec_internal_sg - execute libata internal command
1569 * @dev: Device to which the command is sent
1570 * @tf: Taskfile registers for the command and the result
1571 * @cdb: CDB for packet command
1572 * @dma_dir: Data tranfer direction of the command
1573 * @sgl: sg list for the data buffer of the command
1574 * @n_elem: Number of sg entries
1575 * @timeout: Timeout in msecs (0 for default)
1577 * Executes libata internal command with timeout. @tf contains
1578 * command on entry and result on return. Timeout and error
1579 * conditions are reported via return value. No recovery action
1580 * is taken after a command times out. It's caller's duty to
1581 * clean up after timeout.
1584 * None. Should be called with kernel context, might sleep.
1587 * Zero on success, AC_ERR_* mask on failure
1589 unsigned ata_exec_internal_sg(struct ata_device *dev,
1590 struct ata_taskfile *tf, const u8 *cdb,
1591 int dma_dir, struct scatterlist *sgl,
1592 unsigned int n_elem, unsigned long timeout)
1594 struct ata_link *link = dev->link;
1595 struct ata_port *ap = link->ap;
1596 u8 command = tf->command;
1597 struct ata_queued_cmd *qc;
1598 unsigned int tag, preempted_tag;
1599 u32 preempted_sactive, preempted_qc_active;
1600 int preempted_nr_active_links;
1601 DECLARE_COMPLETION_ONSTACK(wait);
1602 unsigned long flags;
1603 unsigned int err_mask;
1606 spin_lock_irqsave(ap->lock, flags);
1608 /* no internal command while frozen */
1609 if (ap->pflags & ATA_PFLAG_FROZEN) {
1610 spin_unlock_irqrestore(ap->lock, flags);
1611 return AC_ERR_SYSTEM;
1614 /* initialize internal qc */
1616 /* XXX: Tag 0 is used for drivers with legacy EH as some
1617 * drivers choke if any other tag is given. This breaks
1618 * ata_tag_internal() test for those drivers. Don't use new
1619 * EH stuff without converting to it.
1621 if (ap->ops->error_handler)
1622 tag = ATA_TAG_INTERNAL;
1626 if (test_and_set_bit(tag, &ap->qc_allocated))
1628 qc = __ata_qc_from_tag(ap, tag);
1636 preempted_tag = link->active_tag;
1637 preempted_sactive = link->sactive;
1638 preempted_qc_active = ap->qc_active;
1639 preempted_nr_active_links = ap->nr_active_links;
1640 link->active_tag = ATA_TAG_POISON;
1643 ap->nr_active_links = 0;
1645 /* prepare & issue qc */
1648 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1649 qc->flags |= ATA_QCFLAG_RESULT_TF;
1650 qc->dma_dir = dma_dir;
1651 if (dma_dir != DMA_NONE) {
1652 unsigned int i, buflen = 0;
1653 struct scatterlist *sg;
1655 for_each_sg(sgl, sg, n_elem, i)
1656 buflen += sg->length;
1658 ata_sg_init(qc, sgl, n_elem);
1659 qc->nbytes = buflen;
1662 qc->private_data = &wait;
1663 qc->complete_fn = ata_qc_complete_internal;
1667 spin_unlock_irqrestore(ap->lock, flags);
1670 timeout = ata_probe_timeout * 1000 / HZ;
1672 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
1674 ata_port_flush_task(ap);
1677 spin_lock_irqsave(ap->lock, flags);
1679 /* We're racing with irq here. If we lose, the
1680 * following test prevents us from completing the qc
1681 * twice. If we win, the port is frozen and will be
1682 * cleaned up by ->post_internal_cmd().
1684 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1685 qc->err_mask |= AC_ERR_TIMEOUT;
1687 if (ap->ops->error_handler)
1688 ata_port_freeze(ap);
1690 ata_qc_complete(qc);
1692 if (ata_msg_warn(ap))
1693 ata_dev_printk(dev, KERN_WARNING,
1694 "qc timeout (cmd 0x%x)\n", command);
1697 spin_unlock_irqrestore(ap->lock, flags);
1700 /* do post_internal_cmd */
1701 if (ap->ops->post_internal_cmd)
1702 ap->ops->post_internal_cmd(qc);
1704 /* perform minimal error analysis */
1705 if (qc->flags & ATA_QCFLAG_FAILED) {
1706 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1707 qc->err_mask |= AC_ERR_DEV;
1710 qc->err_mask |= AC_ERR_OTHER;
1712 if (qc->err_mask & ~AC_ERR_OTHER)
1713 qc->err_mask &= ~AC_ERR_OTHER;
1717 spin_lock_irqsave(ap->lock, flags);
1719 *tf = qc->result_tf;
1720 err_mask = qc->err_mask;
1723 link->active_tag = preempted_tag;
1724 link->sactive = preempted_sactive;
1725 ap->qc_active = preempted_qc_active;
1726 ap->nr_active_links = preempted_nr_active_links;
1728 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1729 * Until those drivers are fixed, we detect the condition
1730 * here, fail the command with AC_ERR_SYSTEM and reenable the
1733 * Note that this doesn't change any behavior as internal
1734 * command failure results in disabling the device in the
1735 * higher layer for LLDDs without new reset/EH callbacks.
1737 * Kill the following code as soon as those drivers are fixed.
1739 if (ap->flags & ATA_FLAG_DISABLED) {
1740 err_mask |= AC_ERR_SYSTEM;
1744 spin_unlock_irqrestore(ap->lock, flags);
1750 * ata_exec_internal - execute libata internal command
1751 * @dev: Device to which the command is sent
1752 * @tf: Taskfile registers for the command and the result
1753 * @cdb: CDB for packet command
1754 * @dma_dir: Data tranfer direction of the command
1755 * @buf: Data buffer of the command
1756 * @buflen: Length of data buffer
1757 * @timeout: Timeout in msecs (0 for default)
1759 * Wrapper around ata_exec_internal_sg() which takes simple
1760 * buffer instead of sg list.
1763 * None. Should be called with kernel context, might sleep.
1766 * Zero on success, AC_ERR_* mask on failure
1768 unsigned ata_exec_internal(struct ata_device *dev,
1769 struct ata_taskfile *tf, const u8 *cdb,
1770 int dma_dir, void *buf, unsigned int buflen,
1771 unsigned long timeout)
1773 struct scatterlist *psg = NULL, sg;
1774 unsigned int n_elem = 0;
1776 if (dma_dir != DMA_NONE) {
1778 sg_init_one(&sg, buf, buflen);
1783 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1788 * ata_do_simple_cmd - execute simple internal command
1789 * @dev: Device to which the command is sent
1790 * @cmd: Opcode to execute
1792 * Execute a 'simple' command, that only consists of the opcode
1793 * 'cmd' itself, without filling any other registers
1796 * Kernel thread context (may sleep).
1799 * Zero on success, AC_ERR_* mask on failure
1801 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1803 struct ata_taskfile tf;
1805 ata_tf_init(dev, &tf);
1808 tf.flags |= ATA_TFLAG_DEVICE;
1809 tf.protocol = ATA_PROT_NODATA;
1811 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1815 * ata_pio_need_iordy - check if iordy needed
1818 * Check if the current speed of the device requires IORDY. Used
1819 * by various controllers for chip configuration.
1822 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1824 /* Controller doesn't support IORDY. Probably a pointless check
1825 as the caller should know this */
1826 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1828 /* PIO3 and higher it is mandatory */
1829 if (adev->pio_mode > XFER_PIO_2)
1831 /* We turn it on when possible */
1832 if (ata_id_has_iordy(adev->id))
1838 * ata_pio_mask_no_iordy - Return the non IORDY mask
1841 * Compute the highest mode possible if we are not using iordy. Return
1842 * -1 if no iordy mode is available.
1845 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1847 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1848 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1849 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1850 /* Is the speed faster than the drive allows non IORDY ? */
1852 /* This is cycle times not frequency - watch the logic! */
1853 if (pio > 240) /* PIO2 is 240nS per cycle */
1854 return 3 << ATA_SHIFT_PIO;
1855 return 7 << ATA_SHIFT_PIO;
1858 return 3 << ATA_SHIFT_PIO;
1862 * ata_dev_read_id - Read ID data from the specified device
1863 * @dev: target device
1864 * @p_class: pointer to class of the target device (may be changed)
1865 * @flags: ATA_READID_* flags
1866 * @id: buffer to read IDENTIFY data into
1868 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1869 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1870 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1871 * for pre-ATA4 drives.
1873 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
1874 * now we abort if we hit that case.
1877 * Kernel thread context (may sleep)
1880 * 0 on success, -errno otherwise.
1882 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1883 unsigned int flags, u16 *id)
1885 struct ata_port *ap = dev->link->ap;
1886 unsigned int class = *p_class;
1887 struct ata_taskfile tf;
1888 unsigned int err_mask = 0;
1890 int may_fallback = 1, tried_spinup = 0;
1893 if (ata_msg_ctl(ap))
1894 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1896 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1898 ata_tf_init(dev, &tf);
1902 tf.command = ATA_CMD_ID_ATA;
1905 tf.command = ATA_CMD_ID_ATAPI;
1909 reason = "unsupported class";
1913 tf.protocol = ATA_PROT_PIO;
1915 /* Some devices choke if TF registers contain garbage. Make
1916 * sure those are properly initialized.
1918 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1920 /* Device presence detection is unreliable on some
1921 * controllers. Always poll IDENTIFY if available.
1923 tf.flags |= ATA_TFLAG_POLLING;
1925 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1926 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1928 if (err_mask & AC_ERR_NODEV_HINT) {
1929 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1930 ap->print_id, dev->devno);
1934 /* Device or controller might have reported the wrong
1935 * device class. Give a shot at the other IDENTIFY if
1936 * the current one is aborted by the device.
1939 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1942 if (class == ATA_DEV_ATA)
1943 class = ATA_DEV_ATAPI;
1945 class = ATA_DEV_ATA;
1950 reason = "I/O error";
1954 /* Falling back doesn't make sense if ID data was read
1955 * successfully at least once.
1959 swap_buf_le16(id, ATA_ID_WORDS);
1963 reason = "device reports invalid type";
1965 if (class == ATA_DEV_ATA) {
1966 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1969 if (ata_id_is_ata(id))
1973 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1976 * Drive powered-up in standby mode, and requires a specific
1977 * SET_FEATURES spin-up subcommand before it will accept
1978 * anything other than the original IDENTIFY command.
1980 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
1981 if (err_mask && id[2] != 0x738c) {
1983 reason = "SPINUP failed";
1987 * If the drive initially returned incomplete IDENTIFY info,
1988 * we now must reissue the IDENTIFY command.
1990 if (id[2] == 0x37c8)
1994 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1996 * The exact sequence expected by certain pre-ATA4 drives is:
1998 * IDENTIFY (optional in early ATA)
1999 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
2001 * Some drives were very specific about that exact sequence.
2003 * Note that ATA4 says lba is mandatory so the second check
2004 * shoud never trigger.
2006 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
2007 err_mask = ata_dev_init_params(dev, id[3], id[6]);
2010 reason = "INIT_DEV_PARAMS failed";
2014 /* current CHS translation info (id[53-58]) might be
2015 * changed. reread the identify device info.
2017 flags &= ~ATA_READID_POSTRESET;
2027 if (ata_msg_warn(ap))
2028 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
2029 "(%s, err_mask=0x%x)\n", reason, err_mask);
2033 static inline u8 ata_dev_knobble(struct ata_device *dev)
2035 struct ata_port *ap = dev->link->ap;
2036 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
2039 static void ata_dev_config_ncq(struct ata_device *dev,
2040 char *desc, size_t desc_sz)
2042 struct ata_port *ap = dev->link->ap;
2043 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
2045 if (!ata_id_has_ncq(dev->id)) {
2049 if (dev->horkage & ATA_HORKAGE_NONCQ) {
2050 snprintf(desc, desc_sz, "NCQ (not used)");
2053 if (ap->flags & ATA_FLAG_NCQ) {
2054 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
2055 dev->flags |= ATA_DFLAG_NCQ;
2058 if (hdepth >= ddepth)
2059 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
2061 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
2065 * ata_dev_configure - Configure the specified ATA/ATAPI device
2066 * @dev: Target device to configure
2068 * Configure @dev according to @dev->id. Generic and low-level
2069 * driver specific fixups are also applied.
2072 * Kernel thread context (may sleep)
2075 * 0 on success, -errno otherwise
2077 int ata_dev_configure(struct ata_device *dev)
2079 struct ata_port *ap = dev->link->ap;
2080 struct ata_eh_context *ehc = &dev->link->eh_context;
2081 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
2082 const u16 *id = dev->id;
2083 unsigned int xfer_mask;
2084 char revbuf[7]; /* XYZ-99\0 */
2085 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2086 char modelbuf[ATA_ID_PROD_LEN+1];
2089 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
2090 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
2095 if (ata_msg_probe(ap))
2096 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
2099 dev->horkage |= ata_dev_blacklisted(dev);
2101 /* let ACPI work its magic */
2102 rc = ata_acpi_on_devcfg(dev);
2106 /* massage HPA, do it early as it might change IDENTIFY data */
2107 rc = ata_hpa_resize(dev);
2111 /* print device capabilities */
2112 if (ata_msg_probe(ap))
2113 ata_dev_printk(dev, KERN_DEBUG,
2114 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2115 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2117 id[49], id[82], id[83], id[84],
2118 id[85], id[86], id[87], id[88]);
2120 /* initialize to-be-configured parameters */
2121 dev->flags &= ~ATA_DFLAG_CFG_MASK;
2122 dev->max_sectors = 0;
2130 * common ATA, ATAPI feature tests
2133 /* find max transfer mode; for printk only */
2134 xfer_mask = ata_id_xfermask(id);
2136 if (ata_msg_probe(ap))
2139 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2140 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2143 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2146 /* ATA-specific feature tests */
2147 if (dev->class == ATA_DEV_ATA) {
2148 if (ata_id_is_cfa(id)) {
2149 if (id[162] & 1) /* CPRM may make this media unusable */
2150 ata_dev_printk(dev, KERN_WARNING,
2151 "supports DRM functions and may "
2152 "not be fully accessable.\n");
2153 snprintf(revbuf, 7, "CFA");
2155 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
2157 dev->n_sectors = ata_id_n_sectors(id);
2159 if (dev->id[59] & 0x100)
2160 dev->multi_count = dev->id[59] & 0xff;
2162 if (ata_id_has_lba(id)) {
2163 const char *lba_desc;
2167 dev->flags |= ATA_DFLAG_LBA;
2168 if (ata_id_has_lba48(id)) {
2169 dev->flags |= ATA_DFLAG_LBA48;
2172 if (dev->n_sectors >= (1UL << 28) &&
2173 ata_id_has_flush_ext(id))
2174 dev->flags |= ATA_DFLAG_FLUSH_EXT;
2178 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2180 /* print device info to dmesg */
2181 if (ata_msg_drv(ap) && print_info) {
2182 ata_dev_printk(dev, KERN_INFO,
2183 "%s: %s, %s, max %s\n",
2184 revbuf, modelbuf, fwrevbuf,
2185 ata_mode_string(xfer_mask));
2186 ata_dev_printk(dev, KERN_INFO,
2187 "%Lu sectors, multi %u: %s %s\n",
2188 (unsigned long long)dev->n_sectors,
2189 dev->multi_count, lba_desc, ncq_desc);
2194 /* Default translation */
2195 dev->cylinders = id[1];
2197 dev->sectors = id[6];
2199 if (ata_id_current_chs_valid(id)) {
2200 /* Current CHS translation is valid. */
2201 dev->cylinders = id[54];
2202 dev->heads = id[55];
2203 dev->sectors = id[56];
2206 /* print device info to dmesg */
2207 if (ata_msg_drv(ap) && print_info) {
2208 ata_dev_printk(dev, KERN_INFO,
2209 "%s: %s, %s, max %s\n",
2210 revbuf, modelbuf, fwrevbuf,
2211 ata_mode_string(xfer_mask));
2212 ata_dev_printk(dev, KERN_INFO,
2213 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
2214 (unsigned long long)dev->n_sectors,
2215 dev->multi_count, dev->cylinders,
2216 dev->heads, dev->sectors);
2223 /* ATAPI-specific feature tests */
2224 else if (dev->class == ATA_DEV_ATAPI) {
2225 const char *cdb_intr_string = "";
2226 const char *atapi_an_string = "";
2229 rc = atapi_cdb_len(id);
2230 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
2231 if (ata_msg_warn(ap))
2232 ata_dev_printk(dev, KERN_WARNING,
2233 "unsupported CDB len\n");
2237 dev->cdb_len = (unsigned int) rc;
2239 /* Enable ATAPI AN if both the host and device have
2240 * the support. If PMP is attached, SNTF is required
2241 * to enable ATAPI AN to discern between PHY status
2242 * changed notifications and ATAPI ANs.
2244 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
2245 (!ap->nr_pmp_links ||
2246 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
2247 unsigned int err_mask;
2249 /* issue SET feature command to turn this on */
2250 err_mask = ata_dev_set_feature(dev,
2251 SETFEATURES_SATA_ENABLE, SATA_AN);
2253 ata_dev_printk(dev, KERN_ERR,
2254 "failed to enable ATAPI AN "
2255 "(err_mask=0x%x)\n", err_mask);
2257 dev->flags |= ATA_DFLAG_AN;
2258 atapi_an_string = ", ATAPI AN";
2262 if (ata_id_cdb_intr(dev->id)) {
2263 dev->flags |= ATA_DFLAG_CDB_INTR;
2264 cdb_intr_string = ", CDB intr";
2267 /* print device info to dmesg */
2268 if (ata_msg_drv(ap) && print_info)
2269 ata_dev_printk(dev, KERN_INFO,
2270 "ATAPI: %s, %s, max %s%s%s\n",
2272 ata_mode_string(xfer_mask),
2273 cdb_intr_string, atapi_an_string);
2276 /* determine max_sectors */
2277 dev->max_sectors = ATA_MAX_SECTORS;
2278 if (dev->flags & ATA_DFLAG_LBA48)
2279 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2281 if (!(dev->horkage & ATA_HORKAGE_IPM)) {
2282 if (ata_id_has_hipm(dev->id))
2283 dev->flags |= ATA_DFLAG_HIPM;
2284 if (ata_id_has_dipm(dev->id))
2285 dev->flags |= ATA_DFLAG_DIPM;
2288 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2289 /* Let the user know. We don't want to disallow opens for
2290 rescue purposes, or in case the vendor is just a blithering
2293 ata_dev_printk(dev, KERN_WARNING,
2294 "Drive reports diagnostics failure. This may indicate a drive\n");
2295 ata_dev_printk(dev, KERN_WARNING,
2296 "fault or invalid emulation. Contact drive vendor for information.\n");
2300 /* limit bridge transfers to udma5, 200 sectors */
2301 if (ata_dev_knobble(dev)) {
2302 if (ata_msg_drv(ap) && print_info)
2303 ata_dev_printk(dev, KERN_INFO,
2304 "applying bridge limits\n");
2305 dev->udma_mask &= ATA_UDMA5;
2306 dev->max_sectors = ATA_MAX_SECTORS;
2309 if ((dev->class == ATA_DEV_ATAPI) &&
2310 (atapi_command_packet_set(id) == TYPE_TAPE)) {
2311 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
2312 dev->horkage |= ATA_HORKAGE_STUCK_ERR;
2315 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
2316 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2319 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) {
2320 dev->horkage |= ATA_HORKAGE_IPM;
2322 /* reset link pm_policy for this port to no pm */
2323 ap->pm_policy = MAX_PERFORMANCE;
2326 if (ap->ops->dev_config)
2327 ap->ops->dev_config(dev);
2329 if (ata_msg_probe(ap))
2330 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
2331 __FUNCTION__, ata_chk_status(ap));
2335 if (ata_msg_probe(ap))
2336 ata_dev_printk(dev, KERN_DEBUG,
2337 "%s: EXIT, err\n", __FUNCTION__);
2342 * ata_cable_40wire - return 40 wire cable type
2345 * Helper method for drivers which want to hardwire 40 wire cable
2349 int ata_cable_40wire(struct ata_port *ap)
2351 return ATA_CBL_PATA40;
2355 * ata_cable_80wire - return 80 wire cable type
2358 * Helper method for drivers which want to hardwire 80 wire cable
2362 int ata_cable_80wire(struct ata_port *ap)
2364 return ATA_CBL_PATA80;
2368 * ata_cable_unknown - return unknown PATA cable.
2371 * Helper method for drivers which have no PATA cable detection.
2374 int ata_cable_unknown(struct ata_port *ap)
2376 return ATA_CBL_PATA_UNK;
2380 * ata_cable_sata - return SATA cable type
2383 * Helper method for drivers which have SATA cables
2386 int ata_cable_sata(struct ata_port *ap)
2388 return ATA_CBL_SATA;
2392 * ata_bus_probe - Reset and probe ATA bus
2395 * Master ATA bus probing function. Initiates a hardware-dependent
2396 * bus reset, then attempts to identify any devices found on
2400 * PCI/etc. bus probe sem.
2403 * Zero on success, negative errno otherwise.
2406 int ata_bus_probe(struct ata_port *ap)
2408 unsigned int classes[ATA_MAX_DEVICES];
2409 int tries[ATA_MAX_DEVICES];
2411 struct ata_device *dev;
2415 ata_link_for_each_dev(dev, &ap->link)
2416 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
2419 ata_link_for_each_dev(dev, &ap->link) {
2420 /* If we issue an SRST then an ATA drive (not ATAPI)
2421 * may change configuration and be in PIO0 timing. If
2422 * we do a hard reset (or are coming from power on)
2423 * this is true for ATA or ATAPI. Until we've set a
2424 * suitable controller mode we should not touch the
2425 * bus as we may be talking too fast.
2427 dev->pio_mode = XFER_PIO_0;
2429 /* If the controller has a pio mode setup function
2430 * then use it to set the chipset to rights. Don't
2431 * touch the DMA setup as that will be dealt with when
2432 * configuring devices.
2434 if (ap->ops->set_piomode)
2435 ap->ops->set_piomode(ap, dev);
2438 /* reset and determine device classes */
2439 ap->ops->phy_reset(ap);
2441 ata_link_for_each_dev(dev, &ap->link) {
2442 if (!(ap->flags & ATA_FLAG_DISABLED) &&
2443 dev->class != ATA_DEV_UNKNOWN)
2444 classes[dev->devno] = dev->class;
2446 classes[dev->devno] = ATA_DEV_NONE;
2448 dev->class = ATA_DEV_UNKNOWN;
2453 /* read IDENTIFY page and configure devices. We have to do the identify
2454 specific sequence bass-ackwards so that PDIAG- is released by
2457 ata_link_for_each_dev(dev, &ap->link) {
2458 if (tries[dev->devno])
2459 dev->class = classes[dev->devno];
2461 if (!ata_dev_enabled(dev))
2464 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2470 /* Now ask for the cable type as PDIAG- should have been released */
2471 if (ap->ops->cable_detect)
2472 ap->cbl = ap->ops->cable_detect(ap);
2474 /* We may have SATA bridge glue hiding here irrespective of the
2475 reported cable types and sensed types */
2476 ata_link_for_each_dev(dev, &ap->link) {
2477 if (!ata_dev_enabled(dev))
2479 /* SATA drives indicate we have a bridge. We don't know which
2480 end of the link the bridge is which is a problem */
2481 if (ata_id_is_sata(dev->id))
2482 ap->cbl = ATA_CBL_SATA;
2485 /* After the identify sequence we can now set up the devices. We do
2486 this in the normal order so that the user doesn't get confused */
2488 ata_link_for_each_dev(dev, &ap->link) {
2489 if (!ata_dev_enabled(dev))
2492 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
2493 rc = ata_dev_configure(dev);
2494 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
2499 /* configure transfer mode */
2500 rc = ata_set_mode(&ap->link, &dev);
2504 ata_link_for_each_dev(dev, &ap->link)
2505 if (ata_dev_enabled(dev))
2508 /* no device present, disable port */
2509 ata_port_disable(ap);
2513 tries[dev->devno]--;
2517 /* eeek, something went very wrong, give up */
2518 tries[dev->devno] = 0;
2522 /* give it just one more chance */
2523 tries[dev->devno] = min(tries[dev->devno], 1);
2525 if (tries[dev->devno] == 1) {
2526 /* This is the last chance, better to slow
2527 * down than lose it.
2529 sata_down_spd_limit(&ap->link);
2530 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2534 if (!tries[dev->devno])
2535 ata_dev_disable(dev);
2541 * ata_port_probe - Mark port as enabled
2542 * @ap: Port for which we indicate enablement
2544 * Modify @ap data structure such that the system
2545 * thinks that the entire port is enabled.
2547 * LOCKING: host lock, or some other form of
2551 void ata_port_probe(struct ata_port *ap)
2553 ap->flags &= ~ATA_FLAG_DISABLED;
2557 * sata_print_link_status - Print SATA link status
2558 * @link: SATA link to printk link status about
2560 * This function prints link speed and status of a SATA link.
2565 void sata_print_link_status(struct ata_link *link)
2567 u32 sstatus, scontrol, tmp;
2569 if (sata_scr_read(link, SCR_STATUS, &sstatus))
2571 sata_scr_read(link, SCR_CONTROL, &scontrol);
2573 if (ata_link_online(link)) {
2574 tmp = (sstatus >> 4) & 0xf;
2575 ata_link_printk(link, KERN_INFO,
2576 "SATA link up %s (SStatus %X SControl %X)\n",
2577 sata_spd_string(tmp), sstatus, scontrol);
2579 ata_link_printk(link, KERN_INFO,
2580 "SATA link down (SStatus %X SControl %X)\n",
2586 * ata_dev_pair - return other device on cable
2589 * Obtain the other device on the same cable, or if none is
2590 * present NULL is returned
2593 struct ata_device *ata_dev_pair(struct ata_device *adev)
2595 struct ata_link *link = adev->link;
2596 struct ata_device *pair = &link->device[1 - adev->devno];
2597 if (!ata_dev_enabled(pair))
2603 * ata_port_disable - Disable port.
2604 * @ap: Port to be disabled.
2606 * Modify @ap data structure such that the system
2607 * thinks that the entire port is disabled, and should
2608 * never attempt to probe or communicate with devices
2611 * LOCKING: host lock, or some other form of
2615 void ata_port_disable(struct ata_port *ap)
2617 ap->link.device[0].class = ATA_DEV_NONE;
2618 ap->link.device[1].class = ATA_DEV_NONE;
2619 ap->flags |= ATA_FLAG_DISABLED;
2623 * sata_down_spd_limit - adjust SATA spd limit downward
2624 * @link: Link to adjust SATA spd limit for
2626 * Adjust SATA spd limit of @link downward. Note that this
2627 * function only adjusts the limit. The change must be applied
2628 * using sata_set_spd().
2631 * Inherited from caller.
2634 * 0 on success, negative errno on failure
2636 int sata_down_spd_limit(struct ata_link *link)
2638 u32 sstatus, spd, mask;
2641 if (!sata_scr_valid(link))
2644 /* If SCR can be read, use it to determine the current SPD.
2645 * If not, use cached value in link->sata_spd.
2647 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
2649 spd = (sstatus >> 4) & 0xf;
2651 spd = link->sata_spd;
2653 mask = link->sata_spd_limit;
2657 /* unconditionally mask off the highest bit */
2658 highbit = fls(mask) - 1;
2659 mask &= ~(1 << highbit);
2661 /* Mask off all speeds higher than or equal to the current
2662 * one. Force 1.5Gbps if current SPD is not available.
2665 mask &= (1 << (spd - 1)) - 1;
2669 /* were we already at the bottom? */
2673 link->sata_spd_limit = mask;
2675 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n",
2676 sata_spd_string(fls(mask)));
2681 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
2683 struct ata_link *host_link = &link->ap->link;
2684 u32 limit, target, spd;
2686 limit = link->sata_spd_limit;
2688 /* Don't configure downstream link faster than upstream link.
2689 * It doesn't speed up anything and some PMPs choke on such
2692 if (!ata_is_host_link(link) && host_link->sata_spd)
2693 limit &= (1 << host_link->sata_spd) - 1;
2695 if (limit == UINT_MAX)
2698 target = fls(limit);
2700 spd = (*scontrol >> 4) & 0xf;
2701 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
2703 return spd != target;
2707 * sata_set_spd_needed - is SATA spd configuration needed
2708 * @link: Link in question
2710 * Test whether the spd limit in SControl matches
2711 * @link->sata_spd_limit. This function is used to determine
2712 * whether hardreset is necessary to apply SATA spd
2716 * Inherited from caller.
2719 * 1 if SATA spd configuration is needed, 0 otherwise.
2721 int sata_set_spd_needed(struct ata_link *link)
2725 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
2728 return __sata_set_spd_needed(link, &scontrol);
2732 * sata_set_spd - set SATA spd according to spd limit
2733 * @link: Link to set SATA spd for
2735 * Set SATA spd of @link according to sata_spd_limit.
2738 * Inherited from caller.
2741 * 0 if spd doesn't need to be changed, 1 if spd has been
2742 * changed. Negative errno if SCR registers are inaccessible.
2744 int sata_set_spd(struct ata_link *link)
2749 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
2752 if (!__sata_set_spd_needed(link, &scontrol))
2755 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
2762 * This mode timing computation functionality is ported over from
2763 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2766 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2767 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2768 * for UDMA6, which is currently supported only by Maxtor drives.
2770 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2773 static const struct ata_timing ata_timing[] = {
2775 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2776 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2777 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2778 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2780 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2781 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2782 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2783 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2784 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2786 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2788 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2789 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2790 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2792 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2793 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2794 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2796 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2797 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2798 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2799 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2801 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2802 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2803 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2805 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2810 #define ENOUGH(v, unit) (((v)-1)/(unit)+1)
2811 #define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
2813 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2815 q->setup = EZ(t->setup * 1000, T);
2816 q->act8b = EZ(t->act8b * 1000, T);
2817 q->rec8b = EZ(t->rec8b * 1000, T);
2818 q->cyc8b = EZ(t->cyc8b * 1000, T);
2819 q->active = EZ(t->active * 1000, T);
2820 q->recover = EZ(t->recover * 1000, T);
2821 q->cycle = EZ(t->cycle * 1000, T);
2822 q->udma = EZ(t->udma * 1000, UT);
2825 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2826 struct ata_timing *m, unsigned int what)
2828 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2829 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2830 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2831 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2832 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2833 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2834 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2835 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2838 static const struct ata_timing *ata_timing_find_mode(unsigned short speed)
2840 const struct ata_timing *t;
2842 for (t = ata_timing; t->mode != speed; t++)
2843 if (t->mode == 0xFF)
2848 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2849 struct ata_timing *t, int T, int UT)
2851 const struct ata_timing *s;
2852 struct ata_timing p;
2858 if (!(s = ata_timing_find_mode(speed)))
2861 memcpy(t, s, sizeof(*s));
2864 * If the drive is an EIDE drive, it can tell us it needs extended
2865 * PIO/MW_DMA cycle timing.
2868 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2869 memset(&p, 0, sizeof(p));
2870 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2871 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2872 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2873 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2874 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2876 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2880 * Convert the timing to bus clock counts.
2883 ata_timing_quantize(t, t, T, UT);
2886 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2887 * S.M.A.R.T * and some other commands. We have to ensure that the
2888 * DMA cycle timing is slower/equal than the fastest PIO timing.
2891 if (speed > XFER_PIO_6) {
2892 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2893 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2897 * Lengthen active & recovery time so that cycle time is correct.
2900 if (t->act8b + t->rec8b < t->cyc8b) {
2901 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2902 t->rec8b = t->cyc8b - t->act8b;
2905 if (t->active + t->recover < t->cycle) {
2906 t->active += (t->cycle - (t->active + t->recover)) / 2;
2907 t->recover = t->cycle - t->active;
2910 /* In a few cases quantisation may produce enough errors to
2911 leave t->cycle too low for the sum of active and recovery
2912 if so we must correct this */
2913 if (t->active + t->recover > t->cycle)
2914 t->cycle = t->active + t->recover;
2920 * ata_down_xfermask_limit - adjust dev xfer masks downward
2921 * @dev: Device to adjust xfer masks
2922 * @sel: ATA_DNXFER_* selector
2924 * Adjust xfer masks of @dev downward. Note that this function
2925 * does not apply the change. Invoking ata_set_mode() afterwards
2926 * will apply the limit.
2929 * Inherited from caller.
2932 * 0 on success, negative errno on failure
2934 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
2937 unsigned int orig_mask, xfer_mask;
2938 unsigned int pio_mask, mwdma_mask, udma_mask;
2941 quiet = !!(sel & ATA_DNXFER_QUIET);
2942 sel &= ~ATA_DNXFER_QUIET;
2944 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
2947 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
2950 case ATA_DNXFER_PIO:
2951 highbit = fls(pio_mask) - 1;
2952 pio_mask &= ~(1 << highbit);
2955 case ATA_DNXFER_DMA:
2957 highbit = fls(udma_mask) - 1;
2958 udma_mask &= ~(1 << highbit);
2961 } else if (mwdma_mask) {
2962 highbit = fls(mwdma_mask) - 1;
2963 mwdma_mask &= ~(1 << highbit);
2969 case ATA_DNXFER_40C:
2970 udma_mask &= ATA_UDMA_MASK_40C;
2973 case ATA_DNXFER_FORCE_PIO0:
2975 case ATA_DNXFER_FORCE_PIO:
2984 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
2986 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
2990 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
2991 snprintf(buf, sizeof(buf), "%s:%s",
2992 ata_mode_string(xfer_mask),
2993 ata_mode_string(xfer_mask & ATA_MASK_PIO));
2995 snprintf(buf, sizeof(buf), "%s",
2996 ata_mode_string(xfer_mask));
2998 ata_dev_printk(dev, KERN_WARNING,
2999 "limiting speed to %s\n", buf);
3002 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3008 static int ata_dev_set_mode(struct ata_device *dev)
3010 struct ata_eh_context *ehc = &dev->link->eh_context;
3011 unsigned int err_mask;
3014 dev->flags &= ~ATA_DFLAG_PIO;
3015 if (dev->xfer_shift == ATA_SHIFT_PIO)
3016 dev->flags |= ATA_DFLAG_PIO;
3018 err_mask = ata_dev_set_xfermode(dev);
3020 /* Old CFA may refuse this command, which is just fine */
3021 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
3022 err_mask &= ~AC_ERR_DEV;
3024 /* Some very old devices and some bad newer ones fail any kind of
3025 SET_XFERMODE request but support PIO0-2 timings and no IORDY */
3026 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
3027 dev->pio_mode <= XFER_PIO_2)
3028 err_mask &= ~AC_ERR_DEV;
3030 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3031 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
3032 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3033 dev->dma_mode == XFER_MW_DMA_0 &&
3034 (dev->id[63] >> 8) & 1)
3035 err_mask &= ~AC_ERR_DEV;
3038 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
3039 "(err_mask=0x%x)\n", err_mask);
3043 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3044 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3045 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3049 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3050 dev->xfer_shift, (int)dev->xfer_mode);
3052 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
3053 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
3058 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
3059 * @link: link on which timings will be programmed
3060 * @r_failed_dev: out paramter for failed device
3062 * Standard implementation of the function used to tune and set
3063 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3064 * ata_dev_set_mode() fails, pointer to the failing device is
3065 * returned in @r_failed_dev.
3068 * PCI/etc. bus probe sem.
3071 * 0 on success, negative errno otherwise
3074 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
3076 struct ata_port *ap = link->ap;
3077 struct ata_device *dev;
3078 int rc = 0, used_dma = 0, found = 0;
3080 /* step 1: calculate xfer_mask */
3081 ata_link_for_each_dev(dev, link) {
3082 unsigned int pio_mask, dma_mask;
3083 unsigned int mode_mask;
3085 if (!ata_dev_enabled(dev))
3088 mode_mask = ATA_DMA_MASK_ATA;
3089 if (dev->class == ATA_DEV_ATAPI)
3090 mode_mask = ATA_DMA_MASK_ATAPI;
3091 else if (ata_id_is_cfa(dev->id))
3092 mode_mask = ATA_DMA_MASK_CFA;
3094 ata_dev_xfermask(dev);
3096 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
3097 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
3099 if (libata_dma_mask & mode_mask)
3100 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
3104 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3105 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
3114 /* step 2: always set host PIO timings */
3115 ata_link_for_each_dev(dev, link) {
3116 if (!ata_dev_enabled(dev))
3119 if (!dev->pio_mode) {
3120 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
3125 dev->xfer_mode = dev->pio_mode;
3126 dev->xfer_shift = ATA_SHIFT_PIO;
3127 if (ap->ops->set_piomode)
3128 ap->ops->set_piomode(ap, dev);
3131 /* step 3: set host DMA timings */
3132 ata_link_for_each_dev(dev, link) {
3133 if (!ata_dev_enabled(dev) || !dev->dma_mode)
3136 dev->xfer_mode = dev->dma_mode;
3137 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3138 if (ap->ops->set_dmamode)
3139 ap->ops->set_dmamode(ap, dev);
3142 /* step 4: update devices' xfer mode */
3143 ata_link_for_each_dev(dev, link) {
3144 /* don't update suspended devices' xfer mode */
3145 if (!ata_dev_enabled(dev))
3148 rc = ata_dev_set_mode(dev);
3153 /* Record simplex status. If we selected DMA then the other
3154 * host channels are not permitted to do so.
3156 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
3157 ap->host->simplex_claimed = ap;
3161 *r_failed_dev = dev;
3166 * ata_set_mode - Program timings and issue SET FEATURES - XFER
3167 * @link: link on which timings will be programmed
3168 * @r_failed_dev: out paramter for failed device
3170 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3171 * ata_set_mode() fails, pointer to the failing device is
3172 * returned in @r_failed_dev.
3175 * PCI/etc. bus probe sem.
3178 * 0 on success, negative errno otherwise
3180 int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
3182 struct ata_port *ap = link->ap;
3184 /* has private set_mode? */
3185 if (ap->ops->set_mode)
3186 return ap->ops->set_mode(link, r_failed_dev);
3187 return ata_do_set_mode(link, r_failed_dev);
3191 * ata_tf_to_host - issue ATA taskfile to host controller
3192 * @ap: port to which command is being issued
3193 * @tf: ATA taskfile register set
3195 * Issues ATA taskfile register set to ATA host controller,
3196 * with proper synchronization with interrupt handler and
3200 * spin_lock_irqsave(host lock)
3203 static inline void ata_tf_to_host(struct ata_port *ap,
3204 const struct ata_taskfile *tf)
3206 ap->ops->tf_load(ap, tf);
3207 ap->ops->exec_command(ap, tf);
3211 * ata_busy_sleep - sleep until BSY clears, or timeout
3212 * @ap: port containing status register to be polled
3213 * @tmout_pat: impatience timeout
3214 * @tmout: overall timeout
3216 * Sleep until ATA Status register bit BSY clears,
3217 * or a timeout occurs.
3220 * Kernel thread context (may sleep).
3223 * 0 on success, -errno otherwise.
3225 int ata_busy_sleep(struct ata_port *ap,
3226 unsigned long tmout_pat, unsigned long tmout)
3228 unsigned long timer_start, timeout;
3231 status = ata_busy_wait(ap, ATA_BUSY, 300);
3232 timer_start = jiffies;
3233 timeout = timer_start + tmout_pat;
3234 while (status != 0xff && (status & ATA_BUSY) &&
3235 time_before(jiffies, timeout)) {
3237 status = ata_busy_wait(ap, ATA_BUSY, 3);
3240 if (status != 0xff && (status & ATA_BUSY))
3241 ata_port_printk(ap, KERN_WARNING,
3242 "port is slow to respond, please be patient "
3243 "(Status 0x%x)\n", status);
3245 timeout = timer_start + tmout;
3246 while (status != 0xff && (status & ATA_BUSY) &&
3247 time_before(jiffies, timeout)) {
3249 status = ata_chk_status(ap);
3255 if (status & ATA_BUSY) {
3256 ata_port_printk(ap, KERN_ERR, "port failed to respond "
3257 "(%lu secs, Status 0x%x)\n",
3258 tmout / HZ, status);
3266 * ata_wait_after_reset - wait before checking status after reset
3267 * @ap: port containing status register to be polled
3268 * @deadline: deadline jiffies for the operation
3270 * After reset, we need to pause a while before reading status.
3271 * Also, certain combination of controller and device report 0xff
3272 * for some duration (e.g. until SATA PHY is up and running)
3273 * which is interpreted as empty port in ATA world. This
3274 * function also waits for such devices to get out of 0xff
3278 * Kernel thread context (may sleep).
3280 void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline)
3282 unsigned long until = jiffies + ATA_TMOUT_FF_WAIT;
3284 if (time_before(until, deadline))
3287 /* Spec mandates ">= 2ms" before checking status. We wait
3288 * 150ms, because that was the magic delay used for ATAPI
3289 * devices in Hale Landis's ATADRVR, for the period of time
3290 * between when the ATA command register is written, and then
3291 * status is checked. Because waiting for "a while" before
3292 * checking status is fine, post SRST, we perform this magic
3293 * delay here as well.
3295 * Old drivers/ide uses the 2mS rule and then waits for ready.
3299 /* Wait for 0xff to clear. Some SATA devices take a long time
3300 * to clear 0xff after reset. For example, HHD424020F7SV00
3301 * iVDR needs >= 800ms while. Quantum GoVault needs even more
3304 * Note that some PATA controllers (pata_ali) explode if
3305 * status register is read more than once when there's no
3308 if (ap->flags & ATA_FLAG_SATA) {
3310 u8 status = ata_chk_status(ap);
3312 if (status != 0xff || time_after(jiffies, deadline))
3321 * ata_wait_ready - sleep until BSY clears, or timeout
3322 * @ap: port containing status register to be polled
3323 * @deadline: deadline jiffies for the operation
3325 * Sleep until ATA Status register bit BSY clears, or timeout
3329 * Kernel thread context (may sleep).
3332 * 0 on success, -errno otherwise.
3334 int ata_wait_ready(struct ata_port *ap, unsigned long deadline)
3336 unsigned long start = jiffies;
3340 u8 status = ata_chk_status(ap);
3341 unsigned long now = jiffies;
3343 if (!(status & ATA_BUSY))
3345 if (!ata_link_online(&ap->link) && status == 0xff)
3347 if (time_after(now, deadline))
3350 if (!warned && time_after(now, start + 5 * HZ) &&
3351 (deadline - now > 3 * HZ)) {
3352 ata_port_printk(ap, KERN_WARNING,
3353 "port is slow to respond, please be patient "
3354 "(Status 0x%x)\n", status);
3362 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
3363 unsigned long deadline)
3365 struct ata_ioports *ioaddr = &ap->ioaddr;
3366 unsigned int dev0 = devmask & (1 << 0);
3367 unsigned int dev1 = devmask & (1 << 1);
3370 /* if device 0 was found in ata_devchk, wait for its
3374 rc = ata_wait_ready(ap, deadline);
3382 /* if device 1 was found in ata_devchk, wait for register
3383 * access briefly, then wait for BSY to clear.
3388 ap->ops->dev_select(ap, 1);
3390 /* Wait for register access. Some ATAPI devices fail
3391 * to set nsect/lbal after reset, so don't waste too
3392 * much time on it. We're gonna wait for !BSY anyway.
3394 for (i = 0; i < 2; i++) {
3397 nsect = ioread8(ioaddr->nsect_addr);
3398 lbal = ioread8(ioaddr->lbal_addr);
3399 if ((nsect == 1) && (lbal == 1))
3401 msleep(50); /* give drive a breather */
3404 rc = ata_wait_ready(ap, deadline);
3412 /* is all this really necessary? */
3413 ap->ops->dev_select(ap, 0);
3415 ap->ops->dev_select(ap, 1);
3417 ap->ops->dev_select(ap, 0);
3422 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
3423 unsigned long deadline)
3425 struct ata_ioports *ioaddr = &ap->ioaddr;
3427 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
3429 /* software reset. causes dev0 to be selected */
3430 iowrite8(ap->ctl, ioaddr->ctl_addr);
3431 udelay(20); /* FIXME: flush */
3432 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
3433 udelay(20); /* FIXME: flush */
3434 iowrite8(ap->ctl, ioaddr->ctl_addr);
3436 /* wait a while before checking status */
3437 ata_wait_after_reset(ap, deadline);
3439 /* Before we perform post reset processing we want to see if
3440 * the bus shows 0xFF because the odd clown forgets the D7
3441 * pulldown resistor.
3443 if (ata_chk_status(ap) == 0xFF)
3446 return ata_bus_post_reset(ap, devmask, deadline);
3450 * ata_bus_reset - reset host port and associated ATA channel
3451 * @ap: port to reset
3453 * This is typically the first time we actually start issuing
3454 * commands to the ATA channel. We wait for BSY to clear, then
3455 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
3456 * result. Determine what devices, if any, are on the channel
3457 * by looking at the device 0/1 error register. Look at the signature
3458 * stored in each device's taskfile registers, to determine if
3459 * the device is ATA or ATAPI.
3462 * PCI/etc. bus probe sem.
3463 * Obtains host lock.
3466 * Sets ATA_FLAG_DISABLED if bus reset fails.
3469 void ata_bus_reset(struct ata_port *ap)
3471 struct ata_device *device = ap->link.device;
3472 struct ata_ioports *ioaddr = &ap->ioaddr;
3473 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3475 unsigned int dev0, dev1 = 0, devmask = 0;
3478 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
3480 /* determine if device 0/1 are present */
3481 if (ap->flags & ATA_FLAG_SATA_RESET)
3484 dev0 = ata_devchk(ap, 0);
3486 dev1 = ata_devchk(ap, 1);
3490 devmask |= (1 << 0);
3492 devmask |= (1 << 1);
3494 /* select device 0 again */
3495 ap->ops->dev_select(ap, 0);
3497 /* issue bus reset */
3498 if (ap->flags & ATA_FLAG_SRST) {
3499 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
3500 if (rc && rc != -ENODEV)
3505 * determine by signature whether we have ATA or ATAPI devices
3507 device[0].class = ata_dev_try_classify(&device[0], dev0, &err);
3508 if ((slave_possible) && (err != 0x81))
3509 device[1].class = ata_dev_try_classify(&device[1], dev1, &err);
3511 /* is double-select really necessary? */
3512 if (device[1].class != ATA_DEV_NONE)
3513 ap->ops->dev_select(ap, 1);
3514 if (device[0].class != ATA_DEV_NONE)
3515 ap->ops->dev_select(ap, 0);
3517 /* if no devices were detected, disable this port */
3518 if ((device[0].class == ATA_DEV_NONE) &&
3519 (device[1].class == ATA_DEV_NONE))
3522 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
3523 /* set up device control for ATA_FLAG_SATA_RESET */
3524 iowrite8(ap->ctl, ioaddr->ctl_addr);
3531 ata_port_printk(ap, KERN_ERR, "disabling port\n");
3532 ata_port_disable(ap);
3538 * sata_link_debounce - debounce SATA phy status
3539 * @link: ATA link to debounce SATA phy status for
3540 * @params: timing parameters { interval, duratinon, timeout } in msec
3541 * @deadline: deadline jiffies for the operation
3543 * Make sure SStatus of @link reaches stable state, determined by
3544 * holding the same value where DET is not 1 for @duration polled
3545 * every @interval, before @timeout. Timeout constraints the
3546 * beginning of the stable state. Because DET gets stuck at 1 on
3547 * some controllers after hot unplugging, this functions waits
3548 * until timeout then returns 0 if DET is stable at 1.
3550 * @timeout is further limited by @deadline. The sooner of the
3554 * Kernel thread context (may sleep)
3557 * 0 on success, -errno on failure.
3559 int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3560 unsigned long deadline)
3562 unsigned long interval_msec = params[0];
3563 unsigned long duration = msecs_to_jiffies(params[1]);
3564 unsigned long last_jiffies, t;
3568 t = jiffies + msecs_to_jiffies(params[2]);
3569 if (time_before(t, deadline))
3572 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3577 last_jiffies = jiffies;
3580 msleep(interval_msec);
3581 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3587 if (cur == 1 && time_before(jiffies, deadline))
3589 if (time_after(jiffies, last_jiffies + duration))
3594 /* unstable, start over */
3596 last_jiffies = jiffies;
3598 /* Check deadline. If debouncing failed, return
3599 * -EPIPE to tell upper layer to lower link speed.
3601 if (time_after(jiffies, deadline))
3607 * sata_link_resume - resume SATA link
3608 * @link: ATA link to resume SATA
3609 * @params: timing parameters { interval, duratinon, timeout } in msec
3610 * @deadline: deadline jiffies for the operation
3612 * Resume SATA phy @link and debounce it.
3615 * Kernel thread context (may sleep)
3618 * 0 on success, -errno on failure.
3620 int sata_link_resume(struct ata_link *link, const unsigned long *params,
3621 unsigned long deadline)
3626 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3629 scontrol = (scontrol & 0x0f0) | 0x300;
3631 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3634 /* Some PHYs react badly if SStatus is pounded immediately
3635 * after resuming. Delay 200ms before debouncing.
3639 return sata_link_debounce(link, params, deadline);
3643 * ata_std_prereset - prepare for reset
3644 * @link: ATA link to be reset
3645 * @deadline: deadline jiffies for the operation
3647 * @link is about to be reset. Initialize it. Failure from
3648 * prereset makes libata abort whole reset sequence and give up
3649 * that port, so prereset should be best-effort. It does its
3650 * best to prepare for reset sequence but if things go wrong, it
3651 * should just whine, not fail.
3654 * Kernel thread context (may sleep)
3657 * 0 on success, -errno otherwise.
3659 int ata_std_prereset(struct ata_link *link, unsigned long deadline)
3661 struct ata_port *ap = link->ap;
3662 struct ata_eh_context *ehc = &link->eh_context;
3663 const unsigned long *timing = sata_ehc_deb_timing(ehc);
3666 /* handle link resume */
3667 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
3668 (link->flags & ATA_LFLAG_HRST_TO_RESUME))
3669 ehc->i.action |= ATA_EH_HARDRESET;
3671 /* Some PMPs don't work with only SRST, force hardreset if PMP
3674 if (ap->flags & ATA_FLAG_PMP)
3675 ehc->i.action |= ATA_EH_HARDRESET;
3677 /* if we're about to do hardreset, nothing more to do */
3678 if (ehc->i.action & ATA_EH_HARDRESET)
3681 /* if SATA, resume link */
3682 if (ap->flags & ATA_FLAG_SATA) {
3683 rc = sata_link_resume(link, timing, deadline);
3684 /* whine about phy resume failure but proceed */
3685 if (rc && rc != -EOPNOTSUPP)
3686 ata_link_printk(link, KERN_WARNING, "failed to resume "
3687 "link for reset (errno=%d)\n", rc);
3690 /* Wait for !BSY if the controller can wait for the first D2H
3691 * Reg FIS and we don't know that no device is attached.
3693 if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) {
3694 rc = ata_wait_ready(ap, deadline);
3695 if (rc && rc != -ENODEV) {
3696 ata_link_printk(link, KERN_WARNING, "device not ready "
3697 "(errno=%d), forcing hardreset\n", rc);
3698 ehc->i.action |= ATA_EH_HARDRESET;
3706 * ata_std_softreset - reset host port via ATA SRST
3707 * @link: ATA link to reset
3708 * @classes: resulting classes of attached devices
3709 * @deadline: deadline jiffies for the operation
3711 * Reset host port using ATA SRST.
3714 * Kernel thread context (may sleep)
3717 * 0 on success, -errno otherwise.
3719 int ata_std_softreset(struct ata_link *link, unsigned int *classes,
3720 unsigned long deadline)
3722 struct ata_port *ap = link->ap;
3723 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3724 unsigned int devmask = 0;
3730 if (ata_link_offline(link)) {
3731 classes[0] = ATA_DEV_NONE;
3735 /* determine if device 0/1 are present */
3736 if (ata_devchk(ap, 0))
3737 devmask |= (1 << 0);
3738 if (slave_possible && ata_devchk(ap, 1))
3739 devmask |= (1 << 1);
3741 /* select device 0 again */
3742 ap->ops->dev_select(ap, 0);
3744 /* issue bus reset */
3745 DPRINTK("about to softreset, devmask=%x\n", devmask);
3746 rc = ata_bus_softreset(ap, devmask, deadline);
3747 /* if link is occupied, -ENODEV too is an error */
3748 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
3749 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
3753 /* determine by signature whether we have ATA or ATAPI devices */
3754 classes[0] = ata_dev_try_classify(&link->device[0],
3755 devmask & (1 << 0), &err);
3756 if (slave_possible && err != 0x81)
3757 classes[1] = ata_dev_try_classify(&link->device[1],
3758 devmask & (1 << 1), &err);
3761 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3766 * sata_link_hardreset - reset link via SATA phy reset
3767 * @link: link to reset
3768 * @timing: timing parameters { interval, duratinon, timeout } in msec
3769 * @deadline: deadline jiffies for the operation
3771 * SATA phy-reset @link using DET bits of SControl register.
3774 * Kernel thread context (may sleep)
3777 * 0 on success, -errno otherwise.
3779 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
3780 unsigned long deadline)
3787 if (sata_set_spd_needed(link)) {
3788 /* SATA spec says nothing about how to reconfigure
3789 * spd. To be on the safe side, turn off phy during
3790 * reconfiguration. This works for at least ICH7 AHCI
3793 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3796 scontrol = (scontrol & 0x0f0) | 0x304;
3798 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3804 /* issue phy wake/reset */
3805 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3808 scontrol = (scontrol & 0x0f0) | 0x301;
3810 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
3813 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3814 * 10.4.2 says at least 1 ms.
3818 /* bring link back */
3819 rc = sata_link_resume(link, timing, deadline);
3821 DPRINTK("EXIT, rc=%d\n", rc);
3826 * sata_std_hardreset - reset host port via SATA phy reset
3827 * @link: link to reset
3828 * @class: resulting class of attached device
3829 * @deadline: deadline jiffies for the operation
3831 * SATA phy-reset host port using DET bits of SControl register,
3832 * wait for !BSY and classify the attached device.
3835 * Kernel thread context (may sleep)
3838 * 0 on success, -errno otherwise.
3840 int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3841 unsigned long deadline)
3843 struct ata_port *ap = link->ap;
3844 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3850 rc = sata_link_hardreset(link, timing, deadline);
3852 ata_link_printk(link, KERN_ERR,
3853 "COMRESET failed (errno=%d)\n", rc);
3857 /* TODO: phy layer with polling, timeouts, etc. */
3858 if (ata_link_offline(link)) {
3859 *class = ATA_DEV_NONE;
3860 DPRINTK("EXIT, link offline\n");
3864 /* wait a while before checking status */
3865 ata_wait_after_reset(ap, deadline);
3867 /* If PMP is supported, we have to do follow-up SRST. Note
3868 * that some PMPs don't send D2H Reg FIS after hardreset at
3869 * all if the first port is empty. Wait for it just for a
3870 * second and request follow-up SRST.
3872 if (ap->flags & ATA_FLAG_PMP) {
3873 ata_wait_ready(ap, jiffies + HZ);
3877 rc = ata_wait_ready(ap, deadline);
3878 /* link occupied, -ENODEV too is an error */
3880 ata_link_printk(link, KERN_ERR,
3881 "COMRESET failed (errno=%d)\n", rc);
3885 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3887 *class = ata_dev_try_classify(link->device, 1, NULL);
3889 DPRINTK("EXIT, class=%u\n", *class);
3894 * ata_std_postreset - standard postreset callback
3895 * @link: the target ata_link
3896 * @classes: classes of attached devices
3898 * This function is invoked after a successful reset. Note that
3899 * the device might have been reset more than once using
3900 * different reset methods before postreset is invoked.
3903 * Kernel thread context (may sleep)
3905 void ata_std_postreset(struct ata_link *link, unsigned int *classes)
3907 struct ata_port *ap = link->ap;
3912 /* print link status */
3913 sata_print_link_status(link);
3916 if (sata_scr_read(link, SCR_ERROR, &serror) == 0)
3917 sata_scr_write(link, SCR_ERROR, serror);
3919 /* is double-select really necessary? */
3920 if (classes[0] != ATA_DEV_NONE)
3921 ap->ops->dev_select(ap, 1);
3922 if (classes[1] != ATA_DEV_NONE)
3923 ap->ops->dev_select(ap, 0);
3925 /* bail out if no device is present */
3926 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3927 DPRINTK("EXIT, no device\n");
3931 /* set up device control */
3932 if (ap->ioaddr.ctl_addr)
3933 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3939 * ata_dev_same_device - Determine whether new ID matches configured device
3940 * @dev: device to compare against
3941 * @new_class: class of the new device
3942 * @new_id: IDENTIFY page of the new device
3944 * Compare @new_class and @new_id against @dev and determine
3945 * whether @dev is the device indicated by @new_class and
3952 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3954 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3957 const u16 *old_id = dev->id;
3958 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3959 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3961 if (dev->class != new_class) {
3962 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3963 dev->class, new_class);
3967 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3968 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3969 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3970 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3972 if (strcmp(model[0], model[1])) {
3973 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3974 "'%s' != '%s'\n", model[0], model[1]);
3978 if (strcmp(serial[0], serial[1])) {
3979 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3980 "'%s' != '%s'\n", serial[0], serial[1]);
3988 * ata_dev_reread_id - Re-read IDENTIFY data
3989 * @dev: target ATA device
3990 * @readid_flags: read ID flags
3992 * Re-read IDENTIFY page and make sure @dev is still attached to
3996 * Kernel thread context (may sleep)
3999 * 0 on success, negative errno otherwise
4001 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
4003 unsigned int class = dev->class;
4004 u16 *id = (void *)dev->link->ap->sector_buf;
4008 rc = ata_dev_read_id(dev, &class, readid_flags, id);
4012 /* is the device still there? */
4013 if (!ata_dev_same_device(dev, class, id))
4016 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
4021 * ata_dev_revalidate - Revalidate ATA device
4022 * @dev: device to revalidate
4023 * @new_class: new class code
4024 * @readid_flags: read ID flags
4026 * Re-read IDENTIFY page, make sure @dev is still attached to the
4027 * port and reconfigure it according to the new IDENTIFY page.
4030 * Kernel thread context (may sleep)
4033 * 0 on success, negative errno otherwise
4035 int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
4036 unsigned int readid_flags)
4038 u64 n_sectors = dev->n_sectors;
4041 if (!ata_dev_enabled(dev))
4044 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
4045 if (ata_class_enabled(new_class) &&
4046 new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) {
4047 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n",
4048 dev->class, new_class);
4054 rc = ata_dev_reread_id(dev, readid_flags);
4058 /* configure device according to the new ID */
4059 rc = ata_dev_configure(dev);
4063 /* verify n_sectors hasn't changed */
4064 if (dev->class == ATA_DEV_ATA && n_sectors &&
4065 dev->n_sectors != n_sectors) {
4066 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
4068 (unsigned long long)n_sectors,
4069 (unsigned long long)dev->n_sectors);
4071 /* restore original n_sectors */
4072 dev->n_sectors = n_sectors;
4081 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
4085 struct ata_blacklist_entry {
4086 const char *model_num;
4087 const char *model_rev;
4088 unsigned long horkage;
4091 static const struct ata_blacklist_entry ata_device_blacklist [] = {
4092 /* Devices with DMA related problems under Linux */
4093 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4094 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4095 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4096 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4097 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4098 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4099 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4100 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4101 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
4102 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
4103 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
4104 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4105 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4106 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4107 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4108 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
4109 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
4110 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
4111 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4112 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4113 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4114 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4115 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4116 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4117 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4118 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
4119 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4120 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
4121 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
4122 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
4123 /* Odd clown on sil3726/4726 PMPs */
4124 { "Config Disk", NULL, ATA_HORKAGE_NODMA |
4125 ATA_HORKAGE_SKIP_PM },
4127 /* Weird ATAPI devices */
4128 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
4130 /* Devices we expect to fail diagnostics */
4132 /* Devices where NCQ should be avoided */
4134 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
4135 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4136 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
4138 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
4139 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
4140 { "HITACHI HDS7250SASUN500G*", NULL, ATA_HORKAGE_NONCQ },
4141 { "HITACHI HDS7225SBSUN250G*", NULL, ATA_HORKAGE_NONCQ },
4142 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
4144 /* Blacklist entries taken from Silicon Image 3124/3132
4145 Windows driver .inf file - also several Linux problem reports */
4146 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4147 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4148 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
4149 /* Drives which do spurious command completion */
4150 { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, },
4151 { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, },
4152 { "HDT722516DLA380", "V43OA96A", ATA_HORKAGE_NONCQ, },
4153 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
4154 { "Hitachi HTS542525K9SA00", "BBFOC31P", ATA_HORKAGE_NONCQ, },
4155 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
4156 { "WDC WD3200AAJS-00RYA0", "12.01B01", ATA_HORKAGE_NONCQ, },
4157 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
4158 { "ST9120822AS", "3.CLF", ATA_HORKAGE_NONCQ, },
4159 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
4160 { "ST9160821AS", "3.ALD", ATA_HORKAGE_NONCQ, },
4161 { "ST9160821AS", "3.CCD", ATA_HORKAGE_NONCQ, },
4162 { "ST3160812AS", "3.ADJ", ATA_HORKAGE_NONCQ, },
4163 { "ST980813AS", "3.ADB", ATA_HORKAGE_NONCQ, },
4164 { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, },
4165 { "Maxtor 7V300F0", "VA111900", ATA_HORKAGE_NONCQ, },
4167 /* devices which puke on READ_NATIVE_MAX */
4168 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4169 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4170 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4171 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
4173 /* Devices which report 1 sector over size HPA */
4174 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4175 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
4177 /* Devices which get the IVB wrong */
4178 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
4179 { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, },
4185 static int strn_pattern_cmp(const char *patt, const char *name, int wildchar)
4191 * check for trailing wildcard: *\0
4193 p = strchr(patt, wildchar);
4194 if (p && ((*(p + 1)) == 0))
4205 return strncmp(patt, name, len);
4208 static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
4210 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4211 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
4212 const struct ata_blacklist_entry *ad = ata_device_blacklist;
4214 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4215 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
4217 while (ad->model_num) {
4218 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) {
4219 if (ad->model_rev == NULL)
4221 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*'))
4229 static int ata_dma_blacklisted(const struct ata_device *dev)
4231 /* We don't support polling DMA.
4232 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4233 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4235 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
4236 (dev->flags & ATA_DFLAG_CDB_INTR))
4238 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
4242 * ata_is_40wire - check drive side detection
4245 * Perform drive side detection decoding, allowing for device vendors
4246 * who can't follow the documentation.
4249 static int ata_is_40wire(struct ata_device *dev)
4251 if (dev->horkage & ATA_HORKAGE_IVB)
4252 return ata_drive_40wire_relaxed(dev->id);
4253 return ata_drive_40wire(dev->id);
4257 * ata_dev_xfermask - Compute supported xfermask of the given device
4258 * @dev: Device to compute xfermask for
4260 * Compute supported xfermask of @dev and store it in
4261 * dev->*_mask. This function is responsible for applying all
4262 * known limits including host controller limits, device
4268 static void ata_dev_xfermask(struct ata_device *dev)
4270 struct ata_link *link = dev->link;
4271 struct ata_port *ap = link->ap;
4272 struct ata_host *host = ap->host;
4273 unsigned long xfer_mask;
4275 /* controller modes available */
4276 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4277 ap->mwdma_mask, ap->udma_mask);
4279 /* drive modes available */
4280 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4281 dev->mwdma_mask, dev->udma_mask);
4282 xfer_mask &= ata_id_xfermask(dev->id);
4285 * CFA Advanced TrueIDE timings are not allowed on a shared
4288 if (ata_dev_pair(dev)) {
4289 /* No PIO5 or PIO6 */
4290 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4291 /* No MWDMA3 or MWDMA 4 */
4292 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4295 if (ata_dma_blacklisted(dev)) {
4296 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
4297 ata_dev_printk(dev, KERN_WARNING,
4298 "device is on DMA blacklist, disabling DMA\n");
4301 if ((host->flags & ATA_HOST_SIMPLEX) &&
4302 host->simplex_claimed && host->simplex_claimed != ap) {
4303 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
4304 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
4305 "other device, disabling DMA\n");
4308 if (ap->flags & ATA_FLAG_NO_IORDY)
4309 xfer_mask &= ata_pio_mask_no_iordy(dev);
4311 if (ap->ops->mode_filter)
4312 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
4314 /* Apply cable rule here. Don't apply it early because when
4315 * we handle hot plug the cable type can itself change.
4316 * Check this last so that we know if the transfer rate was
4317 * solely limited by the cable.
4318 * Unknown or 80 wire cables reported host side are checked
4319 * drive side as well. Cases where we know a 40wire cable
4320 * is used safely for 80 are not checked here.
4322 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4323 /* UDMA/44 or higher would be available */
4324 if ((ap->cbl == ATA_CBL_PATA40) ||
4325 (ata_is_40wire(dev) &&
4326 (ap->cbl == ATA_CBL_PATA_UNK ||
4327 ap->cbl == ATA_CBL_PATA80))) {
4328 ata_dev_printk(dev, KERN_WARNING,
4329 "limited to UDMA/33 due to 40-wire cable\n");
4330 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4333 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4334 &dev->mwdma_mask, &dev->udma_mask);
4338 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
4339 * @dev: Device to which command will be sent
4341 * Issue SET FEATURES - XFER MODE command to device @dev
4345 * PCI/etc. bus probe sem.
4348 * 0 on success, AC_ERR_* mask otherwise.
4351 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
4353 struct ata_taskfile tf;
4354 unsigned int err_mask;
4356 /* set up set-features taskfile */
4357 DPRINTK("set features - xfer mode\n");
4359 /* Some controllers and ATAPI devices show flaky interrupt
4360 * behavior after setting xfer mode. Use polling instead.
4362 ata_tf_init(dev, &tf);
4363 tf.command = ATA_CMD_SET_FEATURES;
4364 tf.feature = SETFEATURES_XFER;
4365 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
4366 tf.protocol = ATA_PROT_NODATA;
4367 tf.nsect = dev->xfer_mode;
4369 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4371 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4375 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
4376 * @dev: Device to which command will be sent
4377 * @enable: Whether to enable or disable the feature
4378 * @feature: The sector count represents the feature to set
4380 * Issue SET FEATURES - SATA FEATURES command to device @dev
4381 * on port @ap with sector count
4384 * PCI/etc. bus probe sem.
4387 * 0 on success, AC_ERR_* mask otherwise.
4389 static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable,
4392 struct ata_taskfile tf;
4393 unsigned int err_mask;
4395 /* set up set-features taskfile */
4396 DPRINTK("set features - SATA features\n");
4398 ata_tf_init(dev, &tf);
4399 tf.command = ATA_CMD_SET_FEATURES;
4400 tf.feature = enable;
4401 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4402 tf.protocol = ATA_PROT_NODATA;
4405 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4407 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4412 * ata_dev_init_params - Issue INIT DEV PARAMS command
4413 * @dev: Device to which command will be sent
4414 * @heads: Number of heads (taskfile parameter)
4415 * @sectors: Number of sectors (taskfile parameter)
4418 * Kernel thread context (may sleep)
4421 * 0 on success, AC_ERR_* mask otherwise.
4423 static unsigned int ata_dev_init_params(struct ata_device *dev,
4424 u16 heads, u16 sectors)
4426 struct ata_taskfile tf;
4427 unsigned int err_mask;
4429 /* Number of sectors per track 1-255. Number of heads 1-16 */
4430 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
4431 return AC_ERR_INVALID;
4433 /* set up init dev params taskfile */
4434 DPRINTK("init dev params \n");
4436 ata_tf_init(dev, &tf);
4437 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4438 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4439 tf.protocol = ATA_PROT_NODATA;
4441 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
4443 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4444 /* A clean abort indicates an original or just out of spec drive
4445 and we should continue as we issue the setup based on the
4446 drive reported working geometry */
4447 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4450 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4455 * ata_sg_clean - Unmap DMA memory associated with command
4456 * @qc: Command containing DMA memory to be released
4458 * Unmap all mapped DMA memory associated with this command.
4461 * spin_lock_irqsave(host lock)
4463 void ata_sg_clean(struct ata_queued_cmd *qc)
4465 struct ata_port *ap = qc->ap;
4466 struct scatterlist *sg = qc->__sg;
4467 int dir = qc->dma_dir;
4468 void *pad_buf = NULL;
4470 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
4471 WARN_ON(sg == NULL);
4473 if (qc->flags & ATA_QCFLAG_SINGLE)
4474 WARN_ON(qc->n_elem > 1);
4476 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
4478 /* if we padded the buffer out to 32-bit bound, and data
4479 * xfer direction is from-device, we must copy from the
4480 * pad buffer back into the supplied buffer
4482 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
4483 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4485 if (qc->flags & ATA_QCFLAG_SG) {
4487 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
4488 /* restore last sg */
4489 sg_last(sg, qc->orig_n_elem)->length += qc->pad_len;
4491 struct scatterlist *psg = &qc->pad_sgent;
4492 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
4493 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
4494 kunmap_atomic(addr, KM_IRQ0);
4498 dma_unmap_single(ap->dev,
4499 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
4502 sg->length += qc->pad_len;
4504 memcpy(qc->buf_virt + sg->length - qc->pad_len,
4505 pad_buf, qc->pad_len);
4508 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4513 * ata_fill_sg - Fill PCI IDE PRD table
4514 * @qc: Metadata associated with taskfile to be transferred
4516 * Fill PCI IDE PRD (scatter-gather) table with segments
4517 * associated with the current disk command.
4520 * spin_lock_irqsave(host lock)
4523 static void ata_fill_sg(struct ata_queued_cmd *qc)
4525 struct ata_port *ap = qc->ap;
4526 struct scatterlist *sg;
4529 WARN_ON(qc->__sg == NULL);
4530 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4533 ata_for_each_sg(sg, qc) {
4537 /* determine if physical DMA addr spans 64K boundary.
4538 * Note h/w doesn't support 64-bit, so we unconditionally
4539 * truncate dma_addr_t to u32.
4541 addr = (u32) sg_dma_address(sg);
4542 sg_len = sg_dma_len(sg);
4545 offset = addr & 0xffff;
4547 if ((offset + sg_len) > 0x10000)
4548 len = 0x10000 - offset;
4550 ap->prd[idx].addr = cpu_to_le32(addr);
4551 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
4552 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4561 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4565 * ata_fill_sg_dumb - Fill PCI IDE PRD table
4566 * @qc: Metadata associated with taskfile to be transferred
4568 * Fill PCI IDE PRD (scatter-gather) table with segments
4569 * associated with the current disk command. Perform the fill
4570 * so that we avoid writing any length 64K records for
4571 * controllers that don't follow the spec.
4574 * spin_lock_irqsave(host lock)
4577 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
4579 struct ata_port *ap = qc->ap;
4580 struct scatterlist *sg;
4583 WARN_ON(qc->__sg == NULL);
4584 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4587 ata_for_each_sg(sg, qc) {
4589 u32 sg_len, len, blen;
4591 /* determine if physical DMA addr spans 64K boundary.
4592 * Note h/w doesn't support 64-bit, so we unconditionally
4593 * truncate dma_addr_t to u32.
4595 addr = (u32) sg_dma_address(sg);
4596 sg_len = sg_dma_len(sg);
4599 offset = addr & 0xffff;
4601 if ((offset + sg_len) > 0x10000)
4602 len = 0x10000 - offset;
4604 blen = len & 0xffff;
4605 ap->prd[idx].addr = cpu_to_le32(addr);
4607 /* Some PATA chipsets like the CS5530 can't
4608 cope with 0x0000 meaning 64K as the spec says */
4609 ap->prd[idx].flags_len = cpu_to_le32(0x8000);
4611 ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);
4613 ap->prd[idx].flags_len = cpu_to_le32(blen);
4614 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4623 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4627 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
4628 * @qc: Metadata associated with taskfile to check
4630 * Allow low-level driver to filter ATA PACKET commands, returning
4631 * a status indicating whether or not it is OK to use DMA for the
4632 * supplied PACKET command.
4635 * spin_lock_irqsave(host lock)
4637 * RETURNS: 0 when ATAPI DMA can be used
4640 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
4642 struct ata_port *ap = qc->ap;
4644 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4645 * few ATAPI devices choke on such DMA requests.
4647 if (unlikely(qc->nbytes & 15))
4650 if (ap->ops->check_atapi_dma)
4651 return ap->ops->check_atapi_dma(qc);
4657 * ata_std_qc_defer - Check whether a qc needs to be deferred
4658 * @qc: ATA command in question
4660 * Non-NCQ commands cannot run with any other command, NCQ or
4661 * not. As upper layer only knows the queue depth, we are
4662 * responsible for maintaining exclusion. This function checks
4663 * whether a new command @qc can be issued.
4666 * spin_lock_irqsave(host lock)
4669 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4671 int ata_std_qc_defer(struct ata_queued_cmd *qc)
4673 struct ata_link *link = qc->dev->link;
4675 if (qc->tf.protocol == ATA_PROT_NCQ) {
4676 if (!ata_tag_valid(link->active_tag))
4679 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4683 return ATA_DEFER_LINK;
4687 * ata_qc_prep - Prepare taskfile for submission
4688 * @qc: Metadata associated with taskfile to be prepared
4690 * Prepare ATA taskfile for submission.
4693 * spin_lock_irqsave(host lock)
4695 void ata_qc_prep(struct ata_queued_cmd *qc)
4697 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4704 * ata_dumb_qc_prep - Prepare taskfile for submission
4705 * @qc: Metadata associated with taskfile to be prepared
4707 * Prepare ATA taskfile for submission.
4710 * spin_lock_irqsave(host lock)
4712 void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
4714 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4717 ata_fill_sg_dumb(qc);
4720 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
4723 * ata_sg_init_one - Associate command with memory buffer
4724 * @qc: Command to be associated
4725 * @buf: Memory buffer
4726 * @buflen: Length of memory buffer, in bytes.
4728 * Initialize the data-related elements of queued_cmd @qc
4729 * to point to a single memory buffer, @buf of byte length @buflen.
4732 * spin_lock_irqsave(host lock)
4735 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
4737 qc->flags |= ATA_QCFLAG_SINGLE;
4739 qc->__sg = &qc->sgent;
4741 qc->orig_n_elem = 1;
4743 qc->nbytes = buflen;
4744 qc->cursg = qc->__sg;
4746 sg_init_one(&qc->sgent, buf, buflen);
4750 * ata_sg_init - Associate command with scatter-gather table.
4751 * @qc: Command to be associated
4752 * @sg: Scatter-gather table.
4753 * @n_elem: Number of elements in s/g table.
4755 * Initialize the data-related elements of queued_cmd @qc
4756 * to point to a scatter-gather table @sg, containing @n_elem
4760 * spin_lock_irqsave(host lock)
4763 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4764 unsigned int n_elem)
4766 qc->flags |= ATA_QCFLAG_SG;
4768 qc->n_elem = n_elem;
4769 qc->orig_n_elem = n_elem;
4770 qc->cursg = qc->__sg;
4774 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
4775 * @qc: Command with memory buffer to be mapped.
4777 * DMA-map the memory buffer associated with queued_cmd @qc.
4780 * spin_lock_irqsave(host lock)
4783 * Zero on success, negative on error.
4786 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
4788 struct ata_port *ap = qc->ap;
4789 int dir = qc->dma_dir;
4790 struct scatterlist *sg = qc->__sg;
4791 dma_addr_t dma_address;
4794 /* we must lengthen transfers to end on a 32-bit boundary */
4795 qc->pad_len = sg->length & 3;
4797 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4798 struct scatterlist *psg = &qc->pad_sgent;
4800 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4802 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4804 if (qc->tf.flags & ATA_TFLAG_WRITE)
4805 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
4808 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4809 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4811 sg->length -= qc->pad_len;
4812 if (sg->length == 0)
4815 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
4816 sg->length, qc->pad_len);
4824 dma_address = dma_map_single(ap->dev, qc->buf_virt,
4826 if (dma_mapping_error(dma_address)) {
4828 sg->length += qc->pad_len;
4832 sg_dma_address(sg) = dma_address;
4833 sg_dma_len(sg) = sg->length;
4836 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
4837 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4843 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4844 * @qc: Command with scatter-gather table to be mapped.
4846 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4849 * spin_lock_irqsave(host lock)
4852 * Zero on success, negative on error.
4856 static int ata_sg_setup(struct ata_queued_cmd *qc)
4858 struct ata_port *ap = qc->ap;
4859 struct scatterlist *sg = qc->__sg;
4860 struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem);
4861 int n_elem, pre_n_elem, dir, trim_sg = 0;
4863 VPRINTK("ENTER, ata%u\n", ap->print_id);
4864 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
4866 /* we must lengthen transfers to end on a 32-bit boundary */
4867 qc->pad_len = lsg->length & 3;
4869 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4870 struct scatterlist *psg = &qc->pad_sgent;
4871 unsigned int offset;
4873 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4875 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4878 * psg->page/offset are used to copy to-be-written
4879 * data in this function or read data in ata_sg_clean.
4881 offset = lsg->offset + lsg->length - qc->pad_len;
4882 sg_init_table(psg, 1);
4883 sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT),
4884 qc->pad_len, offset_in_page(offset));
4886 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4887 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
4888 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
4889 kunmap_atomic(addr, KM_IRQ0);
4892 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4893 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4895 lsg->length -= qc->pad_len;
4896 if (lsg->length == 0)
4899 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
4900 qc->n_elem - 1, lsg->length, qc->pad_len);
4903 pre_n_elem = qc->n_elem;
4904 if (trim_sg && pre_n_elem)
4913 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
4915 /* restore last sg */
4916 lsg->length += qc->pad_len;
4920 DPRINTK("%d sg elements mapped\n", n_elem);
4923 qc->n_elem = n_elem;
4929 * swap_buf_le16 - swap halves of 16-bit words in place
4930 * @buf: Buffer to swap
4931 * @buf_words: Number of 16-bit words in buffer.
4933 * Swap halves of 16-bit words if needed to convert from
4934 * little-endian byte order to native cpu byte order, or
4938 * Inherited from caller.
4940 void swap_buf_le16(u16 *buf, unsigned int buf_words)
4945 for (i = 0; i < buf_words; i++)
4946 buf[i] = le16_to_cpu(buf[i]);
4947 #endif /* __BIG_ENDIAN */
4951 * ata_data_xfer - Transfer data by PIO
4952 * @adev: device to target
4954 * @buflen: buffer length
4955 * @write_data: read/write
4957 * Transfer data from/to the device data register by PIO.
4960 * Inherited from caller.
4962 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
4963 unsigned int buflen, int write_data)
4965 struct ata_port *ap = adev->link->ap;
4966 unsigned int words = buflen >> 1;
4968 /* Transfer multiple of 2 bytes */
4970 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
4972 ioread16_rep(ap->ioaddr.data_addr, buf, words);
4974 /* Transfer trailing 1 byte, if any. */
4975 if (unlikely(buflen & 0x01)) {
4976 u16 align_buf[1] = { 0 };
4977 unsigned char *trailing_buf = buf + buflen - 1;
4980 memcpy(align_buf, trailing_buf, 1);
4981 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
4983 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
4984 memcpy(trailing_buf, align_buf, 1);
4990 * ata_data_xfer_noirq - Transfer data by PIO
4991 * @adev: device to target
4993 * @buflen: buffer length
4994 * @write_data: read/write
4996 * Transfer data from/to the device data register by PIO. Do the
4997 * transfer with interrupts disabled.
5000 * Inherited from caller.
5002 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
5003 unsigned int buflen, int write_data)
5005 unsigned long flags;
5006 local_irq_save(flags);
5007 ata_data_xfer(adev, buf, buflen, write_data);
5008 local_irq_restore(flags);
5013 * ata_pio_sector - Transfer a sector of data.
5014 * @qc: Command on going
5016 * Transfer qc->sect_size bytes of data from/to the ATA device.
5019 * Inherited from caller.
5022 static void ata_pio_sector(struct ata_queued_cmd *qc)
5024 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
5025 struct ata_port *ap = qc->ap;
5027 unsigned int offset;
5030 if (qc->curbytes == qc->nbytes - qc->sect_size)
5031 ap->hsm_task_state = HSM_ST_LAST;
5033 page = sg_page(qc->cursg);
5034 offset = qc->cursg->offset + qc->cursg_ofs;
5036 /* get the current page and offset */
5037 page = nth_page(page, (offset >> PAGE_SHIFT));
5038 offset %= PAGE_SIZE;
5040 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
5042 if (PageHighMem(page)) {
5043 unsigned long flags;
5045 /* FIXME: use a bounce buffer */
5046 local_irq_save(flags);
5047 buf = kmap_atomic(page, KM_IRQ0);
5049 /* do the actual data transfer */
5050 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
5052 kunmap_atomic(buf, KM_IRQ0);
5053 local_irq_restore(flags);
5055 buf = page_address(page);
5056 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
5059 qc->curbytes += qc->sect_size;
5060 qc->cursg_ofs += qc->sect_size;
5062 if (qc->cursg_ofs == qc->cursg->length) {
5063 qc->cursg = sg_next(qc->cursg);
5069 * ata_pio_sectors - Transfer one or many sectors.
5070 * @qc: Command on going
5072 * Transfer one or many sectors of data from/to the
5073 * ATA device for the DRQ request.
5076 * Inherited from caller.
5079 static void ata_pio_sectors(struct ata_queued_cmd *qc)
5081 if (is_multi_taskfile(&qc->tf)) {
5082 /* READ/WRITE MULTIPLE */
5085 WARN_ON(qc->dev->multi_count == 0);
5087 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
5088 qc->dev->multi_count);
5094 ata_altstatus(qc->ap); /* flush */
5098 * atapi_send_cdb - Write CDB bytes to hardware
5099 * @ap: Port to which ATAPI device is attached.
5100 * @qc: Taskfile currently active
5102 * When device has indicated its readiness to accept
5103 * a CDB, this function is called. Send the CDB.
5109 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
5112 DPRINTK("send cdb\n");
5113 WARN_ON(qc->dev->cdb_len < 12);
5115 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
5116 ata_altstatus(ap); /* flush */
5118 switch (qc->tf.protocol) {
5119 case ATA_PROT_ATAPI:
5120 ap->hsm_task_state = HSM_ST;
5122 case ATA_PROT_ATAPI_NODATA:
5123 ap->hsm_task_state = HSM_ST_LAST;
5125 case ATA_PROT_ATAPI_DMA:
5126 ap->hsm_task_state = HSM_ST_LAST;
5127 /* initiate bmdma */
5128 ap->ops->bmdma_start(qc);
5134 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
5135 * @qc: Command on going
5136 * @bytes: number of bytes
5138 * Transfer Transfer data from/to the ATAPI device.
5141 * Inherited from caller.
5145 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
5147 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
5148 struct scatterlist *sg = qc->__sg;
5149 struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem);
5150 struct ata_port *ap = qc->ap;
5153 unsigned int offset, count;
5156 if (qc->curbytes + bytes >= qc->nbytes)
5157 ap->hsm_task_state = HSM_ST_LAST;
5160 if (unlikely(no_more_sg)) {
5162 * The end of qc->sg is reached and the device expects
5163 * more data to transfer. In order not to overrun qc->sg
5164 * and fulfill length specified in the byte count register,
5165 * - for read case, discard trailing data from the device
5166 * - for write case, padding zero data to the device
5168 u16 pad_buf[1] = { 0 };
5169 unsigned int words = bytes >> 1;
5172 if (words) /* warning if bytes > 1 */
5173 ata_dev_printk(qc->dev, KERN_WARNING,
5174 "%u bytes trailing data\n", bytes);
5176 for (i = 0; i < words; i++)
5177 ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write);
5179 ap->hsm_task_state = HSM_ST_LAST;
5186 offset = sg->offset + qc->cursg_ofs;
5188 /* get the current page and offset */
5189 page = nth_page(page, (offset >> PAGE_SHIFT));
5190 offset %= PAGE_SIZE;
5192 /* don't overrun current sg */
5193 count = min(sg->length - qc->cursg_ofs, bytes);
5195 /* don't cross page boundaries */
5196 count = min(count, (unsigned int)PAGE_SIZE - offset);
5198 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
5200 if (PageHighMem(page)) {
5201 unsigned long flags;
5203 /* FIXME: use bounce buffer */
5204 local_irq_save(flags);
5205 buf = kmap_atomic(page, KM_IRQ0);
5207 /* do the actual data transfer */
5208 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
5210 kunmap_atomic(buf, KM_IRQ0);
5211 local_irq_restore(flags);
5213 buf = page_address(page);
5214 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
5218 qc->curbytes += count;
5219 qc->cursg_ofs += count;
5221 if (qc->cursg_ofs == sg->length) {
5222 if (qc->cursg == lsg)
5225 qc->cursg = sg_next(qc->cursg);
5234 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
5235 * @qc: Command on going
5237 * Transfer Transfer data from/to the ATAPI device.
5240 * Inherited from caller.
5243 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
5245 struct ata_port *ap = qc->ap;
5246 struct ata_device *dev = qc->dev;
5247 unsigned int ireason, bc_lo, bc_hi, bytes;
5248 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
5250 /* Abuse qc->result_tf for temp storage of intermediate TF
5251 * here to save some kernel stack usage.
5252 * For normal completion, qc->result_tf is not relevant. For
5253 * error, qc->result_tf is later overwritten by ata_qc_complete().
5254 * So, the correctness of qc->result_tf is not affected.
5256 ap->ops->tf_read(ap, &qc->result_tf);
5257 ireason = qc->result_tf.nsect;
5258 bc_lo = qc->result_tf.lbam;
5259 bc_hi = qc->result_tf.lbah;
5260 bytes = (bc_hi << 8) | bc_lo;
5262 /* shall be cleared to zero, indicating xfer of data */
5263 if (ireason & (1 << 0))
5266 /* make sure transfer direction matches expected */
5267 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
5268 if (do_write != i_write)
5271 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
5273 __atapi_pio_bytes(qc, bytes);
5274 ata_altstatus(ap); /* flush */
5279 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
5280 qc->err_mask |= AC_ERR_HSM;
5281 ap->hsm_task_state = HSM_ST_ERR;
5285 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
5286 * @ap: the target ata_port
5290 * 1 if ok in workqueue, 0 otherwise.
5293 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
5295 if (qc->tf.flags & ATA_TFLAG_POLLING)
5298 if (ap->hsm_task_state == HSM_ST_FIRST) {
5299 if (qc->tf.protocol == ATA_PROT_PIO &&
5300 (qc->tf.flags & ATA_TFLAG_WRITE))
5303 if (is_atapi_taskfile(&qc->tf) &&
5304 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5312 * ata_hsm_qc_complete - finish a qc running on standard HSM
5313 * @qc: Command to complete
5314 * @in_wq: 1 if called from workqueue, 0 otherwise
5316 * Finish @qc which is running on standard HSM.
5319 * If @in_wq is zero, spin_lock_irqsave(host lock).
5320 * Otherwise, none on entry and grabs host lock.
5322 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
5324 struct ata_port *ap = qc->ap;
5325 unsigned long flags;
5327 if (ap->ops->error_handler) {
5329 spin_lock_irqsave(ap->lock, flags);
5331 /* EH might have kicked in while host lock is
5334 qc = ata_qc_from_tag(ap, qc->tag);
5336 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
5337 ap->ops->irq_on(ap);
5338 ata_qc_complete(qc);
5340 ata_port_freeze(ap);
5343 spin_unlock_irqrestore(ap->lock, flags);
5345 if (likely(!(qc->err_mask & AC_ERR_HSM)))
5346 ata_qc_complete(qc);
5348 ata_port_freeze(ap);
5352 spin_lock_irqsave(ap->lock, flags);
5353 ap->ops->irq_on(ap);
5354 ata_qc_complete(qc);
5355 spin_unlock_irqrestore(ap->lock, flags);
5357 ata_qc_complete(qc);
5362 * ata_hsm_move - move the HSM to the next state.
5363 * @ap: the target ata_port
5365 * @status: current device status
5366 * @in_wq: 1 if called from workqueue, 0 otherwise
5369 * 1 when poll next status needed, 0 otherwise.
5371 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
5372 u8 status, int in_wq)
5374 unsigned long flags = 0;
5377 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
5379 /* Make sure ata_qc_issue_prot() does not throw things
5380 * like DMA polling into the workqueue. Notice that
5381 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
5383 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
5386 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
5387 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
5389 switch (ap->hsm_task_state) {
5391 /* Send first data block or PACKET CDB */
5393 /* If polling, we will stay in the work queue after
5394 * sending the data. Otherwise, interrupt handler
5395 * takes over after sending the data.
5397 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
5399 /* check device status */
5400 if (unlikely((status & ATA_DRQ) == 0)) {
5401 /* handle BSY=0, DRQ=0 as error */
5402 if (likely(status & (ATA_ERR | ATA_DF)))
5403 /* device stops HSM for abort/error */
5404 qc->err_mask |= AC_ERR_DEV;
5406 /* HSM violation. Let EH handle this */
5407 qc->err_mask |= AC_ERR_HSM;
5409 ap->hsm_task_state = HSM_ST_ERR;
5413 /* Device should not ask for data transfer (DRQ=1)
5414 * when it finds something wrong.
5415 * We ignore DRQ here and stop the HSM by
5416 * changing hsm_task_state to HSM_ST_ERR and
5417 * let the EH abort the command or reset the device.
5419 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5420 /* Some ATAPI tape drives forget to clear the ERR bit
5421 * when doing the next command (mostly request sense).
5422 * We ignore ERR here to workaround and proceed sending
5425 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
5426 ata_port_printk(ap, KERN_WARNING,
5427 "DRQ=1 with device error, "
5428 "dev_stat 0x%X\n", status);
5429 qc->err_mask |= AC_ERR_HSM;
5430 ap->hsm_task_state = HSM_ST_ERR;
5435 /* Send the CDB (atapi) or the first data block (ata pio out).
5436 * During the state transition, interrupt handler shouldn't
5437 * be invoked before the data transfer is complete and
5438 * hsm_task_state is changed. Hence, the following locking.
5441 spin_lock_irqsave(ap->lock, flags);
5443 if (qc->tf.protocol == ATA_PROT_PIO) {
5444 /* PIO data out protocol.
5445 * send first data block.
5448 /* ata_pio_sectors() might change the state
5449 * to HSM_ST_LAST. so, the state is changed here
5450 * before ata_pio_sectors().
5452 ap->hsm_task_state = HSM_ST;
5453 ata_pio_sectors(qc);
5456 atapi_send_cdb(ap, qc);
5459 spin_unlock_irqrestore(ap->lock, flags);
5461 /* if polling, ata_pio_task() handles the rest.
5462 * otherwise, interrupt handler takes over from here.
5467 /* complete command or read/write the data register */
5468 if (qc->tf.protocol == ATA_PROT_ATAPI) {
5469 /* ATAPI PIO protocol */
5470 if ((status & ATA_DRQ) == 0) {
5471 /* No more data to transfer or device error.
5472 * Device error will be tagged in HSM_ST_LAST.
5474 ap->hsm_task_state = HSM_ST_LAST;
5478 /* Device should not ask for data transfer (DRQ=1)
5479 * when it finds something wrong.
5480 * We ignore DRQ here and stop the HSM by
5481 * changing hsm_task_state to HSM_ST_ERR and
5482 * let the EH abort the command or reset the device.
5484 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5485 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
5486 "device error, dev_stat 0x%X\n",
5488 qc->err_mask |= AC_ERR_HSM;
5489 ap->hsm_task_state = HSM_ST_ERR;
5493 atapi_pio_bytes(qc);
5495 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
5496 /* bad ireason reported by device */
5500 /* ATA PIO protocol */
5501 if (unlikely((status & ATA_DRQ) == 0)) {
5502 /* handle BSY=0, DRQ=0 as error */
5503 if (likely(status & (ATA_ERR | ATA_DF)))
5504 /* device stops HSM for abort/error */
5505 qc->err_mask |= AC_ERR_DEV;
5507 /* HSM violation. Let EH handle this.
5508 * Phantom devices also trigger this
5509 * condition. Mark hint.
5511 qc->err_mask |= AC_ERR_HSM |
5514 ap->hsm_task_state = HSM_ST_ERR;
5518 /* For PIO reads, some devices may ask for
5519 * data transfer (DRQ=1) alone with ERR=1.
5520 * We respect DRQ here and transfer one
5521 * block of junk data before changing the
5522 * hsm_task_state to HSM_ST_ERR.
5524 * For PIO writes, ERR=1 DRQ=1 doesn't make
5525 * sense since the data block has been
5526 * transferred to the device.
5528 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5529 /* data might be corrputed */
5530 qc->err_mask |= AC_ERR_DEV;
5532 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
5533 ata_pio_sectors(qc);
5534 status = ata_wait_idle(ap);
5537 if (status & (ATA_BUSY | ATA_DRQ))
5538 qc->err_mask |= AC_ERR_HSM;
5540 /* ata_pio_sectors() might change the
5541 * state to HSM_ST_LAST. so, the state
5542 * is changed after ata_pio_sectors().
5544 ap->hsm_task_state = HSM_ST_ERR;
5548 ata_pio_sectors(qc);
5550 if (ap->hsm_task_state == HSM_ST_LAST &&
5551 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
5553 status = ata_wait_idle(ap);
5562 if (unlikely(!ata_ok(status))) {
5563 qc->err_mask |= __ac_err_mask(status);
5564 ap->hsm_task_state = HSM_ST_ERR;
5568 /* no more data to transfer */
5569 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
5570 ap->print_id, qc->dev->devno, status);
5572 WARN_ON(qc->err_mask);
5574 ap->hsm_task_state = HSM_ST_IDLE;
5576 /* complete taskfile transaction */
5577 ata_hsm_qc_complete(qc, in_wq);
5583 /* make sure qc->err_mask is available to
5584 * know what's wrong and recover
5586 WARN_ON(qc->err_mask == 0);
5588 ap->hsm_task_state = HSM_ST_IDLE;
5590 /* complete taskfile transaction */
5591 ata_hsm_qc_complete(qc, in_wq);
5603 static void ata_pio_task(struct work_struct *work)
5605 struct ata_port *ap =
5606 container_of(work, struct ata_port, port_task.work);
5607 struct ata_queued_cmd *qc = ap->port_task_data;
5612 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
5615 * This is purely heuristic. This is a fast path.
5616 * Sometimes when we enter, BSY will be cleared in
5617 * a chk-status or two. If not, the drive is probably seeking
5618 * or something. Snooze for a couple msecs, then
5619 * chk-status again. If still busy, queue delayed work.
5621 status = ata_busy_wait(ap, ATA_BUSY, 5);
5622 if (status & ATA_BUSY) {
5624 status = ata_busy_wait(ap, ATA_BUSY, 10);
5625 if (status & ATA_BUSY) {
5626 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
5632 poll_next = ata_hsm_move(ap, qc, status, 1);
5634 /* another command or interrupt handler
5635 * may be running at this point.
5642 * ata_qc_new - Request an available ATA command, for queueing
5643 * @ap: Port associated with device @dev
5644 * @dev: Device from whom we request an available command structure
5650 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
5652 struct ata_queued_cmd *qc = NULL;
5655 /* no command while frozen */
5656 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
5659 /* the last tag is reserved for internal command. */
5660 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
5661 if (!test_and_set_bit(i, &ap->qc_allocated)) {
5662 qc = __ata_qc_from_tag(ap, i);
5673 * ata_qc_new_init - Request an available ATA command, and initialize it
5674 * @dev: Device from whom we request an available command structure
5680 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
5682 struct ata_port *ap = dev->link->ap;
5683 struct ata_queued_cmd *qc;
5685 qc = ata_qc_new(ap);
5698 * ata_qc_free - free unused ata_queued_cmd
5699 * @qc: Command to complete
5701 * Designed to free unused ata_queued_cmd object
5702 * in case something prevents using it.
5705 * spin_lock_irqsave(host lock)
5707 void ata_qc_free(struct ata_queued_cmd *qc)
5709 struct ata_port *ap = qc->ap;
5712 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5716 if (likely(ata_tag_valid(tag))) {
5717 qc->tag = ATA_TAG_POISON;
5718 clear_bit(tag, &ap->qc_allocated);
5722 void __ata_qc_complete(struct ata_queued_cmd *qc)
5724 struct ata_port *ap = qc->ap;
5725 struct ata_link *link = qc->dev->link;
5727 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5728 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
5730 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
5733 /* command should be marked inactive atomically with qc completion */
5734 if (qc->tf.protocol == ATA_PROT_NCQ) {
5735 link->sactive &= ~(1 << qc->tag);
5737 ap->nr_active_links--;
5739 link->active_tag = ATA_TAG_POISON;
5740 ap->nr_active_links--;
5743 /* clear exclusive status */
5744 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
5745 ap->excl_link == link))
5746 ap->excl_link = NULL;
5748 /* atapi: mark qc as inactive to prevent the interrupt handler
5749 * from completing the command twice later, before the error handler
5750 * is called. (when rc != 0 and atapi request sense is needed)
5752 qc->flags &= ~ATA_QCFLAG_ACTIVE;
5753 ap->qc_active &= ~(1 << qc->tag);
5755 /* call completion callback */
5756 qc->complete_fn(qc);
5759 static void fill_result_tf(struct ata_queued_cmd *qc)
5761 struct ata_port *ap = qc->ap;
5763 qc->result_tf.flags = qc->tf.flags;
5764 ap->ops->tf_read(ap, &qc->result_tf);
5768 * ata_qc_complete - Complete an active ATA command
5769 * @qc: Command to complete
5770 * @err_mask: ATA Status register contents
5772 * Indicate to the mid and upper layers that an ATA
5773 * command has completed, with either an ok or not-ok status.
5776 * spin_lock_irqsave(host lock)
5778 void ata_qc_complete(struct ata_queued_cmd *qc)
5780 struct ata_port *ap = qc->ap;
5782 /* XXX: New EH and old EH use different mechanisms to
5783 * synchronize EH with regular execution path.
5785 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
5786 * Normal execution path is responsible for not accessing a
5787 * failed qc. libata core enforces the rule by returning NULL
5788 * from ata_qc_from_tag() for failed qcs.
5790 * Old EH depends on ata_qc_complete() nullifying completion
5791 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
5792 * not synchronize with interrupt handler. Only PIO task is
5795 if (ap->ops->error_handler) {
5796 struct ata_device *dev = qc->dev;
5797 struct ata_eh_info *ehi = &dev->link->eh_info;
5799 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
5801 if (unlikely(qc->err_mask))
5802 qc->flags |= ATA_QCFLAG_FAILED;
5804 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
5805 if (!ata_tag_internal(qc->tag)) {
5806 /* always fill result TF for failed qc */
5808 ata_qc_schedule_eh(qc);
5813 /* read result TF if requested */
5814 if (qc->flags & ATA_QCFLAG_RESULT_TF)
5817 /* Some commands need post-processing after successful
5820 switch (qc->tf.command) {
5821 case ATA_CMD_SET_FEATURES:
5822 if (qc->tf.feature != SETFEATURES_WC_ON &&
5823 qc->tf.feature != SETFEATURES_WC_OFF)
5826 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
5827 case ATA_CMD_SET_MULTI: /* multi_count changed */
5828 /* revalidate device */
5829 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
5830 ata_port_schedule_eh(ap);
5834 dev->flags |= ATA_DFLAG_SLEEPING;
5838 __ata_qc_complete(qc);
5840 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
5843 /* read result TF if failed or requested */
5844 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
5847 __ata_qc_complete(qc);
5852 * ata_qc_complete_multiple - Complete multiple qcs successfully
5853 * @ap: port in question
5854 * @qc_active: new qc_active mask
5855 * @finish_qc: LLDD callback invoked before completing a qc
5857 * Complete in-flight commands. This functions is meant to be
5858 * called from low-level driver's interrupt routine to complete
5859 * requests normally. ap->qc_active and @qc_active is compared
5860 * and commands are completed accordingly.
5863 * spin_lock_irqsave(host lock)
5866 * Number of completed commands on success, -errno otherwise.
5868 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
5869 void (*finish_qc)(struct ata_queued_cmd *))
5875 done_mask = ap->qc_active ^ qc_active;
5877 if (unlikely(done_mask & qc_active)) {
5878 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
5879 "(%08x->%08x)\n", ap->qc_active, qc_active);
5883 for (i = 0; i < ATA_MAX_QUEUE; i++) {
5884 struct ata_queued_cmd *qc;
5886 if (!(done_mask & (1 << i)))
5889 if ((qc = ata_qc_from_tag(ap, i))) {
5892 ata_qc_complete(qc);
5900 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
5902 struct ata_port *ap = qc->ap;
5904 switch (qc->tf.protocol) {
5907 case ATA_PROT_ATAPI_DMA:
5910 case ATA_PROT_ATAPI:
5912 if (ap->flags & ATA_FLAG_PIO_DMA)
5925 * ata_qc_issue - issue taskfile to device
5926 * @qc: command to issue to device
5928 * Prepare an ATA command to submission to device.
5929 * This includes mapping the data into a DMA-able
5930 * area, filling in the S/G table, and finally
5931 * writing the taskfile to hardware, starting the command.
5934 * spin_lock_irqsave(host lock)
5936 void ata_qc_issue(struct ata_queued_cmd *qc)
5938 struct ata_port *ap = qc->ap;
5939 struct ata_link *link = qc->dev->link;
5941 /* Make sure only one non-NCQ command is outstanding. The
5942 * check is skipped for old EH because it reuses active qc to
5943 * request ATAPI sense.
5945 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag));
5947 if (qc->tf.protocol == ATA_PROT_NCQ) {
5948 WARN_ON(link->sactive & (1 << qc->tag));
5951 ap->nr_active_links++;
5952 link->sactive |= 1 << qc->tag;
5954 WARN_ON(link->sactive);
5956 ap->nr_active_links++;
5957 link->active_tag = qc->tag;
5960 qc->flags |= ATA_QCFLAG_ACTIVE;
5961 ap->qc_active |= 1 << qc->tag;
5963 if (ata_should_dma_map(qc)) {
5964 if (qc->flags & ATA_QCFLAG_SG) {
5965 if (ata_sg_setup(qc))
5967 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
5968 if (ata_sg_setup_one(qc))
5972 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5975 /* if device is sleeping, schedule softreset and abort the link */
5976 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
5977 link->eh_info.action |= ATA_EH_SOFTRESET;
5978 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
5979 ata_link_abort(link);
5983 ap->ops->qc_prep(qc);
5985 qc->err_mask |= ap->ops->qc_issue(qc);
5986 if (unlikely(qc->err_mask))
5991 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5992 qc->err_mask |= AC_ERR_SYSTEM;
5994 ata_qc_complete(qc);
5998 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
5999 * @qc: command to issue to device
6001 * Using various libata functions and hooks, this function
6002 * starts an ATA command. ATA commands are grouped into
6003 * classes called "protocols", and issuing each type of protocol
6004 * is slightly different.
6006 * May be used as the qc_issue() entry in ata_port_operations.
6009 * spin_lock_irqsave(host lock)
6012 * Zero on success, AC_ERR_* mask on failure
6015 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
6017 struct ata_port *ap = qc->ap;
6019 /* Use polling pio if the LLD doesn't handle
6020 * interrupt driven pio and atapi CDB interrupt.
6022 if (ap->flags & ATA_FLAG_PIO_POLLING) {
6023 switch (qc->tf.protocol) {
6025 case ATA_PROT_NODATA:
6026 case ATA_PROT_ATAPI:
6027 case ATA_PROT_ATAPI_NODATA:
6028 qc->tf.flags |= ATA_TFLAG_POLLING;
6030 case ATA_PROT_ATAPI_DMA:
6031 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
6032 /* see ata_dma_blacklisted() */
6040 /* select the device */
6041 ata_dev_select(ap, qc->dev->devno, 1, 0);
6043 /* start the command */
6044 switch (qc->tf.protocol) {
6045 case ATA_PROT_NODATA:
6046 if (qc->tf.flags & ATA_TFLAG_POLLING)
6047 ata_qc_set_polling(qc);
6049 ata_tf_to_host(ap, &qc->tf);
6050 ap->hsm_task_state = HSM_ST_LAST;
6052 if (qc->tf.flags & ATA_TFLAG_POLLING)
6053 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6058 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
6060 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
6061 ap->ops->bmdma_setup(qc); /* set up bmdma */
6062 ap->ops->bmdma_start(qc); /* initiate bmdma */
6063 ap->hsm_task_state = HSM_ST_LAST;
6067 if (qc->tf.flags & ATA_TFLAG_POLLING)
6068 ata_qc_set_polling(qc);
6070 ata_tf_to_host(ap, &qc->tf);
6072 if (qc->tf.flags & ATA_TFLAG_WRITE) {
6073 /* PIO data out protocol */
6074 ap->hsm_task_state = HSM_ST_FIRST;
6075 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6077 /* always send first data block using
6078 * the ata_pio_task() codepath.
6081 /* PIO data in protocol */
6082 ap->hsm_task_state = HSM_ST;
6084 if (qc->tf.flags & ATA_TFLAG_POLLING)
6085 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6087 /* if polling, ata_pio_task() handles the rest.
6088 * otherwise, interrupt handler takes over from here.
6094 case ATA_PROT_ATAPI:
6095 case ATA_PROT_ATAPI_NODATA:
6096 if (qc->tf.flags & ATA_TFLAG_POLLING)
6097 ata_qc_set_polling(qc);
6099 ata_tf_to_host(ap, &qc->tf);
6101 ap->hsm_task_state = HSM_ST_FIRST;
6103 /* send cdb by polling if no cdb interrupt */
6104 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
6105 (qc->tf.flags & ATA_TFLAG_POLLING))
6106 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6109 case ATA_PROT_ATAPI_DMA:
6110 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
6112 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
6113 ap->ops->bmdma_setup(qc); /* set up bmdma */
6114 ap->hsm_task_state = HSM_ST_FIRST;
6116 /* send cdb by polling if no cdb interrupt */
6117 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
6118 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6123 return AC_ERR_SYSTEM;
6130 * ata_host_intr - Handle host interrupt for given (port, task)
6131 * @ap: Port on which interrupt arrived (possibly...)
6132 * @qc: Taskfile currently active in engine
6134 * Handle host interrupt for given queued command. Currently,
6135 * only DMA interrupts are handled. All other commands are
6136 * handled via polling with interrupts disabled (nIEN bit).
6139 * spin_lock_irqsave(host lock)
6142 * One if interrupt was handled, zero if not (shared irq).
6145 inline unsigned int ata_host_intr(struct ata_port *ap,
6146 struct ata_queued_cmd *qc)
6148 struct ata_eh_info *ehi = &ap->link.eh_info;
6149 u8 status, host_stat = 0;
6151 VPRINTK("ata%u: protocol %d task_state %d\n",
6152 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
6154 /* Check whether we are expecting interrupt in this state */
6155 switch (ap->hsm_task_state) {
6157 /* Some pre-ATAPI-4 devices assert INTRQ
6158 * at this state when ready to receive CDB.
6161 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
6162 * The flag was turned on only for atapi devices.
6163 * No need to check is_atapi_taskfile(&qc->tf) again.
6165 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
6169 if (qc->tf.protocol == ATA_PROT_DMA ||
6170 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
6171 /* check status of DMA engine */
6172 host_stat = ap->ops->bmdma_status(ap);
6173 VPRINTK("ata%u: host_stat 0x%X\n",
6174 ap->print_id, host_stat);
6176 /* if it's not our irq... */
6177 if (!(host_stat & ATA_DMA_INTR))
6180 /* before we do anything else, clear DMA-Start bit */
6181 ap->ops->bmdma_stop(qc);
6183 if (unlikely(host_stat & ATA_DMA_ERR)) {
6184 /* error when transfering data to/from memory */
6185 qc->err_mask |= AC_ERR_HOST_BUS;
6186 ap->hsm_task_state = HSM_ST_ERR;
6196 /* check altstatus */
6197 status = ata_altstatus(ap);
6198 if (status & ATA_BUSY)
6201 /* check main status, clearing INTRQ */
6202 status = ata_chk_status(ap);
6203 if (unlikely(status & ATA_BUSY))
6206 /* ack bmdma irq events */
6207 ap->ops->irq_clear(ap);
6209 ata_hsm_move(ap, qc, status, 0);
6211 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
6212 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
6213 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
6215 return 1; /* irq handled */
6218 ap->stats.idle_irq++;
6221 if ((ap->stats.idle_irq % 1000) == 0) {
6223 ap->ops->irq_clear(ap);
6224 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
6228 return 0; /* irq not handled */
6232 * ata_interrupt - Default ATA host interrupt handler
6233 * @irq: irq line (unused)
6234 * @dev_instance: pointer to our ata_host information structure
6236 * Default interrupt handler for PCI IDE devices. Calls
6237 * ata_host_intr() for each port that is not disabled.
6240 * Obtains host lock during operation.
6243 * IRQ_NONE or IRQ_HANDLED.
6246 irqreturn_t ata_interrupt(int irq, void *dev_instance)
6248 struct ata_host *host = dev_instance;
6250 unsigned int handled = 0;
6251 unsigned long flags;
6253 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
6254 spin_lock_irqsave(&host->lock, flags);
6256 for (i = 0; i < host->n_ports; i++) {
6257 struct ata_port *ap;
6259 ap = host->ports[i];
6261 !(ap->flags & ATA_FLAG_DISABLED)) {
6262 struct ata_queued_cmd *qc;
6264 qc = ata_qc_from_tag(ap, ap->link.active_tag);
6265 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
6266 (qc->flags & ATA_QCFLAG_ACTIVE))
6267 handled |= ata_host_intr(ap, qc);
6271 spin_unlock_irqrestore(&host->lock, flags);
6273 return IRQ_RETVAL(handled);
6277 * sata_scr_valid - test whether SCRs are accessible
6278 * @link: ATA link to test SCR accessibility for
6280 * Test whether SCRs are accessible for @link.
6286 * 1 if SCRs are accessible, 0 otherwise.
6288 int sata_scr_valid(struct ata_link *link)
6290 struct ata_port *ap = link->ap;
6292 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
6296 * sata_scr_read - read SCR register of the specified port
6297 * @link: ATA link to read SCR for
6299 * @val: Place to store read value
6301 * Read SCR register @reg of @link into *@val. This function is
6302 * guaranteed to succeed if @link is ap->link, the cable type of
6303 * the port is SATA and the port implements ->scr_read.
6306 * None if @link is ap->link. Kernel thread context otherwise.
6309 * 0 on success, negative errno on failure.
6311 int sata_scr_read(struct ata_link *link, int reg, u32 *val)
6313 if (ata_is_host_link(link)) {
6314 struct ata_port *ap = link->ap;
6316 if (sata_scr_valid(link))
6317 return ap->ops->scr_read(ap, reg, val);
6321 return sata_pmp_scr_read(link, reg, val);
6325 * sata_scr_write - write SCR register of the specified port
6326 * @link: ATA link to write SCR for
6327 * @reg: SCR to write
6328 * @val: value to write
6330 * Write @val to SCR register @reg of @link. This function is
6331 * guaranteed to succeed if @link is ap->link, the cable type of
6332 * the port is SATA and the port implements ->scr_read.
6335 * None if @link is ap->link. Kernel thread context otherwise.
6338 * 0 on success, negative errno on failure.
6340 int sata_scr_write(struct ata_link *link, int reg, u32 val)
6342 if (ata_is_host_link(link)) {
6343 struct ata_port *ap = link->ap;
6345 if (sata_scr_valid(link))
6346 return ap->ops->scr_write(ap, reg, val);
6350 return sata_pmp_scr_write(link, reg, val);
6354 * sata_scr_write_flush - write SCR register of the specified port and flush
6355 * @link: ATA link to write SCR for
6356 * @reg: SCR to write
6357 * @val: value to write
6359 * This function is identical to sata_scr_write() except that this
6360 * function performs flush after writing to the register.
6363 * None if @link is ap->link. Kernel thread context otherwise.
6366 * 0 on success, negative errno on failure.
6368 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
6370 if (ata_is_host_link(link)) {
6371 struct ata_port *ap = link->ap;
6374 if (sata_scr_valid(link)) {
6375 rc = ap->ops->scr_write(ap, reg, val);
6377 rc = ap->ops->scr_read(ap, reg, &val);
6383 return sata_pmp_scr_write(link, reg, val);
6387 * ata_link_online - test whether the given link is online
6388 * @link: ATA link to test
6390 * Test whether @link is online. Note that this function returns
6391 * 0 if online status of @link cannot be obtained, so
6392 * ata_link_online(link) != !ata_link_offline(link).
6398 * 1 if the port online status is available and online.
6400 int ata_link_online(struct ata_link *link)
6404 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6405 (sstatus & 0xf) == 0x3)
6411 * ata_link_offline - test whether the given link is offline
6412 * @link: ATA link to test
6414 * Test whether @link is offline. Note that this function
6415 * returns 0 if offline status of @link cannot be obtained, so
6416 * ata_link_online(link) != !ata_link_offline(link).
6422 * 1 if the port offline status is available and offline.
6424 int ata_link_offline(struct ata_link *link)
6428 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6429 (sstatus & 0xf) != 0x3)
6434 int ata_flush_cache(struct ata_device *dev)
6436 unsigned int err_mask;
6439 if (!ata_try_flush_cache(dev))
6442 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
6443 cmd = ATA_CMD_FLUSH_EXT;
6445 cmd = ATA_CMD_FLUSH;
6447 /* This is wrong. On a failed flush we get back the LBA of the lost
6448 sector and we should (assuming it wasn't aborted as unknown) issue
6449 a further flush command to continue the writeback until it
6451 err_mask = ata_do_simple_cmd(dev, cmd);
6453 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
6461 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
6462 unsigned int action, unsigned int ehi_flags,
6465 unsigned long flags;
6468 for (i = 0; i < host->n_ports; i++) {
6469 struct ata_port *ap = host->ports[i];
6470 struct ata_link *link;
6472 /* Previous resume operation might still be in
6473 * progress. Wait for PM_PENDING to clear.
6475 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
6476 ata_port_wait_eh(ap);
6477 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6480 /* request PM ops to EH */
6481 spin_lock_irqsave(ap->lock, flags);
6486 ap->pm_result = &rc;
6489 ap->pflags |= ATA_PFLAG_PM_PENDING;
6490 __ata_port_for_each_link(link, ap) {
6491 link->eh_info.action |= action;
6492 link->eh_info.flags |= ehi_flags;
6495 ata_port_schedule_eh(ap);
6497 spin_unlock_irqrestore(ap->lock, flags);
6499 /* wait and check result */
6501 ata_port_wait_eh(ap);
6502 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6512 * ata_host_suspend - suspend host
6513 * @host: host to suspend
6516 * Suspend @host. Actual operation is performed by EH. This
6517 * function requests EH to perform PM operations and waits for EH
6521 * Kernel thread context (may sleep).
6524 * 0 on success, -errno on failure.
6526 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
6531 * disable link pm on all ports before requesting
6534 ata_lpm_enable(host);
6536 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
6538 host->dev->power.power_state = mesg;
6543 * ata_host_resume - resume host
6544 * @host: host to resume
6546 * Resume @host. Actual operation is performed by EH. This
6547 * function requests EH to perform PM operations and returns.
6548 * Note that all resume operations are performed parallely.
6551 * Kernel thread context (may sleep).
6553 void ata_host_resume(struct ata_host *host)
6555 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
6556 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
6557 host->dev->power.power_state = PMSG_ON;
6559 /* reenable link pm */
6560 ata_lpm_disable(host);
6565 * ata_port_start - Set port up for dma.
6566 * @ap: Port to initialize
6568 * Called just after data structures for each port are
6569 * initialized. Allocates space for PRD table.
6571 * May be used as the port_start() entry in ata_port_operations.
6574 * Inherited from caller.
6576 int ata_port_start(struct ata_port *ap)
6578 struct device *dev = ap->dev;
6581 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
6586 rc = ata_pad_alloc(ap, dev);
6590 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
6591 (unsigned long long)ap->prd_dma);
6596 * ata_dev_init - Initialize an ata_device structure
6597 * @dev: Device structure to initialize
6599 * Initialize @dev in preparation for probing.
6602 * Inherited from caller.
6604 void ata_dev_init(struct ata_device *dev)
6606 struct ata_link *link = dev->link;
6607 struct ata_port *ap = link->ap;
6608 unsigned long flags;
6610 /* SATA spd limit is bound to the first device */
6611 link->sata_spd_limit = link->hw_sata_spd_limit;
6614 /* High bits of dev->flags are used to record warm plug
6615 * requests which occur asynchronously. Synchronize using
6618 spin_lock_irqsave(ap->lock, flags);
6619 dev->flags &= ~ATA_DFLAG_INIT_MASK;
6621 spin_unlock_irqrestore(ap->lock, flags);
6623 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
6624 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
6625 dev->pio_mask = UINT_MAX;
6626 dev->mwdma_mask = UINT_MAX;
6627 dev->udma_mask = UINT_MAX;
6631 * ata_link_init - Initialize an ata_link structure
6632 * @ap: ATA port link is attached to
6633 * @link: Link structure to initialize
6634 * @pmp: Port multiplier port number
6639 * Kernel thread context (may sleep)
6641 void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
6645 /* clear everything except for devices */
6646 memset(link, 0, offsetof(struct ata_link, device[0]));
6650 link->active_tag = ATA_TAG_POISON;
6651 link->hw_sata_spd_limit = UINT_MAX;
6653 /* can't use iterator, ap isn't initialized yet */
6654 for (i = 0; i < ATA_MAX_DEVICES; i++) {
6655 struct ata_device *dev = &link->device[i];
6658 dev->devno = dev - link->device;
6664 * sata_link_init_spd - Initialize link->sata_spd_limit
6665 * @link: Link to configure sata_spd_limit for
6667 * Initialize @link->[hw_]sata_spd_limit to the currently
6671 * Kernel thread context (may sleep).
6674 * 0 on success, -errno on failure.
6676 int sata_link_init_spd(struct ata_link *link)
6681 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
6685 spd = (scontrol >> 4) & 0xf;
6687 link->hw_sata_spd_limit &= (1 << spd) - 1;
6689 link->sata_spd_limit = link->hw_sata_spd_limit;
6695 * ata_port_alloc - allocate and initialize basic ATA port resources
6696 * @host: ATA host this allocated port belongs to
6698 * Allocate and initialize basic ATA port resources.
6701 * Allocate ATA port on success, NULL on failure.
6704 * Inherited from calling layer (may sleep).
6706 struct ata_port *ata_port_alloc(struct ata_host *host)
6708 struct ata_port *ap;
6712 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
6716 ap->pflags |= ATA_PFLAG_INITIALIZING;
6717 ap->lock = &host->lock;
6718 ap->flags = ATA_FLAG_DISABLED;
6720 ap->ctl = ATA_DEVCTL_OBS;
6722 ap->dev = host->dev;
6723 ap->last_ctl = 0xFF;
6725 #if defined(ATA_VERBOSE_DEBUG)
6726 /* turn on all debugging levels */
6727 ap->msg_enable = 0x00FF;
6728 #elif defined(ATA_DEBUG)
6729 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
6731 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
6734 INIT_DELAYED_WORK(&ap->port_task, NULL);
6735 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
6736 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
6737 INIT_LIST_HEAD(&ap->eh_done_q);
6738 init_waitqueue_head(&ap->eh_wait_q);
6739 init_timer_deferrable(&ap->fastdrain_timer);
6740 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
6741 ap->fastdrain_timer.data = (unsigned long)ap;
6743 ap->cbl = ATA_CBL_NONE;
6745 ata_link_init(ap, &ap->link, 0);
6748 ap->stats.unhandled_irq = 1;
6749 ap->stats.idle_irq = 1;
6754 static void ata_host_release(struct device *gendev, void *res)
6756 struct ata_host *host = dev_get_drvdata(gendev);
6759 for (i = 0; i < host->n_ports; i++) {
6760 struct ata_port *ap = host->ports[i];
6766 scsi_host_put(ap->scsi_host);
6768 kfree(ap->pmp_link);
6770 host->ports[i] = NULL;
6773 dev_set_drvdata(gendev, NULL);
6777 * ata_host_alloc - allocate and init basic ATA host resources
6778 * @dev: generic device this host is associated with
6779 * @max_ports: maximum number of ATA ports associated with this host
6781 * Allocate and initialize basic ATA host resources. LLD calls
6782 * this function to allocate a host, initializes it fully and
6783 * attaches it using ata_host_register().
6785 * @max_ports ports are allocated and host->n_ports is
6786 * initialized to @max_ports. The caller is allowed to decrease
6787 * host->n_ports before calling ata_host_register(). The unused
6788 * ports will be automatically freed on registration.
6791 * Allocate ATA host on success, NULL on failure.
6794 * Inherited from calling layer (may sleep).
6796 struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
6798 struct ata_host *host;
6804 if (!devres_open_group(dev, NULL, GFP_KERNEL))
6807 /* alloc a container for our list of ATA ports (buses) */
6808 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
6809 /* alloc a container for our list of ATA ports (buses) */
6810 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
6814 devres_add(dev, host);
6815 dev_set_drvdata(dev, host);
6817 spin_lock_init(&host->lock);
6819 host->n_ports = max_ports;
6821 /* allocate ports bound to this host */
6822 for (i = 0; i < max_ports; i++) {
6823 struct ata_port *ap;
6825 ap = ata_port_alloc(host);
6830 host->ports[i] = ap;
6833 devres_remove_group(dev, NULL);
6837 devres_release_group(dev, NULL);
6842 * ata_host_alloc_pinfo - alloc host and init with port_info array
6843 * @dev: generic device this host is associated with
6844 * @ppi: array of ATA port_info to initialize host with
6845 * @n_ports: number of ATA ports attached to this host
6847 * Allocate ATA host and initialize with info from @ppi. If NULL
6848 * terminated, @ppi may contain fewer entries than @n_ports. The
6849 * last entry will be used for the remaining ports.
6852 * Allocate ATA host on success, NULL on failure.
6855 * Inherited from calling layer (may sleep).
6857 struct ata_host *ata_host_alloc_pinfo(struct device *dev,
6858 const struct ata_port_info * const * ppi,
6861 const struct ata_port_info *pi;
6862 struct ata_host *host;
6865 host = ata_host_alloc(dev, n_ports);
6869 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
6870 struct ata_port *ap = host->ports[i];
6875 ap->pio_mask = pi->pio_mask;
6876 ap->mwdma_mask = pi->mwdma_mask;
6877 ap->udma_mask = pi->udma_mask;
6878 ap->flags |= pi->flags;
6879 ap->link.flags |= pi->link_flags;
6880 ap->ops = pi->port_ops;
6882 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
6883 host->ops = pi->port_ops;
6884 if (!host->private_data && pi->private_data)
6885 host->private_data = pi->private_data;
6891 static void ata_host_stop(struct device *gendev, void *res)
6893 struct ata_host *host = dev_get_drvdata(gendev);
6896 WARN_ON(!(host->flags & ATA_HOST_STARTED));
6898 for (i = 0; i < host->n_ports; i++) {
6899 struct ata_port *ap = host->ports[i];
6901 if (ap->ops->port_stop)
6902 ap->ops->port_stop(ap);
6905 if (host->ops->host_stop)
6906 host->ops->host_stop(host);
6910 * ata_host_start - start and freeze ports of an ATA host
6911 * @host: ATA host to start ports for
6913 * Start and then freeze ports of @host. Started status is
6914 * recorded in host->flags, so this function can be called
6915 * multiple times. Ports are guaranteed to get started only
6916 * once. If host->ops isn't initialized yet, its set to the
6917 * first non-dummy port ops.
6920 * Inherited from calling layer (may sleep).
6923 * 0 if all ports are started successfully, -errno otherwise.
6925 int ata_host_start(struct ata_host *host)
6928 void *start_dr = NULL;
6931 if (host->flags & ATA_HOST_STARTED)
6934 for (i = 0; i < host->n_ports; i++) {
6935 struct ata_port *ap = host->ports[i];
6937 if (!host->ops && !ata_port_is_dummy(ap))
6938 host->ops = ap->ops;
6940 if (ap->ops->port_stop)
6944 if (host->ops->host_stop)
6948 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
6953 for (i = 0; i < host->n_ports; i++) {
6954 struct ata_port *ap = host->ports[i];
6956 if (ap->ops->port_start) {
6957 rc = ap->ops->port_start(ap);
6959 ata_port_printk(ap, KERN_ERR, "failed to "
6960 "start port (errno=%d)\n", rc);
6965 ata_eh_freeze_port(ap);
6969 devres_add(host->dev, start_dr);
6970 host->flags |= ATA_HOST_STARTED;
6975 struct ata_port *ap = host->ports[i];
6977 if (ap->ops->port_stop)
6978 ap->ops->port_stop(ap);
6980 devres_free(start_dr);
6985 * ata_sas_host_init - Initialize a host struct
6986 * @host: host to initialize
6987 * @dev: device host is attached to
6988 * @flags: host flags
6992 * PCI/etc. bus probe sem.
6995 /* KILLME - the only user left is ipr */
6996 void ata_host_init(struct ata_host *host, struct device *dev,
6997 unsigned long flags, const struct ata_port_operations *ops)
6999 spin_lock_init(&host->lock);
7001 host->flags = flags;
7006 * ata_host_register - register initialized ATA host
7007 * @host: ATA host to register
7008 * @sht: template for SCSI host
7010 * Register initialized ATA host. @host is allocated using
7011 * ata_host_alloc() and fully initialized by LLD. This function
7012 * starts ports, registers @host with ATA and SCSI layers and
7013 * probe registered devices.
7016 * Inherited from calling layer (may sleep).
7019 * 0 on success, -errno otherwise.
7021 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
7025 /* host must have been started */
7026 if (!(host->flags & ATA_HOST_STARTED)) {
7027 dev_printk(KERN_ERR, host->dev,
7028 "BUG: trying to register unstarted host\n");
7033 /* Blow away unused ports. This happens when LLD can't
7034 * determine the exact number of ports to allocate at
7037 for (i = host->n_ports; host->ports[i]; i++)
7038 kfree(host->ports[i]);
7040 /* give ports names and add SCSI hosts */
7041 for (i = 0; i < host->n_ports; i++)
7042 host->ports[i]->print_id = ata_print_id++;
7044 rc = ata_scsi_add_hosts(host, sht);
7048 /* associate with ACPI nodes */
7049 ata_acpi_associate(host);
7051 /* set cable, sata_spd_limit and report */
7052 for (i = 0; i < host->n_ports; i++) {
7053 struct ata_port *ap = host->ports[i];
7054 unsigned long xfer_mask;
7056 /* set SATA cable type if still unset */
7057 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
7058 ap->cbl = ATA_CBL_SATA;
7060 /* init sata_spd_limit to the current value */
7061 sata_link_init_spd(&ap->link);
7063 /* print per-port info to dmesg */
7064 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
7067 if (!ata_port_is_dummy(ap)) {
7068 ata_port_printk(ap, KERN_INFO,
7069 "%cATA max %s %s\n",
7070 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
7071 ata_mode_string(xfer_mask),
7072 ap->link.eh_info.desc);
7073 ata_ehi_clear_desc(&ap->link.eh_info);
7075 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
7078 /* perform each probe synchronously */
7079 DPRINTK("probe begin\n");
7080 for (i = 0; i < host->n_ports; i++) {
7081 struct ata_port *ap = host->ports[i];
7085 if (ap->ops->error_handler) {
7086 struct ata_eh_info *ehi = &ap->link.eh_info;
7087 unsigned long flags;
7091 /* kick EH for boot probing */
7092 spin_lock_irqsave(ap->lock, flags);
7095 (1 << ata_link_max_devices(&ap->link)) - 1;
7096 ehi->action |= ATA_EH_SOFTRESET;
7097 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
7099 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
7100 ap->pflags |= ATA_PFLAG_LOADING;
7101 ata_port_schedule_eh(ap);
7103 spin_unlock_irqrestore(ap->lock, flags);
7105 /* wait for EH to finish */
7106 ata_port_wait_eh(ap);
7108 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
7109 rc = ata_bus_probe(ap);
7110 DPRINTK("ata%u: bus probe end\n", ap->print_id);
7113 /* FIXME: do something useful here?
7114 * Current libata behavior will
7115 * tear down everything when
7116 * the module is removed
7117 * or the h/w is unplugged.
7123 /* probes are done, now scan each port's disk(s) */
7124 DPRINTK("host probe begin\n");
7125 for (i = 0; i < host->n_ports; i++) {
7126 struct ata_port *ap = host->ports[i];
7128 ata_scsi_scan_host(ap, 1);
7129 ata_lpm_schedule(ap, ap->pm_policy);
7136 * ata_host_activate - start host, request IRQ and register it
7137 * @host: target ATA host
7138 * @irq: IRQ to request
7139 * @irq_handler: irq_handler used when requesting IRQ
7140 * @irq_flags: irq_flags used when requesting IRQ
7141 * @sht: scsi_host_template to use when registering the host
7143 * After allocating an ATA host and initializing it, most libata
7144 * LLDs perform three steps to activate the host - start host,
7145 * request IRQ and register it. This helper takes necessasry
7146 * arguments and performs the three steps in one go.
7148 * An invalid IRQ skips the IRQ registration and expects the host to
7149 * have set polling mode on the port. In this case, @irq_handler
7153 * Inherited from calling layer (may sleep).
7156 * 0 on success, -errno otherwise.
7158 int ata_host_activate(struct ata_host *host, int irq,
7159 irq_handler_t irq_handler, unsigned long irq_flags,
7160 struct scsi_host_template *sht)
7164 rc = ata_host_start(host);
7168 /* Special case for polling mode */
7170 WARN_ON(irq_handler);
7171 return ata_host_register(host, sht);
7174 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
7175 dev_driver_string(host->dev), host);
7179 for (i = 0; i < host->n_ports; i++)
7180 ata_port_desc(host->ports[i], "irq %d", irq);
7182 rc = ata_host_register(host, sht);
7183 /* if failed, just free the IRQ and leave ports alone */
7185 devm_free_irq(host->dev, irq, host);
7191 * ata_port_detach - Detach ATA port in prepration of device removal
7192 * @ap: ATA port to be detached
7194 * Detach all ATA devices and the associated SCSI devices of @ap;
7195 * then, remove the associated SCSI host. @ap is guaranteed to
7196 * be quiescent on return from this function.
7199 * Kernel thread context (may sleep).
7201 static void ata_port_detach(struct ata_port *ap)
7203 unsigned long flags;
7204 struct ata_link *link;
7205 struct ata_device *dev;
7207 if (!ap->ops->error_handler)
7210 /* tell EH we're leaving & flush EH */
7211 spin_lock_irqsave(ap->lock, flags);
7212 ap->pflags |= ATA_PFLAG_UNLOADING;
7213 spin_unlock_irqrestore(ap->lock, flags);
7215 ata_port_wait_eh(ap);
7217 /* EH is now guaranteed to see UNLOADING, so no new device
7218 * will be attached. Disable all existing devices.
7220 spin_lock_irqsave(ap->lock, flags);
7222 ata_port_for_each_link(link, ap) {
7223 ata_link_for_each_dev(dev, link)
7224 ata_dev_disable(dev);
7227 spin_unlock_irqrestore(ap->lock, flags);
7229 /* Final freeze & EH. All in-flight commands are aborted. EH
7230 * will be skipped and retrials will be terminated with bad
7233 spin_lock_irqsave(ap->lock, flags);
7234 ata_port_freeze(ap); /* won't be thawed */
7235 spin_unlock_irqrestore(ap->lock, flags);
7237 ata_port_wait_eh(ap);
7238 cancel_rearming_delayed_work(&ap->hotplug_task);
7241 /* remove the associated SCSI host */
7242 scsi_remove_host(ap->scsi_host);
7246 * ata_host_detach - Detach all ports of an ATA host
7247 * @host: Host to detach
7249 * Detach all ports of @host.
7252 * Kernel thread context (may sleep).
7254 void ata_host_detach(struct ata_host *host)
7258 for (i = 0; i < host->n_ports; i++)
7259 ata_port_detach(host->ports[i]);
7263 * ata_std_ports - initialize ioaddr with standard port offsets.
7264 * @ioaddr: IO address structure to be initialized
7266 * Utility function which initializes data_addr, error_addr,
7267 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
7268 * device_addr, status_addr, and command_addr to standard offsets
7269 * relative to cmd_addr.
7271 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
7274 void ata_std_ports(struct ata_ioports *ioaddr)
7276 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
7277 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
7278 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
7279 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
7280 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
7281 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
7282 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
7283 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
7284 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
7285 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
7292 * ata_pci_remove_one - PCI layer callback for device removal
7293 * @pdev: PCI device that was removed
7295 * PCI layer indicates to libata via this hook that hot-unplug or
7296 * module unload event has occurred. Detach all ports. Resource
7297 * release is handled via devres.
7300 * Inherited from PCI layer (may sleep).
7302 void ata_pci_remove_one(struct pci_dev *pdev)
7304 struct device *dev = &pdev->dev;
7305 struct ata_host *host = dev_get_drvdata(dev);
7307 ata_host_detach(host);
7310 /* move to PCI subsystem */
7311 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
7313 unsigned long tmp = 0;
7315 switch (bits->width) {
7318 pci_read_config_byte(pdev, bits->reg, &tmp8);
7324 pci_read_config_word(pdev, bits->reg, &tmp16);
7330 pci_read_config_dword(pdev, bits->reg, &tmp32);
7341 return (tmp == bits->val) ? 1 : 0;
7345 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
7347 pci_save_state(pdev);
7348 pci_disable_device(pdev);
7350 if (mesg.event == PM_EVENT_SUSPEND)
7351 pci_set_power_state(pdev, PCI_D3hot);
7354 int ata_pci_device_do_resume(struct pci_dev *pdev)
7358 pci_set_power_state(pdev, PCI_D0);
7359 pci_restore_state(pdev);
7361 rc = pcim_enable_device(pdev);
7363 dev_printk(KERN_ERR, &pdev->dev,
7364 "failed to enable device after resume (%d)\n", rc);
7368 pci_set_master(pdev);
7372 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
7374 struct ata_host *host = dev_get_drvdata(&pdev->dev);
7377 rc = ata_host_suspend(host, mesg);
7381 ata_pci_device_do_suspend(pdev, mesg);
7386 int ata_pci_device_resume(struct pci_dev *pdev)
7388 struct ata_host *host = dev_get_drvdata(&pdev->dev);
7391 rc = ata_pci_device_do_resume(pdev);
7393 ata_host_resume(host);
7396 #endif /* CONFIG_PM */
7398 #endif /* CONFIG_PCI */
7401 static int __init ata_init(void)
7403 ata_probe_timeout *= HZ;
7404 ata_wq = create_workqueue("ata");
7408 ata_aux_wq = create_singlethread_workqueue("ata_aux");
7410 destroy_workqueue(ata_wq);
7414 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
7418 static void __exit ata_exit(void)
7420 destroy_workqueue(ata_wq);
7421 destroy_workqueue(ata_aux_wq);
7424 subsys_initcall(ata_init);
7425 module_exit(ata_exit);
7427 static unsigned long ratelimit_time;
7428 static DEFINE_SPINLOCK(ata_ratelimit_lock);
7430 int ata_ratelimit(void)
7433 unsigned long flags;
7435 spin_lock_irqsave(&ata_ratelimit_lock, flags);
7437 if (time_after(jiffies, ratelimit_time)) {
7439 ratelimit_time = jiffies + (HZ/5);
7443 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
7449 * ata_wait_register - wait until register value changes
7450 * @reg: IO-mapped register
7451 * @mask: Mask to apply to read register value
7452 * @val: Wait condition
7453 * @interval_msec: polling interval in milliseconds
7454 * @timeout_msec: timeout in milliseconds
7456 * Waiting for some bits of register to change is a common
7457 * operation for ATA controllers. This function reads 32bit LE
7458 * IO-mapped register @reg and tests for the following condition.
7460 * (*@reg & mask) != val
7462 * If the condition is met, it returns; otherwise, the process is
7463 * repeated after @interval_msec until timeout.
7466 * Kernel thread context (may sleep)
7469 * The final register value.
7471 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
7472 unsigned long interval_msec,
7473 unsigned long timeout_msec)
7475 unsigned long timeout;
7478 tmp = ioread32(reg);
7480 /* Calculate timeout _after_ the first read to make sure
7481 * preceding writes reach the controller before starting to
7482 * eat away the timeout.
7484 timeout = jiffies + (timeout_msec * HZ) / 1000;
7486 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
7487 msleep(interval_msec);
7488 tmp = ioread32(reg);
7497 static void ata_dummy_noret(struct ata_port *ap) { }
7498 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
7499 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
7501 static u8 ata_dummy_check_status(struct ata_port *ap)
7506 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
7508 return AC_ERR_SYSTEM;
7511 const struct ata_port_operations ata_dummy_port_ops = {
7512 .check_status = ata_dummy_check_status,
7513 .check_altstatus = ata_dummy_check_status,
7514 .dev_select = ata_noop_dev_select,
7515 .qc_prep = ata_noop_qc_prep,
7516 .qc_issue = ata_dummy_qc_issue,
7517 .freeze = ata_dummy_noret,
7518 .thaw = ata_dummy_noret,
7519 .error_handler = ata_dummy_noret,
7520 .post_internal_cmd = ata_dummy_qc_noret,
7521 .irq_clear = ata_dummy_noret,
7522 .port_start = ata_dummy_ret0,
7523 .port_stop = ata_dummy_noret,
7526 const struct ata_port_info ata_dummy_port_info = {
7527 .port_ops = &ata_dummy_port_ops,
7531 * libata is essentially a library of internal helper functions for
7532 * low-level ATA host controller drivers. As such, the API/ABI is
7533 * likely to change as new drivers are added and updated.
7534 * Do not depend on ABI/API stability.
7536 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
7537 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
7538 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
7539 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
7540 EXPORT_SYMBOL_GPL(ata_dummy_port_info);
7541 EXPORT_SYMBOL_GPL(ata_std_bios_param);
7542 EXPORT_SYMBOL_GPL(ata_std_ports);
7543 EXPORT_SYMBOL_GPL(ata_host_init);
7544 EXPORT_SYMBOL_GPL(ata_host_alloc);
7545 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
7546 EXPORT_SYMBOL_GPL(ata_host_start);
7547 EXPORT_SYMBOL_GPL(ata_host_register);
7548 EXPORT_SYMBOL_GPL(ata_host_activate);
7549 EXPORT_SYMBOL_GPL(ata_host_detach);
7550 EXPORT_SYMBOL_GPL(ata_sg_init);
7551 EXPORT_SYMBOL_GPL(ata_sg_init_one);
7552 EXPORT_SYMBOL_GPL(ata_hsm_move);
7553 EXPORT_SYMBOL_GPL(ata_qc_complete);
7554 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
7555 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
7556 EXPORT_SYMBOL_GPL(ata_tf_load);
7557 EXPORT_SYMBOL_GPL(ata_tf_read);
7558 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
7559 EXPORT_SYMBOL_GPL(ata_std_dev_select);
7560 EXPORT_SYMBOL_GPL(sata_print_link_status);
7561 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
7562 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
7563 EXPORT_SYMBOL_GPL(ata_check_status);
7564 EXPORT_SYMBOL_GPL(ata_altstatus);
7565 EXPORT_SYMBOL_GPL(ata_exec_command);
7566 EXPORT_SYMBOL_GPL(ata_port_start);
7567 EXPORT_SYMBOL_GPL(ata_sff_port_start);
7568 EXPORT_SYMBOL_GPL(ata_interrupt);
7569 EXPORT_SYMBOL_GPL(ata_do_set_mode);
7570 EXPORT_SYMBOL_GPL(ata_data_xfer);
7571 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
7572 EXPORT_SYMBOL_GPL(ata_std_qc_defer);
7573 EXPORT_SYMBOL_GPL(ata_qc_prep);
7574 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
7575 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
7576 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
7577 EXPORT_SYMBOL_GPL(ata_bmdma_start);
7578 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
7579 EXPORT_SYMBOL_GPL(ata_bmdma_status);
7580 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
7581 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
7582 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
7583 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
7584 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
7585 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
7586 EXPORT_SYMBOL_GPL(ata_port_probe);
7587 EXPORT_SYMBOL_GPL(ata_dev_disable);
7588 EXPORT_SYMBOL_GPL(sata_set_spd);
7589 EXPORT_SYMBOL_GPL(sata_link_debounce);
7590 EXPORT_SYMBOL_GPL(sata_link_resume);
7591 EXPORT_SYMBOL_GPL(ata_bus_reset);
7592 EXPORT_SYMBOL_GPL(ata_std_prereset);
7593 EXPORT_SYMBOL_GPL(ata_std_softreset);
7594 EXPORT_SYMBOL_GPL(sata_link_hardreset);
7595 EXPORT_SYMBOL_GPL(sata_std_hardreset);
7596 EXPORT_SYMBOL_GPL(ata_std_postreset);
7597 EXPORT_SYMBOL_GPL(ata_dev_classify);
7598 EXPORT_SYMBOL_GPL(ata_dev_pair);
7599 EXPORT_SYMBOL_GPL(ata_port_disable);
7600 EXPORT_SYMBOL_GPL(ata_ratelimit);
7601 EXPORT_SYMBOL_GPL(ata_wait_register);
7602 EXPORT_SYMBOL_GPL(ata_busy_sleep);
7603 EXPORT_SYMBOL_GPL(ata_wait_after_reset);
7604 EXPORT_SYMBOL_GPL(ata_wait_ready);
7605 EXPORT_SYMBOL_GPL(ata_port_queue_task);
7606 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
7607 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
7608 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
7609 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
7610 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
7611 EXPORT_SYMBOL_GPL(ata_host_intr);
7612 EXPORT_SYMBOL_GPL(sata_scr_valid);
7613 EXPORT_SYMBOL_GPL(sata_scr_read);
7614 EXPORT_SYMBOL_GPL(sata_scr_write);
7615 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
7616 EXPORT_SYMBOL_GPL(ata_link_online);
7617 EXPORT_SYMBOL_GPL(ata_link_offline);
7619 EXPORT_SYMBOL_GPL(ata_host_suspend);
7620 EXPORT_SYMBOL_GPL(ata_host_resume);
7621 #endif /* CONFIG_PM */
7622 EXPORT_SYMBOL_GPL(ata_id_string);
7623 EXPORT_SYMBOL_GPL(ata_id_c_string);
7624 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
7625 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
7627 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
7628 EXPORT_SYMBOL_GPL(ata_timing_compute);
7629 EXPORT_SYMBOL_GPL(ata_timing_merge);
7632 EXPORT_SYMBOL_GPL(pci_test_config_bits);
7633 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host);
7634 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma);
7635 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host);
7636 EXPORT_SYMBOL_GPL(ata_pci_init_one);
7637 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
7639 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
7640 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
7641 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
7642 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
7643 #endif /* CONFIG_PM */
7644 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
7645 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
7646 #endif /* CONFIG_PCI */
7648 EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch);
7649 EXPORT_SYMBOL_GPL(sata_pmp_std_prereset);
7650 EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset);
7651 EXPORT_SYMBOL_GPL(sata_pmp_std_postreset);
7652 EXPORT_SYMBOL_GPL(sata_pmp_do_eh);
7654 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
7655 EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
7656 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
7657 EXPORT_SYMBOL_GPL(ata_port_desc);
7659 EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
7660 #endif /* CONFIG_PCI */
7661 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
7662 EXPORT_SYMBOL_GPL(ata_link_abort);
7663 EXPORT_SYMBOL_GPL(ata_port_abort);
7664 EXPORT_SYMBOL_GPL(ata_port_freeze);
7665 EXPORT_SYMBOL_GPL(sata_async_notification);
7666 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
7667 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
7668 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
7669 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
7670 EXPORT_SYMBOL_GPL(ata_do_eh);
7671 EXPORT_SYMBOL_GPL(ata_irq_on);
7672 EXPORT_SYMBOL_GPL(ata_dev_try_classify);
7674 EXPORT_SYMBOL_GPL(ata_cable_40wire);
7675 EXPORT_SYMBOL_GPL(ata_cable_80wire);
7676 EXPORT_SYMBOL_GPL(ata_cable_unknown);
7677 EXPORT_SYMBOL_GPL(ata_cable_sata);