2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
63 /* debounce timing parameters in msecs { interval, duration, timeout } */
64 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
65 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
66 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
68 static unsigned int ata_dev_init_params(struct ata_device *dev,
69 u16 heads, u16 sectors);
70 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
71 static unsigned int ata_dev_set_AN(struct ata_device *dev, u8 enable);
72 static void ata_dev_xfermask(struct ata_device *dev);
73 static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
75 unsigned int ata_print_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
88 int atapi_passthru16 = 1;
89 module_param(atapi_passthru16, int, 0444);
90 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)");
93 module_param_named(fua, libata_fua, int, 0444);
94 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
96 static int ata_ignore_hpa = 0;
97 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
98 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
100 static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
101 module_param_named(dma, libata_dma_mask, int, 0444);
102 MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
104 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
105 module_param(ata_probe_timeout, int, 0444);
106 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
108 int libata_noacpi = 0;
109 module_param_named(noacpi, libata_noacpi, int, 0444);
110 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set");
112 MODULE_AUTHOR("Jeff Garzik");
113 MODULE_DESCRIPTION("Library module for ATA devices");
114 MODULE_LICENSE("GPL");
115 MODULE_VERSION(DRV_VERSION);
119 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
120 * @tf: Taskfile to convert
121 * @pmp: Port multiplier port
122 * @is_cmd: This FIS is for command
123 * @fis: Buffer into which data will output
125 * Converts a standard ATA taskfile to a Serial ATA
126 * FIS structure (Register - Host to Device).
129 * Inherited from caller.
131 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
133 fis[0] = 0x27; /* Register - Host to Device FIS */
134 fis[1] = pmp & 0xf; /* Port multiplier number*/
136 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
138 fis[2] = tf->command;
139 fis[3] = tf->feature;
146 fis[8] = tf->hob_lbal;
147 fis[9] = tf->hob_lbam;
148 fis[10] = tf->hob_lbah;
149 fis[11] = tf->hob_feature;
152 fis[13] = tf->hob_nsect;
163 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
164 * @fis: Buffer from which data will be input
165 * @tf: Taskfile to output
167 * Converts a serial ATA FIS structure to a standard ATA taskfile.
170 * Inherited from caller.
173 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
175 tf->command = fis[2]; /* status */
176 tf->feature = fis[3]; /* error */
183 tf->hob_lbal = fis[8];
184 tf->hob_lbam = fis[9];
185 tf->hob_lbah = fis[10];
188 tf->hob_nsect = fis[13];
191 static const u8 ata_rw_cmds[] = {
195 ATA_CMD_READ_MULTI_EXT,
196 ATA_CMD_WRITE_MULTI_EXT,
200 ATA_CMD_WRITE_MULTI_FUA_EXT,
204 ATA_CMD_PIO_READ_EXT,
205 ATA_CMD_PIO_WRITE_EXT,
218 ATA_CMD_WRITE_FUA_EXT
222 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
223 * @tf: command to examine and configure
224 * @dev: device tf belongs to
226 * Examine the device configuration and tf->flags to calculate
227 * the proper read/write commands and protocol to use.
232 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
236 int index, fua, lba48, write;
238 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
239 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
240 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
242 if (dev->flags & ATA_DFLAG_PIO) {
243 tf->protocol = ATA_PROT_PIO;
244 index = dev->multi_count ? 0 : 8;
245 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
246 /* Unable to use DMA due to host limitation */
247 tf->protocol = ATA_PROT_PIO;
248 index = dev->multi_count ? 0 : 8;
250 tf->protocol = ATA_PROT_DMA;
254 cmd = ata_rw_cmds[index + fua + lba48 + write];
263 * ata_tf_read_block - Read block address from ATA taskfile
264 * @tf: ATA taskfile of interest
265 * @dev: ATA device @tf belongs to
270 * Read block address from @tf. This function can handle all
271 * three address formats - LBA, LBA48 and CHS. tf->protocol and
272 * flags select the address format to use.
275 * Block address read from @tf.
277 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
281 if (tf->flags & ATA_TFLAG_LBA) {
282 if (tf->flags & ATA_TFLAG_LBA48) {
283 block |= (u64)tf->hob_lbah << 40;
284 block |= (u64)tf->hob_lbam << 32;
285 block |= tf->hob_lbal << 24;
287 block |= (tf->device & 0xf) << 24;
289 block |= tf->lbah << 16;
290 block |= tf->lbam << 8;
295 cyl = tf->lbam | (tf->lbah << 8);
296 head = tf->device & 0xf;
299 block = (cyl * dev->heads + head) * dev->sectors + sect;
306 * ata_build_rw_tf - Build ATA taskfile for given read/write request
307 * @tf: Target ATA taskfile
308 * @dev: ATA device @tf belongs to
309 * @block: Block address
310 * @n_block: Number of blocks
311 * @tf_flags: RW/FUA etc...
317 * Build ATA taskfile @tf for read/write request described by
318 * @block, @n_block, @tf_flags and @tag on @dev.
322 * 0 on success, -ERANGE if the request is too large for @dev,
323 * -EINVAL if the request is invalid.
325 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
326 u64 block, u32 n_block, unsigned int tf_flags,
329 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
330 tf->flags |= tf_flags;
332 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
334 if (!lba_48_ok(block, n_block))
337 tf->protocol = ATA_PROT_NCQ;
338 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
340 if (tf->flags & ATA_TFLAG_WRITE)
341 tf->command = ATA_CMD_FPDMA_WRITE;
343 tf->command = ATA_CMD_FPDMA_READ;
345 tf->nsect = tag << 3;
346 tf->hob_feature = (n_block >> 8) & 0xff;
347 tf->feature = n_block & 0xff;
349 tf->hob_lbah = (block >> 40) & 0xff;
350 tf->hob_lbam = (block >> 32) & 0xff;
351 tf->hob_lbal = (block >> 24) & 0xff;
352 tf->lbah = (block >> 16) & 0xff;
353 tf->lbam = (block >> 8) & 0xff;
354 tf->lbal = block & 0xff;
357 if (tf->flags & ATA_TFLAG_FUA)
358 tf->device |= 1 << 7;
359 } else if (dev->flags & ATA_DFLAG_LBA) {
360 tf->flags |= ATA_TFLAG_LBA;
362 if (lba_28_ok(block, n_block)) {
364 tf->device |= (block >> 24) & 0xf;
365 } else if (lba_48_ok(block, n_block)) {
366 if (!(dev->flags & ATA_DFLAG_LBA48))
370 tf->flags |= ATA_TFLAG_LBA48;
372 tf->hob_nsect = (n_block >> 8) & 0xff;
374 tf->hob_lbah = (block >> 40) & 0xff;
375 tf->hob_lbam = (block >> 32) & 0xff;
376 tf->hob_lbal = (block >> 24) & 0xff;
378 /* request too large even for LBA48 */
381 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
384 tf->nsect = n_block & 0xff;
386 tf->lbah = (block >> 16) & 0xff;
387 tf->lbam = (block >> 8) & 0xff;
388 tf->lbal = block & 0xff;
390 tf->device |= ATA_LBA;
393 u32 sect, head, cyl, track;
395 /* The request -may- be too large for CHS addressing. */
396 if (!lba_28_ok(block, n_block))
399 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
402 /* Convert LBA to CHS */
403 track = (u32)block / dev->sectors;
404 cyl = track / dev->heads;
405 head = track % dev->heads;
406 sect = (u32)block % dev->sectors + 1;
408 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
409 (u32)block, track, cyl, head, sect);
411 /* Check whether the converted CHS can fit.
415 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
418 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
429 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
430 * @pio_mask: pio_mask
431 * @mwdma_mask: mwdma_mask
432 * @udma_mask: udma_mask
434 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
435 * unsigned int xfer_mask.
443 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
444 unsigned int mwdma_mask,
445 unsigned int udma_mask)
447 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
448 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
449 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
453 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
454 * @xfer_mask: xfer_mask to unpack
455 * @pio_mask: resulting pio_mask
456 * @mwdma_mask: resulting mwdma_mask
457 * @udma_mask: resulting udma_mask
459 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
460 * Any NULL distination masks will be ignored.
462 static void ata_unpack_xfermask(unsigned int xfer_mask,
463 unsigned int *pio_mask,
464 unsigned int *mwdma_mask,
465 unsigned int *udma_mask)
468 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
470 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
472 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
475 static const struct ata_xfer_ent {
479 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
480 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
481 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
486 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
487 * @xfer_mask: xfer_mask of interest
489 * Return matching XFER_* value for @xfer_mask. Only the highest
490 * bit of @xfer_mask is considered.
496 * Matching XFER_* value, 0 if no match found.
498 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
500 int highbit = fls(xfer_mask) - 1;
501 const struct ata_xfer_ent *ent;
503 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
504 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
505 return ent->base + highbit - ent->shift;
510 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
511 * @xfer_mode: XFER_* of interest
513 * Return matching xfer_mask for @xfer_mode.
519 * Matching xfer_mask, 0 if no match found.
521 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
523 const struct ata_xfer_ent *ent;
525 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
526 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
527 return 1 << (ent->shift + xfer_mode - ent->base);
532 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
533 * @xfer_mode: XFER_* of interest
535 * Return matching xfer_shift for @xfer_mode.
541 * Matching xfer_shift, -1 if no match found.
543 static int ata_xfer_mode2shift(unsigned int xfer_mode)
545 const struct ata_xfer_ent *ent;
547 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
548 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
554 * ata_mode_string - convert xfer_mask to string
555 * @xfer_mask: mask of bits supported; only highest bit counts.
557 * Determine string which represents the highest speed
558 * (highest bit in @modemask).
564 * Constant C string representing highest speed listed in
565 * @mode_mask, or the constant C string "<n/a>".
567 static const char *ata_mode_string(unsigned int xfer_mask)
569 static const char * const xfer_mode_str[] = {
593 highbit = fls(xfer_mask) - 1;
594 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
595 return xfer_mode_str[highbit];
599 static const char *sata_spd_string(unsigned int spd)
601 static const char * const spd_str[] = {
606 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
608 return spd_str[spd - 1];
611 void ata_dev_disable(struct ata_device *dev)
613 if (ata_dev_enabled(dev)) {
614 if (ata_msg_drv(dev->link->ap))
615 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
616 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
623 * ata_devchk - PATA device presence detection
624 * @ap: ATA channel to examine
625 * @device: Device to examine (starting at zero)
627 * This technique was originally described in
628 * Hale Landis's ATADRVR (www.ata-atapi.com), and
629 * later found its way into the ATA/ATAPI spec.
631 * Write a pattern to the ATA shadow registers,
632 * and if a device is present, it will respond by
633 * correctly storing and echoing back the
634 * ATA shadow register contents.
640 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
642 struct ata_ioports *ioaddr = &ap->ioaddr;
645 ap->ops->dev_select(ap, device);
647 iowrite8(0x55, ioaddr->nsect_addr);
648 iowrite8(0xaa, ioaddr->lbal_addr);
650 iowrite8(0xaa, ioaddr->nsect_addr);
651 iowrite8(0x55, ioaddr->lbal_addr);
653 iowrite8(0x55, ioaddr->nsect_addr);
654 iowrite8(0xaa, ioaddr->lbal_addr);
656 nsect = ioread8(ioaddr->nsect_addr);
657 lbal = ioread8(ioaddr->lbal_addr);
659 if ((nsect == 0x55) && (lbal == 0xaa))
660 return 1; /* we found a device */
662 return 0; /* nothing found */
666 * ata_dev_classify - determine device type based on ATA-spec signature
667 * @tf: ATA taskfile register set for device to be identified
669 * Determine from taskfile register contents whether a device is
670 * ATA or ATAPI, as per "Signature and persistence" section
671 * of ATA/PI spec (volume 1, sect 5.14).
677 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
678 * %ATA_DEV_UNKNOWN the event of failure.
680 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
682 /* Apple's open source Darwin code hints that some devices only
683 * put a proper signature into the LBA mid/high registers,
684 * So, we only check those. It's sufficient for uniqueness.
686 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
687 * signatures for ATA and ATAPI devices attached on SerialATA,
688 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
689 * spec has never mentioned about using different signatures
690 * for ATA/ATAPI devices. Then, Serial ATA II: Port
691 * Multiplier specification began to use 0x69/0x96 to identify
692 * port multpliers and 0x3c/0xc3 to identify SEMB device.
693 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
694 * 0x69/0x96 shortly and described them as reserved for
697 * We follow the current spec and consider that 0x69/0x96
698 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
700 if ((tf->lbam == 0) && (tf->lbah == 0)) {
701 DPRINTK("found ATA device by sig\n");
705 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
706 DPRINTK("found ATAPI device by sig\n");
707 return ATA_DEV_ATAPI;
710 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
711 DPRINTK("found PMP device by sig\n");
715 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
716 printk("ata: SEMB device ignored\n");
717 return ATA_DEV_SEMB_UNSUP; /* not yet */
720 DPRINTK("unknown device\n");
721 return ATA_DEV_UNKNOWN;
725 * ata_dev_try_classify - Parse returned ATA device signature
726 * @dev: ATA device to classify (starting at zero)
727 * @present: device seems present
728 * @r_err: Value of error register on completion
730 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
731 * an ATA/ATAPI-defined set of values is placed in the ATA
732 * shadow registers, indicating the results of device detection
735 * Select the ATA device, and read the values from the ATA shadow
736 * registers. Then parse according to the Error register value,
737 * and the spec-defined values examined by ata_dev_classify().
743 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
745 unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
748 struct ata_port *ap = dev->link->ap;
749 struct ata_taskfile tf;
753 ap->ops->dev_select(ap, dev->devno);
755 memset(&tf, 0, sizeof(tf));
757 ap->ops->tf_read(ap, &tf);
762 /* see if device passed diags: if master then continue and warn later */
763 if (err == 0 && dev->devno == 0)
764 /* diagnostic fail : do nothing _YET_ */
765 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
768 else if ((dev->devno == 0) && (err == 0x81))
773 /* determine if device is ATA or ATAPI */
774 class = ata_dev_classify(&tf);
776 if (class == ATA_DEV_UNKNOWN) {
777 /* If the device failed diagnostic, it's likely to
778 * have reported incorrect device signature too.
779 * Assume ATA device if the device seems present but
780 * device signature is invalid with diagnostic
783 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
786 class = ATA_DEV_NONE;
787 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
788 class = ATA_DEV_NONE;
794 * ata_id_string - Convert IDENTIFY DEVICE page into string
795 * @id: IDENTIFY DEVICE results we will examine
796 * @s: string into which data is output
797 * @ofs: offset into identify device page
798 * @len: length of string to return. must be an even number.
800 * The strings in the IDENTIFY DEVICE page are broken up into
801 * 16-bit chunks. Run through the string, and output each
802 * 8-bit chunk linearly, regardless of platform.
808 void ata_id_string(const u16 *id, unsigned char *s,
809 unsigned int ofs, unsigned int len)
828 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
829 * @id: IDENTIFY DEVICE results we will examine
830 * @s: string into which data is output
831 * @ofs: offset into identify device page
832 * @len: length of string to return. must be an odd number.
834 * This function is identical to ata_id_string except that it
835 * trims trailing spaces and terminates the resulting string with
836 * null. @len must be actual maximum length (even number) + 1.
841 void ata_id_c_string(const u16 *id, unsigned char *s,
842 unsigned int ofs, unsigned int len)
848 ata_id_string(id, s, ofs, len - 1);
850 p = s + strnlen(s, len - 1);
851 while (p > s && p[-1] == ' ')
856 static u64 ata_id_n_sectors(const u16 *id)
858 if (ata_id_has_lba(id)) {
859 if (ata_id_has_lba48(id))
860 return ata_id_u64(id, 100);
862 return ata_id_u32(id, 60);
864 if (ata_id_current_chs_valid(id))
865 return ata_id_u32(id, 57);
867 return id[1] * id[3] * id[6];
871 static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
875 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
876 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
877 sectors |= (tf->hob_lbal & 0xff) << 24;
878 sectors |= (tf->lbah & 0xff) << 16;
879 sectors |= (tf->lbam & 0xff) << 8;
880 sectors |= (tf->lbal & 0xff);
885 static u64 ata_tf_to_lba(struct ata_taskfile *tf)
889 sectors |= (tf->device & 0x0f) << 24;
890 sectors |= (tf->lbah & 0xff) << 16;
891 sectors |= (tf->lbam & 0xff) << 8;
892 sectors |= (tf->lbal & 0xff);
898 * ata_read_native_max_address - Read native max address
899 * @dev: target device
900 * @max_sectors: out parameter for the result native max address
902 * Perform an LBA48 or LBA28 native size query upon the device in
906 * 0 on success, -EACCES if command is aborted by the drive.
907 * -EIO on other errors.
909 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
911 unsigned int err_mask;
912 struct ata_taskfile tf;
913 int lba48 = ata_id_has_lba48(dev->id);
915 ata_tf_init(dev, &tf);
917 /* always clear all address registers */
918 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
921 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
922 tf.flags |= ATA_TFLAG_LBA48;
924 tf.command = ATA_CMD_READ_NATIVE_MAX;
926 tf.protocol |= ATA_PROT_NODATA;
927 tf.device |= ATA_LBA;
929 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
931 ata_dev_printk(dev, KERN_WARNING, "failed to read native "
932 "max address (err_mask=0x%x)\n", err_mask);
933 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
939 *max_sectors = ata_tf_to_lba48(&tf);
941 *max_sectors = ata_tf_to_lba(&tf);
942 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
948 * ata_set_max_sectors - Set max sectors
949 * @dev: target device
950 * @new_sectors: new max sectors value to set for the device
952 * Set max sectors of @dev to @new_sectors.
955 * 0 on success, -EACCES if command is aborted or denied (due to
956 * previous non-volatile SET_MAX) by the drive. -EIO on other
959 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
961 unsigned int err_mask;
962 struct ata_taskfile tf;
963 int lba48 = ata_id_has_lba48(dev->id);
967 ata_tf_init(dev, &tf);
969 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
972 tf.command = ATA_CMD_SET_MAX_EXT;
973 tf.flags |= ATA_TFLAG_LBA48;
975 tf.hob_lbal = (new_sectors >> 24) & 0xff;
976 tf.hob_lbam = (new_sectors >> 32) & 0xff;
977 tf.hob_lbah = (new_sectors >> 40) & 0xff;
979 tf.command = ATA_CMD_SET_MAX;
981 tf.device |= (new_sectors >> 24) & 0xf;
984 tf.protocol |= ATA_PROT_NODATA;
985 tf.device |= ATA_LBA;
987 tf.lbal = (new_sectors >> 0) & 0xff;
988 tf.lbam = (new_sectors >> 8) & 0xff;
989 tf.lbah = (new_sectors >> 16) & 0xff;
991 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
993 ata_dev_printk(dev, KERN_WARNING, "failed to set "
994 "max address (err_mask=0x%x)\n", err_mask);
995 if (err_mask == AC_ERR_DEV &&
996 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1005 * ata_hpa_resize - Resize a device with an HPA set
1006 * @dev: Device to resize
1008 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1009 * it if required to the full size of the media. The caller must check
1010 * the drive has the HPA feature set enabled.
1013 * 0 on success, -errno on failure.
1015 static int ata_hpa_resize(struct ata_device *dev)
1017 struct ata_eh_context *ehc = &dev->link->eh_context;
1018 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1019 u64 sectors = ata_id_n_sectors(dev->id);
1023 /* do we need to do it? */
1024 if (dev->class != ATA_DEV_ATA ||
1025 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1026 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
1029 /* read native max address */
1030 rc = ata_read_native_max_address(dev, &native_sectors);
1032 /* If HPA isn't going to be unlocked, skip HPA
1033 * resizing from the next try.
1035 if (!ata_ignore_hpa) {
1036 ata_dev_printk(dev, KERN_WARNING, "HPA support seems "
1037 "broken, will skip HPA handling\n");
1038 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1040 /* we can continue if device aborted the command */
1048 /* nothing to do? */
1049 if (native_sectors <= sectors || !ata_ignore_hpa) {
1050 if (!print_info || native_sectors == sectors)
1053 if (native_sectors > sectors)
1054 ata_dev_printk(dev, KERN_INFO,
1055 "HPA detected: current %llu, native %llu\n",
1056 (unsigned long long)sectors,
1057 (unsigned long long)native_sectors);
1058 else if (native_sectors < sectors)
1059 ata_dev_printk(dev, KERN_WARNING,
1060 "native sectors (%llu) is smaller than "
1062 (unsigned long long)native_sectors,
1063 (unsigned long long)sectors);
1067 /* let's unlock HPA */
1068 rc = ata_set_max_sectors(dev, native_sectors);
1069 if (rc == -EACCES) {
1070 /* if device aborted the command, skip HPA resizing */
1071 ata_dev_printk(dev, KERN_WARNING, "device aborted resize "
1072 "(%llu -> %llu), skipping HPA handling\n",
1073 (unsigned long long)sectors,
1074 (unsigned long long)native_sectors);
1075 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1080 /* re-read IDENTIFY data */
1081 rc = ata_dev_reread_id(dev, 0);
1083 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY "
1084 "data after HPA resizing\n");
1089 u64 new_sectors = ata_id_n_sectors(dev->id);
1090 ata_dev_printk(dev, KERN_INFO,
1091 "HPA unlocked: %llu -> %llu, native %llu\n",
1092 (unsigned long long)sectors,
1093 (unsigned long long)new_sectors,
1094 (unsigned long long)native_sectors);
1101 * ata_id_to_dma_mode - Identify DMA mode from id block
1102 * @dev: device to identify
1103 * @unknown: mode to assume if we cannot tell
1105 * Set up the timing values for the device based upon the identify
1106 * reported values for the DMA mode. This function is used by drivers
1107 * which rely upon firmware configured modes, but wish to report the
1108 * mode correctly when possible.
1110 * In addition we emit similarly formatted messages to the default
1111 * ata_dev_set_mode handler, in order to provide consistency of
1115 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
1120 /* Pack the DMA modes */
1121 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
1122 if (dev->id[53] & 0x04)
1123 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
1125 /* Select the mode in use */
1126 mode = ata_xfer_mask2mode(mask);
1129 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
1130 ata_mode_string(mask));
1132 /* SWDMA perhaps ? */
1134 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
1137 /* Configure the device reporting */
1138 dev->xfer_mode = mode;
1139 dev->xfer_shift = ata_xfer_mode2shift(mode);
1143 * ata_noop_dev_select - Select device 0/1 on ATA bus
1144 * @ap: ATA channel to manipulate
1145 * @device: ATA device (numbered from zero) to select
1147 * This function performs no actual function.
1149 * May be used as the dev_select() entry in ata_port_operations.
1154 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
1160 * ata_std_dev_select - Select device 0/1 on ATA bus
1161 * @ap: ATA channel to manipulate
1162 * @device: ATA device (numbered from zero) to select
1164 * Use the method defined in the ATA specification to
1165 * make either device 0, or device 1, active on the
1166 * ATA channel. Works with both PIO and MMIO.
1168 * May be used as the dev_select() entry in ata_port_operations.
1174 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1179 tmp = ATA_DEVICE_OBS;
1181 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1183 iowrite8(tmp, ap->ioaddr.device_addr);
1184 ata_pause(ap); /* needed; also flushes, for mmio */
1188 * ata_dev_select - Select device 0/1 on ATA bus
1189 * @ap: ATA channel to manipulate
1190 * @device: ATA device (numbered from zero) to select
1191 * @wait: non-zero to wait for Status register BSY bit to clear
1192 * @can_sleep: non-zero if context allows sleeping
1194 * Use the method defined in the ATA specification to
1195 * make either device 0, or device 1, active on the
1198 * This is a high-level version of ata_std_dev_select(),
1199 * which additionally provides the services of inserting
1200 * the proper pauses and status polling, where needed.
1206 void ata_dev_select(struct ata_port *ap, unsigned int device,
1207 unsigned int wait, unsigned int can_sleep)
1209 if (ata_msg_probe(ap))
1210 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
1211 "device %u, wait %u\n", device, wait);
1216 ap->ops->dev_select(ap, device);
1219 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
1226 * ata_dump_id - IDENTIFY DEVICE info debugging output
1227 * @id: IDENTIFY DEVICE page to dump
1229 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1236 static inline void ata_dump_id(const u16 *id)
1238 DPRINTK("49==0x%04x "
1248 DPRINTK("80==0x%04x "
1258 DPRINTK("88==0x%04x "
1265 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1266 * @id: IDENTIFY data to compute xfer mask from
1268 * Compute the xfermask for this device. This is not as trivial
1269 * as it seems if we must consider early devices correctly.
1271 * FIXME: pre IDE drive timing (do we care ?).
1279 static unsigned int ata_id_xfermask(const u16 *id)
1281 unsigned int pio_mask, mwdma_mask, udma_mask;
1283 /* Usual case. Word 53 indicates word 64 is valid */
1284 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1285 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1289 /* If word 64 isn't valid then Word 51 high byte holds
1290 * the PIO timing number for the maximum. Turn it into
1293 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1294 if (mode < 5) /* Valid PIO range */
1295 pio_mask = (2 << mode) - 1;
1299 /* But wait.. there's more. Design your standards by
1300 * committee and you too can get a free iordy field to
1301 * process. However its the speeds not the modes that
1302 * are supported... Note drivers using the timing API
1303 * will get this right anyway
1307 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1309 if (ata_id_is_cfa(id)) {
1311 * Process compact flash extended modes
1313 int pio = id[163] & 0x7;
1314 int dma = (id[163] >> 3) & 7;
1317 pio_mask |= (1 << 5);
1319 pio_mask |= (1 << 6);
1321 mwdma_mask |= (1 << 3);
1323 mwdma_mask |= (1 << 4);
1327 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1328 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1330 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1334 * ata_port_queue_task - Queue port_task
1335 * @ap: The ata_port to queue port_task for
1336 * @fn: workqueue function to be scheduled
1337 * @data: data for @fn to use
1338 * @delay: delay time for workqueue function
1340 * Schedule @fn(@data) for execution after @delay jiffies using
1341 * port_task. There is one port_task per port and it's the
1342 * user(low level driver)'s responsibility to make sure that only
1343 * one task is active at any given time.
1345 * libata core layer takes care of synchronization between
1346 * port_task and EH. ata_port_queue_task() may be ignored for EH
1350 * Inherited from caller.
1352 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1353 unsigned long delay)
1355 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1356 ap->port_task_data = data;
1358 /* may fail if ata_port_flush_task() in progress */
1359 queue_delayed_work(ata_wq, &ap->port_task, delay);
1363 * ata_port_flush_task - Flush port_task
1364 * @ap: The ata_port to flush port_task for
1366 * After this function completes, port_task is guranteed not to
1367 * be running or scheduled.
1370 * Kernel thread context (may sleep)
1372 void ata_port_flush_task(struct ata_port *ap)
1376 cancel_rearming_delayed_work(&ap->port_task);
1378 if (ata_msg_ctl(ap))
1379 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1382 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1384 struct completion *waiting = qc->private_data;
1390 * ata_exec_internal_sg - execute libata internal command
1391 * @dev: Device to which the command is sent
1392 * @tf: Taskfile registers for the command and the result
1393 * @cdb: CDB for packet command
1394 * @dma_dir: Data tranfer direction of the command
1395 * @sg: sg list for the data buffer of the command
1396 * @n_elem: Number of sg entries
1397 * @timeout: Timeout in msecs (0 for default)
1399 * Executes libata internal command with timeout. @tf contains
1400 * command on entry and result on return. Timeout and error
1401 * conditions are reported via return value. No recovery action
1402 * is taken after a command times out. It's caller's duty to
1403 * clean up after timeout.
1406 * None. Should be called with kernel context, might sleep.
1409 * Zero on success, AC_ERR_* mask on failure
1411 unsigned ata_exec_internal_sg(struct ata_device *dev,
1412 struct ata_taskfile *tf, const u8 *cdb,
1413 int dma_dir, struct scatterlist *sg,
1414 unsigned int n_elem, unsigned long timeout)
1416 struct ata_link *link = dev->link;
1417 struct ata_port *ap = link->ap;
1418 u8 command = tf->command;
1419 struct ata_queued_cmd *qc;
1420 unsigned int tag, preempted_tag;
1421 u32 preempted_sactive, preempted_qc_active;
1422 int preempted_nr_active_links;
1423 DECLARE_COMPLETION_ONSTACK(wait);
1424 unsigned long flags;
1425 unsigned int err_mask;
1428 spin_lock_irqsave(ap->lock, flags);
1430 /* no internal command while frozen */
1431 if (ap->pflags & ATA_PFLAG_FROZEN) {
1432 spin_unlock_irqrestore(ap->lock, flags);
1433 return AC_ERR_SYSTEM;
1436 /* initialize internal qc */
1438 /* XXX: Tag 0 is used for drivers with legacy EH as some
1439 * drivers choke if any other tag is given. This breaks
1440 * ata_tag_internal() test for those drivers. Don't use new
1441 * EH stuff without converting to it.
1443 if (ap->ops->error_handler)
1444 tag = ATA_TAG_INTERNAL;
1448 if (test_and_set_bit(tag, &ap->qc_allocated))
1450 qc = __ata_qc_from_tag(ap, tag);
1458 preempted_tag = link->active_tag;
1459 preempted_sactive = link->sactive;
1460 preempted_qc_active = ap->qc_active;
1461 preempted_nr_active_links = ap->nr_active_links;
1462 link->active_tag = ATA_TAG_POISON;
1465 ap->nr_active_links = 0;
1467 /* prepare & issue qc */
1470 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1471 qc->flags |= ATA_QCFLAG_RESULT_TF;
1472 qc->dma_dir = dma_dir;
1473 if (dma_dir != DMA_NONE) {
1474 unsigned int i, buflen = 0;
1476 for (i = 0; i < n_elem; i++)
1477 buflen += sg[i].length;
1479 ata_sg_init(qc, sg, n_elem);
1480 qc->nbytes = buflen;
1483 qc->private_data = &wait;
1484 qc->complete_fn = ata_qc_complete_internal;
1488 spin_unlock_irqrestore(ap->lock, flags);
1491 timeout = ata_probe_timeout * 1000 / HZ;
1493 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
1495 ata_port_flush_task(ap);
1498 spin_lock_irqsave(ap->lock, flags);
1500 /* We're racing with irq here. If we lose, the
1501 * following test prevents us from completing the qc
1502 * twice. If we win, the port is frozen and will be
1503 * cleaned up by ->post_internal_cmd().
1505 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1506 qc->err_mask |= AC_ERR_TIMEOUT;
1508 if (ap->ops->error_handler)
1509 ata_port_freeze(ap);
1511 ata_qc_complete(qc);
1513 if (ata_msg_warn(ap))
1514 ata_dev_printk(dev, KERN_WARNING,
1515 "qc timeout (cmd 0x%x)\n", command);
1518 spin_unlock_irqrestore(ap->lock, flags);
1521 /* do post_internal_cmd */
1522 if (ap->ops->post_internal_cmd)
1523 ap->ops->post_internal_cmd(qc);
1525 /* perform minimal error analysis */
1526 if (qc->flags & ATA_QCFLAG_FAILED) {
1527 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1528 qc->err_mask |= AC_ERR_DEV;
1531 qc->err_mask |= AC_ERR_OTHER;
1533 if (qc->err_mask & ~AC_ERR_OTHER)
1534 qc->err_mask &= ~AC_ERR_OTHER;
1538 spin_lock_irqsave(ap->lock, flags);
1540 *tf = qc->result_tf;
1541 err_mask = qc->err_mask;
1544 link->active_tag = preempted_tag;
1545 link->sactive = preempted_sactive;
1546 ap->qc_active = preempted_qc_active;
1547 ap->nr_active_links = preempted_nr_active_links;
1549 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1550 * Until those drivers are fixed, we detect the condition
1551 * here, fail the command with AC_ERR_SYSTEM and reenable the
1554 * Note that this doesn't change any behavior as internal
1555 * command failure results in disabling the device in the
1556 * higher layer for LLDDs without new reset/EH callbacks.
1558 * Kill the following code as soon as those drivers are fixed.
1560 if (ap->flags & ATA_FLAG_DISABLED) {
1561 err_mask |= AC_ERR_SYSTEM;
1565 spin_unlock_irqrestore(ap->lock, flags);
1571 * ata_exec_internal - execute libata internal command
1572 * @dev: Device to which the command is sent
1573 * @tf: Taskfile registers for the command and the result
1574 * @cdb: CDB for packet command
1575 * @dma_dir: Data tranfer direction of the command
1576 * @buf: Data buffer of the command
1577 * @buflen: Length of data buffer
1578 * @timeout: Timeout in msecs (0 for default)
1580 * Wrapper around ata_exec_internal_sg() which takes simple
1581 * buffer instead of sg list.
1584 * None. Should be called with kernel context, might sleep.
1587 * Zero on success, AC_ERR_* mask on failure
1589 unsigned ata_exec_internal(struct ata_device *dev,
1590 struct ata_taskfile *tf, const u8 *cdb,
1591 int dma_dir, void *buf, unsigned int buflen,
1592 unsigned long timeout)
1594 struct scatterlist *psg = NULL, sg;
1595 unsigned int n_elem = 0;
1597 if (dma_dir != DMA_NONE) {
1599 sg_init_one(&sg, buf, buflen);
1604 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1609 * ata_do_simple_cmd - execute simple internal command
1610 * @dev: Device to which the command is sent
1611 * @cmd: Opcode to execute
1613 * Execute a 'simple' command, that only consists of the opcode
1614 * 'cmd' itself, without filling any other registers
1617 * Kernel thread context (may sleep).
1620 * Zero on success, AC_ERR_* mask on failure
1622 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1624 struct ata_taskfile tf;
1626 ata_tf_init(dev, &tf);
1629 tf.flags |= ATA_TFLAG_DEVICE;
1630 tf.protocol = ATA_PROT_NODATA;
1632 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1636 * ata_pio_need_iordy - check if iordy needed
1639 * Check if the current speed of the device requires IORDY. Used
1640 * by various controllers for chip configuration.
1643 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1645 /* Controller doesn't support IORDY. Probably a pointless check
1646 as the caller should know this */
1647 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1649 /* PIO3 and higher it is mandatory */
1650 if (adev->pio_mode > XFER_PIO_2)
1652 /* We turn it on when possible */
1653 if (ata_id_has_iordy(adev->id))
1659 * ata_pio_mask_no_iordy - Return the non IORDY mask
1662 * Compute the highest mode possible if we are not using iordy. Return
1663 * -1 if no iordy mode is available.
1666 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1668 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1669 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1670 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1671 /* Is the speed faster than the drive allows non IORDY ? */
1673 /* This is cycle times not frequency - watch the logic! */
1674 if (pio > 240) /* PIO2 is 240nS per cycle */
1675 return 3 << ATA_SHIFT_PIO;
1676 return 7 << ATA_SHIFT_PIO;
1679 return 3 << ATA_SHIFT_PIO;
1683 * ata_dev_read_id - Read ID data from the specified device
1684 * @dev: target device
1685 * @p_class: pointer to class of the target device (may be changed)
1686 * @flags: ATA_READID_* flags
1687 * @id: buffer to read IDENTIFY data into
1689 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1690 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1691 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1692 * for pre-ATA4 drives.
1694 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
1695 * now we abort if we hit that case.
1698 * Kernel thread context (may sleep)
1701 * 0 on success, -errno otherwise.
1703 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1704 unsigned int flags, u16 *id)
1706 struct ata_port *ap = dev->link->ap;
1707 unsigned int class = *p_class;
1708 struct ata_taskfile tf;
1709 unsigned int err_mask = 0;
1711 int may_fallback = 1, tried_spinup = 0;
1714 if (ata_msg_ctl(ap))
1715 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1717 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1719 ata_tf_init(dev, &tf);
1723 tf.command = ATA_CMD_ID_ATA;
1726 tf.command = ATA_CMD_ID_ATAPI;
1730 reason = "unsupported class";
1734 tf.protocol = ATA_PROT_PIO;
1736 /* Some devices choke if TF registers contain garbage. Make
1737 * sure those are properly initialized.
1739 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1741 /* Device presence detection is unreliable on some
1742 * controllers. Always poll IDENTIFY if available.
1744 tf.flags |= ATA_TFLAG_POLLING;
1746 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1747 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1749 if (err_mask & AC_ERR_NODEV_HINT) {
1750 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1751 ap->print_id, dev->devno);
1755 /* Device or controller might have reported the wrong
1756 * device class. Give a shot at the other IDENTIFY if
1757 * the current one is aborted by the device.
1760 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1763 if (class == ATA_DEV_ATA)
1764 class = ATA_DEV_ATAPI;
1766 class = ATA_DEV_ATA;
1771 reason = "I/O error";
1775 /* Falling back doesn't make sense if ID data was read
1776 * successfully at least once.
1780 swap_buf_le16(id, ATA_ID_WORDS);
1784 reason = "device reports invalid type";
1786 if (class == ATA_DEV_ATA) {
1787 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1790 if (ata_id_is_ata(id))
1794 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1797 * Drive powered-up in standby mode, and requires a specific
1798 * SET_FEATURES spin-up subcommand before it will accept
1799 * anything other than the original IDENTIFY command.
1801 ata_tf_init(dev, &tf);
1802 tf.command = ATA_CMD_SET_FEATURES;
1803 tf.feature = SETFEATURES_SPINUP;
1804 tf.protocol = ATA_PROT_NODATA;
1805 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1806 err_mask = ata_exec_internal(dev, &tf, NULL,
1807 DMA_NONE, NULL, 0, 0);
1808 if (err_mask && id[2] != 0x738c) {
1810 reason = "SPINUP failed";
1814 * If the drive initially returned incomplete IDENTIFY info,
1815 * we now must reissue the IDENTIFY command.
1817 if (id[2] == 0x37c8)
1821 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1823 * The exact sequence expected by certain pre-ATA4 drives is:
1825 * IDENTIFY (optional in early ATA)
1826 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
1828 * Some drives were very specific about that exact sequence.
1830 * Note that ATA4 says lba is mandatory so the second check
1831 * shoud never trigger.
1833 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1834 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1837 reason = "INIT_DEV_PARAMS failed";
1841 /* current CHS translation info (id[53-58]) might be
1842 * changed. reread the identify device info.
1844 flags &= ~ATA_READID_POSTRESET;
1854 if (ata_msg_warn(ap))
1855 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1856 "(%s, err_mask=0x%x)\n", reason, err_mask);
1860 static inline u8 ata_dev_knobble(struct ata_device *dev)
1862 struct ata_port *ap = dev->link->ap;
1863 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1866 static void ata_dev_config_ncq(struct ata_device *dev,
1867 char *desc, size_t desc_sz)
1869 struct ata_port *ap = dev->link->ap;
1870 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1872 if (!ata_id_has_ncq(dev->id)) {
1876 if (dev->horkage & ATA_HORKAGE_NONCQ) {
1877 snprintf(desc, desc_sz, "NCQ (not used)");
1880 if (ap->flags & ATA_FLAG_NCQ) {
1881 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1882 dev->flags |= ATA_DFLAG_NCQ;
1885 if (hdepth >= ddepth)
1886 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1888 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1892 * ata_dev_configure - Configure the specified ATA/ATAPI device
1893 * @dev: Target device to configure
1895 * Configure @dev according to @dev->id. Generic and low-level
1896 * driver specific fixups are also applied.
1899 * Kernel thread context (may sleep)
1902 * 0 on success, -errno otherwise
1904 int ata_dev_configure(struct ata_device *dev)
1906 struct ata_port *ap = dev->link->ap;
1907 struct ata_eh_context *ehc = &dev->link->eh_context;
1908 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1909 const u16 *id = dev->id;
1910 unsigned int xfer_mask;
1911 char revbuf[7]; /* XYZ-99\0 */
1912 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1913 char modelbuf[ATA_ID_PROD_LEN+1];
1916 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1917 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
1922 if (ata_msg_probe(ap))
1923 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1926 dev->horkage |= ata_dev_blacklisted(dev);
1928 /* let ACPI work its magic */
1929 rc = ata_acpi_on_devcfg(dev);
1933 /* massage HPA, do it early as it might change IDENTIFY data */
1934 rc = ata_hpa_resize(dev);
1938 /* print device capabilities */
1939 if (ata_msg_probe(ap))
1940 ata_dev_printk(dev, KERN_DEBUG,
1941 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1942 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1944 id[49], id[82], id[83], id[84],
1945 id[85], id[86], id[87], id[88]);
1947 /* initialize to-be-configured parameters */
1948 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1949 dev->max_sectors = 0;
1957 * common ATA, ATAPI feature tests
1960 /* find max transfer mode; for printk only */
1961 xfer_mask = ata_id_xfermask(id);
1963 if (ata_msg_probe(ap))
1966 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1967 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1970 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1973 /* ATA-specific feature tests */
1974 if (dev->class == ATA_DEV_ATA) {
1975 if (ata_id_is_cfa(id)) {
1976 if (id[162] & 1) /* CPRM may make this media unusable */
1977 ata_dev_printk(dev, KERN_WARNING,
1978 "supports DRM functions and may "
1979 "not be fully accessable.\n");
1980 snprintf(revbuf, 7, "CFA");
1983 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1985 dev->n_sectors = ata_id_n_sectors(id);
1987 if (dev->id[59] & 0x100)
1988 dev->multi_count = dev->id[59] & 0xff;
1990 if (ata_id_has_lba(id)) {
1991 const char *lba_desc;
1995 dev->flags |= ATA_DFLAG_LBA;
1996 if (ata_id_has_lba48(id)) {
1997 dev->flags |= ATA_DFLAG_LBA48;
2000 if (dev->n_sectors >= (1UL << 28) &&
2001 ata_id_has_flush_ext(id))
2002 dev->flags |= ATA_DFLAG_FLUSH_EXT;
2006 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2008 /* print device info to dmesg */
2009 if (ata_msg_drv(ap) && print_info) {
2010 ata_dev_printk(dev, KERN_INFO,
2011 "%s: %s, %s, max %s\n",
2012 revbuf, modelbuf, fwrevbuf,
2013 ata_mode_string(xfer_mask));
2014 ata_dev_printk(dev, KERN_INFO,
2015 "%Lu sectors, multi %u: %s %s\n",
2016 (unsigned long long)dev->n_sectors,
2017 dev->multi_count, lba_desc, ncq_desc);
2022 /* Default translation */
2023 dev->cylinders = id[1];
2025 dev->sectors = id[6];
2027 if (ata_id_current_chs_valid(id)) {
2028 /* Current CHS translation is valid. */
2029 dev->cylinders = id[54];
2030 dev->heads = id[55];
2031 dev->sectors = id[56];
2034 /* print device info to dmesg */
2035 if (ata_msg_drv(ap) && print_info) {
2036 ata_dev_printk(dev, KERN_INFO,
2037 "%s: %s, %s, max %s\n",
2038 revbuf, modelbuf, fwrevbuf,
2039 ata_mode_string(xfer_mask));
2040 ata_dev_printk(dev, KERN_INFO,
2041 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
2042 (unsigned long long)dev->n_sectors,
2043 dev->multi_count, dev->cylinders,
2044 dev->heads, dev->sectors);
2051 /* ATAPI-specific feature tests */
2052 else if (dev->class == ATA_DEV_ATAPI) {
2053 const char *cdb_intr_string = "";
2054 const char *atapi_an_string = "";
2057 rc = atapi_cdb_len(id);
2058 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
2059 if (ata_msg_warn(ap))
2060 ata_dev_printk(dev, KERN_WARNING,
2061 "unsupported CDB len\n");
2065 dev->cdb_len = (unsigned int) rc;
2067 /* Enable ATAPI AN if both the host and device have
2068 * the support. If PMP is attached, SNTF is required
2069 * to enable ATAPI AN to discern between PHY status
2070 * changed notifications and ATAPI ANs.
2072 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
2073 (!ap->nr_pmp_links ||
2074 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
2075 unsigned int err_mask;
2077 /* issue SET feature command to turn this on */
2078 err_mask = ata_dev_set_AN(dev, SETFEATURES_SATA_ENABLE);
2080 ata_dev_printk(dev, KERN_ERR,
2081 "failed to enable ATAPI AN "
2082 "(err_mask=0x%x)\n", err_mask);
2084 dev->flags |= ATA_DFLAG_AN;
2085 atapi_an_string = ", ATAPI AN";
2089 if (ata_id_cdb_intr(dev->id)) {
2090 dev->flags |= ATA_DFLAG_CDB_INTR;
2091 cdb_intr_string = ", CDB intr";
2094 /* print device info to dmesg */
2095 if (ata_msg_drv(ap) && print_info)
2096 ata_dev_printk(dev, KERN_INFO,
2097 "ATAPI: %s, %s, max %s%s%s\n",
2099 ata_mode_string(xfer_mask),
2100 cdb_intr_string, atapi_an_string);
2103 /* determine max_sectors */
2104 dev->max_sectors = ATA_MAX_SECTORS;
2105 if (dev->flags & ATA_DFLAG_LBA48)
2106 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2108 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2109 /* Let the user know. We don't want to disallow opens for
2110 rescue purposes, or in case the vendor is just a blithering
2113 ata_dev_printk(dev, KERN_WARNING,
2114 "Drive reports diagnostics failure. This may indicate a drive\n");
2115 ata_dev_printk(dev, KERN_WARNING,
2116 "fault or invalid emulation. Contact drive vendor for information.\n");
2120 /* limit bridge transfers to udma5, 200 sectors */
2121 if (ata_dev_knobble(dev)) {
2122 if (ata_msg_drv(ap) && print_info)
2123 ata_dev_printk(dev, KERN_INFO,
2124 "applying bridge limits\n");
2125 dev->udma_mask &= ATA_UDMA5;
2126 dev->max_sectors = ATA_MAX_SECTORS;
2129 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
2130 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2133 if (ap->ops->dev_config)
2134 ap->ops->dev_config(dev);
2136 if (ata_msg_probe(ap))
2137 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
2138 __FUNCTION__, ata_chk_status(ap));
2142 if (ata_msg_probe(ap))
2143 ata_dev_printk(dev, KERN_DEBUG,
2144 "%s: EXIT, err\n", __FUNCTION__);
2149 * ata_cable_40wire - return 40 wire cable type
2152 * Helper method for drivers which want to hardwire 40 wire cable
2156 int ata_cable_40wire(struct ata_port *ap)
2158 return ATA_CBL_PATA40;
2162 * ata_cable_80wire - return 80 wire cable type
2165 * Helper method for drivers which want to hardwire 80 wire cable
2169 int ata_cable_80wire(struct ata_port *ap)
2171 return ATA_CBL_PATA80;
2175 * ata_cable_unknown - return unknown PATA cable.
2178 * Helper method for drivers which have no PATA cable detection.
2181 int ata_cable_unknown(struct ata_port *ap)
2183 return ATA_CBL_PATA_UNK;
2187 * ata_cable_sata - return SATA cable type
2190 * Helper method for drivers which have SATA cables
2193 int ata_cable_sata(struct ata_port *ap)
2195 return ATA_CBL_SATA;
2199 * ata_bus_probe - Reset and probe ATA bus
2202 * Master ATA bus probing function. Initiates a hardware-dependent
2203 * bus reset, then attempts to identify any devices found on
2207 * PCI/etc. bus probe sem.
2210 * Zero on success, negative errno otherwise.
2213 int ata_bus_probe(struct ata_port *ap)
2215 unsigned int classes[ATA_MAX_DEVICES];
2216 int tries[ATA_MAX_DEVICES];
2218 struct ata_device *dev;
2222 ata_link_for_each_dev(dev, &ap->link)
2223 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
2226 /* reset and determine device classes */
2227 ap->ops->phy_reset(ap);
2229 ata_link_for_each_dev(dev, &ap->link) {
2230 if (!(ap->flags & ATA_FLAG_DISABLED) &&
2231 dev->class != ATA_DEV_UNKNOWN)
2232 classes[dev->devno] = dev->class;
2234 classes[dev->devno] = ATA_DEV_NONE;
2236 dev->class = ATA_DEV_UNKNOWN;
2241 /* after the reset the device state is PIO 0 and the controller
2242 state is undefined. Record the mode */
2244 ata_link_for_each_dev(dev, &ap->link)
2245 dev->pio_mode = XFER_PIO_0;
2247 /* read IDENTIFY page and configure devices. We have to do the identify
2248 specific sequence bass-ackwards so that PDIAG- is released by
2251 ata_link_for_each_dev(dev, &ap->link) {
2252 if (tries[dev->devno])
2253 dev->class = classes[dev->devno];
2255 if (!ata_dev_enabled(dev))
2258 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2264 /* Now ask for the cable type as PDIAG- should have been released */
2265 if (ap->ops->cable_detect)
2266 ap->cbl = ap->ops->cable_detect(ap);
2268 /* We may have SATA bridge glue hiding here irrespective of the
2269 reported cable types and sensed types */
2270 ata_link_for_each_dev(dev, &ap->link) {
2271 if (!ata_dev_enabled(dev))
2273 /* SATA drives indicate we have a bridge. We don't know which
2274 end of the link the bridge is which is a problem */
2275 if (ata_id_is_sata(dev->id))
2276 ap->cbl = ATA_CBL_SATA;
2279 /* After the identify sequence we can now set up the devices. We do
2280 this in the normal order so that the user doesn't get confused */
2282 ata_link_for_each_dev(dev, &ap->link) {
2283 if (!ata_dev_enabled(dev))
2286 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
2287 rc = ata_dev_configure(dev);
2288 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
2293 /* configure transfer mode */
2294 rc = ata_set_mode(&ap->link, &dev);
2298 ata_link_for_each_dev(dev, &ap->link)
2299 if (ata_dev_enabled(dev))
2302 /* no device present, disable port */
2303 ata_port_disable(ap);
2307 tries[dev->devno]--;
2311 /* eeek, something went very wrong, give up */
2312 tries[dev->devno] = 0;
2316 /* give it just one more chance */
2317 tries[dev->devno] = min(tries[dev->devno], 1);
2319 if (tries[dev->devno] == 1) {
2320 /* This is the last chance, better to slow
2321 * down than lose it.
2323 sata_down_spd_limit(&ap->link);
2324 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2328 if (!tries[dev->devno])
2329 ata_dev_disable(dev);
2335 * ata_port_probe - Mark port as enabled
2336 * @ap: Port for which we indicate enablement
2338 * Modify @ap data structure such that the system
2339 * thinks that the entire port is enabled.
2341 * LOCKING: host lock, or some other form of
2345 void ata_port_probe(struct ata_port *ap)
2347 ap->flags &= ~ATA_FLAG_DISABLED;
2351 * sata_print_link_status - Print SATA link status
2352 * @link: SATA link to printk link status about
2354 * This function prints link speed and status of a SATA link.
2359 void sata_print_link_status(struct ata_link *link)
2361 u32 sstatus, scontrol, tmp;
2363 if (sata_scr_read(link, SCR_STATUS, &sstatus))
2365 sata_scr_read(link, SCR_CONTROL, &scontrol);
2367 if (ata_link_online(link)) {
2368 tmp = (sstatus >> 4) & 0xf;
2369 ata_link_printk(link, KERN_INFO,
2370 "SATA link up %s (SStatus %X SControl %X)\n",
2371 sata_spd_string(tmp), sstatus, scontrol);
2373 ata_link_printk(link, KERN_INFO,
2374 "SATA link down (SStatus %X SControl %X)\n",
2380 * __sata_phy_reset - Wake/reset a low-level SATA PHY
2381 * @ap: SATA port associated with target SATA PHY.
2383 * This function issues commands to standard SATA Sxxx
2384 * PHY registers, to wake up the phy (and device), and
2385 * clear any reset condition.
2388 * PCI/etc. bus probe sem.
2391 void __sata_phy_reset(struct ata_port *ap)
2393 struct ata_link *link = &ap->link;
2394 unsigned long timeout = jiffies + (HZ * 5);
2397 if (ap->flags & ATA_FLAG_SATA_RESET) {
2398 /* issue phy wake/reset */
2399 sata_scr_write_flush(link, SCR_CONTROL, 0x301);
2400 /* Couldn't find anything in SATA I/II specs, but
2401 * AHCI-1.1 10.4.2 says at least 1 ms. */
2404 /* phy wake/clear reset */
2405 sata_scr_write_flush(link, SCR_CONTROL, 0x300);
2407 /* wait for phy to become ready, if necessary */
2410 sata_scr_read(link, SCR_STATUS, &sstatus);
2411 if ((sstatus & 0xf) != 1)
2413 } while (time_before(jiffies, timeout));
2415 /* print link status */
2416 sata_print_link_status(link);
2418 /* TODO: phy layer with polling, timeouts, etc. */
2419 if (!ata_link_offline(link))
2422 ata_port_disable(ap);
2424 if (ap->flags & ATA_FLAG_DISABLED)
2427 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2428 ata_port_disable(ap);
2432 ap->cbl = ATA_CBL_SATA;
2436 * sata_phy_reset - Reset SATA bus.
2437 * @ap: SATA port associated with target SATA PHY.
2439 * This function resets the SATA bus, and then probes
2440 * the bus for devices.
2443 * PCI/etc. bus probe sem.
2446 void sata_phy_reset(struct ata_port *ap)
2448 __sata_phy_reset(ap);
2449 if (ap->flags & ATA_FLAG_DISABLED)
2455 * ata_dev_pair - return other device on cable
2458 * Obtain the other device on the same cable, or if none is
2459 * present NULL is returned
2462 struct ata_device *ata_dev_pair(struct ata_device *adev)
2464 struct ata_link *link = adev->link;
2465 struct ata_device *pair = &link->device[1 - adev->devno];
2466 if (!ata_dev_enabled(pair))
2472 * ata_port_disable - Disable port.
2473 * @ap: Port to be disabled.
2475 * Modify @ap data structure such that the system
2476 * thinks that the entire port is disabled, and should
2477 * never attempt to probe or communicate with devices
2480 * LOCKING: host lock, or some other form of
2484 void ata_port_disable(struct ata_port *ap)
2486 ap->link.device[0].class = ATA_DEV_NONE;
2487 ap->link.device[1].class = ATA_DEV_NONE;
2488 ap->flags |= ATA_FLAG_DISABLED;
2492 * sata_down_spd_limit - adjust SATA spd limit downward
2493 * @link: Link to adjust SATA spd limit for
2495 * Adjust SATA spd limit of @link downward. Note that this
2496 * function only adjusts the limit. The change must be applied
2497 * using sata_set_spd().
2500 * Inherited from caller.
2503 * 0 on success, negative errno on failure
2505 int sata_down_spd_limit(struct ata_link *link)
2507 u32 sstatus, spd, mask;
2510 if (!sata_scr_valid(link))
2513 /* If SCR can be read, use it to determine the current SPD.
2514 * If not, use cached value in link->sata_spd.
2516 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
2518 spd = (sstatus >> 4) & 0xf;
2520 spd = link->sata_spd;
2522 mask = link->sata_spd_limit;
2526 /* unconditionally mask off the highest bit */
2527 highbit = fls(mask) - 1;
2528 mask &= ~(1 << highbit);
2530 /* Mask off all speeds higher than or equal to the current
2531 * one. Force 1.5Gbps if current SPD is not available.
2534 mask &= (1 << (spd - 1)) - 1;
2538 /* were we already at the bottom? */
2542 link->sata_spd_limit = mask;
2544 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n",
2545 sata_spd_string(fls(mask)));
2550 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
2554 if (link->sata_spd_limit == UINT_MAX)
2557 limit = fls(link->sata_spd_limit);
2559 spd = (*scontrol >> 4) & 0xf;
2560 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2562 return spd != limit;
2566 * sata_set_spd_needed - is SATA spd configuration needed
2567 * @link: Link in question
2569 * Test whether the spd limit in SControl matches
2570 * @link->sata_spd_limit. This function is used to determine
2571 * whether hardreset is necessary to apply SATA spd
2575 * Inherited from caller.
2578 * 1 if SATA spd configuration is needed, 0 otherwise.
2580 int sata_set_spd_needed(struct ata_link *link)
2584 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
2587 return __sata_set_spd_needed(link, &scontrol);
2591 * sata_set_spd - set SATA spd according to spd limit
2592 * @link: Link to set SATA spd for
2594 * Set SATA spd of @link according to sata_spd_limit.
2597 * Inherited from caller.
2600 * 0 if spd doesn't need to be changed, 1 if spd has been
2601 * changed. Negative errno if SCR registers are inaccessible.
2603 int sata_set_spd(struct ata_link *link)
2608 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
2611 if (!__sata_set_spd_needed(link, &scontrol))
2614 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
2621 * This mode timing computation functionality is ported over from
2622 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2625 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2626 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2627 * for UDMA6, which is currently supported only by Maxtor drives.
2629 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2632 static const struct ata_timing ata_timing[] = {
2634 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2635 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2636 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2637 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2639 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2640 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2641 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2642 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2643 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2645 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2647 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2648 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2649 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2651 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2652 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2653 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2655 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2656 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2657 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2658 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2660 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2661 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2662 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2664 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2669 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2670 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2672 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2674 q->setup = EZ(t->setup * 1000, T);
2675 q->act8b = EZ(t->act8b * 1000, T);
2676 q->rec8b = EZ(t->rec8b * 1000, T);
2677 q->cyc8b = EZ(t->cyc8b * 1000, T);
2678 q->active = EZ(t->active * 1000, T);
2679 q->recover = EZ(t->recover * 1000, T);
2680 q->cycle = EZ(t->cycle * 1000, T);
2681 q->udma = EZ(t->udma * 1000, UT);
2684 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2685 struct ata_timing *m, unsigned int what)
2687 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2688 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2689 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2690 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2691 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2692 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2693 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2694 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2697 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2699 const struct ata_timing *t;
2701 for (t = ata_timing; t->mode != speed; t++)
2702 if (t->mode == 0xFF)
2707 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2708 struct ata_timing *t, int T, int UT)
2710 const struct ata_timing *s;
2711 struct ata_timing p;
2717 if (!(s = ata_timing_find_mode(speed)))
2720 memcpy(t, s, sizeof(*s));
2723 * If the drive is an EIDE drive, it can tell us it needs extended
2724 * PIO/MW_DMA cycle timing.
2727 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2728 memset(&p, 0, sizeof(p));
2729 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2730 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2731 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2732 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2733 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2735 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2739 * Convert the timing to bus clock counts.
2742 ata_timing_quantize(t, t, T, UT);
2745 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2746 * S.M.A.R.T * and some other commands. We have to ensure that the
2747 * DMA cycle timing is slower/equal than the fastest PIO timing.
2750 if (speed > XFER_PIO_6) {
2751 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2752 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2756 * Lengthen active & recovery time so that cycle time is correct.
2759 if (t->act8b + t->rec8b < t->cyc8b) {
2760 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2761 t->rec8b = t->cyc8b - t->act8b;
2764 if (t->active + t->recover < t->cycle) {
2765 t->active += (t->cycle - (t->active + t->recover)) / 2;
2766 t->recover = t->cycle - t->active;
2769 /* In a few cases quantisation may produce enough errors to
2770 leave t->cycle too low for the sum of active and recovery
2771 if so we must correct this */
2772 if (t->active + t->recover > t->cycle)
2773 t->cycle = t->active + t->recover;
2779 * ata_down_xfermask_limit - adjust dev xfer masks downward
2780 * @dev: Device to adjust xfer masks
2781 * @sel: ATA_DNXFER_* selector
2783 * Adjust xfer masks of @dev downward. Note that this function
2784 * does not apply the change. Invoking ata_set_mode() afterwards
2785 * will apply the limit.
2788 * Inherited from caller.
2791 * 0 on success, negative errno on failure
2793 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
2796 unsigned int orig_mask, xfer_mask;
2797 unsigned int pio_mask, mwdma_mask, udma_mask;
2800 quiet = !!(sel & ATA_DNXFER_QUIET);
2801 sel &= ~ATA_DNXFER_QUIET;
2803 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
2806 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
2809 case ATA_DNXFER_PIO:
2810 highbit = fls(pio_mask) - 1;
2811 pio_mask &= ~(1 << highbit);
2814 case ATA_DNXFER_DMA:
2816 highbit = fls(udma_mask) - 1;
2817 udma_mask &= ~(1 << highbit);
2820 } else if (mwdma_mask) {
2821 highbit = fls(mwdma_mask) - 1;
2822 mwdma_mask &= ~(1 << highbit);
2828 case ATA_DNXFER_40C:
2829 udma_mask &= ATA_UDMA_MASK_40C;
2832 case ATA_DNXFER_FORCE_PIO0:
2834 case ATA_DNXFER_FORCE_PIO:
2843 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
2845 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
2849 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
2850 snprintf(buf, sizeof(buf), "%s:%s",
2851 ata_mode_string(xfer_mask),
2852 ata_mode_string(xfer_mask & ATA_MASK_PIO));
2854 snprintf(buf, sizeof(buf), "%s",
2855 ata_mode_string(xfer_mask));
2857 ata_dev_printk(dev, KERN_WARNING,
2858 "limiting speed to %s\n", buf);
2861 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2867 static int ata_dev_set_mode(struct ata_device *dev)
2869 struct ata_eh_context *ehc = &dev->link->eh_context;
2870 unsigned int err_mask;
2873 dev->flags &= ~ATA_DFLAG_PIO;
2874 if (dev->xfer_shift == ATA_SHIFT_PIO)
2875 dev->flags |= ATA_DFLAG_PIO;
2877 err_mask = ata_dev_set_xfermode(dev);
2878 /* Old CFA may refuse this command, which is just fine */
2879 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2880 err_mask &= ~AC_ERR_DEV;
2881 /* Some very old devices and some bad newer ones fail any kind of
2882 SET_XFERMODE request but support PIO0-2 timings and no IORDY */
2883 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
2884 dev->pio_mode <= XFER_PIO_2)
2885 err_mask &= ~AC_ERR_DEV;
2887 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2888 "(err_mask=0x%x)\n", err_mask);
2892 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2893 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
2894 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2898 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2899 dev->xfer_shift, (int)dev->xfer_mode);
2901 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2902 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2907 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
2908 * @link: link on which timings will be programmed
2909 * @r_failed_dev: out paramter for failed device
2911 * Standard implementation of the function used to tune and set
2912 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2913 * ata_dev_set_mode() fails, pointer to the failing device is
2914 * returned in @r_failed_dev.
2917 * PCI/etc. bus probe sem.
2920 * 0 on success, negative errno otherwise
2923 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
2925 struct ata_port *ap = link->ap;
2926 struct ata_device *dev;
2927 int rc = 0, used_dma = 0, found = 0;
2929 /* step 1: calculate xfer_mask */
2930 ata_link_for_each_dev(dev, link) {
2931 unsigned int pio_mask, dma_mask;
2932 unsigned int mode_mask;
2934 if (!ata_dev_enabled(dev))
2937 mode_mask = ATA_DMA_MASK_ATA;
2938 if (dev->class == ATA_DEV_ATAPI)
2939 mode_mask = ATA_DMA_MASK_ATAPI;
2940 else if (ata_id_is_cfa(dev->id))
2941 mode_mask = ATA_DMA_MASK_CFA;
2943 ata_dev_xfermask(dev);
2945 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2946 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2948 if (libata_dma_mask & mode_mask)
2949 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2953 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2954 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2963 /* step 2: always set host PIO timings */
2964 ata_link_for_each_dev(dev, link) {
2965 if (!ata_dev_enabled(dev))
2968 if (!dev->pio_mode) {
2969 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2974 dev->xfer_mode = dev->pio_mode;
2975 dev->xfer_shift = ATA_SHIFT_PIO;
2976 if (ap->ops->set_piomode)
2977 ap->ops->set_piomode(ap, dev);
2980 /* step 3: set host DMA timings */
2981 ata_link_for_each_dev(dev, link) {
2982 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2985 dev->xfer_mode = dev->dma_mode;
2986 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2987 if (ap->ops->set_dmamode)
2988 ap->ops->set_dmamode(ap, dev);
2991 /* step 4: update devices' xfer mode */
2992 ata_link_for_each_dev(dev, link) {
2993 /* don't update suspended devices' xfer mode */
2994 if (!ata_dev_enabled(dev))
2997 rc = ata_dev_set_mode(dev);
3002 /* Record simplex status. If we selected DMA then the other
3003 * host channels are not permitted to do so.
3005 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
3006 ap->host->simplex_claimed = ap;
3010 *r_failed_dev = dev;
3015 * ata_set_mode - Program timings and issue SET FEATURES - XFER
3016 * @link: link on which timings will be programmed
3017 * @r_failed_dev: out paramter for failed device
3019 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3020 * ata_set_mode() fails, pointer to the failing device is
3021 * returned in @r_failed_dev.
3024 * PCI/etc. bus probe sem.
3027 * 0 on success, negative errno otherwise
3029 int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
3031 struct ata_port *ap = link->ap;
3033 /* has private set_mode? */
3034 if (ap->ops->set_mode)
3035 return ap->ops->set_mode(link, r_failed_dev);
3036 return ata_do_set_mode(link, r_failed_dev);
3040 * ata_tf_to_host - issue ATA taskfile to host controller
3041 * @ap: port to which command is being issued
3042 * @tf: ATA taskfile register set
3044 * Issues ATA taskfile register set to ATA host controller,
3045 * with proper synchronization with interrupt handler and
3049 * spin_lock_irqsave(host lock)
3052 static inline void ata_tf_to_host(struct ata_port *ap,
3053 const struct ata_taskfile *tf)
3055 ap->ops->tf_load(ap, tf);
3056 ap->ops->exec_command(ap, tf);
3060 * ata_busy_sleep - sleep until BSY clears, or timeout
3061 * @ap: port containing status register to be polled
3062 * @tmout_pat: impatience timeout
3063 * @tmout: overall timeout
3065 * Sleep until ATA Status register bit BSY clears,
3066 * or a timeout occurs.
3069 * Kernel thread context (may sleep).
3072 * 0 on success, -errno otherwise.
3074 int ata_busy_sleep(struct ata_port *ap,
3075 unsigned long tmout_pat, unsigned long tmout)
3077 unsigned long timer_start, timeout;
3080 status = ata_busy_wait(ap, ATA_BUSY, 300);
3081 timer_start = jiffies;
3082 timeout = timer_start + tmout_pat;
3083 while (status != 0xff && (status & ATA_BUSY) &&
3084 time_before(jiffies, timeout)) {
3086 status = ata_busy_wait(ap, ATA_BUSY, 3);
3089 if (status != 0xff && (status & ATA_BUSY))
3090 ata_port_printk(ap, KERN_WARNING,
3091 "port is slow to respond, please be patient "
3092 "(Status 0x%x)\n", status);
3094 timeout = timer_start + tmout;
3095 while (status != 0xff && (status & ATA_BUSY) &&
3096 time_before(jiffies, timeout)) {
3098 status = ata_chk_status(ap);
3104 if (status & ATA_BUSY) {
3105 ata_port_printk(ap, KERN_ERR, "port failed to respond "
3106 "(%lu secs, Status 0x%x)\n",
3107 tmout / HZ, status);
3115 * ata_wait_ready - sleep until BSY clears, or timeout
3116 * @ap: port containing status register to be polled
3117 * @deadline: deadline jiffies for the operation
3119 * Sleep until ATA Status register bit BSY clears, or timeout
3123 * Kernel thread context (may sleep).
3126 * 0 on success, -errno otherwise.
3128 int ata_wait_ready(struct ata_port *ap, unsigned long deadline)
3130 unsigned long start = jiffies;
3134 u8 status = ata_chk_status(ap);
3135 unsigned long now = jiffies;
3137 if (!(status & ATA_BUSY))
3139 if (!ata_link_online(&ap->link) && status == 0xff)
3141 if (time_after(now, deadline))
3144 if (!warned && time_after(now, start + 5 * HZ) &&
3145 (deadline - now > 3 * HZ)) {
3146 ata_port_printk(ap, KERN_WARNING,
3147 "port is slow to respond, please be patient "
3148 "(Status 0x%x)\n", status);
3156 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
3157 unsigned long deadline)
3159 struct ata_ioports *ioaddr = &ap->ioaddr;
3160 unsigned int dev0 = devmask & (1 << 0);
3161 unsigned int dev1 = devmask & (1 << 1);
3164 /* if device 0 was found in ata_devchk, wait for its
3168 rc = ata_wait_ready(ap, deadline);
3176 /* if device 1 was found in ata_devchk, wait for register
3177 * access briefly, then wait for BSY to clear.
3182 ap->ops->dev_select(ap, 1);
3184 /* Wait for register access. Some ATAPI devices fail
3185 * to set nsect/lbal after reset, so don't waste too
3186 * much time on it. We're gonna wait for !BSY anyway.
3188 for (i = 0; i < 2; i++) {
3191 nsect = ioread8(ioaddr->nsect_addr);
3192 lbal = ioread8(ioaddr->lbal_addr);
3193 if ((nsect == 1) && (lbal == 1))
3195 msleep(50); /* give drive a breather */
3198 rc = ata_wait_ready(ap, deadline);
3206 /* is all this really necessary? */
3207 ap->ops->dev_select(ap, 0);
3209 ap->ops->dev_select(ap, 1);
3211 ap->ops->dev_select(ap, 0);
3216 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
3217 unsigned long deadline)
3219 struct ata_ioports *ioaddr = &ap->ioaddr;
3220 struct ata_device *dev;
3223 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
3225 /* software reset. causes dev0 to be selected */
3226 iowrite8(ap->ctl, ioaddr->ctl_addr);
3227 udelay(20); /* FIXME: flush */
3228 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
3229 udelay(20); /* FIXME: flush */
3230 iowrite8(ap->ctl, ioaddr->ctl_addr);
3232 /* If we issued an SRST then an ATA drive (not ATAPI)
3233 * may have changed configuration and be in PIO0 timing. If
3234 * we did a hard reset (or are coming from power on) this is
3235 * true for ATA or ATAPI. Until we've set a suitable controller
3236 * mode we should not touch the bus as we may be talking too fast.
3239 ata_link_for_each_dev(dev, &ap->link)
3240 dev->pio_mode = XFER_PIO_0;
3242 /* If the controller has a pio mode setup function then use
3243 it to set the chipset to rights. Don't touch the DMA setup
3244 as that will be dealt with when revalidating */
3245 if (ap->ops->set_piomode) {
3246 ata_link_for_each_dev(dev, &ap->link)
3247 if (devmask & (1 << i++))
3248 ap->ops->set_piomode(ap, dev);
3251 /* spec mandates ">= 2ms" before checking status.
3252 * We wait 150ms, because that was the magic delay used for
3253 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
3254 * between when the ATA command register is written, and then
3255 * status is checked. Because waiting for "a while" before
3256 * checking status is fine, post SRST, we perform this magic
3257 * delay here as well.
3259 * Old drivers/ide uses the 2mS rule and then waits for ready
3263 /* Before we perform post reset processing we want to see if
3264 * the bus shows 0xFF because the odd clown forgets the D7
3265 * pulldown resistor.
3267 if (ata_check_status(ap) == 0xFF)
3270 return ata_bus_post_reset(ap, devmask, deadline);
3274 * ata_bus_reset - reset host port and associated ATA channel
3275 * @ap: port to reset
3277 * This is typically the first time we actually start issuing
3278 * commands to the ATA channel. We wait for BSY to clear, then
3279 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
3280 * result. Determine what devices, if any, are on the channel
3281 * by looking at the device 0/1 error register. Look at the signature
3282 * stored in each device's taskfile registers, to determine if
3283 * the device is ATA or ATAPI.
3286 * PCI/etc. bus probe sem.
3287 * Obtains host lock.
3290 * Sets ATA_FLAG_DISABLED if bus reset fails.
3293 void ata_bus_reset(struct ata_port *ap)
3295 struct ata_device *device = ap->link.device;
3296 struct ata_ioports *ioaddr = &ap->ioaddr;
3297 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3299 unsigned int dev0, dev1 = 0, devmask = 0;
3302 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
3304 /* determine if device 0/1 are present */
3305 if (ap->flags & ATA_FLAG_SATA_RESET)
3308 dev0 = ata_devchk(ap, 0);
3310 dev1 = ata_devchk(ap, 1);
3314 devmask |= (1 << 0);
3316 devmask |= (1 << 1);
3318 /* select device 0 again */
3319 ap->ops->dev_select(ap, 0);
3321 /* issue bus reset */
3322 if (ap->flags & ATA_FLAG_SRST) {
3323 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
3324 if (rc && rc != -ENODEV)
3329 * determine by signature whether we have ATA or ATAPI devices
3331 device[0].class = ata_dev_try_classify(&device[0], dev0, &err);
3332 if ((slave_possible) && (err != 0x81))
3333 device[1].class = ata_dev_try_classify(&device[1], dev1, &err);
3335 /* is double-select really necessary? */
3336 if (device[1].class != ATA_DEV_NONE)
3337 ap->ops->dev_select(ap, 1);
3338 if (device[0].class != ATA_DEV_NONE)
3339 ap->ops->dev_select(ap, 0);
3341 /* if no devices were detected, disable this port */
3342 if ((device[0].class == ATA_DEV_NONE) &&
3343 (device[1].class == ATA_DEV_NONE))
3346 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
3347 /* set up device control for ATA_FLAG_SATA_RESET */
3348 iowrite8(ap->ctl, ioaddr->ctl_addr);
3355 ata_port_printk(ap, KERN_ERR, "disabling port\n");
3356 ata_port_disable(ap);
3362 * sata_link_debounce - debounce SATA phy status
3363 * @link: ATA link to debounce SATA phy status for
3364 * @params: timing parameters { interval, duratinon, timeout } in msec
3365 * @deadline: deadline jiffies for the operation
3367 * Make sure SStatus of @link reaches stable state, determined by
3368 * holding the same value where DET is not 1 for @duration polled
3369 * every @interval, before @timeout. Timeout constraints the
3370 * beginning of the stable state. Because DET gets stuck at 1 on
3371 * some controllers after hot unplugging, this functions waits
3372 * until timeout then returns 0 if DET is stable at 1.
3374 * @timeout is further limited by @deadline. The sooner of the
3378 * Kernel thread context (may sleep)
3381 * 0 on success, -errno on failure.
3383 int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3384 unsigned long deadline)
3386 unsigned long interval_msec = params[0];
3387 unsigned long duration = msecs_to_jiffies(params[1]);
3388 unsigned long last_jiffies, t;
3392 t = jiffies + msecs_to_jiffies(params[2]);
3393 if (time_before(t, deadline))
3396 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3401 last_jiffies = jiffies;
3404 msleep(interval_msec);
3405 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3411 if (cur == 1 && time_before(jiffies, deadline))
3413 if (time_after(jiffies, last_jiffies + duration))
3418 /* unstable, start over */
3420 last_jiffies = jiffies;
3422 /* Check deadline. If debouncing failed, return
3423 * -EPIPE to tell upper layer to lower link speed.
3425 if (time_after(jiffies, deadline))
3431 * sata_link_resume - resume SATA link
3432 * @link: ATA link to resume SATA
3433 * @params: timing parameters { interval, duratinon, timeout } in msec
3434 * @deadline: deadline jiffies for the operation
3436 * Resume SATA phy @link and debounce it.
3439 * Kernel thread context (may sleep)
3442 * 0 on success, -errno on failure.
3444 int sata_link_resume(struct ata_link *link, const unsigned long *params,
3445 unsigned long deadline)
3450 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3453 scontrol = (scontrol & 0x0f0) | 0x300;
3455 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3458 /* Some PHYs react badly if SStatus is pounded immediately
3459 * after resuming. Delay 200ms before debouncing.
3463 return sata_link_debounce(link, params, deadline);
3467 * ata_std_prereset - prepare for reset
3468 * @link: ATA link to be reset
3469 * @deadline: deadline jiffies for the operation
3471 * @link is about to be reset. Initialize it. Failure from
3472 * prereset makes libata abort whole reset sequence and give up
3473 * that port, so prereset should be best-effort. It does its
3474 * best to prepare for reset sequence but if things go wrong, it
3475 * should just whine, not fail.
3478 * Kernel thread context (may sleep)
3481 * 0 on success, -errno otherwise.
3483 int ata_std_prereset(struct ata_link *link, unsigned long deadline)
3485 struct ata_port *ap = link->ap;
3486 struct ata_eh_context *ehc = &link->eh_context;
3487 const unsigned long *timing = sata_ehc_deb_timing(ehc);
3490 /* handle link resume */
3491 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
3492 (link->flags & ATA_LFLAG_HRST_TO_RESUME))
3493 ehc->i.action |= ATA_EH_HARDRESET;
3495 /* Some PMPs don't work with only SRST, force hardreset if PMP
3498 if (ap->flags & ATA_FLAG_PMP)
3499 ehc->i.action |= ATA_EH_HARDRESET;
3501 /* if we're about to do hardreset, nothing more to do */
3502 if (ehc->i.action & ATA_EH_HARDRESET)
3505 /* if SATA, resume link */
3506 if (ap->flags & ATA_FLAG_SATA) {
3507 rc = sata_link_resume(link, timing, deadline);
3508 /* whine about phy resume failure but proceed */
3509 if (rc && rc != -EOPNOTSUPP)
3510 ata_link_printk(link, KERN_WARNING, "failed to resume "
3511 "link for reset (errno=%d)\n", rc);
3514 /* Wait for !BSY if the controller can wait for the first D2H
3515 * Reg FIS and we don't know that no device is attached.
3517 if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) {
3518 rc = ata_wait_ready(ap, deadline);
3519 if (rc && rc != -ENODEV) {
3520 ata_link_printk(link, KERN_WARNING, "device not ready "
3521 "(errno=%d), forcing hardreset\n", rc);
3522 ehc->i.action |= ATA_EH_HARDRESET;
3530 * ata_std_softreset - reset host port via ATA SRST
3531 * @link: ATA link to reset
3532 * @classes: resulting classes of attached devices
3533 * @deadline: deadline jiffies for the operation
3535 * Reset host port using ATA SRST.
3538 * Kernel thread context (may sleep)
3541 * 0 on success, -errno otherwise.
3543 int ata_std_softreset(struct ata_link *link, unsigned int *classes,
3544 unsigned long deadline)
3546 struct ata_port *ap = link->ap;
3547 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3548 unsigned int devmask = 0;
3554 if (ata_link_offline(link)) {
3555 classes[0] = ATA_DEV_NONE;
3559 /* determine if device 0/1 are present */
3560 if (ata_devchk(ap, 0))
3561 devmask |= (1 << 0);
3562 if (slave_possible && ata_devchk(ap, 1))
3563 devmask |= (1 << 1);
3565 /* select device 0 again */
3566 ap->ops->dev_select(ap, 0);
3568 /* issue bus reset */
3569 DPRINTK("about to softreset, devmask=%x\n", devmask);
3570 rc = ata_bus_softreset(ap, devmask, deadline);
3571 /* if link is occupied, -ENODEV too is an error */
3572 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
3573 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
3577 /* determine by signature whether we have ATA or ATAPI devices */
3578 classes[0] = ata_dev_try_classify(&link->device[0],
3579 devmask & (1 << 0), &err);
3580 if (slave_possible && err != 0x81)
3581 classes[1] = ata_dev_try_classify(&link->device[1],
3582 devmask & (1 << 1), &err);
3585 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3590 * sata_link_hardreset - reset link via SATA phy reset
3591 * @link: link to reset
3592 * @timing: timing parameters { interval, duratinon, timeout } in msec
3593 * @deadline: deadline jiffies for the operation
3595 * SATA phy-reset @link using DET bits of SControl register.
3598 * Kernel thread context (may sleep)
3601 * 0 on success, -errno otherwise.
3603 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
3604 unsigned long deadline)
3611 if (sata_set_spd_needed(link)) {
3612 /* SATA spec says nothing about how to reconfigure
3613 * spd. To be on the safe side, turn off phy during
3614 * reconfiguration. This works for at least ICH7 AHCI
3617 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3620 scontrol = (scontrol & 0x0f0) | 0x304;
3622 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3628 /* issue phy wake/reset */
3629 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3632 scontrol = (scontrol & 0x0f0) | 0x301;
3634 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
3637 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3638 * 10.4.2 says at least 1 ms.
3642 /* bring link back */
3643 rc = sata_link_resume(link, timing, deadline);
3645 DPRINTK("EXIT, rc=%d\n", rc);
3650 * sata_std_hardreset - reset host port via SATA phy reset
3651 * @link: link to reset
3652 * @class: resulting class of attached device
3653 * @deadline: deadline jiffies for the operation
3655 * SATA phy-reset host port using DET bits of SControl register,
3656 * wait for !BSY and classify the attached device.
3659 * Kernel thread context (may sleep)
3662 * 0 on success, -errno otherwise.
3664 int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3665 unsigned long deadline)
3667 struct ata_port *ap = link->ap;
3668 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3674 rc = sata_link_hardreset(link, timing, deadline);
3676 ata_link_printk(link, KERN_ERR,
3677 "COMRESET failed (errno=%d)\n", rc);
3681 /* TODO: phy layer with polling, timeouts, etc. */
3682 if (ata_link_offline(link)) {
3683 *class = ATA_DEV_NONE;
3684 DPRINTK("EXIT, link offline\n");
3688 /* wait a while before checking status, see SRST for more info */
3691 /* If PMP is supported, we have to do follow-up SRST. Note
3692 * that some PMPs don't send D2H Reg FIS after hardreset at
3693 * all if the first port is empty. Wait for it just for a
3694 * second and request follow-up SRST.
3696 if (ap->flags & ATA_FLAG_PMP) {
3697 ata_wait_ready(ap, jiffies + HZ);
3701 rc = ata_wait_ready(ap, deadline);
3702 /* link occupied, -ENODEV too is an error */
3704 ata_link_printk(link, KERN_ERR,
3705 "COMRESET failed (errno=%d)\n", rc);
3709 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3711 *class = ata_dev_try_classify(link->device, 1, NULL);
3713 DPRINTK("EXIT, class=%u\n", *class);
3718 * ata_std_postreset - standard postreset callback
3719 * @link: the target ata_link
3720 * @classes: classes of attached devices
3722 * This function is invoked after a successful reset. Note that
3723 * the device might have been reset more than once using
3724 * different reset methods before postreset is invoked.
3727 * Kernel thread context (may sleep)
3729 void ata_std_postreset(struct ata_link *link, unsigned int *classes)
3731 struct ata_port *ap = link->ap;
3736 /* print link status */
3737 sata_print_link_status(link);
3740 if (sata_scr_read(link, SCR_ERROR, &serror) == 0)
3741 sata_scr_write(link, SCR_ERROR, serror);
3743 /* is double-select really necessary? */
3744 if (classes[0] != ATA_DEV_NONE)
3745 ap->ops->dev_select(ap, 1);
3746 if (classes[1] != ATA_DEV_NONE)
3747 ap->ops->dev_select(ap, 0);
3749 /* bail out if no device is present */
3750 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3751 DPRINTK("EXIT, no device\n");
3755 /* set up device control */
3756 if (ap->ioaddr.ctl_addr)
3757 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3763 * ata_dev_same_device - Determine whether new ID matches configured device
3764 * @dev: device to compare against
3765 * @new_class: class of the new device
3766 * @new_id: IDENTIFY page of the new device
3768 * Compare @new_class and @new_id against @dev and determine
3769 * whether @dev is the device indicated by @new_class and
3776 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3778 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3781 const u16 *old_id = dev->id;
3782 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3783 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3785 if (dev->class != new_class) {
3786 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3787 dev->class, new_class);
3791 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3792 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3793 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3794 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3796 if (strcmp(model[0], model[1])) {
3797 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3798 "'%s' != '%s'\n", model[0], model[1]);
3802 if (strcmp(serial[0], serial[1])) {
3803 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3804 "'%s' != '%s'\n", serial[0], serial[1]);
3812 * ata_dev_reread_id - Re-read IDENTIFY data
3813 * @dev: target ATA device
3814 * @readid_flags: read ID flags
3816 * Re-read IDENTIFY page and make sure @dev is still attached to
3820 * Kernel thread context (may sleep)
3823 * 0 on success, negative errno otherwise
3825 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
3827 unsigned int class = dev->class;
3828 u16 *id = (void *)dev->link->ap->sector_buf;
3832 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3836 /* is the device still there? */
3837 if (!ata_dev_same_device(dev, class, id))
3840 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3845 * ata_dev_revalidate - Revalidate ATA device
3846 * @dev: device to revalidate
3847 * @new_class: new class code
3848 * @readid_flags: read ID flags
3850 * Re-read IDENTIFY page, make sure @dev is still attached to the
3851 * port and reconfigure it according to the new IDENTIFY page.
3854 * Kernel thread context (may sleep)
3857 * 0 on success, negative errno otherwise
3859 int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
3860 unsigned int readid_flags)
3862 u64 n_sectors = dev->n_sectors;
3865 if (!ata_dev_enabled(dev))
3868 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
3869 if (ata_class_enabled(new_class) &&
3870 new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) {
3871 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n",
3872 dev->class, new_class);
3878 rc = ata_dev_reread_id(dev, readid_flags);
3882 /* configure device according to the new ID */
3883 rc = ata_dev_configure(dev);
3887 /* verify n_sectors hasn't changed */
3888 if (dev->class == ATA_DEV_ATA && n_sectors &&
3889 dev->n_sectors != n_sectors) {
3890 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3892 (unsigned long long)n_sectors,
3893 (unsigned long long)dev->n_sectors);
3895 /* restore original n_sectors */
3896 dev->n_sectors = n_sectors;
3905 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3909 struct ata_blacklist_entry {
3910 const char *model_num;
3911 const char *model_rev;
3912 unsigned long horkage;
3915 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3916 /* Devices with DMA related problems under Linux */
3917 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3918 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3919 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3920 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3921 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3922 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3923 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3924 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3925 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3926 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3927 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3928 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3929 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3930 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3931 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3932 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3933 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3934 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3935 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3936 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3937 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3938 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3939 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3940 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3941 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3942 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3943 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3944 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3945 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3946 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
3947 { "IOMEGA ZIP 250 ATAPI", NULL, ATA_HORKAGE_NODMA }, /* temporary fix */
3948 { "IOMEGA ZIP 250 ATAPI Floppy",
3949 NULL, ATA_HORKAGE_NODMA },
3950 /* Odd clown on sil3726/4726 PMPs */
3951 { "Config Disk", NULL, ATA_HORKAGE_NODMA |
3952 ATA_HORKAGE_SKIP_PM },
3954 /* Weird ATAPI devices */
3955 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
3957 /* Devices we expect to fail diagnostics */
3959 /* Devices where NCQ should be avoided */
3961 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3962 /* http://thread.gmane.org/gmane.linux.ide/14907 */
3963 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
3965 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
3966 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
3967 { "HITACHI HDS7250SASUN500G*", NULL, ATA_HORKAGE_NONCQ },
3968 { "HITACHI HDS7225SBSUN250G*", NULL, ATA_HORKAGE_NONCQ },
3969 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
3971 /* Blacklist entries taken from Silicon Image 3124/3132
3972 Windows driver .inf file - also several Linux problem reports */
3973 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
3974 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
3975 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
3976 /* Drives which do spurious command completion */
3977 { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, },
3978 { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, },
3979 { "HDT722516DLA380", "V43OA96A", ATA_HORKAGE_NONCQ, },
3980 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
3981 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
3982 { "WDC WD3200AAJS-00RYA0", "12.01B01", ATA_HORKAGE_NONCQ, },
3983 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
3984 { "ST9120822AS", "3.CLF", ATA_HORKAGE_NONCQ, },
3985 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
3986 { "ST9160821AS", "3.ALD", ATA_HORKAGE_NONCQ, },
3987 { "ST9160821AS", "3.CCD", ATA_HORKAGE_NONCQ, },
3988 { "ST3160812AS", "3.ADJ", ATA_HORKAGE_NONCQ, },
3989 { "ST980813AS", "3.ADB", ATA_HORKAGE_NONCQ, },
3990 { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, },
3992 /* devices which puke on READ_NATIVE_MAX */
3993 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
3994 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
3995 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
3996 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
3998 /* Devices which report 1 sector over size HPA */
3999 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4000 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
4006 int strn_pattern_cmp(const char *patt, const char *name, int wildchar)
4012 * check for trailing wildcard: *\0
4014 p = strchr(patt, wildchar);
4015 if (p && ((*(p + 1)) == 0))
4020 return strncmp(patt, name, len);
4023 static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
4025 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4026 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
4027 const struct ata_blacklist_entry *ad = ata_device_blacklist;
4029 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4030 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
4032 while (ad->model_num) {
4033 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) {
4034 if (ad->model_rev == NULL)
4036 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*'))
4044 static int ata_dma_blacklisted(const struct ata_device *dev)
4046 /* We don't support polling DMA.
4047 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4048 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4050 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
4051 (dev->flags & ATA_DFLAG_CDB_INTR))
4053 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
4057 * ata_dev_xfermask - Compute supported xfermask of the given device
4058 * @dev: Device to compute xfermask for
4060 * Compute supported xfermask of @dev and store it in
4061 * dev->*_mask. This function is responsible for applying all
4062 * known limits including host controller limits, device
4068 static void ata_dev_xfermask(struct ata_device *dev)
4070 struct ata_link *link = dev->link;
4071 struct ata_port *ap = link->ap;
4072 struct ata_host *host = ap->host;
4073 unsigned long xfer_mask;
4075 /* controller modes available */
4076 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4077 ap->mwdma_mask, ap->udma_mask);
4079 /* drive modes available */
4080 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4081 dev->mwdma_mask, dev->udma_mask);
4082 xfer_mask &= ata_id_xfermask(dev->id);
4085 * CFA Advanced TrueIDE timings are not allowed on a shared
4088 if (ata_dev_pair(dev)) {
4089 /* No PIO5 or PIO6 */
4090 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4091 /* No MWDMA3 or MWDMA 4 */
4092 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4095 if (ata_dma_blacklisted(dev)) {
4096 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
4097 ata_dev_printk(dev, KERN_WARNING,
4098 "device is on DMA blacklist, disabling DMA\n");
4101 if ((host->flags & ATA_HOST_SIMPLEX) &&
4102 host->simplex_claimed && host->simplex_claimed != ap) {
4103 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
4104 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
4105 "other device, disabling DMA\n");
4108 if (ap->flags & ATA_FLAG_NO_IORDY)
4109 xfer_mask &= ata_pio_mask_no_iordy(dev);
4111 if (ap->ops->mode_filter)
4112 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
4114 /* Apply cable rule here. Don't apply it early because when
4115 * we handle hot plug the cable type can itself change.
4116 * Check this last so that we know if the transfer rate was
4117 * solely limited by the cable.
4118 * Unknown or 80 wire cables reported host side are checked
4119 * drive side as well. Cases where we know a 40wire cable
4120 * is used safely for 80 are not checked here.
4122 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4123 /* UDMA/44 or higher would be available */
4124 if((ap->cbl == ATA_CBL_PATA40) ||
4125 (ata_drive_40wire(dev->id) &&
4126 (ap->cbl == ATA_CBL_PATA_UNK ||
4127 ap->cbl == ATA_CBL_PATA80))) {
4128 ata_dev_printk(dev, KERN_WARNING,
4129 "limited to UDMA/33 due to 40-wire cable\n");
4130 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4133 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4134 &dev->mwdma_mask, &dev->udma_mask);
4138 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
4139 * @dev: Device to which command will be sent
4141 * Issue SET FEATURES - XFER MODE command to device @dev
4145 * PCI/etc. bus probe sem.
4148 * 0 on success, AC_ERR_* mask otherwise.
4151 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
4153 struct ata_taskfile tf;
4154 unsigned int err_mask;
4156 /* set up set-features taskfile */
4157 DPRINTK("set features - xfer mode\n");
4159 /* Some controllers and ATAPI devices show flaky interrupt
4160 * behavior after setting xfer mode. Use polling instead.
4162 ata_tf_init(dev, &tf);
4163 tf.command = ATA_CMD_SET_FEATURES;
4164 tf.feature = SETFEATURES_XFER;
4165 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
4166 tf.protocol = ATA_PROT_NODATA;
4167 tf.nsect = dev->xfer_mode;
4169 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4171 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4176 * ata_dev_set_AN - Issue SET FEATURES - SATA FEATURES
4177 * @dev: Device to which command will be sent
4178 * @enable: Whether to enable or disable the feature
4180 * Issue SET FEATURES - SATA FEATURES command to device @dev
4181 * on port @ap with sector count set to indicate Asynchronous
4182 * Notification feature
4185 * PCI/etc. bus probe sem.
4188 * 0 on success, AC_ERR_* mask otherwise.
4190 static unsigned int ata_dev_set_AN(struct ata_device *dev, u8 enable)
4192 struct ata_taskfile tf;
4193 unsigned int err_mask;
4195 /* set up set-features taskfile */
4196 DPRINTK("set features - SATA features\n");
4198 ata_tf_init(dev, &tf);
4199 tf.command = ATA_CMD_SET_FEATURES;
4200 tf.feature = enable;
4201 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4202 tf.protocol = ATA_PROT_NODATA;
4205 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4207 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4212 * ata_dev_init_params - Issue INIT DEV PARAMS command
4213 * @dev: Device to which command will be sent
4214 * @heads: Number of heads (taskfile parameter)
4215 * @sectors: Number of sectors (taskfile parameter)
4218 * Kernel thread context (may sleep)
4221 * 0 on success, AC_ERR_* mask otherwise.
4223 static unsigned int ata_dev_init_params(struct ata_device *dev,
4224 u16 heads, u16 sectors)
4226 struct ata_taskfile tf;
4227 unsigned int err_mask;
4229 /* Number of sectors per track 1-255. Number of heads 1-16 */
4230 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
4231 return AC_ERR_INVALID;
4233 /* set up init dev params taskfile */
4234 DPRINTK("init dev params \n");
4236 ata_tf_init(dev, &tf);
4237 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4238 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4239 tf.protocol = ATA_PROT_NODATA;
4241 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
4243 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4244 /* A clean abort indicates an original or just out of spec drive
4245 and we should continue as we issue the setup based on the
4246 drive reported working geometry */
4247 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4250 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4255 * ata_sg_clean - Unmap DMA memory associated with command
4256 * @qc: Command containing DMA memory to be released
4258 * Unmap all mapped DMA memory associated with this command.
4261 * spin_lock_irqsave(host lock)
4263 void ata_sg_clean(struct ata_queued_cmd *qc)
4265 struct ata_port *ap = qc->ap;
4266 struct scatterlist *sg = qc->__sg;
4267 int dir = qc->dma_dir;
4268 void *pad_buf = NULL;
4270 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
4271 WARN_ON(sg == NULL);
4273 if (qc->flags & ATA_QCFLAG_SINGLE)
4274 WARN_ON(qc->n_elem > 1);
4276 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
4278 /* if we padded the buffer out to 32-bit bound, and data
4279 * xfer direction is from-device, we must copy from the
4280 * pad buffer back into the supplied buffer
4282 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
4283 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4285 if (qc->flags & ATA_QCFLAG_SG) {
4287 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
4288 /* restore last sg */
4289 sg[qc->orig_n_elem - 1].length += qc->pad_len;
4291 struct scatterlist *psg = &qc->pad_sgent;
4292 void *addr = kmap_atomic(psg->page, KM_IRQ0);
4293 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
4294 kunmap_atomic(addr, KM_IRQ0);
4298 dma_unmap_single(ap->dev,
4299 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
4302 sg->length += qc->pad_len;
4304 memcpy(qc->buf_virt + sg->length - qc->pad_len,
4305 pad_buf, qc->pad_len);
4308 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4313 * ata_fill_sg - Fill PCI IDE PRD table
4314 * @qc: Metadata associated with taskfile to be transferred
4316 * Fill PCI IDE PRD (scatter-gather) table with segments
4317 * associated with the current disk command.
4320 * spin_lock_irqsave(host lock)
4323 static void ata_fill_sg(struct ata_queued_cmd *qc)
4325 struct ata_port *ap = qc->ap;
4326 struct scatterlist *sg;
4329 WARN_ON(qc->__sg == NULL);
4330 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4333 ata_for_each_sg(sg, qc) {
4337 /* determine if physical DMA addr spans 64K boundary.
4338 * Note h/w doesn't support 64-bit, so we unconditionally
4339 * truncate dma_addr_t to u32.
4341 addr = (u32) sg_dma_address(sg);
4342 sg_len = sg_dma_len(sg);
4345 offset = addr & 0xffff;
4347 if ((offset + sg_len) > 0x10000)
4348 len = 0x10000 - offset;
4350 ap->prd[idx].addr = cpu_to_le32(addr);
4351 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
4352 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4361 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4365 * ata_fill_sg_dumb - Fill PCI IDE PRD table
4366 * @qc: Metadata associated with taskfile to be transferred
4368 * Fill PCI IDE PRD (scatter-gather) table with segments
4369 * associated with the current disk command. Perform the fill
4370 * so that we avoid writing any length 64K records for
4371 * controllers that don't follow the spec.
4374 * spin_lock_irqsave(host lock)
4377 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
4379 struct ata_port *ap = qc->ap;
4380 struct scatterlist *sg;
4383 WARN_ON(qc->__sg == NULL);
4384 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4387 ata_for_each_sg(sg, qc) {
4389 u32 sg_len, len, blen;
4391 /* determine if physical DMA addr spans 64K boundary.
4392 * Note h/w doesn't support 64-bit, so we unconditionally
4393 * truncate dma_addr_t to u32.
4395 addr = (u32) sg_dma_address(sg);
4396 sg_len = sg_dma_len(sg);
4399 offset = addr & 0xffff;
4401 if ((offset + sg_len) > 0x10000)
4402 len = 0x10000 - offset;
4404 blen = len & 0xffff;
4405 ap->prd[idx].addr = cpu_to_le32(addr);
4407 /* Some PATA chipsets like the CS5530 can't
4408 cope with 0x0000 meaning 64K as the spec says */
4409 ap->prd[idx].flags_len = cpu_to_le32(0x8000);
4411 ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);
4413 ap->prd[idx].flags_len = cpu_to_le32(blen);
4414 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4423 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4427 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
4428 * @qc: Metadata associated with taskfile to check
4430 * Allow low-level driver to filter ATA PACKET commands, returning
4431 * a status indicating whether or not it is OK to use DMA for the
4432 * supplied PACKET command.
4435 * spin_lock_irqsave(host lock)
4437 * RETURNS: 0 when ATAPI DMA can be used
4440 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
4442 struct ata_port *ap = qc->ap;
4444 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4445 * few ATAPI devices choke on such DMA requests.
4447 if (unlikely(qc->nbytes & 15))
4450 if (ap->ops->check_atapi_dma)
4451 return ap->ops->check_atapi_dma(qc);
4457 * ata_std_qc_defer - Check whether a qc needs to be deferred
4458 * @qc: ATA command in question
4460 * Non-NCQ commands cannot run with any other command, NCQ or
4461 * not. As upper layer only knows the queue depth, we are
4462 * responsible for maintaining exclusion. This function checks
4463 * whether a new command @qc can be issued.
4466 * spin_lock_irqsave(host lock)
4469 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4471 int ata_std_qc_defer(struct ata_queued_cmd *qc)
4473 struct ata_link *link = qc->dev->link;
4475 if (qc->tf.protocol == ATA_PROT_NCQ) {
4476 if (!ata_tag_valid(link->active_tag))
4479 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4483 return ATA_DEFER_LINK;
4487 * ata_qc_prep - Prepare taskfile for submission
4488 * @qc: Metadata associated with taskfile to be prepared
4490 * Prepare ATA taskfile for submission.
4493 * spin_lock_irqsave(host lock)
4495 void ata_qc_prep(struct ata_queued_cmd *qc)
4497 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4504 * ata_dumb_qc_prep - Prepare taskfile for submission
4505 * @qc: Metadata associated with taskfile to be prepared
4507 * Prepare ATA taskfile for submission.
4510 * spin_lock_irqsave(host lock)
4512 void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
4514 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4517 ata_fill_sg_dumb(qc);
4520 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
4523 * ata_sg_init_one - Associate command with memory buffer
4524 * @qc: Command to be associated
4525 * @buf: Memory buffer
4526 * @buflen: Length of memory buffer, in bytes.
4528 * Initialize the data-related elements of queued_cmd @qc
4529 * to point to a single memory buffer, @buf of byte length @buflen.
4532 * spin_lock_irqsave(host lock)
4535 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
4537 qc->flags |= ATA_QCFLAG_SINGLE;
4539 qc->__sg = &qc->sgent;
4541 qc->orig_n_elem = 1;
4543 qc->nbytes = buflen;
4545 sg_init_one(&qc->sgent, buf, buflen);
4549 * ata_sg_init - Associate command with scatter-gather table.
4550 * @qc: Command to be associated
4551 * @sg: Scatter-gather table.
4552 * @n_elem: Number of elements in s/g table.
4554 * Initialize the data-related elements of queued_cmd @qc
4555 * to point to a scatter-gather table @sg, containing @n_elem
4559 * spin_lock_irqsave(host lock)
4562 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4563 unsigned int n_elem)
4565 qc->flags |= ATA_QCFLAG_SG;
4567 qc->n_elem = n_elem;
4568 qc->orig_n_elem = n_elem;
4572 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
4573 * @qc: Command with memory buffer to be mapped.
4575 * DMA-map the memory buffer associated with queued_cmd @qc.
4578 * spin_lock_irqsave(host lock)
4581 * Zero on success, negative on error.
4584 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
4586 struct ata_port *ap = qc->ap;
4587 int dir = qc->dma_dir;
4588 struct scatterlist *sg = qc->__sg;
4589 dma_addr_t dma_address;
4592 /* we must lengthen transfers to end on a 32-bit boundary */
4593 qc->pad_len = sg->length & 3;
4595 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4596 struct scatterlist *psg = &qc->pad_sgent;
4598 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4600 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4602 if (qc->tf.flags & ATA_TFLAG_WRITE)
4603 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
4606 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4607 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4609 sg->length -= qc->pad_len;
4610 if (sg->length == 0)
4613 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
4614 sg->length, qc->pad_len);
4622 dma_address = dma_map_single(ap->dev, qc->buf_virt,
4624 if (dma_mapping_error(dma_address)) {
4626 sg->length += qc->pad_len;
4630 sg_dma_address(sg) = dma_address;
4631 sg_dma_len(sg) = sg->length;
4634 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
4635 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4641 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4642 * @qc: Command with scatter-gather table to be mapped.
4644 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4647 * spin_lock_irqsave(host lock)
4650 * Zero on success, negative on error.
4654 static int ata_sg_setup(struct ata_queued_cmd *qc)
4656 struct ata_port *ap = qc->ap;
4657 struct scatterlist *sg = qc->__sg;
4658 struct scatterlist *lsg = &sg[qc->n_elem - 1];
4659 int n_elem, pre_n_elem, dir, trim_sg = 0;
4661 VPRINTK("ENTER, ata%u\n", ap->print_id);
4662 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
4664 /* we must lengthen transfers to end on a 32-bit boundary */
4665 qc->pad_len = lsg->length & 3;
4667 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4668 struct scatterlist *psg = &qc->pad_sgent;
4669 unsigned int offset;
4671 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4673 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4676 * psg->page/offset are used to copy to-be-written
4677 * data in this function or read data in ata_sg_clean.
4679 offset = lsg->offset + lsg->length - qc->pad_len;
4680 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
4681 psg->offset = offset_in_page(offset);
4683 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4684 void *addr = kmap_atomic(psg->page, KM_IRQ0);
4685 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
4686 kunmap_atomic(addr, KM_IRQ0);
4689 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4690 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4692 lsg->length -= qc->pad_len;
4693 if (lsg->length == 0)
4696 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
4697 qc->n_elem - 1, lsg->length, qc->pad_len);
4700 pre_n_elem = qc->n_elem;
4701 if (trim_sg && pre_n_elem)
4710 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
4712 /* restore last sg */
4713 lsg->length += qc->pad_len;
4717 DPRINTK("%d sg elements mapped\n", n_elem);
4720 qc->n_elem = n_elem;
4726 * swap_buf_le16 - swap halves of 16-bit words in place
4727 * @buf: Buffer to swap
4728 * @buf_words: Number of 16-bit words in buffer.
4730 * Swap halves of 16-bit words if needed to convert from
4731 * little-endian byte order to native cpu byte order, or
4735 * Inherited from caller.
4737 void swap_buf_le16(u16 *buf, unsigned int buf_words)
4742 for (i = 0; i < buf_words; i++)
4743 buf[i] = le16_to_cpu(buf[i]);
4744 #endif /* __BIG_ENDIAN */
4748 * ata_data_xfer - Transfer data by PIO
4749 * @adev: device to target
4751 * @buflen: buffer length
4752 * @write_data: read/write
4754 * Transfer data from/to the device data register by PIO.
4757 * Inherited from caller.
4759 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
4760 unsigned int buflen, int write_data)
4762 struct ata_port *ap = adev->link->ap;
4763 unsigned int words = buflen >> 1;
4765 /* Transfer multiple of 2 bytes */
4767 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
4769 ioread16_rep(ap->ioaddr.data_addr, buf, words);
4771 /* Transfer trailing 1 byte, if any. */
4772 if (unlikely(buflen & 0x01)) {
4773 u16 align_buf[1] = { 0 };
4774 unsigned char *trailing_buf = buf + buflen - 1;
4777 memcpy(align_buf, trailing_buf, 1);
4778 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
4780 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
4781 memcpy(trailing_buf, align_buf, 1);
4787 * ata_data_xfer_noirq - Transfer data by PIO
4788 * @adev: device to target
4790 * @buflen: buffer length
4791 * @write_data: read/write
4793 * Transfer data from/to the device data register by PIO. Do the
4794 * transfer with interrupts disabled.
4797 * Inherited from caller.
4799 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
4800 unsigned int buflen, int write_data)
4802 unsigned long flags;
4803 local_irq_save(flags);
4804 ata_data_xfer(adev, buf, buflen, write_data);
4805 local_irq_restore(flags);
4810 * ata_pio_sector - Transfer a sector of data.
4811 * @qc: Command on going
4813 * Transfer qc->sect_size bytes of data from/to the ATA device.
4816 * Inherited from caller.
4819 static void ata_pio_sector(struct ata_queued_cmd *qc)
4821 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4822 struct scatterlist *sg = qc->__sg;
4823 struct ata_port *ap = qc->ap;
4825 unsigned int offset;
4828 if (qc->curbytes == qc->nbytes - qc->sect_size)
4829 ap->hsm_task_state = HSM_ST_LAST;
4831 page = sg[qc->cursg].page;
4832 offset = sg[qc->cursg].offset + qc->cursg_ofs;
4834 /* get the current page and offset */
4835 page = nth_page(page, (offset >> PAGE_SHIFT));
4836 offset %= PAGE_SIZE;
4838 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4840 if (PageHighMem(page)) {
4841 unsigned long flags;
4843 /* FIXME: use a bounce buffer */
4844 local_irq_save(flags);
4845 buf = kmap_atomic(page, KM_IRQ0);
4847 /* do the actual data transfer */
4848 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4850 kunmap_atomic(buf, KM_IRQ0);
4851 local_irq_restore(flags);
4853 buf = page_address(page);
4854 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4857 qc->curbytes += qc->sect_size;
4858 qc->cursg_ofs += qc->sect_size;
4860 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
4867 * ata_pio_sectors - Transfer one or many sectors.
4868 * @qc: Command on going
4870 * Transfer one or many sectors of data from/to the
4871 * ATA device for the DRQ request.
4874 * Inherited from caller.
4877 static void ata_pio_sectors(struct ata_queued_cmd *qc)
4879 if (is_multi_taskfile(&qc->tf)) {
4880 /* READ/WRITE MULTIPLE */
4883 WARN_ON(qc->dev->multi_count == 0);
4885 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
4886 qc->dev->multi_count);
4892 ata_altstatus(qc->ap); /* flush */
4896 * atapi_send_cdb - Write CDB bytes to hardware
4897 * @ap: Port to which ATAPI device is attached.
4898 * @qc: Taskfile currently active
4900 * When device has indicated its readiness to accept
4901 * a CDB, this function is called. Send the CDB.
4907 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
4910 DPRINTK("send cdb\n");
4911 WARN_ON(qc->dev->cdb_len < 12);
4913 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
4914 ata_altstatus(ap); /* flush */
4916 switch (qc->tf.protocol) {
4917 case ATA_PROT_ATAPI:
4918 ap->hsm_task_state = HSM_ST;
4920 case ATA_PROT_ATAPI_NODATA:
4921 ap->hsm_task_state = HSM_ST_LAST;
4923 case ATA_PROT_ATAPI_DMA:
4924 ap->hsm_task_state = HSM_ST_LAST;
4925 /* initiate bmdma */
4926 ap->ops->bmdma_start(qc);
4932 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4933 * @qc: Command on going
4934 * @bytes: number of bytes
4936 * Transfer Transfer data from/to the ATAPI device.
4939 * Inherited from caller.
4943 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4945 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4946 struct scatterlist *sg = qc->__sg;
4947 struct ata_port *ap = qc->ap;
4950 unsigned int offset, count;
4952 if (qc->curbytes + bytes >= qc->nbytes)
4953 ap->hsm_task_state = HSM_ST_LAST;
4956 if (unlikely(qc->cursg >= qc->n_elem)) {
4958 * The end of qc->sg is reached and the device expects
4959 * more data to transfer. In order not to overrun qc->sg
4960 * and fulfill length specified in the byte count register,
4961 * - for read case, discard trailing data from the device
4962 * - for write case, padding zero data to the device
4964 u16 pad_buf[1] = { 0 };
4965 unsigned int words = bytes >> 1;
4968 if (words) /* warning if bytes > 1 */
4969 ata_dev_printk(qc->dev, KERN_WARNING,
4970 "%u bytes trailing data\n", bytes);
4972 for (i = 0; i < words; i++)
4973 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4975 ap->hsm_task_state = HSM_ST_LAST;
4979 sg = &qc->__sg[qc->cursg];
4982 offset = sg->offset + qc->cursg_ofs;
4984 /* get the current page and offset */
4985 page = nth_page(page, (offset >> PAGE_SHIFT));
4986 offset %= PAGE_SIZE;
4988 /* don't overrun current sg */
4989 count = min(sg->length - qc->cursg_ofs, bytes);
4991 /* don't cross page boundaries */
4992 count = min(count, (unsigned int)PAGE_SIZE - offset);
4994 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4996 if (PageHighMem(page)) {
4997 unsigned long flags;
4999 /* FIXME: use bounce buffer */
5000 local_irq_save(flags);
5001 buf = kmap_atomic(page, KM_IRQ0);
5003 /* do the actual data transfer */
5004 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
5006 kunmap_atomic(buf, KM_IRQ0);
5007 local_irq_restore(flags);
5009 buf = page_address(page);
5010 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
5014 qc->curbytes += count;
5015 qc->cursg_ofs += count;
5017 if (qc->cursg_ofs == sg->length) {
5027 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
5028 * @qc: Command on going
5030 * Transfer Transfer data from/to the ATAPI device.
5033 * Inherited from caller.
5036 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
5038 struct ata_port *ap = qc->ap;
5039 struct ata_device *dev = qc->dev;
5040 unsigned int ireason, bc_lo, bc_hi, bytes;
5041 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
5043 /* Abuse qc->result_tf for temp storage of intermediate TF
5044 * here to save some kernel stack usage.
5045 * For normal completion, qc->result_tf is not relevant. For
5046 * error, qc->result_tf is later overwritten by ata_qc_complete().
5047 * So, the correctness of qc->result_tf is not affected.
5049 ap->ops->tf_read(ap, &qc->result_tf);
5050 ireason = qc->result_tf.nsect;
5051 bc_lo = qc->result_tf.lbam;
5052 bc_hi = qc->result_tf.lbah;
5053 bytes = (bc_hi << 8) | bc_lo;
5055 /* shall be cleared to zero, indicating xfer of data */
5056 if (ireason & (1 << 0))
5059 /* make sure transfer direction matches expected */
5060 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
5061 if (do_write != i_write)
5064 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
5066 __atapi_pio_bytes(qc, bytes);
5067 ata_altstatus(ap); /* flush */
5072 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
5073 qc->err_mask |= AC_ERR_HSM;
5074 ap->hsm_task_state = HSM_ST_ERR;
5078 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
5079 * @ap: the target ata_port
5083 * 1 if ok in workqueue, 0 otherwise.
5086 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
5088 if (qc->tf.flags & ATA_TFLAG_POLLING)
5091 if (ap->hsm_task_state == HSM_ST_FIRST) {
5092 if (qc->tf.protocol == ATA_PROT_PIO &&
5093 (qc->tf.flags & ATA_TFLAG_WRITE))
5096 if (is_atapi_taskfile(&qc->tf) &&
5097 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5105 * ata_hsm_qc_complete - finish a qc running on standard HSM
5106 * @qc: Command to complete
5107 * @in_wq: 1 if called from workqueue, 0 otherwise
5109 * Finish @qc which is running on standard HSM.
5112 * If @in_wq is zero, spin_lock_irqsave(host lock).
5113 * Otherwise, none on entry and grabs host lock.
5115 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
5117 struct ata_port *ap = qc->ap;
5118 unsigned long flags;
5120 if (ap->ops->error_handler) {
5122 spin_lock_irqsave(ap->lock, flags);
5124 /* EH might have kicked in while host lock is
5127 qc = ata_qc_from_tag(ap, qc->tag);
5129 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
5130 ap->ops->irq_on(ap);
5131 ata_qc_complete(qc);
5133 ata_port_freeze(ap);
5136 spin_unlock_irqrestore(ap->lock, flags);
5138 if (likely(!(qc->err_mask & AC_ERR_HSM)))
5139 ata_qc_complete(qc);
5141 ata_port_freeze(ap);
5145 spin_lock_irqsave(ap->lock, flags);
5146 ap->ops->irq_on(ap);
5147 ata_qc_complete(qc);
5148 spin_unlock_irqrestore(ap->lock, flags);
5150 ata_qc_complete(qc);
5155 * ata_hsm_move - move the HSM to the next state.
5156 * @ap: the target ata_port
5158 * @status: current device status
5159 * @in_wq: 1 if called from workqueue, 0 otherwise
5162 * 1 when poll next status needed, 0 otherwise.
5164 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
5165 u8 status, int in_wq)
5167 unsigned long flags = 0;
5170 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
5172 /* Make sure ata_qc_issue_prot() does not throw things
5173 * like DMA polling into the workqueue. Notice that
5174 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
5176 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
5179 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
5180 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
5182 switch (ap->hsm_task_state) {
5184 /* Send first data block or PACKET CDB */
5186 /* If polling, we will stay in the work queue after
5187 * sending the data. Otherwise, interrupt handler
5188 * takes over after sending the data.
5190 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
5192 /* check device status */
5193 if (unlikely((status & ATA_DRQ) == 0)) {
5194 /* handle BSY=0, DRQ=0 as error */
5195 if (likely(status & (ATA_ERR | ATA_DF)))
5196 /* device stops HSM for abort/error */
5197 qc->err_mask |= AC_ERR_DEV;
5199 /* HSM violation. Let EH handle this */
5200 qc->err_mask |= AC_ERR_HSM;
5202 ap->hsm_task_state = HSM_ST_ERR;
5206 /* Device should not ask for data transfer (DRQ=1)
5207 * when it finds something wrong.
5208 * We ignore DRQ here and stop the HSM by
5209 * changing hsm_task_state to HSM_ST_ERR and
5210 * let the EH abort the command or reset the device.
5212 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5213 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device "
5214 "error, dev_stat 0x%X\n", status);
5215 qc->err_mask |= AC_ERR_HSM;
5216 ap->hsm_task_state = HSM_ST_ERR;
5220 /* Send the CDB (atapi) or the first data block (ata pio out).
5221 * During the state transition, interrupt handler shouldn't
5222 * be invoked before the data transfer is complete and
5223 * hsm_task_state is changed. Hence, the following locking.
5226 spin_lock_irqsave(ap->lock, flags);
5228 if (qc->tf.protocol == ATA_PROT_PIO) {
5229 /* PIO data out protocol.
5230 * send first data block.
5233 /* ata_pio_sectors() might change the state
5234 * to HSM_ST_LAST. so, the state is changed here
5235 * before ata_pio_sectors().
5237 ap->hsm_task_state = HSM_ST;
5238 ata_pio_sectors(qc);
5241 atapi_send_cdb(ap, qc);
5244 spin_unlock_irqrestore(ap->lock, flags);
5246 /* if polling, ata_pio_task() handles the rest.
5247 * otherwise, interrupt handler takes over from here.
5252 /* complete command or read/write the data register */
5253 if (qc->tf.protocol == ATA_PROT_ATAPI) {
5254 /* ATAPI PIO protocol */
5255 if ((status & ATA_DRQ) == 0) {
5256 /* No more data to transfer or device error.
5257 * Device error will be tagged in HSM_ST_LAST.
5259 ap->hsm_task_state = HSM_ST_LAST;
5263 /* Device should not ask for data transfer (DRQ=1)
5264 * when it finds something wrong.
5265 * We ignore DRQ here and stop the HSM by
5266 * changing hsm_task_state to HSM_ST_ERR and
5267 * let the EH abort the command or reset the device.
5269 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5270 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
5271 "device error, dev_stat 0x%X\n",
5273 qc->err_mask |= AC_ERR_HSM;
5274 ap->hsm_task_state = HSM_ST_ERR;
5278 atapi_pio_bytes(qc);
5280 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
5281 /* bad ireason reported by device */
5285 /* ATA PIO protocol */
5286 if (unlikely((status & ATA_DRQ) == 0)) {
5287 /* handle BSY=0, DRQ=0 as error */
5288 if (likely(status & (ATA_ERR | ATA_DF)))
5289 /* device stops HSM for abort/error */
5290 qc->err_mask |= AC_ERR_DEV;
5292 /* HSM violation. Let EH handle this.
5293 * Phantom devices also trigger this
5294 * condition. Mark hint.
5296 qc->err_mask |= AC_ERR_HSM |
5299 ap->hsm_task_state = HSM_ST_ERR;
5303 /* For PIO reads, some devices may ask for
5304 * data transfer (DRQ=1) alone with ERR=1.
5305 * We respect DRQ here and transfer one
5306 * block of junk data before changing the
5307 * hsm_task_state to HSM_ST_ERR.
5309 * For PIO writes, ERR=1 DRQ=1 doesn't make
5310 * sense since the data block has been
5311 * transferred to the device.
5313 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5314 /* data might be corrputed */
5315 qc->err_mask |= AC_ERR_DEV;
5317 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
5318 ata_pio_sectors(qc);
5319 status = ata_wait_idle(ap);
5322 if (status & (ATA_BUSY | ATA_DRQ))
5323 qc->err_mask |= AC_ERR_HSM;
5325 /* ata_pio_sectors() might change the
5326 * state to HSM_ST_LAST. so, the state
5327 * is changed after ata_pio_sectors().
5329 ap->hsm_task_state = HSM_ST_ERR;
5333 ata_pio_sectors(qc);
5335 if (ap->hsm_task_state == HSM_ST_LAST &&
5336 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
5338 status = ata_wait_idle(ap);
5347 if (unlikely(!ata_ok(status))) {
5348 qc->err_mask |= __ac_err_mask(status);
5349 ap->hsm_task_state = HSM_ST_ERR;
5353 /* no more data to transfer */
5354 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
5355 ap->print_id, qc->dev->devno, status);
5357 WARN_ON(qc->err_mask);
5359 ap->hsm_task_state = HSM_ST_IDLE;
5361 /* complete taskfile transaction */
5362 ata_hsm_qc_complete(qc, in_wq);
5368 /* make sure qc->err_mask is available to
5369 * know what's wrong and recover
5371 WARN_ON(qc->err_mask == 0);
5373 ap->hsm_task_state = HSM_ST_IDLE;
5375 /* complete taskfile transaction */
5376 ata_hsm_qc_complete(qc, in_wq);
5388 static void ata_pio_task(struct work_struct *work)
5390 struct ata_port *ap =
5391 container_of(work, struct ata_port, port_task.work);
5392 struct ata_queued_cmd *qc = ap->port_task_data;
5397 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
5400 * This is purely heuristic. This is a fast path.
5401 * Sometimes when we enter, BSY will be cleared in
5402 * a chk-status or two. If not, the drive is probably seeking
5403 * or something. Snooze for a couple msecs, then
5404 * chk-status again. If still busy, queue delayed work.
5406 status = ata_busy_wait(ap, ATA_BUSY, 5);
5407 if (status & ATA_BUSY) {
5409 status = ata_busy_wait(ap, ATA_BUSY, 10);
5410 if (status & ATA_BUSY) {
5411 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
5417 poll_next = ata_hsm_move(ap, qc, status, 1);
5419 /* another command or interrupt handler
5420 * may be running at this point.
5427 * ata_qc_new - Request an available ATA command, for queueing
5428 * @ap: Port associated with device @dev
5429 * @dev: Device from whom we request an available command structure
5435 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
5437 struct ata_queued_cmd *qc = NULL;
5440 /* no command while frozen */
5441 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
5444 /* the last tag is reserved for internal command. */
5445 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
5446 if (!test_and_set_bit(i, &ap->qc_allocated)) {
5447 qc = __ata_qc_from_tag(ap, i);
5458 * ata_qc_new_init - Request an available ATA command, and initialize it
5459 * @dev: Device from whom we request an available command structure
5465 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
5467 struct ata_port *ap = dev->link->ap;
5468 struct ata_queued_cmd *qc;
5470 qc = ata_qc_new(ap);
5483 * ata_qc_free - free unused ata_queued_cmd
5484 * @qc: Command to complete
5486 * Designed to free unused ata_queued_cmd object
5487 * in case something prevents using it.
5490 * spin_lock_irqsave(host lock)
5492 void ata_qc_free(struct ata_queued_cmd *qc)
5494 struct ata_port *ap = qc->ap;
5497 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5501 if (likely(ata_tag_valid(tag))) {
5502 qc->tag = ATA_TAG_POISON;
5503 clear_bit(tag, &ap->qc_allocated);
5507 void __ata_qc_complete(struct ata_queued_cmd *qc)
5509 struct ata_port *ap = qc->ap;
5510 struct ata_link *link = qc->dev->link;
5512 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5513 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
5515 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
5518 /* command should be marked inactive atomically with qc completion */
5519 if (qc->tf.protocol == ATA_PROT_NCQ) {
5520 link->sactive &= ~(1 << qc->tag);
5522 ap->nr_active_links--;
5524 link->active_tag = ATA_TAG_POISON;
5525 ap->nr_active_links--;
5528 /* clear exclusive status */
5529 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
5530 ap->excl_link == link))
5531 ap->excl_link = NULL;
5533 /* atapi: mark qc as inactive to prevent the interrupt handler
5534 * from completing the command twice later, before the error handler
5535 * is called. (when rc != 0 and atapi request sense is needed)
5537 qc->flags &= ~ATA_QCFLAG_ACTIVE;
5538 ap->qc_active &= ~(1 << qc->tag);
5540 /* call completion callback */
5541 qc->complete_fn(qc);
5544 static void fill_result_tf(struct ata_queued_cmd *qc)
5546 struct ata_port *ap = qc->ap;
5548 qc->result_tf.flags = qc->tf.flags;
5549 ap->ops->tf_read(ap, &qc->result_tf);
5553 * ata_qc_complete - Complete an active ATA command
5554 * @qc: Command to complete
5555 * @err_mask: ATA Status register contents
5557 * Indicate to the mid and upper layers that an ATA
5558 * command has completed, with either an ok or not-ok status.
5561 * spin_lock_irqsave(host lock)
5563 void ata_qc_complete(struct ata_queued_cmd *qc)
5565 struct ata_port *ap = qc->ap;
5567 /* XXX: New EH and old EH use different mechanisms to
5568 * synchronize EH with regular execution path.
5570 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
5571 * Normal execution path is responsible for not accessing a
5572 * failed qc. libata core enforces the rule by returning NULL
5573 * from ata_qc_from_tag() for failed qcs.
5575 * Old EH depends on ata_qc_complete() nullifying completion
5576 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
5577 * not synchronize with interrupt handler. Only PIO task is
5580 if (ap->ops->error_handler) {
5581 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
5583 if (unlikely(qc->err_mask))
5584 qc->flags |= ATA_QCFLAG_FAILED;
5586 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
5587 if (!ata_tag_internal(qc->tag)) {
5588 /* always fill result TF for failed qc */
5590 ata_qc_schedule_eh(qc);
5595 /* read result TF if requested */
5596 if (qc->flags & ATA_QCFLAG_RESULT_TF)
5599 __ata_qc_complete(qc);
5601 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
5604 /* read result TF if failed or requested */
5605 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
5608 __ata_qc_complete(qc);
5613 * ata_qc_complete_multiple - Complete multiple qcs successfully
5614 * @ap: port in question
5615 * @qc_active: new qc_active mask
5616 * @finish_qc: LLDD callback invoked before completing a qc
5618 * Complete in-flight commands. This functions is meant to be
5619 * called from low-level driver's interrupt routine to complete
5620 * requests normally. ap->qc_active and @qc_active is compared
5621 * and commands are completed accordingly.
5624 * spin_lock_irqsave(host lock)
5627 * Number of completed commands on success, -errno otherwise.
5629 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
5630 void (*finish_qc)(struct ata_queued_cmd *))
5636 done_mask = ap->qc_active ^ qc_active;
5638 if (unlikely(done_mask & qc_active)) {
5639 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
5640 "(%08x->%08x)\n", ap->qc_active, qc_active);
5644 for (i = 0; i < ATA_MAX_QUEUE; i++) {
5645 struct ata_queued_cmd *qc;
5647 if (!(done_mask & (1 << i)))
5650 if ((qc = ata_qc_from_tag(ap, i))) {
5653 ata_qc_complete(qc);
5661 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
5663 struct ata_port *ap = qc->ap;
5665 switch (qc->tf.protocol) {
5668 case ATA_PROT_ATAPI_DMA:
5671 case ATA_PROT_ATAPI:
5673 if (ap->flags & ATA_FLAG_PIO_DMA)
5686 * ata_qc_issue - issue taskfile to device
5687 * @qc: command to issue to device
5689 * Prepare an ATA command to submission to device.
5690 * This includes mapping the data into a DMA-able
5691 * area, filling in the S/G table, and finally
5692 * writing the taskfile to hardware, starting the command.
5695 * spin_lock_irqsave(host lock)
5697 void ata_qc_issue(struct ata_queued_cmd *qc)
5699 struct ata_port *ap = qc->ap;
5700 struct ata_link *link = qc->dev->link;
5702 /* Make sure only one non-NCQ command is outstanding. The
5703 * check is skipped for old EH because it reuses active qc to
5704 * request ATAPI sense.
5706 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag));
5708 if (qc->tf.protocol == ATA_PROT_NCQ) {
5709 WARN_ON(link->sactive & (1 << qc->tag));
5712 ap->nr_active_links++;
5713 link->sactive |= 1 << qc->tag;
5715 WARN_ON(link->sactive);
5717 ap->nr_active_links++;
5718 link->active_tag = qc->tag;
5721 qc->flags |= ATA_QCFLAG_ACTIVE;
5722 ap->qc_active |= 1 << qc->tag;
5724 if (ata_should_dma_map(qc)) {
5725 if (qc->flags & ATA_QCFLAG_SG) {
5726 if (ata_sg_setup(qc))
5728 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
5729 if (ata_sg_setup_one(qc))
5733 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5736 ap->ops->qc_prep(qc);
5738 qc->err_mask |= ap->ops->qc_issue(qc);
5739 if (unlikely(qc->err_mask))
5744 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5745 qc->err_mask |= AC_ERR_SYSTEM;
5747 ata_qc_complete(qc);
5751 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
5752 * @qc: command to issue to device
5754 * Using various libata functions and hooks, this function
5755 * starts an ATA command. ATA commands are grouped into
5756 * classes called "protocols", and issuing each type of protocol
5757 * is slightly different.
5759 * May be used as the qc_issue() entry in ata_port_operations.
5762 * spin_lock_irqsave(host lock)
5765 * Zero on success, AC_ERR_* mask on failure
5768 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
5770 struct ata_port *ap = qc->ap;
5772 /* Use polling pio if the LLD doesn't handle
5773 * interrupt driven pio and atapi CDB interrupt.
5775 if (ap->flags & ATA_FLAG_PIO_POLLING) {
5776 switch (qc->tf.protocol) {
5778 case ATA_PROT_NODATA:
5779 case ATA_PROT_ATAPI:
5780 case ATA_PROT_ATAPI_NODATA:
5781 qc->tf.flags |= ATA_TFLAG_POLLING;
5783 case ATA_PROT_ATAPI_DMA:
5784 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
5785 /* see ata_dma_blacklisted() */
5793 /* select the device */
5794 ata_dev_select(ap, qc->dev->devno, 1, 0);
5796 /* start the command */
5797 switch (qc->tf.protocol) {
5798 case ATA_PROT_NODATA:
5799 if (qc->tf.flags & ATA_TFLAG_POLLING)
5800 ata_qc_set_polling(qc);
5802 ata_tf_to_host(ap, &qc->tf);
5803 ap->hsm_task_state = HSM_ST_LAST;
5805 if (qc->tf.flags & ATA_TFLAG_POLLING)
5806 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5811 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5813 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5814 ap->ops->bmdma_setup(qc); /* set up bmdma */
5815 ap->ops->bmdma_start(qc); /* initiate bmdma */
5816 ap->hsm_task_state = HSM_ST_LAST;
5820 if (qc->tf.flags & ATA_TFLAG_POLLING)
5821 ata_qc_set_polling(qc);
5823 ata_tf_to_host(ap, &qc->tf);
5825 if (qc->tf.flags & ATA_TFLAG_WRITE) {
5826 /* PIO data out protocol */
5827 ap->hsm_task_state = HSM_ST_FIRST;
5828 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5830 /* always send first data block using
5831 * the ata_pio_task() codepath.
5834 /* PIO data in protocol */
5835 ap->hsm_task_state = HSM_ST;
5837 if (qc->tf.flags & ATA_TFLAG_POLLING)
5838 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5840 /* if polling, ata_pio_task() handles the rest.
5841 * otherwise, interrupt handler takes over from here.
5847 case ATA_PROT_ATAPI:
5848 case ATA_PROT_ATAPI_NODATA:
5849 if (qc->tf.flags & ATA_TFLAG_POLLING)
5850 ata_qc_set_polling(qc);
5852 ata_tf_to_host(ap, &qc->tf);
5854 ap->hsm_task_state = HSM_ST_FIRST;
5856 /* send cdb by polling if no cdb interrupt */
5857 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
5858 (qc->tf.flags & ATA_TFLAG_POLLING))
5859 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5862 case ATA_PROT_ATAPI_DMA:
5863 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5865 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5866 ap->ops->bmdma_setup(qc); /* set up bmdma */
5867 ap->hsm_task_state = HSM_ST_FIRST;
5869 /* send cdb by polling if no cdb interrupt */
5870 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5871 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5876 return AC_ERR_SYSTEM;
5883 * ata_host_intr - Handle host interrupt for given (port, task)
5884 * @ap: Port on which interrupt arrived (possibly...)
5885 * @qc: Taskfile currently active in engine
5887 * Handle host interrupt for given queued command. Currently,
5888 * only DMA interrupts are handled. All other commands are
5889 * handled via polling with interrupts disabled (nIEN bit).
5892 * spin_lock_irqsave(host lock)
5895 * One if interrupt was handled, zero if not (shared irq).
5898 inline unsigned int ata_host_intr (struct ata_port *ap,
5899 struct ata_queued_cmd *qc)
5901 struct ata_eh_info *ehi = &ap->link.eh_info;
5902 u8 status, host_stat = 0;
5904 VPRINTK("ata%u: protocol %d task_state %d\n",
5905 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
5907 /* Check whether we are expecting interrupt in this state */
5908 switch (ap->hsm_task_state) {
5910 /* Some pre-ATAPI-4 devices assert INTRQ
5911 * at this state when ready to receive CDB.
5914 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
5915 * The flag was turned on only for atapi devices.
5916 * No need to check is_atapi_taskfile(&qc->tf) again.
5918 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5922 if (qc->tf.protocol == ATA_PROT_DMA ||
5923 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
5924 /* check status of DMA engine */
5925 host_stat = ap->ops->bmdma_status(ap);
5926 VPRINTK("ata%u: host_stat 0x%X\n",
5927 ap->print_id, host_stat);
5929 /* if it's not our irq... */
5930 if (!(host_stat & ATA_DMA_INTR))
5933 /* before we do anything else, clear DMA-Start bit */
5934 ap->ops->bmdma_stop(qc);
5936 if (unlikely(host_stat & ATA_DMA_ERR)) {
5937 /* error when transfering data to/from memory */
5938 qc->err_mask |= AC_ERR_HOST_BUS;
5939 ap->hsm_task_state = HSM_ST_ERR;
5949 /* check altstatus */
5950 status = ata_altstatus(ap);
5951 if (status & ATA_BUSY)
5954 /* check main status, clearing INTRQ */
5955 status = ata_chk_status(ap);
5956 if (unlikely(status & ATA_BUSY))
5959 /* ack bmdma irq events */
5960 ap->ops->irq_clear(ap);
5962 ata_hsm_move(ap, qc, status, 0);
5964 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5965 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5966 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5968 return 1; /* irq handled */
5971 ap->stats.idle_irq++;
5974 if ((ap->stats.idle_irq % 1000) == 0) {
5976 ap->ops->irq_clear(ap);
5977 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5981 return 0; /* irq not handled */
5985 * ata_interrupt - Default ATA host interrupt handler
5986 * @irq: irq line (unused)
5987 * @dev_instance: pointer to our ata_host information structure
5989 * Default interrupt handler for PCI IDE devices. Calls
5990 * ata_host_intr() for each port that is not disabled.
5993 * Obtains host lock during operation.
5996 * IRQ_NONE or IRQ_HANDLED.
5999 irqreturn_t ata_interrupt (int irq, void *dev_instance)
6001 struct ata_host *host = dev_instance;
6003 unsigned int handled = 0;
6004 unsigned long flags;
6006 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
6007 spin_lock_irqsave(&host->lock, flags);
6009 for (i = 0; i < host->n_ports; i++) {
6010 struct ata_port *ap;
6012 ap = host->ports[i];
6014 !(ap->flags & ATA_FLAG_DISABLED)) {
6015 struct ata_queued_cmd *qc;
6017 qc = ata_qc_from_tag(ap, ap->link.active_tag);
6018 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
6019 (qc->flags & ATA_QCFLAG_ACTIVE))
6020 handled |= ata_host_intr(ap, qc);
6024 spin_unlock_irqrestore(&host->lock, flags);
6026 return IRQ_RETVAL(handled);
6030 * sata_scr_valid - test whether SCRs are accessible
6031 * @link: ATA link to test SCR accessibility for
6033 * Test whether SCRs are accessible for @link.
6039 * 1 if SCRs are accessible, 0 otherwise.
6041 int sata_scr_valid(struct ata_link *link)
6043 struct ata_port *ap = link->ap;
6045 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
6049 * sata_scr_read - read SCR register of the specified port
6050 * @link: ATA link to read SCR for
6052 * @val: Place to store read value
6054 * Read SCR register @reg of @link into *@val. This function is
6055 * guaranteed to succeed if @link is ap->link, the cable type of
6056 * the port is SATA and the port implements ->scr_read.
6059 * None if @link is ap->link. Kernel thread context otherwise.
6062 * 0 on success, negative errno on failure.
6064 int sata_scr_read(struct ata_link *link, int reg, u32 *val)
6066 if (ata_is_host_link(link)) {
6067 struct ata_port *ap = link->ap;
6069 if (sata_scr_valid(link))
6070 return ap->ops->scr_read(ap, reg, val);
6074 return sata_pmp_scr_read(link, reg, val);
6078 * sata_scr_write - write SCR register of the specified port
6079 * @link: ATA link to write SCR for
6080 * @reg: SCR to write
6081 * @val: value to write
6083 * Write @val to SCR register @reg of @link. This function is
6084 * guaranteed to succeed if @link is ap->link, the cable type of
6085 * the port is SATA and the port implements ->scr_read.
6088 * None if @link is ap->link. Kernel thread context otherwise.
6091 * 0 on success, negative errno on failure.
6093 int sata_scr_write(struct ata_link *link, int reg, u32 val)
6095 if (ata_is_host_link(link)) {
6096 struct ata_port *ap = link->ap;
6098 if (sata_scr_valid(link))
6099 return ap->ops->scr_write(ap, reg, val);
6103 return sata_pmp_scr_write(link, reg, val);
6107 * sata_scr_write_flush - write SCR register of the specified port and flush
6108 * @link: ATA link to write SCR for
6109 * @reg: SCR to write
6110 * @val: value to write
6112 * This function is identical to sata_scr_write() except that this
6113 * function performs flush after writing to the register.
6116 * None if @link is ap->link. Kernel thread context otherwise.
6119 * 0 on success, negative errno on failure.
6121 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
6123 if (ata_is_host_link(link)) {
6124 struct ata_port *ap = link->ap;
6127 if (sata_scr_valid(link)) {
6128 rc = ap->ops->scr_write(ap, reg, val);
6130 rc = ap->ops->scr_read(ap, reg, &val);
6136 return sata_pmp_scr_write(link, reg, val);
6140 * ata_link_online - test whether the given link is online
6141 * @link: ATA link to test
6143 * Test whether @link is online. Note that this function returns
6144 * 0 if online status of @link cannot be obtained, so
6145 * ata_link_online(link) != !ata_link_offline(link).
6151 * 1 if the port online status is available and online.
6153 int ata_link_online(struct ata_link *link)
6157 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6158 (sstatus & 0xf) == 0x3)
6164 * ata_link_offline - test whether the given link is offline
6165 * @link: ATA link to test
6167 * Test whether @link is offline. Note that this function
6168 * returns 0 if offline status of @link cannot be obtained, so
6169 * ata_link_online(link) != !ata_link_offline(link).
6175 * 1 if the port offline status is available and offline.
6177 int ata_link_offline(struct ata_link *link)
6181 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6182 (sstatus & 0xf) != 0x3)
6187 int ata_flush_cache(struct ata_device *dev)
6189 unsigned int err_mask;
6192 if (!ata_try_flush_cache(dev))
6195 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
6196 cmd = ATA_CMD_FLUSH_EXT;
6198 cmd = ATA_CMD_FLUSH;
6200 /* This is wrong. On a failed flush we get back the LBA of the lost
6201 sector and we should (assuming it wasn't aborted as unknown) issue
6202 a further flush command to continue the writeback until it
6204 err_mask = ata_do_simple_cmd(dev, cmd);
6206 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
6214 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
6215 unsigned int action, unsigned int ehi_flags,
6218 unsigned long flags;
6221 for (i = 0; i < host->n_ports; i++) {
6222 struct ata_port *ap = host->ports[i];
6223 struct ata_link *link;
6225 /* Previous resume operation might still be in
6226 * progress. Wait for PM_PENDING to clear.
6228 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
6229 ata_port_wait_eh(ap);
6230 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6233 /* request PM ops to EH */
6234 spin_lock_irqsave(ap->lock, flags);
6239 ap->pm_result = &rc;
6242 ap->pflags |= ATA_PFLAG_PM_PENDING;
6243 __ata_port_for_each_link(link, ap) {
6244 link->eh_info.action |= action;
6245 link->eh_info.flags |= ehi_flags;
6248 ata_port_schedule_eh(ap);
6250 spin_unlock_irqrestore(ap->lock, flags);
6252 /* wait and check result */
6254 ata_port_wait_eh(ap);
6255 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6265 * ata_host_suspend - suspend host
6266 * @host: host to suspend
6269 * Suspend @host. Actual operation is performed by EH. This
6270 * function requests EH to perform PM operations and waits for EH
6274 * Kernel thread context (may sleep).
6277 * 0 on success, -errno on failure.
6279 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
6283 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
6285 host->dev->power.power_state = mesg;
6290 * ata_host_resume - resume host
6291 * @host: host to resume
6293 * Resume @host. Actual operation is performed by EH. This
6294 * function requests EH to perform PM operations and returns.
6295 * Note that all resume operations are performed parallely.
6298 * Kernel thread context (may sleep).
6300 void ata_host_resume(struct ata_host *host)
6302 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
6303 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
6304 host->dev->power.power_state = PMSG_ON;
6309 * ata_port_start - Set port up for dma.
6310 * @ap: Port to initialize
6312 * Called just after data structures for each port are
6313 * initialized. Allocates space for PRD table.
6315 * May be used as the port_start() entry in ata_port_operations.
6318 * Inherited from caller.
6320 int ata_port_start(struct ata_port *ap)
6322 struct device *dev = ap->dev;
6325 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
6330 rc = ata_pad_alloc(ap, dev);
6334 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
6335 (unsigned long long)ap->prd_dma);
6340 * ata_dev_init - Initialize an ata_device structure
6341 * @dev: Device structure to initialize
6343 * Initialize @dev in preparation for probing.
6346 * Inherited from caller.
6348 void ata_dev_init(struct ata_device *dev)
6350 struct ata_link *link = dev->link;
6351 struct ata_port *ap = link->ap;
6352 unsigned long flags;
6354 /* SATA spd limit is bound to the first device */
6355 link->sata_spd_limit = link->hw_sata_spd_limit;
6358 /* High bits of dev->flags are used to record warm plug
6359 * requests which occur asynchronously. Synchronize using
6362 spin_lock_irqsave(ap->lock, flags);
6363 dev->flags &= ~ATA_DFLAG_INIT_MASK;
6365 spin_unlock_irqrestore(ap->lock, flags);
6367 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
6368 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
6369 dev->pio_mask = UINT_MAX;
6370 dev->mwdma_mask = UINT_MAX;
6371 dev->udma_mask = UINT_MAX;
6375 * ata_link_init - Initialize an ata_link structure
6376 * @ap: ATA port link is attached to
6377 * @link: Link structure to initialize
6378 * @pmp: Port multiplier port number
6383 * Kernel thread context (may sleep)
6385 void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
6389 /* clear everything except for devices */
6390 memset(link, 0, offsetof(struct ata_link, device[0]));
6394 link->active_tag = ATA_TAG_POISON;
6395 link->hw_sata_spd_limit = UINT_MAX;
6397 /* can't use iterator, ap isn't initialized yet */
6398 for (i = 0; i < ATA_MAX_DEVICES; i++) {
6399 struct ata_device *dev = &link->device[i];
6402 dev->devno = dev - link->device;
6408 * sata_link_init_spd - Initialize link->sata_spd_limit
6409 * @link: Link to configure sata_spd_limit for
6411 * Initialize @link->[hw_]sata_spd_limit to the currently
6415 * Kernel thread context (may sleep).
6418 * 0 on success, -errno on failure.
6420 int sata_link_init_spd(struct ata_link *link)
6425 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
6429 spd = (scontrol >> 4) & 0xf;
6431 link->hw_sata_spd_limit &= (1 << spd) - 1;
6433 link->sata_spd_limit = link->hw_sata_spd_limit;
6439 * ata_port_alloc - allocate and initialize basic ATA port resources
6440 * @host: ATA host this allocated port belongs to
6442 * Allocate and initialize basic ATA port resources.
6445 * Allocate ATA port on success, NULL on failure.
6448 * Inherited from calling layer (may sleep).
6450 struct ata_port *ata_port_alloc(struct ata_host *host)
6452 struct ata_port *ap;
6456 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
6460 ap->pflags |= ATA_PFLAG_INITIALIZING;
6461 ap->lock = &host->lock;
6462 ap->flags = ATA_FLAG_DISABLED;
6464 ap->ctl = ATA_DEVCTL_OBS;
6466 ap->dev = host->dev;
6467 ap->last_ctl = 0xFF;
6469 #if defined(ATA_VERBOSE_DEBUG)
6470 /* turn on all debugging levels */
6471 ap->msg_enable = 0x00FF;
6472 #elif defined(ATA_DEBUG)
6473 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
6475 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
6478 INIT_DELAYED_WORK(&ap->port_task, NULL);
6479 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
6480 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
6481 INIT_LIST_HEAD(&ap->eh_done_q);
6482 init_waitqueue_head(&ap->eh_wait_q);
6483 init_timer_deferrable(&ap->fastdrain_timer);
6484 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
6485 ap->fastdrain_timer.data = (unsigned long)ap;
6487 ap->cbl = ATA_CBL_NONE;
6489 ata_link_init(ap, &ap->link, 0);
6492 ap->stats.unhandled_irq = 1;
6493 ap->stats.idle_irq = 1;
6498 static void ata_host_release(struct device *gendev, void *res)
6500 struct ata_host *host = dev_get_drvdata(gendev);
6503 for (i = 0; i < host->n_ports; i++) {
6504 struct ata_port *ap = host->ports[i];
6509 if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop)
6510 ap->ops->port_stop(ap);
6513 if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop)
6514 host->ops->host_stop(host);
6516 for (i = 0; i < host->n_ports; i++) {
6517 struct ata_port *ap = host->ports[i];
6523 scsi_host_put(ap->scsi_host);
6525 kfree(ap->pmp_link);
6527 host->ports[i] = NULL;
6530 dev_set_drvdata(gendev, NULL);
6534 * ata_host_alloc - allocate and init basic ATA host resources
6535 * @dev: generic device this host is associated with
6536 * @max_ports: maximum number of ATA ports associated with this host
6538 * Allocate and initialize basic ATA host resources. LLD calls
6539 * this function to allocate a host, initializes it fully and
6540 * attaches it using ata_host_register().
6542 * @max_ports ports are allocated and host->n_ports is
6543 * initialized to @max_ports. The caller is allowed to decrease
6544 * host->n_ports before calling ata_host_register(). The unused
6545 * ports will be automatically freed on registration.
6548 * Allocate ATA host on success, NULL on failure.
6551 * Inherited from calling layer (may sleep).
6553 struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
6555 struct ata_host *host;
6561 if (!devres_open_group(dev, NULL, GFP_KERNEL))
6564 /* alloc a container for our list of ATA ports (buses) */
6565 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
6566 /* alloc a container for our list of ATA ports (buses) */
6567 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
6571 devres_add(dev, host);
6572 dev_set_drvdata(dev, host);
6574 spin_lock_init(&host->lock);
6576 host->n_ports = max_ports;
6578 /* allocate ports bound to this host */
6579 for (i = 0; i < max_ports; i++) {
6580 struct ata_port *ap;
6582 ap = ata_port_alloc(host);
6587 host->ports[i] = ap;
6590 devres_remove_group(dev, NULL);
6594 devres_release_group(dev, NULL);
6599 * ata_host_alloc_pinfo - alloc host and init with port_info array
6600 * @dev: generic device this host is associated with
6601 * @ppi: array of ATA port_info to initialize host with
6602 * @n_ports: number of ATA ports attached to this host
6604 * Allocate ATA host and initialize with info from @ppi. If NULL
6605 * terminated, @ppi may contain fewer entries than @n_ports. The
6606 * last entry will be used for the remaining ports.
6609 * Allocate ATA host on success, NULL on failure.
6612 * Inherited from calling layer (may sleep).
6614 struct ata_host *ata_host_alloc_pinfo(struct device *dev,
6615 const struct ata_port_info * const * ppi,
6618 const struct ata_port_info *pi;
6619 struct ata_host *host;
6622 host = ata_host_alloc(dev, n_ports);
6626 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
6627 struct ata_port *ap = host->ports[i];
6632 ap->pio_mask = pi->pio_mask;
6633 ap->mwdma_mask = pi->mwdma_mask;
6634 ap->udma_mask = pi->udma_mask;
6635 ap->flags |= pi->flags;
6636 ap->link.flags |= pi->link_flags;
6637 ap->ops = pi->port_ops;
6639 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
6640 host->ops = pi->port_ops;
6641 if (!host->private_data && pi->private_data)
6642 host->private_data = pi->private_data;
6649 * ata_host_start - start and freeze ports of an ATA host
6650 * @host: ATA host to start ports for
6652 * Start and then freeze ports of @host. Started status is
6653 * recorded in host->flags, so this function can be called
6654 * multiple times. Ports are guaranteed to get started only
6655 * once. If host->ops isn't initialized yet, its set to the
6656 * first non-dummy port ops.
6659 * Inherited from calling layer (may sleep).
6662 * 0 if all ports are started successfully, -errno otherwise.
6664 int ata_host_start(struct ata_host *host)
6668 if (host->flags & ATA_HOST_STARTED)
6671 for (i = 0; i < host->n_ports; i++) {
6672 struct ata_port *ap = host->ports[i];
6674 if (!host->ops && !ata_port_is_dummy(ap))
6675 host->ops = ap->ops;
6677 if (ap->ops->port_start) {
6678 rc = ap->ops->port_start(ap);
6680 ata_port_printk(ap, KERN_ERR, "failed to "
6681 "start port (errno=%d)\n", rc);
6686 ata_eh_freeze_port(ap);
6689 host->flags |= ATA_HOST_STARTED;
6694 struct ata_port *ap = host->ports[i];
6696 if (ap->ops->port_stop)
6697 ap->ops->port_stop(ap);
6703 * ata_sas_host_init - Initialize a host struct
6704 * @host: host to initialize
6705 * @dev: device host is attached to
6706 * @flags: host flags
6710 * PCI/etc. bus probe sem.
6713 /* KILLME - the only user left is ipr */
6714 void ata_host_init(struct ata_host *host, struct device *dev,
6715 unsigned long flags, const struct ata_port_operations *ops)
6717 spin_lock_init(&host->lock);
6719 host->flags = flags;
6724 * ata_host_register - register initialized ATA host
6725 * @host: ATA host to register
6726 * @sht: template for SCSI host
6728 * Register initialized ATA host. @host is allocated using
6729 * ata_host_alloc() and fully initialized by LLD. This function
6730 * starts ports, registers @host with ATA and SCSI layers and
6731 * probe registered devices.
6734 * Inherited from calling layer (may sleep).
6737 * 0 on success, -errno otherwise.
6739 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6743 /* host must have been started */
6744 if (!(host->flags & ATA_HOST_STARTED)) {
6745 dev_printk(KERN_ERR, host->dev,
6746 "BUG: trying to register unstarted host\n");
6751 /* Blow away unused ports. This happens when LLD can't
6752 * determine the exact number of ports to allocate at
6755 for (i = host->n_ports; host->ports[i]; i++)
6756 kfree(host->ports[i]);
6758 /* give ports names and add SCSI hosts */
6759 for (i = 0; i < host->n_ports; i++)
6760 host->ports[i]->print_id = ata_print_id++;
6762 rc = ata_scsi_add_hosts(host, sht);
6766 /* associate with ACPI nodes */
6767 ata_acpi_associate(host);
6769 /* set cable, sata_spd_limit and report */
6770 for (i = 0; i < host->n_ports; i++) {
6771 struct ata_port *ap = host->ports[i];
6772 unsigned long xfer_mask;
6774 /* set SATA cable type if still unset */
6775 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6776 ap->cbl = ATA_CBL_SATA;
6778 /* init sata_spd_limit to the current value */
6779 sata_link_init_spd(&ap->link);
6781 /* print per-port info to dmesg */
6782 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6785 if (!ata_port_is_dummy(ap)) {
6786 ata_port_printk(ap, KERN_INFO,
6787 "%cATA max %s %s\n",
6788 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6789 ata_mode_string(xfer_mask),
6790 ap->link.eh_info.desc);
6791 ata_ehi_clear_desc(&ap->link.eh_info);
6793 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
6796 /* perform each probe synchronously */
6797 DPRINTK("probe begin\n");
6798 for (i = 0; i < host->n_ports; i++) {
6799 struct ata_port *ap = host->ports[i];
6803 if (ap->ops->error_handler) {
6804 struct ata_eh_info *ehi = &ap->link.eh_info;
6805 unsigned long flags;
6809 /* kick EH for boot probing */
6810 spin_lock_irqsave(ap->lock, flags);
6813 (1 << ata_link_max_devices(&ap->link)) - 1;
6814 ehi->action |= ATA_EH_SOFTRESET;
6815 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
6817 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
6818 ap->pflags |= ATA_PFLAG_LOADING;
6819 ata_port_schedule_eh(ap);
6821 spin_unlock_irqrestore(ap->lock, flags);
6823 /* wait for EH to finish */
6824 ata_port_wait_eh(ap);
6826 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
6827 rc = ata_bus_probe(ap);
6828 DPRINTK("ata%u: bus probe end\n", ap->print_id);
6831 /* FIXME: do something useful here?
6832 * Current libata behavior will
6833 * tear down everything when
6834 * the module is removed
6835 * or the h/w is unplugged.
6841 /* probes are done, now scan each port's disk(s) */
6842 DPRINTK("host probe begin\n");
6843 for (i = 0; i < host->n_ports; i++) {
6844 struct ata_port *ap = host->ports[i];
6846 ata_scsi_scan_host(ap, 1);
6853 * ata_host_activate - start host, request IRQ and register it
6854 * @host: target ATA host
6855 * @irq: IRQ to request
6856 * @irq_handler: irq_handler used when requesting IRQ
6857 * @irq_flags: irq_flags used when requesting IRQ
6858 * @sht: scsi_host_template to use when registering the host
6860 * After allocating an ATA host and initializing it, most libata
6861 * LLDs perform three steps to activate the host - start host,
6862 * request IRQ and register it. This helper takes necessasry
6863 * arguments and performs the three steps in one go.
6866 * Inherited from calling layer (may sleep).
6869 * 0 on success, -errno otherwise.
6871 int ata_host_activate(struct ata_host *host, int irq,
6872 irq_handler_t irq_handler, unsigned long irq_flags,
6873 struct scsi_host_template *sht)
6877 rc = ata_host_start(host);
6881 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6882 dev_driver_string(host->dev), host);
6886 for (i = 0; i < host->n_ports; i++)
6887 ata_port_desc(host->ports[i], "irq %d", irq);
6889 rc = ata_host_register(host, sht);
6890 /* if failed, just free the IRQ and leave ports alone */
6892 devm_free_irq(host->dev, irq, host);
6898 * ata_port_detach - Detach ATA port in prepration of device removal
6899 * @ap: ATA port to be detached
6901 * Detach all ATA devices and the associated SCSI devices of @ap;
6902 * then, remove the associated SCSI host. @ap is guaranteed to
6903 * be quiescent on return from this function.
6906 * Kernel thread context (may sleep).
6908 void ata_port_detach(struct ata_port *ap)
6910 unsigned long flags;
6911 struct ata_link *link;
6912 struct ata_device *dev;
6914 if (!ap->ops->error_handler)
6917 /* tell EH we're leaving & flush EH */
6918 spin_lock_irqsave(ap->lock, flags);
6919 ap->pflags |= ATA_PFLAG_UNLOADING;
6920 spin_unlock_irqrestore(ap->lock, flags);
6922 ata_port_wait_eh(ap);
6924 /* EH is now guaranteed to see UNLOADING, so no new device
6925 * will be attached. Disable all existing devices.
6927 spin_lock_irqsave(ap->lock, flags);
6929 ata_port_for_each_link(link, ap) {
6930 ata_link_for_each_dev(dev, link)
6931 ata_dev_disable(dev);
6934 spin_unlock_irqrestore(ap->lock, flags);
6936 /* Final freeze & EH. All in-flight commands are aborted. EH
6937 * will be skipped and retrials will be terminated with bad
6940 spin_lock_irqsave(ap->lock, flags);
6941 ata_port_freeze(ap); /* won't be thawed */
6942 spin_unlock_irqrestore(ap->lock, flags);
6944 ata_port_wait_eh(ap);
6945 cancel_rearming_delayed_work(&ap->hotplug_task);
6948 /* remove the associated SCSI host */
6949 scsi_remove_host(ap->scsi_host);
6953 * ata_host_detach - Detach all ports of an ATA host
6954 * @host: Host to detach
6956 * Detach all ports of @host.
6959 * Kernel thread context (may sleep).
6961 void ata_host_detach(struct ata_host *host)
6965 for (i = 0; i < host->n_ports; i++)
6966 ata_port_detach(host->ports[i]);
6970 * ata_std_ports - initialize ioaddr with standard port offsets.
6971 * @ioaddr: IO address structure to be initialized
6973 * Utility function which initializes data_addr, error_addr,
6974 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
6975 * device_addr, status_addr, and command_addr to standard offsets
6976 * relative to cmd_addr.
6978 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
6981 void ata_std_ports(struct ata_ioports *ioaddr)
6983 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
6984 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
6985 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
6986 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
6987 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
6988 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
6989 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
6990 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
6991 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
6992 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
6999 * ata_pci_remove_one - PCI layer callback for device removal
7000 * @pdev: PCI device that was removed
7002 * PCI layer indicates to libata via this hook that hot-unplug or
7003 * module unload event has occurred. Detach all ports. Resource
7004 * release is handled via devres.
7007 * Inherited from PCI layer (may sleep).
7009 void ata_pci_remove_one(struct pci_dev *pdev)
7011 struct device *dev = &pdev->dev;
7012 struct ata_host *host = dev_get_drvdata(dev);
7014 ata_host_detach(host);
7017 /* move to PCI subsystem */
7018 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
7020 unsigned long tmp = 0;
7022 switch (bits->width) {
7025 pci_read_config_byte(pdev, bits->reg, &tmp8);
7031 pci_read_config_word(pdev, bits->reg, &tmp16);
7037 pci_read_config_dword(pdev, bits->reg, &tmp32);
7048 return (tmp == bits->val) ? 1 : 0;
7052 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
7054 pci_save_state(pdev);
7055 pci_disable_device(pdev);
7057 if (mesg.event == PM_EVENT_SUSPEND)
7058 pci_set_power_state(pdev, PCI_D3hot);
7061 int ata_pci_device_do_resume(struct pci_dev *pdev)
7065 pci_set_power_state(pdev, PCI_D0);
7066 pci_restore_state(pdev);
7068 rc = pcim_enable_device(pdev);
7070 dev_printk(KERN_ERR, &pdev->dev,
7071 "failed to enable device after resume (%d)\n", rc);
7075 pci_set_master(pdev);
7079 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
7081 struct ata_host *host = dev_get_drvdata(&pdev->dev);
7084 rc = ata_host_suspend(host, mesg);
7088 ata_pci_device_do_suspend(pdev, mesg);
7093 int ata_pci_device_resume(struct pci_dev *pdev)
7095 struct ata_host *host = dev_get_drvdata(&pdev->dev);
7098 rc = ata_pci_device_do_resume(pdev);
7100 ata_host_resume(host);
7103 #endif /* CONFIG_PM */
7105 #endif /* CONFIG_PCI */
7108 static int __init ata_init(void)
7110 ata_probe_timeout *= HZ;
7111 ata_wq = create_workqueue("ata");
7115 ata_aux_wq = create_singlethread_workqueue("ata_aux");
7117 destroy_workqueue(ata_wq);
7121 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
7125 static void __exit ata_exit(void)
7127 destroy_workqueue(ata_wq);
7128 destroy_workqueue(ata_aux_wq);
7131 subsys_initcall(ata_init);
7132 module_exit(ata_exit);
7134 static unsigned long ratelimit_time;
7135 static DEFINE_SPINLOCK(ata_ratelimit_lock);
7137 int ata_ratelimit(void)
7140 unsigned long flags;
7142 spin_lock_irqsave(&ata_ratelimit_lock, flags);
7144 if (time_after(jiffies, ratelimit_time)) {
7146 ratelimit_time = jiffies + (HZ/5);
7150 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
7156 * ata_wait_register - wait until register value changes
7157 * @reg: IO-mapped register
7158 * @mask: Mask to apply to read register value
7159 * @val: Wait condition
7160 * @interval_msec: polling interval in milliseconds
7161 * @timeout_msec: timeout in milliseconds
7163 * Waiting for some bits of register to change is a common
7164 * operation for ATA controllers. This function reads 32bit LE
7165 * IO-mapped register @reg and tests for the following condition.
7167 * (*@reg & mask) != val
7169 * If the condition is met, it returns; otherwise, the process is
7170 * repeated after @interval_msec until timeout.
7173 * Kernel thread context (may sleep)
7176 * The final register value.
7178 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
7179 unsigned long interval_msec,
7180 unsigned long timeout_msec)
7182 unsigned long timeout;
7185 tmp = ioread32(reg);
7187 /* Calculate timeout _after_ the first read to make sure
7188 * preceding writes reach the controller before starting to
7189 * eat away the timeout.
7191 timeout = jiffies + (timeout_msec * HZ) / 1000;
7193 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
7194 msleep(interval_msec);
7195 tmp = ioread32(reg);
7204 static void ata_dummy_noret(struct ata_port *ap) { }
7205 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
7206 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
7208 static u8 ata_dummy_check_status(struct ata_port *ap)
7213 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
7215 return AC_ERR_SYSTEM;
7218 const struct ata_port_operations ata_dummy_port_ops = {
7219 .check_status = ata_dummy_check_status,
7220 .check_altstatus = ata_dummy_check_status,
7221 .dev_select = ata_noop_dev_select,
7222 .qc_prep = ata_noop_qc_prep,
7223 .qc_issue = ata_dummy_qc_issue,
7224 .freeze = ata_dummy_noret,
7225 .thaw = ata_dummy_noret,
7226 .error_handler = ata_dummy_noret,
7227 .post_internal_cmd = ata_dummy_qc_noret,
7228 .irq_clear = ata_dummy_noret,
7229 .port_start = ata_dummy_ret0,
7230 .port_stop = ata_dummy_noret,
7233 const struct ata_port_info ata_dummy_port_info = {
7234 .port_ops = &ata_dummy_port_ops,
7238 * libata is essentially a library of internal helper functions for
7239 * low-level ATA host controller drivers. As such, the API/ABI is
7240 * likely to change as new drivers are added and updated.
7241 * Do not depend on ABI/API stability.
7244 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
7245 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
7246 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
7247 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
7248 EXPORT_SYMBOL_GPL(ata_dummy_port_info);
7249 EXPORT_SYMBOL_GPL(ata_std_bios_param);
7250 EXPORT_SYMBOL_GPL(ata_std_ports);
7251 EXPORT_SYMBOL_GPL(ata_host_init);
7252 EXPORT_SYMBOL_GPL(ata_host_alloc);
7253 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
7254 EXPORT_SYMBOL_GPL(ata_host_start);
7255 EXPORT_SYMBOL_GPL(ata_host_register);
7256 EXPORT_SYMBOL_GPL(ata_host_activate);
7257 EXPORT_SYMBOL_GPL(ata_host_detach);
7258 EXPORT_SYMBOL_GPL(ata_sg_init);
7259 EXPORT_SYMBOL_GPL(ata_sg_init_one);
7260 EXPORT_SYMBOL_GPL(ata_hsm_move);
7261 EXPORT_SYMBOL_GPL(ata_qc_complete);
7262 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
7263 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
7264 EXPORT_SYMBOL_GPL(ata_tf_load);
7265 EXPORT_SYMBOL_GPL(ata_tf_read);
7266 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
7267 EXPORT_SYMBOL_GPL(ata_std_dev_select);
7268 EXPORT_SYMBOL_GPL(sata_print_link_status);
7269 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
7270 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
7271 EXPORT_SYMBOL_GPL(ata_check_status);
7272 EXPORT_SYMBOL_GPL(ata_altstatus);
7273 EXPORT_SYMBOL_GPL(ata_exec_command);
7274 EXPORT_SYMBOL_GPL(ata_port_start);
7275 EXPORT_SYMBOL_GPL(ata_sff_port_start);
7276 EXPORT_SYMBOL_GPL(ata_interrupt);
7277 EXPORT_SYMBOL_GPL(ata_do_set_mode);
7278 EXPORT_SYMBOL_GPL(ata_data_xfer);
7279 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
7280 EXPORT_SYMBOL_GPL(ata_std_qc_defer);
7281 EXPORT_SYMBOL_GPL(ata_qc_prep);
7282 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
7283 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
7284 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
7285 EXPORT_SYMBOL_GPL(ata_bmdma_start);
7286 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
7287 EXPORT_SYMBOL_GPL(ata_bmdma_status);
7288 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
7289 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
7290 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
7291 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
7292 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
7293 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
7294 EXPORT_SYMBOL_GPL(ata_port_probe);
7295 EXPORT_SYMBOL_GPL(ata_dev_disable);
7296 EXPORT_SYMBOL_GPL(sata_set_spd);
7297 EXPORT_SYMBOL_GPL(sata_link_debounce);
7298 EXPORT_SYMBOL_GPL(sata_link_resume);
7299 EXPORT_SYMBOL_GPL(sata_phy_reset);
7300 EXPORT_SYMBOL_GPL(__sata_phy_reset);
7301 EXPORT_SYMBOL_GPL(ata_bus_reset);
7302 EXPORT_SYMBOL_GPL(ata_std_prereset);
7303 EXPORT_SYMBOL_GPL(ata_std_softreset);
7304 EXPORT_SYMBOL_GPL(sata_link_hardreset);
7305 EXPORT_SYMBOL_GPL(sata_std_hardreset);
7306 EXPORT_SYMBOL_GPL(ata_std_postreset);
7307 EXPORT_SYMBOL_GPL(ata_dev_classify);
7308 EXPORT_SYMBOL_GPL(ata_dev_pair);
7309 EXPORT_SYMBOL_GPL(ata_port_disable);
7310 EXPORT_SYMBOL_GPL(ata_ratelimit);
7311 EXPORT_SYMBOL_GPL(ata_wait_register);
7312 EXPORT_SYMBOL_GPL(ata_busy_sleep);
7313 EXPORT_SYMBOL_GPL(ata_wait_ready);
7314 EXPORT_SYMBOL_GPL(ata_port_queue_task);
7315 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
7316 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
7317 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
7318 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
7319 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
7320 EXPORT_SYMBOL_GPL(ata_host_intr);
7321 EXPORT_SYMBOL_GPL(sata_scr_valid);
7322 EXPORT_SYMBOL_GPL(sata_scr_read);
7323 EXPORT_SYMBOL_GPL(sata_scr_write);
7324 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
7325 EXPORT_SYMBOL_GPL(ata_link_online);
7326 EXPORT_SYMBOL_GPL(ata_link_offline);
7328 EXPORT_SYMBOL_GPL(ata_host_suspend);
7329 EXPORT_SYMBOL_GPL(ata_host_resume);
7330 #endif /* CONFIG_PM */
7331 EXPORT_SYMBOL_GPL(ata_id_string);
7332 EXPORT_SYMBOL_GPL(ata_id_c_string);
7333 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
7334 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
7336 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
7337 EXPORT_SYMBOL_GPL(ata_timing_compute);
7338 EXPORT_SYMBOL_GPL(ata_timing_merge);
7341 EXPORT_SYMBOL_GPL(pci_test_config_bits);
7342 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host);
7343 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma);
7344 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host);
7345 EXPORT_SYMBOL_GPL(ata_pci_init_one);
7346 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
7348 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
7349 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
7350 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
7351 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
7352 #endif /* CONFIG_PM */
7353 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
7354 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
7355 #endif /* CONFIG_PCI */
7357 EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch);
7358 EXPORT_SYMBOL_GPL(sata_pmp_std_prereset);
7359 EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset);
7360 EXPORT_SYMBOL_GPL(sata_pmp_std_postreset);
7361 EXPORT_SYMBOL_GPL(sata_pmp_do_eh);
7363 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
7364 EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
7365 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
7366 EXPORT_SYMBOL_GPL(ata_port_desc);
7368 EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
7369 #endif /* CONFIG_PCI */
7370 EXPORT_SYMBOL_GPL(ata_eng_timeout);
7371 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
7372 EXPORT_SYMBOL_GPL(ata_link_abort);
7373 EXPORT_SYMBOL_GPL(ata_port_abort);
7374 EXPORT_SYMBOL_GPL(ata_port_freeze);
7375 EXPORT_SYMBOL_GPL(sata_async_notification);
7376 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
7377 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
7378 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
7379 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
7380 EXPORT_SYMBOL_GPL(ata_do_eh);
7381 EXPORT_SYMBOL_GPL(ata_irq_on);
7382 EXPORT_SYMBOL_GPL(ata_dev_try_classify);
7384 EXPORT_SYMBOL_GPL(ata_cable_40wire);
7385 EXPORT_SYMBOL_GPL(ata_cable_80wire);
7386 EXPORT_SYMBOL_GPL(ata_cable_unknown);
7387 EXPORT_SYMBOL_GPL(ata_cable_sata);