2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.10" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93 module_param(ata_probe_timeout, int, 0444);
94 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
97 module_param(noacpi, int, 0444);
98 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set");
100 MODULE_AUTHOR("Jeff Garzik");
101 MODULE_DESCRIPTION("Library module for ATA devices");
102 MODULE_LICENSE("GPL");
103 MODULE_VERSION(DRV_VERSION);
107 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
108 * @tf: Taskfile to convert
109 * @fis: Buffer into which data will output
110 * @pmp: Port multiplier port
112 * Converts a standard ATA taskfile to a Serial ATA
113 * FIS structure (Register - Host to Device).
116 * Inherited from caller.
119 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
121 fis[0] = 0x27; /* Register - Host to Device FIS */
122 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
123 bit 7 indicates Command FIS */
124 fis[2] = tf->command;
125 fis[3] = tf->feature;
132 fis[8] = tf->hob_lbal;
133 fis[9] = tf->hob_lbam;
134 fis[10] = tf->hob_lbah;
135 fis[11] = tf->hob_feature;
138 fis[13] = tf->hob_nsect;
149 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
150 * @fis: Buffer from which data will be input
151 * @tf: Taskfile to output
153 * Converts a serial ATA FIS structure to a standard ATA taskfile.
156 * Inherited from caller.
159 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
161 tf->command = fis[2]; /* status */
162 tf->feature = fis[3]; /* error */
169 tf->hob_lbal = fis[8];
170 tf->hob_lbam = fis[9];
171 tf->hob_lbah = fis[10];
174 tf->hob_nsect = fis[13];
177 static const u8 ata_rw_cmds[] = {
181 ATA_CMD_READ_MULTI_EXT,
182 ATA_CMD_WRITE_MULTI_EXT,
186 ATA_CMD_WRITE_MULTI_FUA_EXT,
190 ATA_CMD_PIO_READ_EXT,
191 ATA_CMD_PIO_WRITE_EXT,
204 ATA_CMD_WRITE_FUA_EXT
208 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
209 * @tf: command to examine and configure
210 * @dev: device tf belongs to
212 * Examine the device configuration and tf->flags to calculate
213 * the proper read/write commands and protocol to use.
218 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
222 int index, fua, lba48, write;
224 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
225 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
226 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
228 if (dev->flags & ATA_DFLAG_PIO) {
229 tf->protocol = ATA_PROT_PIO;
230 index = dev->multi_count ? 0 : 8;
231 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
232 /* Unable to use DMA due to host limitation */
233 tf->protocol = ATA_PROT_PIO;
234 index = dev->multi_count ? 0 : 8;
236 tf->protocol = ATA_PROT_DMA;
240 cmd = ata_rw_cmds[index + fua + lba48 + write];
249 * ata_tf_read_block - Read block address from ATA taskfile
250 * @tf: ATA taskfile of interest
251 * @dev: ATA device @tf belongs to
256 * Read block address from @tf. This function can handle all
257 * three address formats - LBA, LBA48 and CHS. tf->protocol and
258 * flags select the address format to use.
261 * Block address read from @tf.
263 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
267 if (tf->flags & ATA_TFLAG_LBA) {
268 if (tf->flags & ATA_TFLAG_LBA48) {
269 block |= (u64)tf->hob_lbah << 40;
270 block |= (u64)tf->hob_lbam << 32;
271 block |= tf->hob_lbal << 24;
273 block |= (tf->device & 0xf) << 24;
275 block |= tf->lbah << 16;
276 block |= tf->lbam << 8;
281 cyl = tf->lbam | (tf->lbah << 8);
282 head = tf->device & 0xf;
285 block = (cyl * dev->heads + head) * dev->sectors + sect;
292 * ata_build_rw_tf - Build ATA taskfile for given read/write request
293 * @tf: Target ATA taskfile
294 * @dev: ATA device @tf belongs to
295 * @block: Block address
296 * @n_block: Number of blocks
297 * @tf_flags: RW/FUA etc...
303 * Build ATA taskfile @tf for read/write request described by
304 * @block, @n_block, @tf_flags and @tag on @dev.
308 * 0 on success, -ERANGE if the request is too large for @dev,
309 * -EINVAL if the request is invalid.
311 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
312 u64 block, u32 n_block, unsigned int tf_flags,
315 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
316 tf->flags |= tf_flags;
318 if ((dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF |
319 ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ &&
320 likely(tag != ATA_TAG_INTERNAL)) {
322 if (!lba_48_ok(block, n_block))
325 tf->protocol = ATA_PROT_NCQ;
326 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
328 if (tf->flags & ATA_TFLAG_WRITE)
329 tf->command = ATA_CMD_FPDMA_WRITE;
331 tf->command = ATA_CMD_FPDMA_READ;
333 tf->nsect = tag << 3;
334 tf->hob_feature = (n_block >> 8) & 0xff;
335 tf->feature = n_block & 0xff;
337 tf->hob_lbah = (block >> 40) & 0xff;
338 tf->hob_lbam = (block >> 32) & 0xff;
339 tf->hob_lbal = (block >> 24) & 0xff;
340 tf->lbah = (block >> 16) & 0xff;
341 tf->lbam = (block >> 8) & 0xff;
342 tf->lbal = block & 0xff;
345 if (tf->flags & ATA_TFLAG_FUA)
346 tf->device |= 1 << 7;
347 } else if (dev->flags & ATA_DFLAG_LBA) {
348 tf->flags |= ATA_TFLAG_LBA;
350 if (lba_28_ok(block, n_block)) {
352 tf->device |= (block >> 24) & 0xf;
353 } else if (lba_48_ok(block, n_block)) {
354 if (!(dev->flags & ATA_DFLAG_LBA48))
358 tf->flags |= ATA_TFLAG_LBA48;
360 tf->hob_nsect = (n_block >> 8) & 0xff;
362 tf->hob_lbah = (block >> 40) & 0xff;
363 tf->hob_lbam = (block >> 32) & 0xff;
364 tf->hob_lbal = (block >> 24) & 0xff;
366 /* request too large even for LBA48 */
369 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
372 tf->nsect = n_block & 0xff;
374 tf->lbah = (block >> 16) & 0xff;
375 tf->lbam = (block >> 8) & 0xff;
376 tf->lbal = block & 0xff;
378 tf->device |= ATA_LBA;
381 u32 sect, head, cyl, track;
383 /* The request -may- be too large for CHS addressing. */
384 if (!lba_28_ok(block, n_block))
387 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
390 /* Convert LBA to CHS */
391 track = (u32)block / dev->sectors;
392 cyl = track / dev->heads;
393 head = track % dev->heads;
394 sect = (u32)block % dev->sectors + 1;
396 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
397 (u32)block, track, cyl, head, sect);
399 /* Check whether the converted CHS can fit.
403 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
406 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
417 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
418 * @pio_mask: pio_mask
419 * @mwdma_mask: mwdma_mask
420 * @udma_mask: udma_mask
422 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
423 * unsigned int xfer_mask.
431 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
432 unsigned int mwdma_mask,
433 unsigned int udma_mask)
435 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
436 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
437 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
441 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
442 * @xfer_mask: xfer_mask to unpack
443 * @pio_mask: resulting pio_mask
444 * @mwdma_mask: resulting mwdma_mask
445 * @udma_mask: resulting udma_mask
447 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
448 * Any NULL distination masks will be ignored.
450 static void ata_unpack_xfermask(unsigned int xfer_mask,
451 unsigned int *pio_mask,
452 unsigned int *mwdma_mask,
453 unsigned int *udma_mask)
456 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
458 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
460 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
463 static const struct ata_xfer_ent {
467 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
468 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
469 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
474 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
475 * @xfer_mask: xfer_mask of interest
477 * Return matching XFER_* value for @xfer_mask. Only the highest
478 * bit of @xfer_mask is considered.
484 * Matching XFER_* value, 0 if no match found.
486 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
488 int highbit = fls(xfer_mask) - 1;
489 const struct ata_xfer_ent *ent;
491 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
492 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
493 return ent->base + highbit - ent->shift;
498 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
499 * @xfer_mode: XFER_* of interest
501 * Return matching xfer_mask for @xfer_mode.
507 * Matching xfer_mask, 0 if no match found.
509 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
511 const struct ata_xfer_ent *ent;
513 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
514 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
515 return 1 << (ent->shift + xfer_mode - ent->base);
520 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
521 * @xfer_mode: XFER_* of interest
523 * Return matching xfer_shift for @xfer_mode.
529 * Matching xfer_shift, -1 if no match found.
531 static int ata_xfer_mode2shift(unsigned int xfer_mode)
533 const struct ata_xfer_ent *ent;
535 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
536 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
542 * ata_mode_string - convert xfer_mask to string
543 * @xfer_mask: mask of bits supported; only highest bit counts.
545 * Determine string which represents the highest speed
546 * (highest bit in @modemask).
552 * Constant C string representing highest speed listed in
553 * @mode_mask, or the constant C string "<n/a>".
555 static const char *ata_mode_string(unsigned int xfer_mask)
557 static const char * const xfer_mode_str[] = {
581 highbit = fls(xfer_mask) - 1;
582 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
583 return xfer_mode_str[highbit];
587 static const char *sata_spd_string(unsigned int spd)
589 static const char * const spd_str[] = {
594 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
596 return spd_str[spd - 1];
599 void ata_dev_disable(struct ata_device *dev)
601 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
602 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
603 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
610 * ata_devchk - PATA device presence detection
611 * @ap: ATA channel to examine
612 * @device: Device to examine (starting at zero)
614 * This technique was originally described in
615 * Hale Landis's ATADRVR (www.ata-atapi.com), and
616 * later found its way into the ATA/ATAPI spec.
618 * Write a pattern to the ATA shadow registers,
619 * and if a device is present, it will respond by
620 * correctly storing and echoing back the
621 * ATA shadow register contents.
627 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
629 struct ata_ioports *ioaddr = &ap->ioaddr;
632 ap->ops->dev_select(ap, device);
634 iowrite8(0x55, ioaddr->nsect_addr);
635 iowrite8(0xaa, ioaddr->lbal_addr);
637 iowrite8(0xaa, ioaddr->nsect_addr);
638 iowrite8(0x55, ioaddr->lbal_addr);
640 iowrite8(0x55, ioaddr->nsect_addr);
641 iowrite8(0xaa, ioaddr->lbal_addr);
643 nsect = ioread8(ioaddr->nsect_addr);
644 lbal = ioread8(ioaddr->lbal_addr);
646 if ((nsect == 0x55) && (lbal == 0xaa))
647 return 1; /* we found a device */
649 return 0; /* nothing found */
653 * ata_dev_classify - determine device type based on ATA-spec signature
654 * @tf: ATA taskfile register set for device to be identified
656 * Determine from taskfile register contents whether a device is
657 * ATA or ATAPI, as per "Signature and persistence" section
658 * of ATA/PI spec (volume 1, sect 5.14).
664 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
665 * the event of failure.
668 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
670 /* Apple's open source Darwin code hints that some devices only
671 * put a proper signature into the LBA mid/high registers,
672 * So, we only check those. It's sufficient for uniqueness.
675 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
676 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
677 DPRINTK("found ATA device by sig\n");
681 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
682 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
683 DPRINTK("found ATAPI device by sig\n");
684 return ATA_DEV_ATAPI;
687 DPRINTK("unknown device\n");
688 return ATA_DEV_UNKNOWN;
692 * ata_dev_try_classify - Parse returned ATA device signature
693 * @ap: ATA channel to examine
694 * @device: Device to examine (starting at zero)
695 * @r_err: Value of error register on completion
697 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
698 * an ATA/ATAPI-defined set of values is placed in the ATA
699 * shadow registers, indicating the results of device detection
702 * Select the ATA device, and read the values from the ATA shadow
703 * registers. Then parse according to the Error register value,
704 * and the spec-defined values examined by ata_dev_classify().
710 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
714 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
716 struct ata_taskfile tf;
720 ap->ops->dev_select(ap, device);
722 memset(&tf, 0, sizeof(tf));
724 ap->ops->tf_read(ap, &tf);
729 /* see if device passed diags: if master then continue and warn later */
730 if (err == 0 && device == 0)
731 /* diagnostic fail : do nothing _YET_ */
732 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
735 else if ((device == 0) && (err == 0x81))
740 /* determine if device is ATA or ATAPI */
741 class = ata_dev_classify(&tf);
743 if (class == ATA_DEV_UNKNOWN)
745 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
751 * ata_id_string - Convert IDENTIFY DEVICE page into string
752 * @id: IDENTIFY DEVICE results we will examine
753 * @s: string into which data is output
754 * @ofs: offset into identify device page
755 * @len: length of string to return. must be an even number.
757 * The strings in the IDENTIFY DEVICE page are broken up into
758 * 16-bit chunks. Run through the string, and output each
759 * 8-bit chunk linearly, regardless of platform.
765 void ata_id_string(const u16 *id, unsigned char *s,
766 unsigned int ofs, unsigned int len)
785 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
786 * @id: IDENTIFY DEVICE results we will examine
787 * @s: string into which data is output
788 * @ofs: offset into identify device page
789 * @len: length of string to return. must be an odd number.
791 * This function is identical to ata_id_string except that it
792 * trims trailing spaces and terminates the resulting string with
793 * null. @len must be actual maximum length (even number) + 1.
798 void ata_id_c_string(const u16 *id, unsigned char *s,
799 unsigned int ofs, unsigned int len)
805 ata_id_string(id, s, ofs, len - 1);
807 p = s + strnlen(s, len - 1);
808 while (p > s && p[-1] == ' ')
813 static u64 ata_id_n_sectors(const u16 *id)
815 if (ata_id_has_lba(id)) {
816 if (ata_id_has_lba48(id))
817 return ata_id_u64(id, 100);
819 return ata_id_u32(id, 60);
821 if (ata_id_current_chs_valid(id))
822 return ata_id_u32(id, 57);
824 return id[1] * id[3] * id[6];
829 * ata_noop_dev_select - Select device 0/1 on ATA bus
830 * @ap: ATA channel to manipulate
831 * @device: ATA device (numbered from zero) to select
833 * This function performs no actual function.
835 * May be used as the dev_select() entry in ata_port_operations.
840 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
846 * ata_std_dev_select - Select device 0/1 on ATA bus
847 * @ap: ATA channel to manipulate
848 * @device: ATA device (numbered from zero) to select
850 * Use the method defined in the ATA specification to
851 * make either device 0, or device 1, active on the
852 * ATA channel. Works with both PIO and MMIO.
854 * May be used as the dev_select() entry in ata_port_operations.
860 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
865 tmp = ATA_DEVICE_OBS;
867 tmp = ATA_DEVICE_OBS | ATA_DEV1;
869 iowrite8(tmp, ap->ioaddr.device_addr);
870 ata_pause(ap); /* needed; also flushes, for mmio */
874 * ata_dev_select - Select device 0/1 on ATA bus
875 * @ap: ATA channel to manipulate
876 * @device: ATA device (numbered from zero) to select
877 * @wait: non-zero to wait for Status register BSY bit to clear
878 * @can_sleep: non-zero if context allows sleeping
880 * Use the method defined in the ATA specification to
881 * make either device 0, or device 1, active on the
884 * This is a high-level version of ata_std_dev_select(),
885 * which additionally provides the services of inserting
886 * the proper pauses and status polling, where needed.
892 void ata_dev_select(struct ata_port *ap, unsigned int device,
893 unsigned int wait, unsigned int can_sleep)
895 if (ata_msg_probe(ap))
896 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
897 "device %u, wait %u\n", ap->id, device, wait);
902 ap->ops->dev_select(ap, device);
905 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
912 * ata_dump_id - IDENTIFY DEVICE info debugging output
913 * @id: IDENTIFY DEVICE page to dump
915 * Dump selected 16-bit words from the given IDENTIFY DEVICE
922 static inline void ata_dump_id(const u16 *id)
924 DPRINTK("49==0x%04x "
934 DPRINTK("80==0x%04x "
944 DPRINTK("88==0x%04x "
951 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
952 * @id: IDENTIFY data to compute xfer mask from
954 * Compute the xfermask for this device. This is not as trivial
955 * as it seems if we must consider early devices correctly.
957 * FIXME: pre IDE drive timing (do we care ?).
965 static unsigned int ata_id_xfermask(const u16 *id)
967 unsigned int pio_mask, mwdma_mask, udma_mask;
969 /* Usual case. Word 53 indicates word 64 is valid */
970 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
971 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
975 /* If word 64 isn't valid then Word 51 high byte holds
976 * the PIO timing number for the maximum. Turn it into
979 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
980 if (mode < 5) /* Valid PIO range */
981 pio_mask = (2 << mode) - 1;
985 /* But wait.. there's more. Design your standards by
986 * committee and you too can get a free iordy field to
987 * process. However its the speeds not the modes that
988 * are supported... Note drivers using the timing API
989 * will get this right anyway
993 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
995 if (ata_id_is_cfa(id)) {
997 * Process compact flash extended modes
999 int pio = id[163] & 0x7;
1000 int dma = (id[163] >> 3) & 7;
1003 pio_mask |= (1 << 5);
1005 pio_mask |= (1 << 6);
1007 mwdma_mask |= (1 << 3);
1009 mwdma_mask |= (1 << 4);
1013 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1014 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1016 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1020 * ata_port_queue_task - Queue port_task
1021 * @ap: The ata_port to queue port_task for
1022 * @fn: workqueue function to be scheduled
1023 * @data: data for @fn to use
1024 * @delay: delay time for workqueue function
1026 * Schedule @fn(@data) for execution after @delay jiffies using
1027 * port_task. There is one port_task per port and it's the
1028 * user(low level driver)'s responsibility to make sure that only
1029 * one task is active at any given time.
1031 * libata core layer takes care of synchronization between
1032 * port_task and EH. ata_port_queue_task() may be ignored for EH
1036 * Inherited from caller.
1038 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1039 unsigned long delay)
1043 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
1046 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1047 ap->port_task_data = data;
1049 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
1051 /* rc == 0 means that another user is using port task */
1056 * ata_port_flush_task - Flush port_task
1057 * @ap: The ata_port to flush port_task for
1059 * After this function completes, port_task is guranteed not to
1060 * be running or scheduled.
1063 * Kernel thread context (may sleep)
1065 void ata_port_flush_task(struct ata_port *ap)
1067 unsigned long flags;
1071 spin_lock_irqsave(ap->lock, flags);
1072 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1073 spin_unlock_irqrestore(ap->lock, flags);
1075 DPRINTK("flush #1\n");
1076 flush_workqueue(ata_wq);
1079 * At this point, if a task is running, it's guaranteed to see
1080 * the FLUSH flag; thus, it will never queue pio tasks again.
1083 if (!cancel_delayed_work(&ap->port_task)) {
1084 if (ata_msg_ctl(ap))
1085 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1087 flush_workqueue(ata_wq);
1090 spin_lock_irqsave(ap->lock, flags);
1091 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1092 spin_unlock_irqrestore(ap->lock, flags);
1094 if (ata_msg_ctl(ap))
1095 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1098 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1100 struct completion *waiting = qc->private_data;
1106 * ata_exec_internal_sg - execute libata internal command
1107 * @dev: Device to which the command is sent
1108 * @tf: Taskfile registers for the command and the result
1109 * @cdb: CDB for packet command
1110 * @dma_dir: Data tranfer direction of the command
1111 * @sg: sg list for the data buffer of the command
1112 * @n_elem: Number of sg entries
1114 * Executes libata internal command with timeout. @tf contains
1115 * command on entry and result on return. Timeout and error
1116 * conditions are reported via return value. No recovery action
1117 * is taken after a command times out. It's caller's duty to
1118 * clean up after timeout.
1121 * None. Should be called with kernel context, might sleep.
1124 * Zero on success, AC_ERR_* mask on failure
1126 unsigned ata_exec_internal_sg(struct ata_device *dev,
1127 struct ata_taskfile *tf, const u8 *cdb,
1128 int dma_dir, struct scatterlist *sg,
1129 unsigned int n_elem)
1131 struct ata_port *ap = dev->ap;
1132 u8 command = tf->command;
1133 struct ata_queued_cmd *qc;
1134 unsigned int tag, preempted_tag;
1135 u32 preempted_sactive, preempted_qc_active;
1136 DECLARE_COMPLETION_ONSTACK(wait);
1137 unsigned long flags;
1138 unsigned int err_mask;
1141 spin_lock_irqsave(ap->lock, flags);
1143 /* no internal command while frozen */
1144 if (ap->pflags & ATA_PFLAG_FROZEN) {
1145 spin_unlock_irqrestore(ap->lock, flags);
1146 return AC_ERR_SYSTEM;
1149 /* initialize internal qc */
1151 /* XXX: Tag 0 is used for drivers with legacy EH as some
1152 * drivers choke if any other tag is given. This breaks
1153 * ata_tag_internal() test for those drivers. Don't use new
1154 * EH stuff without converting to it.
1156 if (ap->ops->error_handler)
1157 tag = ATA_TAG_INTERNAL;
1161 if (test_and_set_bit(tag, &ap->qc_allocated))
1163 qc = __ata_qc_from_tag(ap, tag);
1171 preempted_tag = ap->active_tag;
1172 preempted_sactive = ap->sactive;
1173 preempted_qc_active = ap->qc_active;
1174 ap->active_tag = ATA_TAG_POISON;
1178 /* prepare & issue qc */
1181 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1182 qc->flags |= ATA_QCFLAG_RESULT_TF;
1183 qc->dma_dir = dma_dir;
1184 if (dma_dir != DMA_NONE) {
1185 unsigned int i, buflen = 0;
1187 for (i = 0; i < n_elem; i++)
1188 buflen += sg[i].length;
1190 ata_sg_init(qc, sg, n_elem);
1191 qc->nbytes = buflen;
1194 qc->private_data = &wait;
1195 qc->complete_fn = ata_qc_complete_internal;
1199 spin_unlock_irqrestore(ap->lock, flags);
1201 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1203 ata_port_flush_task(ap);
1206 spin_lock_irqsave(ap->lock, flags);
1208 /* We're racing with irq here. If we lose, the
1209 * following test prevents us from completing the qc
1210 * twice. If we win, the port is frozen and will be
1211 * cleaned up by ->post_internal_cmd().
1213 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1214 qc->err_mask |= AC_ERR_TIMEOUT;
1216 if (ap->ops->error_handler)
1217 ata_port_freeze(ap);
1219 ata_qc_complete(qc);
1221 if (ata_msg_warn(ap))
1222 ata_dev_printk(dev, KERN_WARNING,
1223 "qc timeout (cmd 0x%x)\n", command);
1226 spin_unlock_irqrestore(ap->lock, flags);
1229 /* do post_internal_cmd */
1230 if (ap->ops->post_internal_cmd)
1231 ap->ops->post_internal_cmd(qc);
1233 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) {
1234 if (ata_msg_warn(ap))
1235 ata_dev_printk(dev, KERN_WARNING,
1236 "zero err_mask for failed "
1237 "internal command, assuming AC_ERR_OTHER\n");
1238 qc->err_mask |= AC_ERR_OTHER;
1242 spin_lock_irqsave(ap->lock, flags);
1244 *tf = qc->result_tf;
1245 err_mask = qc->err_mask;
1248 ap->active_tag = preempted_tag;
1249 ap->sactive = preempted_sactive;
1250 ap->qc_active = preempted_qc_active;
1252 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1253 * Until those drivers are fixed, we detect the condition
1254 * here, fail the command with AC_ERR_SYSTEM and reenable the
1257 * Note that this doesn't change any behavior as internal
1258 * command failure results in disabling the device in the
1259 * higher layer for LLDDs without new reset/EH callbacks.
1261 * Kill the following code as soon as those drivers are fixed.
1263 if (ap->flags & ATA_FLAG_DISABLED) {
1264 err_mask |= AC_ERR_SYSTEM;
1268 spin_unlock_irqrestore(ap->lock, flags);
1274 * ata_exec_internal - execute libata internal command
1275 * @dev: Device to which the command is sent
1276 * @tf: Taskfile registers for the command and the result
1277 * @cdb: CDB for packet command
1278 * @dma_dir: Data tranfer direction of the command
1279 * @buf: Data buffer of the command
1280 * @buflen: Length of data buffer
1282 * Wrapper around ata_exec_internal_sg() which takes simple
1283 * buffer instead of sg list.
1286 * None. Should be called with kernel context, might sleep.
1289 * Zero on success, AC_ERR_* mask on failure
1291 unsigned ata_exec_internal(struct ata_device *dev,
1292 struct ata_taskfile *tf, const u8 *cdb,
1293 int dma_dir, void *buf, unsigned int buflen)
1295 struct scatterlist *psg = NULL, sg;
1296 unsigned int n_elem = 0;
1298 if (dma_dir != DMA_NONE) {
1300 sg_init_one(&sg, buf, buflen);
1305 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1309 * ata_do_simple_cmd - execute simple internal command
1310 * @dev: Device to which the command is sent
1311 * @cmd: Opcode to execute
1313 * Execute a 'simple' command, that only consists of the opcode
1314 * 'cmd' itself, without filling any other registers
1317 * Kernel thread context (may sleep).
1320 * Zero on success, AC_ERR_* mask on failure
1322 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1324 struct ata_taskfile tf;
1326 ata_tf_init(dev, &tf);
1329 tf.flags |= ATA_TFLAG_DEVICE;
1330 tf.protocol = ATA_PROT_NODATA;
1332 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1336 * ata_pio_need_iordy - check if iordy needed
1339 * Check if the current speed of the device requires IORDY. Used
1340 * by various controllers for chip configuration.
1343 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1346 int speed = adev->pio_mode - XFER_PIO_0;
1353 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1355 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1356 pio = adev->id[ATA_ID_EIDE_PIO];
1357 /* Is the speed faster than the drive allows non IORDY ? */
1359 /* This is cycle times not frequency - watch the logic! */
1360 if (pio > 240) /* PIO2 is 240nS per cycle */
1369 * ata_dev_read_id - Read ID data from the specified device
1370 * @dev: target device
1371 * @p_class: pointer to class of the target device (may be changed)
1372 * @flags: ATA_READID_* flags
1373 * @id: buffer to read IDENTIFY data into
1375 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1376 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1377 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1378 * for pre-ATA4 drives.
1381 * Kernel thread context (may sleep)
1384 * 0 on success, -errno otherwise.
1386 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1387 unsigned int flags, u16 *id)
1389 struct ata_port *ap = dev->ap;
1390 unsigned int class = *p_class;
1391 struct ata_taskfile tf;
1392 unsigned int err_mask = 0;
1396 if (ata_msg_ctl(ap))
1397 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1398 __FUNCTION__, ap->id, dev->devno);
1400 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1403 ata_tf_init(dev, &tf);
1407 tf.command = ATA_CMD_ID_ATA;
1410 tf.command = ATA_CMD_ID_ATAPI;
1414 reason = "unsupported class";
1418 tf.protocol = ATA_PROT_PIO;
1420 /* Some devices choke if TF registers contain garbage. Make
1421 * sure those are properly initialized.
1423 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1425 /* Device presence detection is unreliable on some
1426 * controllers. Always poll IDENTIFY if available.
1428 tf.flags |= ATA_TFLAG_POLLING;
1430 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1431 id, sizeof(id[0]) * ATA_ID_WORDS);
1433 if (err_mask & AC_ERR_NODEV_HINT) {
1434 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1435 ap->id, dev->devno);
1440 reason = "I/O error";
1444 swap_buf_le16(id, ATA_ID_WORDS);
1448 reason = "device reports illegal type";
1450 if (class == ATA_DEV_ATA) {
1451 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1454 if (ata_id_is_ata(id))
1458 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1460 * The exact sequence expected by certain pre-ATA4 drives is:
1463 * INITIALIZE DEVICE PARAMETERS
1465 * Some drives were very specific about that exact sequence.
1467 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1468 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1471 reason = "INIT_DEV_PARAMS failed";
1475 /* current CHS translation info (id[53-58]) might be
1476 * changed. reread the identify device info.
1478 flags &= ~ATA_READID_POSTRESET;
1488 if (ata_msg_warn(ap))
1489 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1490 "(%s, err_mask=0x%x)\n", reason, err_mask);
1494 static inline u8 ata_dev_knobble(struct ata_device *dev)
1496 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1499 static void ata_dev_config_ncq(struct ata_device *dev,
1500 char *desc, size_t desc_sz)
1502 struct ata_port *ap = dev->ap;
1503 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1505 if (!ata_id_has_ncq(dev->id)) {
1509 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1510 snprintf(desc, desc_sz, "NCQ (not used)");
1513 if (ap->flags & ATA_FLAG_NCQ) {
1514 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1515 dev->flags |= ATA_DFLAG_NCQ;
1518 if (hdepth >= ddepth)
1519 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1521 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1524 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1528 if (ap->scsi_host) {
1529 unsigned int len = 0;
1531 for (i = 0; i < ATA_MAX_DEVICES; i++)
1532 len = max(len, ap->device[i].cdb_len);
1534 ap->scsi_host->max_cmd_len = len;
1539 * ata_dev_configure - Configure the specified ATA/ATAPI device
1540 * @dev: Target device to configure
1542 * Configure @dev according to @dev->id. Generic and low-level
1543 * driver specific fixups are also applied.
1546 * Kernel thread context (may sleep)
1549 * 0 on success, -errno otherwise
1551 int ata_dev_configure(struct ata_device *dev)
1553 struct ata_port *ap = dev->ap;
1554 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1555 const u16 *id = dev->id;
1556 unsigned int xfer_mask;
1557 char revbuf[7]; /* XYZ-99\0 */
1558 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1559 char modelbuf[ATA_ID_PROD_LEN+1];
1562 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1563 ata_dev_printk(dev, KERN_INFO,
1564 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1565 __FUNCTION__, ap->id, dev->devno);
1569 if (ata_msg_probe(ap))
1570 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1571 __FUNCTION__, ap->id, dev->devno);
1574 rc = ata_acpi_push_id(ap, dev->devno);
1576 ata_dev_printk(dev, KERN_WARNING, "failed to set _SDD(%d)\n",
1580 /* retrieve and execute the ATA task file of _GTF */
1581 ata_acpi_exec_tfs(ap);
1583 /* print device capabilities */
1584 if (ata_msg_probe(ap))
1585 ata_dev_printk(dev, KERN_DEBUG,
1586 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1587 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1589 id[49], id[82], id[83], id[84],
1590 id[85], id[86], id[87], id[88]);
1592 /* initialize to-be-configured parameters */
1593 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1594 dev->max_sectors = 0;
1602 * common ATA, ATAPI feature tests
1605 /* find max transfer mode; for printk only */
1606 xfer_mask = ata_id_xfermask(id);
1608 if (ata_msg_probe(ap))
1611 /* ATA-specific feature tests */
1612 if (dev->class == ATA_DEV_ATA) {
1613 if (ata_id_is_cfa(id)) {
1614 if (id[162] & 1) /* CPRM may make this media unusable */
1615 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1616 ap->id, dev->devno);
1617 snprintf(revbuf, 7, "CFA");
1620 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1622 dev->n_sectors = ata_id_n_sectors(id);
1624 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1625 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
1628 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
1631 if (dev->id[59] & 0x100)
1632 dev->multi_count = dev->id[59] & 0xff;
1634 if (ata_id_has_lba(id)) {
1635 const char *lba_desc;
1639 dev->flags |= ATA_DFLAG_LBA;
1640 if (ata_id_has_lba48(id)) {
1641 dev->flags |= ATA_DFLAG_LBA48;
1644 if (dev->n_sectors >= (1UL << 28) &&
1645 ata_id_has_flush_ext(id))
1646 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1650 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1652 /* print device info to dmesg */
1653 if (ata_msg_drv(ap) && print_info) {
1654 ata_dev_printk(dev, KERN_INFO,
1655 "%s: %s, %s, max %s\n",
1656 revbuf, modelbuf, fwrevbuf,
1657 ata_mode_string(xfer_mask));
1658 ata_dev_printk(dev, KERN_INFO,
1659 "%Lu sectors, multi %u: %s %s\n",
1660 (unsigned long long)dev->n_sectors,
1661 dev->multi_count, lba_desc, ncq_desc);
1666 /* Default translation */
1667 dev->cylinders = id[1];
1669 dev->sectors = id[6];
1671 if (ata_id_current_chs_valid(id)) {
1672 /* Current CHS translation is valid. */
1673 dev->cylinders = id[54];
1674 dev->heads = id[55];
1675 dev->sectors = id[56];
1678 /* print device info to dmesg */
1679 if (ata_msg_drv(ap) && print_info) {
1680 ata_dev_printk(dev, KERN_INFO,
1681 "%s: %s, %s, max %s\n",
1682 revbuf, modelbuf, fwrevbuf,
1683 ata_mode_string(xfer_mask));
1684 ata_dev_printk(dev, KERN_INFO,
1685 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
1686 (unsigned long long)dev->n_sectors,
1687 dev->multi_count, dev->cylinders,
1688 dev->heads, dev->sectors);
1695 /* ATAPI-specific feature tests */
1696 else if (dev->class == ATA_DEV_ATAPI) {
1697 char *cdb_intr_string = "";
1699 rc = atapi_cdb_len(id);
1700 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1701 if (ata_msg_warn(ap))
1702 ata_dev_printk(dev, KERN_WARNING,
1703 "unsupported CDB len\n");
1707 dev->cdb_len = (unsigned int) rc;
1709 if (ata_id_cdb_intr(dev->id)) {
1710 dev->flags |= ATA_DFLAG_CDB_INTR;
1711 cdb_intr_string = ", CDB intr";
1714 /* print device info to dmesg */
1715 if (ata_msg_drv(ap) && print_info)
1716 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1717 ata_mode_string(xfer_mask),
1721 /* determine max_sectors */
1722 dev->max_sectors = ATA_MAX_SECTORS;
1723 if (dev->flags & ATA_DFLAG_LBA48)
1724 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1726 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1727 /* Let the user know. We don't want to disallow opens for
1728 rescue purposes, or in case the vendor is just a blithering
1731 ata_dev_printk(dev, KERN_WARNING,
1732 "Drive reports diagnostics failure. This may indicate a drive\n");
1733 ata_dev_printk(dev, KERN_WARNING,
1734 "fault or invalid emulation. Contact drive vendor for information.\n");
1738 ata_set_port_max_cmd_len(ap);
1740 /* limit bridge transfers to udma5, 200 sectors */
1741 if (ata_dev_knobble(dev)) {
1742 if (ata_msg_drv(ap) && print_info)
1743 ata_dev_printk(dev, KERN_INFO,
1744 "applying bridge limits\n");
1745 dev->udma_mask &= ATA_UDMA5;
1746 dev->max_sectors = ATA_MAX_SECTORS;
1749 if (ap->ops->dev_config)
1750 ap->ops->dev_config(ap, dev);
1752 if (ata_msg_probe(ap))
1753 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1754 __FUNCTION__, ata_chk_status(ap));
1758 if (ata_msg_probe(ap))
1759 ata_dev_printk(dev, KERN_DEBUG,
1760 "%s: EXIT, err\n", __FUNCTION__);
1765 * ata_bus_probe - Reset and probe ATA bus
1768 * Master ATA bus probing function. Initiates a hardware-dependent
1769 * bus reset, then attempts to identify any devices found on
1773 * PCI/etc. bus probe sem.
1776 * Zero on success, negative errno otherwise.
1779 int ata_bus_probe(struct ata_port *ap)
1781 unsigned int classes[ATA_MAX_DEVICES];
1782 int tries[ATA_MAX_DEVICES];
1784 struct ata_device *dev;
1788 for (i = 0; i < ATA_MAX_DEVICES; i++)
1789 tries[i] = ATA_PROBE_MAX_TRIES;
1792 /* reset and determine device classes */
1793 ap->ops->phy_reset(ap);
1795 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1796 dev = &ap->device[i];
1798 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1799 dev->class != ATA_DEV_UNKNOWN)
1800 classes[dev->devno] = dev->class;
1802 classes[dev->devno] = ATA_DEV_NONE;
1804 dev->class = ATA_DEV_UNKNOWN;
1809 /* after the reset the device state is PIO 0 and the controller
1810 state is undefined. Record the mode */
1812 for (i = 0; i < ATA_MAX_DEVICES; i++)
1813 ap->device[i].pio_mode = XFER_PIO_0;
1815 /* read IDENTIFY page and configure devices */
1816 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1817 dev = &ap->device[i];
1820 dev->class = classes[i];
1822 if (!ata_dev_enabled(dev))
1825 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1830 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1831 rc = ata_dev_configure(dev);
1832 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1837 /* configure transfer mode */
1838 rc = ata_set_mode(ap, &dev);
1842 for (i = 0; i < ATA_MAX_DEVICES; i++)
1843 if (ata_dev_enabled(&ap->device[i]))
1846 /* no device present, disable port */
1847 ata_port_disable(ap);
1848 ap->ops->port_disable(ap);
1852 tries[dev->devno]--;
1856 /* eeek, something went very wrong, give up */
1857 tries[dev->devno] = 0;
1861 /* give it just one more chance */
1862 tries[dev->devno] = min(tries[dev->devno], 1);
1864 if (tries[dev->devno] == 1) {
1865 /* This is the last chance, better to slow
1866 * down than lose it.
1868 sata_down_spd_limit(ap);
1869 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
1873 if (!tries[dev->devno])
1874 ata_dev_disable(dev);
1880 * ata_port_probe - Mark port as enabled
1881 * @ap: Port for which we indicate enablement
1883 * Modify @ap data structure such that the system
1884 * thinks that the entire port is enabled.
1886 * LOCKING: host lock, or some other form of
1890 void ata_port_probe(struct ata_port *ap)
1892 ap->flags &= ~ATA_FLAG_DISABLED;
1896 * sata_print_link_status - Print SATA link status
1897 * @ap: SATA port to printk link status about
1899 * This function prints link speed and status of a SATA link.
1904 static void sata_print_link_status(struct ata_port *ap)
1906 u32 sstatus, scontrol, tmp;
1908 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1910 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1912 if (ata_port_online(ap)) {
1913 tmp = (sstatus >> 4) & 0xf;
1914 ata_port_printk(ap, KERN_INFO,
1915 "SATA link up %s (SStatus %X SControl %X)\n",
1916 sata_spd_string(tmp), sstatus, scontrol);
1918 ata_port_printk(ap, KERN_INFO,
1919 "SATA link down (SStatus %X SControl %X)\n",
1925 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1926 * @ap: SATA port associated with target SATA PHY.
1928 * This function issues commands to standard SATA Sxxx
1929 * PHY registers, to wake up the phy (and device), and
1930 * clear any reset condition.
1933 * PCI/etc. bus probe sem.
1936 void __sata_phy_reset(struct ata_port *ap)
1939 unsigned long timeout = jiffies + (HZ * 5);
1941 if (ap->flags & ATA_FLAG_SATA_RESET) {
1942 /* issue phy wake/reset */
1943 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1944 /* Couldn't find anything in SATA I/II specs, but
1945 * AHCI-1.1 10.4.2 says at least 1 ms. */
1948 /* phy wake/clear reset */
1949 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1951 /* wait for phy to become ready, if necessary */
1954 sata_scr_read(ap, SCR_STATUS, &sstatus);
1955 if ((sstatus & 0xf) != 1)
1957 } while (time_before(jiffies, timeout));
1959 /* print link status */
1960 sata_print_link_status(ap);
1962 /* TODO: phy layer with polling, timeouts, etc. */
1963 if (!ata_port_offline(ap))
1966 ata_port_disable(ap);
1968 if (ap->flags & ATA_FLAG_DISABLED)
1971 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1972 ata_port_disable(ap);
1976 ap->cbl = ATA_CBL_SATA;
1980 * sata_phy_reset - Reset SATA bus.
1981 * @ap: SATA port associated with target SATA PHY.
1983 * This function resets the SATA bus, and then probes
1984 * the bus for devices.
1987 * PCI/etc. bus probe sem.
1990 void sata_phy_reset(struct ata_port *ap)
1992 __sata_phy_reset(ap);
1993 if (ap->flags & ATA_FLAG_DISABLED)
1999 * ata_dev_pair - return other device on cable
2002 * Obtain the other device on the same cable, or if none is
2003 * present NULL is returned
2006 struct ata_device *ata_dev_pair(struct ata_device *adev)
2008 struct ata_port *ap = adev->ap;
2009 struct ata_device *pair = &ap->device[1 - adev->devno];
2010 if (!ata_dev_enabled(pair))
2016 * ata_port_disable - Disable port.
2017 * @ap: Port to be disabled.
2019 * Modify @ap data structure such that the system
2020 * thinks that the entire port is disabled, and should
2021 * never attempt to probe or communicate with devices
2024 * LOCKING: host lock, or some other form of
2028 void ata_port_disable(struct ata_port *ap)
2030 ap->device[0].class = ATA_DEV_NONE;
2031 ap->device[1].class = ATA_DEV_NONE;
2032 ap->flags |= ATA_FLAG_DISABLED;
2036 * sata_down_spd_limit - adjust SATA spd limit downward
2037 * @ap: Port to adjust SATA spd limit for
2039 * Adjust SATA spd limit of @ap downward. Note that this
2040 * function only adjusts the limit. The change must be applied
2041 * using sata_set_spd().
2044 * Inherited from caller.
2047 * 0 on success, negative errno on failure
2049 int sata_down_spd_limit(struct ata_port *ap)
2051 u32 sstatus, spd, mask;
2054 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2058 mask = ap->sata_spd_limit;
2061 highbit = fls(mask) - 1;
2062 mask &= ~(1 << highbit);
2064 spd = (sstatus >> 4) & 0xf;
2068 mask &= (1 << spd) - 1;
2072 ap->sata_spd_limit = mask;
2074 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2075 sata_spd_string(fls(mask)));
2080 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2084 if (ap->sata_spd_limit == UINT_MAX)
2087 limit = fls(ap->sata_spd_limit);
2089 spd = (*scontrol >> 4) & 0xf;
2090 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2092 return spd != limit;
2096 * sata_set_spd_needed - is SATA spd configuration needed
2097 * @ap: Port in question
2099 * Test whether the spd limit in SControl matches
2100 * @ap->sata_spd_limit. This function is used to determine
2101 * whether hardreset is necessary to apply SATA spd
2105 * Inherited from caller.
2108 * 1 if SATA spd configuration is needed, 0 otherwise.
2110 int sata_set_spd_needed(struct ata_port *ap)
2114 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2117 return __sata_set_spd_needed(ap, &scontrol);
2121 * sata_set_spd - set SATA spd according to spd limit
2122 * @ap: Port to set SATA spd for
2124 * Set SATA spd of @ap according to sata_spd_limit.
2127 * Inherited from caller.
2130 * 0 if spd doesn't need to be changed, 1 if spd has been
2131 * changed. Negative errno if SCR registers are inaccessible.
2133 int sata_set_spd(struct ata_port *ap)
2138 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2141 if (!__sata_set_spd_needed(ap, &scontrol))
2144 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2151 * This mode timing computation functionality is ported over from
2152 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2155 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2156 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2157 * for UDMA6, which is currently supported only by Maxtor drives.
2159 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2162 static const struct ata_timing ata_timing[] = {
2164 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2165 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2166 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2167 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2169 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2170 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2171 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2172 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2173 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2175 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2177 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2178 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2179 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2181 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2182 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2183 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2185 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2186 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2187 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2188 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2190 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2191 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2192 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2194 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2199 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2200 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2202 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2204 q->setup = EZ(t->setup * 1000, T);
2205 q->act8b = EZ(t->act8b * 1000, T);
2206 q->rec8b = EZ(t->rec8b * 1000, T);
2207 q->cyc8b = EZ(t->cyc8b * 1000, T);
2208 q->active = EZ(t->active * 1000, T);
2209 q->recover = EZ(t->recover * 1000, T);
2210 q->cycle = EZ(t->cycle * 1000, T);
2211 q->udma = EZ(t->udma * 1000, UT);
2214 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2215 struct ata_timing *m, unsigned int what)
2217 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2218 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2219 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2220 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2221 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2222 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2223 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2224 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2227 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2229 const struct ata_timing *t;
2231 for (t = ata_timing; t->mode != speed; t++)
2232 if (t->mode == 0xFF)
2237 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2238 struct ata_timing *t, int T, int UT)
2240 const struct ata_timing *s;
2241 struct ata_timing p;
2247 if (!(s = ata_timing_find_mode(speed)))
2250 memcpy(t, s, sizeof(*s));
2253 * If the drive is an EIDE drive, it can tell us it needs extended
2254 * PIO/MW_DMA cycle timing.
2257 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2258 memset(&p, 0, sizeof(p));
2259 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2260 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2261 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2262 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2263 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2265 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2269 * Convert the timing to bus clock counts.
2272 ata_timing_quantize(t, t, T, UT);
2275 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2276 * S.M.A.R.T * and some other commands. We have to ensure that the
2277 * DMA cycle timing is slower/equal than the fastest PIO timing.
2280 if (speed > XFER_PIO_6) {
2281 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2282 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2286 * Lengthen active & recovery time so that cycle time is correct.
2289 if (t->act8b + t->rec8b < t->cyc8b) {
2290 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2291 t->rec8b = t->cyc8b - t->act8b;
2294 if (t->active + t->recover < t->cycle) {
2295 t->active += (t->cycle - (t->active + t->recover)) / 2;
2296 t->recover = t->cycle - t->active;
2303 * ata_down_xfermask_limit - adjust dev xfer masks downward
2304 * @dev: Device to adjust xfer masks
2305 * @sel: ATA_DNXFER_* selector
2307 * Adjust xfer masks of @dev downward. Note that this function
2308 * does not apply the change. Invoking ata_set_mode() afterwards
2309 * will apply the limit.
2312 * Inherited from caller.
2315 * 0 on success, negative errno on failure
2317 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
2320 unsigned int orig_mask, xfer_mask;
2321 unsigned int pio_mask, mwdma_mask, udma_mask;
2324 quiet = !!(sel & ATA_DNXFER_QUIET);
2325 sel &= ~ATA_DNXFER_QUIET;
2327 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
2330 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
2333 case ATA_DNXFER_PIO:
2334 highbit = fls(pio_mask) - 1;
2335 pio_mask &= ~(1 << highbit);
2338 case ATA_DNXFER_DMA:
2340 highbit = fls(udma_mask) - 1;
2341 udma_mask &= ~(1 << highbit);
2344 } else if (mwdma_mask) {
2345 highbit = fls(mwdma_mask) - 1;
2346 mwdma_mask &= ~(1 << highbit);
2352 case ATA_DNXFER_40C:
2353 udma_mask &= ATA_UDMA_MASK_40C;
2356 case ATA_DNXFER_FORCE_PIO0:
2358 case ATA_DNXFER_FORCE_PIO:
2367 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
2369 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
2373 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
2374 snprintf(buf, sizeof(buf), "%s:%s",
2375 ata_mode_string(xfer_mask),
2376 ata_mode_string(xfer_mask & ATA_MASK_PIO));
2378 snprintf(buf, sizeof(buf), "%s",
2379 ata_mode_string(xfer_mask));
2381 ata_dev_printk(dev, KERN_WARNING,
2382 "limiting speed to %s\n", buf);
2385 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2391 static int ata_dev_set_mode(struct ata_device *dev)
2393 struct ata_eh_context *ehc = &dev->ap->eh_context;
2394 unsigned int err_mask;
2397 dev->flags &= ~ATA_DFLAG_PIO;
2398 if (dev->xfer_shift == ATA_SHIFT_PIO)
2399 dev->flags |= ATA_DFLAG_PIO;
2401 err_mask = ata_dev_set_xfermode(dev);
2402 /* Old CFA may refuse this command, which is just fine */
2403 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
2404 err_mask &= ~AC_ERR_DEV;
2407 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2408 "(err_mask=0x%x)\n", err_mask);
2412 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2413 rc = ata_dev_revalidate(dev, 0);
2414 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2418 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2419 dev->xfer_shift, (int)dev->xfer_mode);
2421 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2422 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2427 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2428 * @ap: port on which timings will be programmed
2429 * @r_failed_dev: out paramter for failed device
2431 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2432 * ata_set_mode() fails, pointer to the failing device is
2433 * returned in @r_failed_dev.
2436 * PCI/etc. bus probe sem.
2439 * 0 on success, negative errno otherwise
2441 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2443 struct ata_device *dev;
2444 int i, rc = 0, used_dma = 0, found = 0;
2446 /* has private set_mode? */
2447 if (ap->ops->set_mode)
2448 return ap->ops->set_mode(ap, r_failed_dev);
2450 /* step 1: calculate xfer_mask */
2451 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2452 unsigned int pio_mask, dma_mask;
2454 dev = &ap->device[i];
2456 if (!ata_dev_enabled(dev))
2459 ata_dev_xfermask(dev);
2461 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2462 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2463 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2464 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2473 /* step 2: always set host PIO timings */
2474 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2475 dev = &ap->device[i];
2476 if (!ata_dev_enabled(dev))
2479 if (!dev->pio_mode) {
2480 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2485 dev->xfer_mode = dev->pio_mode;
2486 dev->xfer_shift = ATA_SHIFT_PIO;
2487 if (ap->ops->set_piomode)
2488 ap->ops->set_piomode(ap, dev);
2491 /* step 3: set host DMA timings */
2492 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2493 dev = &ap->device[i];
2495 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2498 dev->xfer_mode = dev->dma_mode;
2499 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2500 if (ap->ops->set_dmamode)
2501 ap->ops->set_dmamode(ap, dev);
2504 /* step 4: update devices' xfer mode */
2505 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2506 dev = &ap->device[i];
2508 /* don't update suspended devices' xfer mode */
2509 if (!ata_dev_ready(dev))
2512 rc = ata_dev_set_mode(dev);
2517 /* Record simplex status. If we selected DMA then the other
2518 * host channels are not permitted to do so.
2520 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2521 ap->host->simplex_claimed = 1;
2523 /* step5: chip specific finalisation */
2524 if (ap->ops->post_set_mode)
2525 ap->ops->post_set_mode(ap);
2529 *r_failed_dev = dev;
2534 * ata_tf_to_host - issue ATA taskfile to host controller
2535 * @ap: port to which command is being issued
2536 * @tf: ATA taskfile register set
2538 * Issues ATA taskfile register set to ATA host controller,
2539 * with proper synchronization with interrupt handler and
2543 * spin_lock_irqsave(host lock)
2546 static inline void ata_tf_to_host(struct ata_port *ap,
2547 const struct ata_taskfile *tf)
2549 ap->ops->tf_load(ap, tf);
2550 ap->ops->exec_command(ap, tf);
2554 * ata_busy_sleep - sleep until BSY clears, or timeout
2555 * @ap: port containing status register to be polled
2556 * @tmout_pat: impatience timeout
2557 * @tmout: overall timeout
2559 * Sleep until ATA Status register bit BSY clears,
2560 * or a timeout occurs.
2563 * Kernel thread context (may sleep).
2566 * 0 on success, -errno otherwise.
2568 int ata_busy_sleep(struct ata_port *ap,
2569 unsigned long tmout_pat, unsigned long tmout)
2571 unsigned long timer_start, timeout;
2574 status = ata_busy_wait(ap, ATA_BUSY, 300);
2575 timer_start = jiffies;
2576 timeout = timer_start + tmout_pat;
2577 while (status != 0xff && (status & ATA_BUSY) &&
2578 time_before(jiffies, timeout)) {
2580 status = ata_busy_wait(ap, ATA_BUSY, 3);
2583 if (status != 0xff && (status & ATA_BUSY))
2584 ata_port_printk(ap, KERN_WARNING,
2585 "port is slow to respond, please be patient "
2586 "(Status 0x%x)\n", status);
2588 timeout = timer_start + tmout;
2589 while (status != 0xff && (status & ATA_BUSY) &&
2590 time_before(jiffies, timeout)) {
2592 status = ata_chk_status(ap);
2598 if (status & ATA_BUSY) {
2599 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2600 "(%lu secs, Status 0x%x)\n",
2601 tmout / HZ, status);
2608 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2610 struct ata_ioports *ioaddr = &ap->ioaddr;
2611 unsigned int dev0 = devmask & (1 << 0);
2612 unsigned int dev1 = devmask & (1 << 1);
2613 unsigned long timeout;
2615 /* if device 0 was found in ata_devchk, wait for its
2619 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2621 /* if device 1 was found in ata_devchk, wait for
2622 * register access, then wait for BSY to clear
2624 timeout = jiffies + ATA_TMOUT_BOOT;
2628 ap->ops->dev_select(ap, 1);
2629 nsect = ioread8(ioaddr->nsect_addr);
2630 lbal = ioread8(ioaddr->lbal_addr);
2631 if ((nsect == 1) && (lbal == 1))
2633 if (time_after(jiffies, timeout)) {
2637 msleep(50); /* give drive a breather */
2640 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2642 /* is all this really necessary? */
2643 ap->ops->dev_select(ap, 0);
2645 ap->ops->dev_select(ap, 1);
2647 ap->ops->dev_select(ap, 0);
2650 static unsigned int ata_bus_softreset(struct ata_port *ap,
2651 unsigned int devmask)
2653 struct ata_ioports *ioaddr = &ap->ioaddr;
2655 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2657 /* software reset. causes dev0 to be selected */
2658 iowrite8(ap->ctl, ioaddr->ctl_addr);
2659 udelay(20); /* FIXME: flush */
2660 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2661 udelay(20); /* FIXME: flush */
2662 iowrite8(ap->ctl, ioaddr->ctl_addr);
2664 /* spec mandates ">= 2ms" before checking status.
2665 * We wait 150ms, because that was the magic delay used for
2666 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2667 * between when the ATA command register is written, and then
2668 * status is checked. Because waiting for "a while" before
2669 * checking status is fine, post SRST, we perform this magic
2670 * delay here as well.
2672 * Old drivers/ide uses the 2mS rule and then waits for ready
2676 /* Before we perform post reset processing we want to see if
2677 * the bus shows 0xFF because the odd clown forgets the D7
2678 * pulldown resistor.
2680 if (ata_check_status(ap) == 0xFF)
2683 ata_bus_post_reset(ap, devmask);
2689 * ata_bus_reset - reset host port and associated ATA channel
2690 * @ap: port to reset
2692 * This is typically the first time we actually start issuing
2693 * commands to the ATA channel. We wait for BSY to clear, then
2694 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2695 * result. Determine what devices, if any, are on the channel
2696 * by looking at the device 0/1 error register. Look at the signature
2697 * stored in each device's taskfile registers, to determine if
2698 * the device is ATA or ATAPI.
2701 * PCI/etc. bus probe sem.
2702 * Obtains host lock.
2705 * Sets ATA_FLAG_DISABLED if bus reset fails.
2708 void ata_bus_reset(struct ata_port *ap)
2710 struct ata_ioports *ioaddr = &ap->ioaddr;
2711 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2713 unsigned int dev0, dev1 = 0, devmask = 0;
2715 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2717 /* determine if device 0/1 are present */
2718 if (ap->flags & ATA_FLAG_SATA_RESET)
2721 dev0 = ata_devchk(ap, 0);
2723 dev1 = ata_devchk(ap, 1);
2727 devmask |= (1 << 0);
2729 devmask |= (1 << 1);
2731 /* select device 0 again */
2732 ap->ops->dev_select(ap, 0);
2734 /* issue bus reset */
2735 if (ap->flags & ATA_FLAG_SRST)
2736 if (ata_bus_softreset(ap, devmask))
2740 * determine by signature whether we have ATA or ATAPI devices
2742 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2743 if ((slave_possible) && (err != 0x81))
2744 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2746 /* re-enable interrupts */
2747 ap->ops->irq_on(ap);
2749 /* is double-select really necessary? */
2750 if (ap->device[1].class != ATA_DEV_NONE)
2751 ap->ops->dev_select(ap, 1);
2752 if (ap->device[0].class != ATA_DEV_NONE)
2753 ap->ops->dev_select(ap, 0);
2755 /* if no devices were detected, disable this port */
2756 if ((ap->device[0].class == ATA_DEV_NONE) &&
2757 (ap->device[1].class == ATA_DEV_NONE))
2760 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2761 /* set up device control for ATA_FLAG_SATA_RESET */
2762 iowrite8(ap->ctl, ioaddr->ctl_addr);
2769 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2770 ap->ops->port_disable(ap);
2776 * sata_phy_debounce - debounce SATA phy status
2777 * @ap: ATA port to debounce SATA phy status for
2778 * @params: timing parameters { interval, duratinon, timeout } in msec
2780 * Make sure SStatus of @ap reaches stable state, determined by
2781 * holding the same value where DET is not 1 for @duration polled
2782 * every @interval, before @timeout. Timeout constraints the
2783 * beginning of the stable state. Because, after hot unplugging,
2784 * DET gets stuck at 1 on some controllers, this functions waits
2785 * until timeout then returns 0 if DET is stable at 1.
2788 * Kernel thread context (may sleep)
2791 * 0 on success, -errno on failure.
2793 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2795 unsigned long interval_msec = params[0];
2796 unsigned long duration = params[1] * HZ / 1000;
2797 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2798 unsigned long last_jiffies;
2802 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2807 last_jiffies = jiffies;
2810 msleep(interval_msec);
2811 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2817 if (cur == 1 && time_before(jiffies, timeout))
2819 if (time_after(jiffies, last_jiffies + duration))
2824 /* unstable, start over */
2826 last_jiffies = jiffies;
2829 if (time_after(jiffies, timeout))
2835 * sata_phy_resume - resume SATA phy
2836 * @ap: ATA port to resume SATA phy for
2837 * @params: timing parameters { interval, duratinon, timeout } in msec
2839 * Resume SATA phy of @ap and debounce it.
2842 * Kernel thread context (may sleep)
2845 * 0 on success, -errno on failure.
2847 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2852 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2855 scontrol = (scontrol & 0x0f0) | 0x300;
2857 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2860 /* Some PHYs react badly if SStatus is pounded immediately
2861 * after resuming. Delay 200ms before debouncing.
2865 return sata_phy_debounce(ap, params);
2868 static void ata_wait_spinup(struct ata_port *ap)
2870 struct ata_eh_context *ehc = &ap->eh_context;
2871 unsigned long end, secs;
2874 /* first, debounce phy if SATA */
2875 if (ap->cbl == ATA_CBL_SATA) {
2876 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2878 /* if debounced successfully and offline, no need to wait */
2879 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2883 /* okay, let's give the drive time to spin up */
2884 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2885 secs = ((end - jiffies) + HZ - 1) / HZ;
2887 if (time_after(jiffies, end))
2891 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2892 "(%lu secs)\n", secs);
2894 schedule_timeout_uninterruptible(end - jiffies);
2898 * ata_std_prereset - prepare for reset
2899 * @ap: ATA port to be reset
2901 * @ap is about to be reset. Initialize it.
2904 * Kernel thread context (may sleep)
2907 * 0 on success, -errno otherwise.
2909 int ata_std_prereset(struct ata_port *ap)
2911 struct ata_eh_context *ehc = &ap->eh_context;
2912 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2915 /* handle link resume & hotplug spinup */
2916 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2917 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2918 ehc->i.action |= ATA_EH_HARDRESET;
2920 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2921 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2922 ata_wait_spinup(ap);
2924 /* if we're about to do hardreset, nothing more to do */
2925 if (ehc->i.action & ATA_EH_HARDRESET)
2928 /* if SATA, resume phy */
2929 if (ap->cbl == ATA_CBL_SATA) {
2930 rc = sata_phy_resume(ap, timing);
2931 if (rc && rc != -EOPNOTSUPP) {
2932 /* phy resume failed */
2933 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2934 "link for reset (errno=%d)\n", rc);
2939 /* Wait for !BSY if the controller can wait for the first D2H
2940 * Reg FIS and we don't know that no device is attached.
2942 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2943 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2949 * ata_std_softreset - reset host port via ATA SRST
2950 * @ap: port to reset
2951 * @classes: resulting classes of attached devices
2953 * Reset host port using ATA SRST.
2956 * Kernel thread context (may sleep)
2959 * 0 on success, -errno otherwise.
2961 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2963 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2964 unsigned int devmask = 0, err_mask;
2969 if (ata_port_offline(ap)) {
2970 classes[0] = ATA_DEV_NONE;
2974 /* determine if device 0/1 are present */
2975 if (ata_devchk(ap, 0))
2976 devmask |= (1 << 0);
2977 if (slave_possible && ata_devchk(ap, 1))
2978 devmask |= (1 << 1);
2980 /* select device 0 again */
2981 ap->ops->dev_select(ap, 0);
2983 /* issue bus reset */
2984 DPRINTK("about to softreset, devmask=%x\n", devmask);
2985 err_mask = ata_bus_softreset(ap, devmask);
2987 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2992 /* determine by signature whether we have ATA or ATAPI devices */
2993 classes[0] = ata_dev_try_classify(ap, 0, &err);
2994 if (slave_possible && err != 0x81)
2995 classes[1] = ata_dev_try_classify(ap, 1, &err);
2998 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3003 * sata_port_hardreset - reset port via SATA phy reset
3004 * @ap: port to reset
3005 * @timing: timing parameters { interval, duratinon, timeout } in msec
3007 * SATA phy-reset host port using DET bits of SControl register.
3010 * Kernel thread context (may sleep)
3013 * 0 on success, -errno otherwise.
3015 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
3022 if (sata_set_spd_needed(ap)) {
3023 /* SATA spec says nothing about how to reconfigure
3024 * spd. To be on the safe side, turn off phy during
3025 * reconfiguration. This works for at least ICH7 AHCI
3028 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3031 scontrol = (scontrol & 0x0f0) | 0x304;
3033 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
3039 /* issue phy wake/reset */
3040 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3043 scontrol = (scontrol & 0x0f0) | 0x301;
3045 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
3048 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3049 * 10.4.2 says at least 1 ms.
3053 /* bring phy back */
3054 rc = sata_phy_resume(ap, timing);
3056 DPRINTK("EXIT, rc=%d\n", rc);
3061 * sata_std_hardreset - reset host port via SATA phy reset
3062 * @ap: port to reset
3063 * @class: resulting class of attached device
3065 * SATA phy-reset host port using DET bits of SControl register,
3066 * wait for !BSY and classify the attached device.
3069 * Kernel thread context (may sleep)
3072 * 0 on success, -errno otherwise.
3074 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
3076 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3082 rc = sata_port_hardreset(ap, timing);
3084 ata_port_printk(ap, KERN_ERR,
3085 "COMRESET failed (errno=%d)\n", rc);
3089 /* TODO: phy layer with polling, timeouts, etc. */
3090 if (ata_port_offline(ap)) {
3091 *class = ATA_DEV_NONE;
3092 DPRINTK("EXIT, link offline\n");
3096 /* wait a while before checking status, see SRST for more info */
3099 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
3100 ata_port_printk(ap, KERN_ERR,
3101 "COMRESET failed (device not ready)\n");
3105 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3107 *class = ata_dev_try_classify(ap, 0, NULL);
3109 DPRINTK("EXIT, class=%u\n", *class);
3114 * ata_std_postreset - standard postreset callback
3115 * @ap: the target ata_port
3116 * @classes: classes of attached devices
3118 * This function is invoked after a successful reset. Note that
3119 * the device might have been reset more than once using
3120 * different reset methods before postreset is invoked.
3123 * Kernel thread context (may sleep)
3125 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3131 /* print link status */
3132 sata_print_link_status(ap);
3135 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3136 sata_scr_write(ap, SCR_ERROR, serror);
3138 /* re-enable interrupts */
3139 if (!ap->ops->error_handler)
3140 ap->ops->irq_on(ap);
3142 /* is double-select really necessary? */
3143 if (classes[0] != ATA_DEV_NONE)
3144 ap->ops->dev_select(ap, 1);
3145 if (classes[1] != ATA_DEV_NONE)
3146 ap->ops->dev_select(ap, 0);
3148 /* bail out if no device is present */
3149 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3150 DPRINTK("EXIT, no device\n");
3154 /* set up device control */
3155 if (ap->ioaddr.ctl_addr)
3156 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3162 * ata_dev_same_device - Determine whether new ID matches configured device
3163 * @dev: device to compare against
3164 * @new_class: class of the new device
3165 * @new_id: IDENTIFY page of the new device
3167 * Compare @new_class and @new_id against @dev and determine
3168 * whether @dev is the device indicated by @new_class and
3175 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3177 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3180 const u16 *old_id = dev->id;
3181 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3182 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3185 if (dev->class != new_class) {
3186 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3187 dev->class, new_class);
3191 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3192 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3193 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3194 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3195 new_n_sectors = ata_id_n_sectors(new_id);
3197 if (strcmp(model[0], model[1])) {
3198 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3199 "'%s' != '%s'\n", model[0], model[1]);
3203 if (strcmp(serial[0], serial[1])) {
3204 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3205 "'%s' != '%s'\n", serial[0], serial[1]);
3209 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3210 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3212 (unsigned long long)dev->n_sectors,
3213 (unsigned long long)new_n_sectors);
3221 * ata_dev_revalidate - Revalidate ATA device
3222 * @dev: device to revalidate
3223 * @readid_flags: read ID flags
3225 * Re-read IDENTIFY page and make sure @dev is still attached to
3229 * Kernel thread context (may sleep)
3232 * 0 on success, negative errno otherwise
3234 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3236 unsigned int class = dev->class;
3237 u16 *id = (void *)dev->ap->sector_buf;
3240 if (!ata_dev_enabled(dev)) {
3246 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3250 /* is the device still there? */
3251 if (!ata_dev_same_device(dev, class, id)) {
3256 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3258 /* configure device according to the new ID */
3259 rc = ata_dev_configure(dev);
3264 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3268 struct ata_blacklist_entry {
3269 const char *model_num;
3270 const char *model_rev;
3271 unsigned long horkage;
3274 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3275 /* Devices with DMA related problems under Linux */
3276 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3277 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3278 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3279 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3280 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3281 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3282 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3283 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3284 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3285 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3286 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3287 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3288 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3289 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3290 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3291 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3292 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3293 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3294 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3295 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3296 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3297 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3298 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3299 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3300 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3301 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3302 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3303 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3304 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3305 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3307 /* Devices we expect to fail diagnostics */
3309 /* Devices where NCQ should be avoided */
3311 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3313 /* Devices with NCQ limits */
3319 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3321 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3322 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3323 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3325 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3326 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3328 while (ad->model_num) {
3329 if (!strcmp(ad->model_num, model_num)) {
3330 if (ad->model_rev == NULL)
3332 if (!strcmp(ad->model_rev, model_rev))
3340 static int ata_dma_blacklisted(const struct ata_device *dev)
3342 /* We don't support polling DMA.
3343 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3344 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3346 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3347 (dev->flags & ATA_DFLAG_CDB_INTR))
3349 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3353 * ata_dev_xfermask - Compute supported xfermask of the given device
3354 * @dev: Device to compute xfermask for
3356 * Compute supported xfermask of @dev and store it in
3357 * dev->*_mask. This function is responsible for applying all
3358 * known limits including host controller limits, device
3364 static void ata_dev_xfermask(struct ata_device *dev)
3366 struct ata_port *ap = dev->ap;
3367 struct ata_host *host = ap->host;
3368 unsigned long xfer_mask;
3370 /* controller modes available */
3371 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3372 ap->mwdma_mask, ap->udma_mask);
3374 /* Apply cable rule here. Don't apply it early because when
3375 * we handle hot plug the cable type can itself change.
3377 if (ap->cbl == ATA_CBL_PATA40)
3378 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3379 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3380 * host side are checked drive side as well. Cases where we know a
3381 * 40wire cable is used safely for 80 are not checked here.
3383 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3384 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3387 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3388 dev->mwdma_mask, dev->udma_mask);
3389 xfer_mask &= ata_id_xfermask(dev->id);
3392 * CFA Advanced TrueIDE timings are not allowed on a shared
3395 if (ata_dev_pair(dev)) {
3396 /* No PIO5 or PIO6 */
3397 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3398 /* No MWDMA3 or MWDMA 4 */
3399 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3402 if (ata_dma_blacklisted(dev)) {
3403 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3404 ata_dev_printk(dev, KERN_WARNING,
3405 "device is on DMA blacklist, disabling DMA\n");
3408 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3409 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3410 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3411 "other device, disabling DMA\n");
3414 if (ap->ops->mode_filter)
3415 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3417 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3418 &dev->mwdma_mask, &dev->udma_mask);
3422 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3423 * @dev: Device to which command will be sent
3425 * Issue SET FEATURES - XFER MODE command to device @dev
3429 * PCI/etc. bus probe sem.
3432 * 0 on success, AC_ERR_* mask otherwise.
3435 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3437 struct ata_taskfile tf;
3438 unsigned int err_mask;
3440 /* set up set-features taskfile */
3441 DPRINTK("set features - xfer mode\n");
3443 ata_tf_init(dev, &tf);
3444 tf.command = ATA_CMD_SET_FEATURES;
3445 tf.feature = SETFEATURES_XFER;
3446 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3447 tf.protocol = ATA_PROT_NODATA;
3448 tf.nsect = dev->xfer_mode;
3450 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3452 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3457 * ata_dev_init_params - Issue INIT DEV PARAMS command
3458 * @dev: Device to which command will be sent
3459 * @heads: Number of heads (taskfile parameter)
3460 * @sectors: Number of sectors (taskfile parameter)
3463 * Kernel thread context (may sleep)
3466 * 0 on success, AC_ERR_* mask otherwise.
3468 static unsigned int ata_dev_init_params(struct ata_device *dev,
3469 u16 heads, u16 sectors)
3471 struct ata_taskfile tf;
3472 unsigned int err_mask;
3474 /* Number of sectors per track 1-255. Number of heads 1-16 */
3475 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3476 return AC_ERR_INVALID;
3478 /* set up init dev params taskfile */
3479 DPRINTK("init dev params \n");
3481 ata_tf_init(dev, &tf);
3482 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3483 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3484 tf.protocol = ATA_PROT_NODATA;
3486 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3488 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3490 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3495 * ata_sg_clean - Unmap DMA memory associated with command
3496 * @qc: Command containing DMA memory to be released
3498 * Unmap all mapped DMA memory associated with this command.
3501 * spin_lock_irqsave(host lock)
3503 void ata_sg_clean(struct ata_queued_cmd *qc)
3505 struct ata_port *ap = qc->ap;
3506 struct scatterlist *sg = qc->__sg;
3507 int dir = qc->dma_dir;
3508 void *pad_buf = NULL;
3510 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3511 WARN_ON(sg == NULL);
3513 if (qc->flags & ATA_QCFLAG_SINGLE)
3514 WARN_ON(qc->n_elem > 1);
3516 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3518 /* if we padded the buffer out to 32-bit bound, and data
3519 * xfer direction is from-device, we must copy from the
3520 * pad buffer back into the supplied buffer
3522 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3523 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3525 if (qc->flags & ATA_QCFLAG_SG) {
3527 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3528 /* restore last sg */
3529 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3531 struct scatterlist *psg = &qc->pad_sgent;
3532 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3533 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3534 kunmap_atomic(addr, KM_IRQ0);
3538 dma_unmap_single(ap->dev,
3539 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3542 sg->length += qc->pad_len;
3544 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3545 pad_buf, qc->pad_len);
3548 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3553 * ata_fill_sg - Fill PCI IDE PRD table
3554 * @qc: Metadata associated with taskfile to be transferred
3556 * Fill PCI IDE PRD (scatter-gather) table with segments
3557 * associated with the current disk command.
3560 * spin_lock_irqsave(host lock)
3563 static void ata_fill_sg(struct ata_queued_cmd *qc)
3565 struct ata_port *ap = qc->ap;
3566 struct scatterlist *sg;
3569 WARN_ON(qc->__sg == NULL);
3570 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3573 ata_for_each_sg(sg, qc) {
3577 /* determine if physical DMA addr spans 64K boundary.
3578 * Note h/w doesn't support 64-bit, so we unconditionally
3579 * truncate dma_addr_t to u32.
3581 addr = (u32) sg_dma_address(sg);
3582 sg_len = sg_dma_len(sg);
3585 offset = addr & 0xffff;
3587 if ((offset + sg_len) > 0x10000)
3588 len = 0x10000 - offset;
3590 ap->prd[idx].addr = cpu_to_le32(addr);
3591 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3592 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3601 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3604 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3605 * @qc: Metadata associated with taskfile to check
3607 * Allow low-level driver to filter ATA PACKET commands, returning
3608 * a status indicating whether or not it is OK to use DMA for the
3609 * supplied PACKET command.
3612 * spin_lock_irqsave(host lock)
3614 * RETURNS: 0 when ATAPI DMA can be used
3617 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3619 struct ata_port *ap = qc->ap;
3620 int rc = 0; /* Assume ATAPI DMA is OK by default */
3622 if (ap->ops->check_atapi_dma)
3623 rc = ap->ops->check_atapi_dma(qc);
3628 * ata_qc_prep - Prepare taskfile for submission
3629 * @qc: Metadata associated with taskfile to be prepared
3631 * Prepare ATA taskfile for submission.
3634 * spin_lock_irqsave(host lock)
3636 void ata_qc_prep(struct ata_queued_cmd *qc)
3638 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3644 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3647 * ata_sg_init_one - Associate command with memory buffer
3648 * @qc: Command to be associated
3649 * @buf: Memory buffer
3650 * @buflen: Length of memory buffer, in bytes.
3652 * Initialize the data-related elements of queued_cmd @qc
3653 * to point to a single memory buffer, @buf of byte length @buflen.
3656 * spin_lock_irqsave(host lock)
3659 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3661 qc->flags |= ATA_QCFLAG_SINGLE;
3663 qc->__sg = &qc->sgent;
3665 qc->orig_n_elem = 1;
3667 qc->nbytes = buflen;
3669 sg_init_one(&qc->sgent, buf, buflen);
3673 * ata_sg_init - Associate command with scatter-gather table.
3674 * @qc: Command to be associated
3675 * @sg: Scatter-gather table.
3676 * @n_elem: Number of elements in s/g table.
3678 * Initialize the data-related elements of queued_cmd @qc
3679 * to point to a scatter-gather table @sg, containing @n_elem
3683 * spin_lock_irqsave(host lock)
3686 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3687 unsigned int n_elem)
3689 qc->flags |= ATA_QCFLAG_SG;
3691 qc->n_elem = n_elem;
3692 qc->orig_n_elem = n_elem;
3696 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3697 * @qc: Command with memory buffer to be mapped.
3699 * DMA-map the memory buffer associated with queued_cmd @qc.
3702 * spin_lock_irqsave(host lock)
3705 * Zero on success, negative on error.
3708 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3710 struct ata_port *ap = qc->ap;
3711 int dir = qc->dma_dir;
3712 struct scatterlist *sg = qc->__sg;
3713 dma_addr_t dma_address;
3716 /* we must lengthen transfers to end on a 32-bit boundary */
3717 qc->pad_len = sg->length & 3;
3719 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3720 struct scatterlist *psg = &qc->pad_sgent;
3722 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3724 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3726 if (qc->tf.flags & ATA_TFLAG_WRITE)
3727 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3730 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3731 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3733 sg->length -= qc->pad_len;
3734 if (sg->length == 0)
3737 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3738 sg->length, qc->pad_len);
3746 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3748 if (dma_mapping_error(dma_address)) {
3750 sg->length += qc->pad_len;
3754 sg_dma_address(sg) = dma_address;
3755 sg_dma_len(sg) = sg->length;
3758 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3759 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3765 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3766 * @qc: Command with scatter-gather table to be mapped.
3768 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3771 * spin_lock_irqsave(host lock)
3774 * Zero on success, negative on error.
3778 static int ata_sg_setup(struct ata_queued_cmd *qc)
3780 struct ata_port *ap = qc->ap;
3781 struct scatterlist *sg = qc->__sg;
3782 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3783 int n_elem, pre_n_elem, dir, trim_sg = 0;
3785 VPRINTK("ENTER, ata%u\n", ap->id);
3786 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3788 /* we must lengthen transfers to end on a 32-bit boundary */
3789 qc->pad_len = lsg->length & 3;
3791 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3792 struct scatterlist *psg = &qc->pad_sgent;
3793 unsigned int offset;
3795 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3797 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3800 * psg->page/offset are used to copy to-be-written
3801 * data in this function or read data in ata_sg_clean.
3803 offset = lsg->offset + lsg->length - qc->pad_len;
3804 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3805 psg->offset = offset_in_page(offset);
3807 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3808 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3809 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3810 kunmap_atomic(addr, KM_IRQ0);
3813 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3814 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3816 lsg->length -= qc->pad_len;
3817 if (lsg->length == 0)
3820 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3821 qc->n_elem - 1, lsg->length, qc->pad_len);
3824 pre_n_elem = qc->n_elem;
3825 if (trim_sg && pre_n_elem)
3834 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3836 /* restore last sg */
3837 lsg->length += qc->pad_len;
3841 DPRINTK("%d sg elements mapped\n", n_elem);
3844 qc->n_elem = n_elem;
3850 * swap_buf_le16 - swap halves of 16-bit words in place
3851 * @buf: Buffer to swap
3852 * @buf_words: Number of 16-bit words in buffer.
3854 * Swap halves of 16-bit words if needed to convert from
3855 * little-endian byte order to native cpu byte order, or
3859 * Inherited from caller.
3861 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3866 for (i = 0; i < buf_words; i++)
3867 buf[i] = le16_to_cpu(buf[i]);
3868 #endif /* __BIG_ENDIAN */
3872 * ata_data_xfer - Transfer data by PIO
3873 * @adev: device to target
3875 * @buflen: buffer length
3876 * @write_data: read/write
3878 * Transfer data from/to the device data register by PIO.
3881 * Inherited from caller.
3883 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
3884 unsigned int buflen, int write_data)
3886 struct ata_port *ap = adev->ap;
3887 unsigned int words = buflen >> 1;
3889 /* Transfer multiple of 2 bytes */
3891 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
3893 ioread16_rep(ap->ioaddr.data_addr, buf, words);
3895 /* Transfer trailing 1 byte, if any. */
3896 if (unlikely(buflen & 0x01)) {
3897 u16 align_buf[1] = { 0 };
3898 unsigned char *trailing_buf = buf + buflen - 1;
3901 memcpy(align_buf, trailing_buf, 1);
3902 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3904 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
3905 memcpy(trailing_buf, align_buf, 1);
3911 * ata_data_xfer_noirq - Transfer data by PIO
3912 * @adev: device to target
3914 * @buflen: buffer length
3915 * @write_data: read/write
3917 * Transfer data from/to the device data register by PIO. Do the
3918 * transfer with interrupts disabled.
3921 * Inherited from caller.
3923 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3924 unsigned int buflen, int write_data)
3926 unsigned long flags;
3927 local_irq_save(flags);
3928 ata_data_xfer(adev, buf, buflen, write_data);
3929 local_irq_restore(flags);
3934 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3935 * @qc: Command on going
3937 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3940 * Inherited from caller.
3943 static void ata_pio_sector(struct ata_queued_cmd *qc)
3945 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3946 struct scatterlist *sg = qc->__sg;
3947 struct ata_port *ap = qc->ap;
3949 unsigned int offset;
3952 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE)
3953 ap->hsm_task_state = HSM_ST_LAST;
3955 page = sg[qc->cursg].page;
3956 offset = sg[qc->cursg].offset + qc->cursg_ofs;
3958 /* get the current page and offset */
3959 page = nth_page(page, (offset >> PAGE_SHIFT));
3960 offset %= PAGE_SIZE;
3962 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3964 if (PageHighMem(page)) {
3965 unsigned long flags;
3967 /* FIXME: use a bounce buffer */
3968 local_irq_save(flags);
3969 buf = kmap_atomic(page, KM_IRQ0);
3971 /* do the actual data transfer */
3972 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3974 kunmap_atomic(buf, KM_IRQ0);
3975 local_irq_restore(flags);
3977 buf = page_address(page);
3978 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3981 qc->curbytes += ATA_SECT_SIZE;
3982 qc->cursg_ofs += ATA_SECT_SIZE;
3984 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
3991 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3992 * @qc: Command on going
3994 * Transfer one or many ATA_SECT_SIZE of data from/to the
3995 * ATA device for the DRQ request.
3998 * Inherited from caller.
4001 static void ata_pio_sectors(struct ata_queued_cmd *qc)
4003 if (is_multi_taskfile(&qc->tf)) {
4004 /* READ/WRITE MULTIPLE */
4007 WARN_ON(qc->dev->multi_count == 0);
4009 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE,
4010 qc->dev->multi_count);
4018 * atapi_send_cdb - Write CDB bytes to hardware
4019 * @ap: Port to which ATAPI device is attached.
4020 * @qc: Taskfile currently active
4022 * When device has indicated its readiness to accept
4023 * a CDB, this function is called. Send the CDB.
4029 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
4032 DPRINTK("send cdb\n");
4033 WARN_ON(qc->dev->cdb_len < 12);
4035 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
4036 ata_altstatus(ap); /* flush */
4038 switch (qc->tf.protocol) {
4039 case ATA_PROT_ATAPI:
4040 ap->hsm_task_state = HSM_ST;
4042 case ATA_PROT_ATAPI_NODATA:
4043 ap->hsm_task_state = HSM_ST_LAST;
4045 case ATA_PROT_ATAPI_DMA:
4046 ap->hsm_task_state = HSM_ST_LAST;
4047 /* initiate bmdma */
4048 ap->ops->bmdma_start(qc);
4054 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4055 * @qc: Command on going
4056 * @bytes: number of bytes
4058 * Transfer Transfer data from/to the ATAPI device.
4061 * Inherited from caller.
4065 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4067 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4068 struct scatterlist *sg = qc->__sg;
4069 struct ata_port *ap = qc->ap;
4072 unsigned int offset, count;
4074 if (qc->curbytes + bytes >= qc->nbytes)
4075 ap->hsm_task_state = HSM_ST_LAST;
4078 if (unlikely(qc->cursg >= qc->n_elem)) {
4080 * The end of qc->sg is reached and the device expects
4081 * more data to transfer. In order not to overrun qc->sg
4082 * and fulfill length specified in the byte count register,
4083 * - for read case, discard trailing data from the device
4084 * - for write case, padding zero data to the device
4086 u16 pad_buf[1] = { 0 };
4087 unsigned int words = bytes >> 1;
4090 if (words) /* warning if bytes > 1 */
4091 ata_dev_printk(qc->dev, KERN_WARNING,
4092 "%u bytes trailing data\n", bytes);
4094 for (i = 0; i < words; i++)
4095 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4097 ap->hsm_task_state = HSM_ST_LAST;
4101 sg = &qc->__sg[qc->cursg];
4104 offset = sg->offset + qc->cursg_ofs;
4106 /* get the current page and offset */
4107 page = nth_page(page, (offset >> PAGE_SHIFT));
4108 offset %= PAGE_SIZE;
4110 /* don't overrun current sg */
4111 count = min(sg->length - qc->cursg_ofs, bytes);
4113 /* don't cross page boundaries */
4114 count = min(count, (unsigned int)PAGE_SIZE - offset);
4116 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4118 if (PageHighMem(page)) {
4119 unsigned long flags;
4121 /* FIXME: use bounce buffer */
4122 local_irq_save(flags);
4123 buf = kmap_atomic(page, KM_IRQ0);
4125 /* do the actual data transfer */
4126 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4128 kunmap_atomic(buf, KM_IRQ0);
4129 local_irq_restore(flags);
4131 buf = page_address(page);
4132 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4136 qc->curbytes += count;
4137 qc->cursg_ofs += count;
4139 if (qc->cursg_ofs == sg->length) {
4149 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4150 * @qc: Command on going
4152 * Transfer Transfer data from/to the ATAPI device.
4155 * Inherited from caller.
4158 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4160 struct ata_port *ap = qc->ap;
4161 struct ata_device *dev = qc->dev;
4162 unsigned int ireason, bc_lo, bc_hi, bytes;
4163 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4165 /* Abuse qc->result_tf for temp storage of intermediate TF
4166 * here to save some kernel stack usage.
4167 * For normal completion, qc->result_tf is not relevant. For
4168 * error, qc->result_tf is later overwritten by ata_qc_complete().
4169 * So, the correctness of qc->result_tf is not affected.
4171 ap->ops->tf_read(ap, &qc->result_tf);
4172 ireason = qc->result_tf.nsect;
4173 bc_lo = qc->result_tf.lbam;
4174 bc_hi = qc->result_tf.lbah;
4175 bytes = (bc_hi << 8) | bc_lo;
4177 /* shall be cleared to zero, indicating xfer of data */
4178 if (ireason & (1 << 0))
4181 /* make sure transfer direction matches expected */
4182 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4183 if (do_write != i_write)
4186 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4188 __atapi_pio_bytes(qc, bytes);
4193 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4194 qc->err_mask |= AC_ERR_HSM;
4195 ap->hsm_task_state = HSM_ST_ERR;
4199 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4200 * @ap: the target ata_port
4204 * 1 if ok in workqueue, 0 otherwise.
4207 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4209 if (qc->tf.flags & ATA_TFLAG_POLLING)
4212 if (ap->hsm_task_state == HSM_ST_FIRST) {
4213 if (qc->tf.protocol == ATA_PROT_PIO &&
4214 (qc->tf.flags & ATA_TFLAG_WRITE))
4217 if (is_atapi_taskfile(&qc->tf) &&
4218 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4226 * ata_hsm_qc_complete - finish a qc running on standard HSM
4227 * @qc: Command to complete
4228 * @in_wq: 1 if called from workqueue, 0 otherwise
4230 * Finish @qc which is running on standard HSM.
4233 * If @in_wq is zero, spin_lock_irqsave(host lock).
4234 * Otherwise, none on entry and grabs host lock.
4236 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4238 struct ata_port *ap = qc->ap;
4239 unsigned long flags;
4241 if (ap->ops->error_handler) {
4243 spin_lock_irqsave(ap->lock, flags);
4245 /* EH might have kicked in while host lock is
4248 qc = ata_qc_from_tag(ap, qc->tag);
4250 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4251 ap->ops->irq_on(ap);
4252 ata_qc_complete(qc);
4254 ata_port_freeze(ap);
4257 spin_unlock_irqrestore(ap->lock, flags);
4259 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4260 ata_qc_complete(qc);
4262 ata_port_freeze(ap);
4266 spin_lock_irqsave(ap->lock, flags);
4267 ap->ops->irq_on(ap);
4268 ata_qc_complete(qc);
4269 spin_unlock_irqrestore(ap->lock, flags);
4271 ata_qc_complete(qc);
4274 ata_altstatus(ap); /* flush */
4278 * ata_hsm_move - move the HSM to the next state.
4279 * @ap: the target ata_port
4281 * @status: current device status
4282 * @in_wq: 1 if called from workqueue, 0 otherwise
4285 * 1 when poll next status needed, 0 otherwise.
4287 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4288 u8 status, int in_wq)
4290 unsigned long flags = 0;
4293 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4295 /* Make sure ata_qc_issue_prot() does not throw things
4296 * like DMA polling into the workqueue. Notice that
4297 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4299 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4302 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4303 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4305 switch (ap->hsm_task_state) {
4307 /* Send first data block or PACKET CDB */
4309 /* If polling, we will stay in the work queue after
4310 * sending the data. Otherwise, interrupt handler
4311 * takes over after sending the data.
4313 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4315 /* check device status */
4316 if (unlikely((status & ATA_DRQ) == 0)) {
4317 /* handle BSY=0, DRQ=0 as error */
4318 if (likely(status & (ATA_ERR | ATA_DF)))
4319 /* device stops HSM for abort/error */
4320 qc->err_mask |= AC_ERR_DEV;
4322 /* HSM violation. Let EH handle this */
4323 qc->err_mask |= AC_ERR_HSM;
4325 ap->hsm_task_state = HSM_ST_ERR;
4329 /* Device should not ask for data transfer (DRQ=1)
4330 * when it finds something wrong.
4331 * We ignore DRQ here and stop the HSM by
4332 * changing hsm_task_state to HSM_ST_ERR and
4333 * let the EH abort the command or reset the device.
4335 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4336 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4338 qc->err_mask |= AC_ERR_HSM;
4339 ap->hsm_task_state = HSM_ST_ERR;
4343 /* Send the CDB (atapi) or the first data block (ata pio out).
4344 * During the state transition, interrupt handler shouldn't
4345 * be invoked before the data transfer is complete and
4346 * hsm_task_state is changed. Hence, the following locking.
4349 spin_lock_irqsave(ap->lock, flags);
4351 if (qc->tf.protocol == ATA_PROT_PIO) {
4352 /* PIO data out protocol.
4353 * send first data block.
4356 /* ata_pio_sectors() might change the state
4357 * to HSM_ST_LAST. so, the state is changed here
4358 * before ata_pio_sectors().
4360 ap->hsm_task_state = HSM_ST;
4361 ata_pio_sectors(qc);
4362 ata_altstatus(ap); /* flush */
4365 atapi_send_cdb(ap, qc);
4368 spin_unlock_irqrestore(ap->lock, flags);
4370 /* if polling, ata_pio_task() handles the rest.
4371 * otherwise, interrupt handler takes over from here.
4376 /* complete command or read/write the data register */
4377 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4378 /* ATAPI PIO protocol */
4379 if ((status & ATA_DRQ) == 0) {
4380 /* No more data to transfer or device error.
4381 * Device error will be tagged in HSM_ST_LAST.
4383 ap->hsm_task_state = HSM_ST_LAST;
4387 /* Device should not ask for data transfer (DRQ=1)
4388 * when it finds something wrong.
4389 * We ignore DRQ here and stop the HSM by
4390 * changing hsm_task_state to HSM_ST_ERR and
4391 * let the EH abort the command or reset the device.
4393 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4394 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4396 qc->err_mask |= AC_ERR_HSM;
4397 ap->hsm_task_state = HSM_ST_ERR;
4401 atapi_pio_bytes(qc);
4403 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4404 /* bad ireason reported by device */
4408 /* ATA PIO protocol */
4409 if (unlikely((status & ATA_DRQ) == 0)) {
4410 /* handle BSY=0, DRQ=0 as error */
4411 if (likely(status & (ATA_ERR | ATA_DF)))
4412 /* device stops HSM for abort/error */
4413 qc->err_mask |= AC_ERR_DEV;
4415 /* HSM violation. Let EH handle this.
4416 * Phantom devices also trigger this
4417 * condition. Mark hint.
4419 qc->err_mask |= AC_ERR_HSM |
4422 ap->hsm_task_state = HSM_ST_ERR;
4426 /* For PIO reads, some devices may ask for
4427 * data transfer (DRQ=1) alone with ERR=1.
4428 * We respect DRQ here and transfer one
4429 * block of junk data before changing the
4430 * hsm_task_state to HSM_ST_ERR.
4432 * For PIO writes, ERR=1 DRQ=1 doesn't make
4433 * sense since the data block has been
4434 * transferred to the device.
4436 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4437 /* data might be corrputed */
4438 qc->err_mask |= AC_ERR_DEV;
4440 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4441 ata_pio_sectors(qc);
4443 status = ata_wait_idle(ap);
4446 if (status & (ATA_BUSY | ATA_DRQ))
4447 qc->err_mask |= AC_ERR_HSM;
4449 /* ata_pio_sectors() might change the
4450 * state to HSM_ST_LAST. so, the state
4451 * is changed after ata_pio_sectors().
4453 ap->hsm_task_state = HSM_ST_ERR;
4457 ata_pio_sectors(qc);
4459 if (ap->hsm_task_state == HSM_ST_LAST &&
4460 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4463 status = ata_wait_idle(ap);
4468 ata_altstatus(ap); /* flush */
4473 if (unlikely(!ata_ok(status))) {
4474 qc->err_mask |= __ac_err_mask(status);
4475 ap->hsm_task_state = HSM_ST_ERR;
4479 /* no more data to transfer */
4480 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4481 ap->id, qc->dev->devno, status);
4483 WARN_ON(qc->err_mask);
4485 ap->hsm_task_state = HSM_ST_IDLE;
4487 /* complete taskfile transaction */
4488 ata_hsm_qc_complete(qc, in_wq);
4494 /* make sure qc->err_mask is available to
4495 * know what's wrong and recover
4497 WARN_ON(qc->err_mask == 0);
4499 ap->hsm_task_state = HSM_ST_IDLE;
4501 /* complete taskfile transaction */
4502 ata_hsm_qc_complete(qc, in_wq);
4514 static void ata_pio_task(struct work_struct *work)
4516 struct ata_port *ap =
4517 container_of(work, struct ata_port, port_task.work);
4518 struct ata_queued_cmd *qc = ap->port_task_data;
4523 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4526 * This is purely heuristic. This is a fast path.
4527 * Sometimes when we enter, BSY will be cleared in
4528 * a chk-status or two. If not, the drive is probably seeking
4529 * or something. Snooze for a couple msecs, then
4530 * chk-status again. If still busy, queue delayed work.
4532 status = ata_busy_wait(ap, ATA_BUSY, 5);
4533 if (status & ATA_BUSY) {
4535 status = ata_busy_wait(ap, ATA_BUSY, 10);
4536 if (status & ATA_BUSY) {
4537 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4543 poll_next = ata_hsm_move(ap, qc, status, 1);
4545 /* another command or interrupt handler
4546 * may be running at this point.
4553 * ata_qc_new - Request an available ATA command, for queueing
4554 * @ap: Port associated with device @dev
4555 * @dev: Device from whom we request an available command structure
4561 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4563 struct ata_queued_cmd *qc = NULL;
4566 /* no command while frozen */
4567 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4570 /* the last tag is reserved for internal command. */
4571 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4572 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4573 qc = __ata_qc_from_tag(ap, i);
4584 * ata_qc_new_init - Request an available ATA command, and initialize it
4585 * @dev: Device from whom we request an available command structure
4591 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4593 struct ata_port *ap = dev->ap;
4594 struct ata_queued_cmd *qc;
4596 qc = ata_qc_new(ap);
4609 * ata_qc_free - free unused ata_queued_cmd
4610 * @qc: Command to complete
4612 * Designed to free unused ata_queued_cmd object
4613 * in case something prevents using it.
4616 * spin_lock_irqsave(host lock)
4618 void ata_qc_free(struct ata_queued_cmd *qc)
4620 struct ata_port *ap = qc->ap;
4623 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4627 if (likely(ata_tag_valid(tag))) {
4628 qc->tag = ATA_TAG_POISON;
4629 clear_bit(tag, &ap->qc_allocated);
4633 void __ata_qc_complete(struct ata_queued_cmd *qc)
4635 struct ata_port *ap = qc->ap;
4637 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4638 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4640 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4643 /* command should be marked inactive atomically with qc completion */
4644 if (qc->tf.protocol == ATA_PROT_NCQ)
4645 ap->sactive &= ~(1 << qc->tag);
4647 ap->active_tag = ATA_TAG_POISON;
4649 /* atapi: mark qc as inactive to prevent the interrupt handler
4650 * from completing the command twice later, before the error handler
4651 * is called. (when rc != 0 and atapi request sense is needed)
4653 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4654 ap->qc_active &= ~(1 << qc->tag);
4656 /* call completion callback */
4657 qc->complete_fn(qc);
4660 static void fill_result_tf(struct ata_queued_cmd *qc)
4662 struct ata_port *ap = qc->ap;
4664 ap->ops->tf_read(ap, &qc->result_tf);
4665 qc->result_tf.flags = qc->tf.flags;
4669 * ata_qc_complete - Complete an active ATA command
4670 * @qc: Command to complete
4671 * @err_mask: ATA Status register contents
4673 * Indicate to the mid and upper layers that an ATA
4674 * command has completed, with either an ok or not-ok status.
4677 * spin_lock_irqsave(host lock)
4679 void ata_qc_complete(struct ata_queued_cmd *qc)
4681 struct ata_port *ap = qc->ap;
4683 /* XXX: New EH and old EH use different mechanisms to
4684 * synchronize EH with regular execution path.
4686 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4687 * Normal execution path is responsible for not accessing a
4688 * failed qc. libata core enforces the rule by returning NULL
4689 * from ata_qc_from_tag() for failed qcs.
4691 * Old EH depends on ata_qc_complete() nullifying completion
4692 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4693 * not synchronize with interrupt handler. Only PIO task is
4696 if (ap->ops->error_handler) {
4697 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4699 if (unlikely(qc->err_mask))
4700 qc->flags |= ATA_QCFLAG_FAILED;
4702 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4703 if (!ata_tag_internal(qc->tag)) {
4704 /* always fill result TF for failed qc */
4706 ata_qc_schedule_eh(qc);
4711 /* read result TF if requested */
4712 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4715 __ata_qc_complete(qc);
4717 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4720 /* read result TF if failed or requested */
4721 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4724 __ata_qc_complete(qc);
4729 * ata_qc_complete_multiple - Complete multiple qcs successfully
4730 * @ap: port in question
4731 * @qc_active: new qc_active mask
4732 * @finish_qc: LLDD callback invoked before completing a qc
4734 * Complete in-flight commands. This functions is meant to be
4735 * called from low-level driver's interrupt routine to complete
4736 * requests normally. ap->qc_active and @qc_active is compared
4737 * and commands are completed accordingly.
4740 * spin_lock_irqsave(host lock)
4743 * Number of completed commands on success, -errno otherwise.
4745 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4746 void (*finish_qc)(struct ata_queued_cmd *))
4752 done_mask = ap->qc_active ^ qc_active;
4754 if (unlikely(done_mask & qc_active)) {
4755 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4756 "(%08x->%08x)\n", ap->qc_active, qc_active);
4760 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4761 struct ata_queued_cmd *qc;
4763 if (!(done_mask & (1 << i)))
4766 if ((qc = ata_qc_from_tag(ap, i))) {
4769 ata_qc_complete(qc);
4777 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4779 struct ata_port *ap = qc->ap;
4781 switch (qc->tf.protocol) {
4784 case ATA_PROT_ATAPI_DMA:
4787 case ATA_PROT_ATAPI:
4789 if (ap->flags & ATA_FLAG_PIO_DMA)
4802 * ata_qc_issue - issue taskfile to device
4803 * @qc: command to issue to device
4805 * Prepare an ATA command to submission to device.
4806 * This includes mapping the data into a DMA-able
4807 * area, filling in the S/G table, and finally
4808 * writing the taskfile to hardware, starting the command.
4811 * spin_lock_irqsave(host lock)
4813 void ata_qc_issue(struct ata_queued_cmd *qc)
4815 struct ata_port *ap = qc->ap;
4817 /* Make sure only one non-NCQ command is outstanding. The
4818 * check is skipped for old EH because it reuses active qc to
4819 * request ATAPI sense.
4821 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4823 if (qc->tf.protocol == ATA_PROT_NCQ) {
4824 WARN_ON(ap->sactive & (1 << qc->tag));
4825 ap->sactive |= 1 << qc->tag;
4827 WARN_ON(ap->sactive);
4828 ap->active_tag = qc->tag;
4831 qc->flags |= ATA_QCFLAG_ACTIVE;
4832 ap->qc_active |= 1 << qc->tag;
4834 if (ata_should_dma_map(qc)) {
4835 if (qc->flags & ATA_QCFLAG_SG) {
4836 if (ata_sg_setup(qc))
4838 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4839 if (ata_sg_setup_one(qc))
4843 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4846 ap->ops->qc_prep(qc);
4848 qc->err_mask |= ap->ops->qc_issue(qc);
4849 if (unlikely(qc->err_mask))
4854 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4855 qc->err_mask |= AC_ERR_SYSTEM;
4857 ata_qc_complete(qc);
4861 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4862 * @qc: command to issue to device
4864 * Using various libata functions and hooks, this function
4865 * starts an ATA command. ATA commands are grouped into
4866 * classes called "protocols", and issuing each type of protocol
4867 * is slightly different.
4869 * May be used as the qc_issue() entry in ata_port_operations.
4872 * spin_lock_irqsave(host lock)
4875 * Zero on success, AC_ERR_* mask on failure
4878 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4880 struct ata_port *ap = qc->ap;
4882 /* Use polling pio if the LLD doesn't handle
4883 * interrupt driven pio and atapi CDB interrupt.
4885 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4886 switch (qc->tf.protocol) {
4888 case ATA_PROT_NODATA:
4889 case ATA_PROT_ATAPI:
4890 case ATA_PROT_ATAPI_NODATA:
4891 qc->tf.flags |= ATA_TFLAG_POLLING;
4893 case ATA_PROT_ATAPI_DMA:
4894 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4895 /* see ata_dma_blacklisted() */
4903 /* Some controllers show flaky interrupt behavior after
4904 * setting xfer mode. Use polling instead.
4906 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
4907 qc->tf.feature == SETFEATURES_XFER) &&
4908 (ap->flags & ATA_FLAG_SETXFER_POLLING))
4909 qc->tf.flags |= ATA_TFLAG_POLLING;
4911 /* select the device */
4912 ata_dev_select(ap, qc->dev->devno, 1, 0);
4914 /* start the command */
4915 switch (qc->tf.protocol) {
4916 case ATA_PROT_NODATA:
4917 if (qc->tf.flags & ATA_TFLAG_POLLING)
4918 ata_qc_set_polling(qc);
4920 ata_tf_to_host(ap, &qc->tf);
4921 ap->hsm_task_state = HSM_ST_LAST;
4923 if (qc->tf.flags & ATA_TFLAG_POLLING)
4924 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4929 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4931 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4932 ap->ops->bmdma_setup(qc); /* set up bmdma */
4933 ap->ops->bmdma_start(qc); /* initiate bmdma */
4934 ap->hsm_task_state = HSM_ST_LAST;
4938 if (qc->tf.flags & ATA_TFLAG_POLLING)
4939 ata_qc_set_polling(qc);
4941 ata_tf_to_host(ap, &qc->tf);
4943 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4944 /* PIO data out protocol */
4945 ap->hsm_task_state = HSM_ST_FIRST;
4946 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4948 /* always send first data block using
4949 * the ata_pio_task() codepath.
4952 /* PIO data in protocol */
4953 ap->hsm_task_state = HSM_ST;
4955 if (qc->tf.flags & ATA_TFLAG_POLLING)
4956 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4958 /* if polling, ata_pio_task() handles the rest.
4959 * otherwise, interrupt handler takes over from here.
4965 case ATA_PROT_ATAPI:
4966 case ATA_PROT_ATAPI_NODATA:
4967 if (qc->tf.flags & ATA_TFLAG_POLLING)
4968 ata_qc_set_polling(qc);
4970 ata_tf_to_host(ap, &qc->tf);
4972 ap->hsm_task_state = HSM_ST_FIRST;
4974 /* send cdb by polling if no cdb interrupt */
4975 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4976 (qc->tf.flags & ATA_TFLAG_POLLING))
4977 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4980 case ATA_PROT_ATAPI_DMA:
4981 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4983 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4984 ap->ops->bmdma_setup(qc); /* set up bmdma */
4985 ap->hsm_task_state = HSM_ST_FIRST;
4987 /* send cdb by polling if no cdb interrupt */
4988 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4989 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4994 return AC_ERR_SYSTEM;
5001 * ata_host_intr - Handle host interrupt for given (port, task)
5002 * @ap: Port on which interrupt arrived (possibly...)
5003 * @qc: Taskfile currently active in engine
5005 * Handle host interrupt for given queued command. Currently,
5006 * only DMA interrupts are handled. All other commands are
5007 * handled via polling with interrupts disabled (nIEN bit).
5010 * spin_lock_irqsave(host lock)
5013 * One if interrupt was handled, zero if not (shared irq).
5016 inline unsigned int ata_host_intr (struct ata_port *ap,
5017 struct ata_queued_cmd *qc)
5019 struct ata_eh_info *ehi = &ap->eh_info;
5020 u8 status, host_stat = 0;
5022 VPRINTK("ata%u: protocol %d task_state %d\n",
5023 ap->id, qc->tf.protocol, ap->hsm_task_state);
5025 /* Check whether we are expecting interrupt in this state */
5026 switch (ap->hsm_task_state) {
5028 /* Some pre-ATAPI-4 devices assert INTRQ
5029 * at this state when ready to receive CDB.
5032 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
5033 * The flag was turned on only for atapi devices.
5034 * No need to check is_atapi_taskfile(&qc->tf) again.
5036 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5040 if (qc->tf.protocol == ATA_PROT_DMA ||
5041 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
5042 /* check status of DMA engine */
5043 host_stat = ap->ops->bmdma_status(ap);
5044 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
5046 /* if it's not our irq... */
5047 if (!(host_stat & ATA_DMA_INTR))
5050 /* before we do anything else, clear DMA-Start bit */
5051 ap->ops->bmdma_stop(qc);
5053 if (unlikely(host_stat & ATA_DMA_ERR)) {
5054 /* error when transfering data to/from memory */
5055 qc->err_mask |= AC_ERR_HOST_BUS;
5056 ap->hsm_task_state = HSM_ST_ERR;
5066 /* check altstatus */
5067 status = ata_altstatus(ap);
5068 if (status & ATA_BUSY)
5071 /* check main status, clearing INTRQ */
5072 status = ata_chk_status(ap);
5073 if (unlikely(status & ATA_BUSY))
5076 /* ack bmdma irq events */
5077 ap->ops->irq_clear(ap);
5079 ata_hsm_move(ap, qc, status, 0);
5081 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5082 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5083 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5085 return 1; /* irq handled */
5088 ap->stats.idle_irq++;
5091 if ((ap->stats.idle_irq % 1000) == 0) {
5092 ap->ops->irq_ack(ap, 0); /* debug trap */
5093 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5097 return 0; /* irq not handled */
5101 * ata_interrupt - Default ATA host interrupt handler
5102 * @irq: irq line (unused)
5103 * @dev_instance: pointer to our ata_host information structure
5105 * Default interrupt handler for PCI IDE devices. Calls
5106 * ata_host_intr() for each port that is not disabled.
5109 * Obtains host lock during operation.
5112 * IRQ_NONE or IRQ_HANDLED.
5115 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5117 struct ata_host *host = dev_instance;
5119 unsigned int handled = 0;
5120 unsigned long flags;
5122 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5123 spin_lock_irqsave(&host->lock, flags);
5125 for (i = 0; i < host->n_ports; i++) {
5126 struct ata_port *ap;
5128 ap = host->ports[i];
5130 !(ap->flags & ATA_FLAG_DISABLED)) {
5131 struct ata_queued_cmd *qc;
5133 qc = ata_qc_from_tag(ap, ap->active_tag);
5134 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5135 (qc->flags & ATA_QCFLAG_ACTIVE))
5136 handled |= ata_host_intr(ap, qc);
5140 spin_unlock_irqrestore(&host->lock, flags);
5142 return IRQ_RETVAL(handled);
5146 * sata_scr_valid - test whether SCRs are accessible
5147 * @ap: ATA port to test SCR accessibility for
5149 * Test whether SCRs are accessible for @ap.
5155 * 1 if SCRs are accessible, 0 otherwise.
5157 int sata_scr_valid(struct ata_port *ap)
5159 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5163 * sata_scr_read - read SCR register of the specified port
5164 * @ap: ATA port to read SCR for
5166 * @val: Place to store read value
5168 * Read SCR register @reg of @ap into *@val. This function is
5169 * guaranteed to succeed if the cable type of the port is SATA
5170 * and the port implements ->scr_read.
5176 * 0 on success, negative errno on failure.
5178 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5180 if (sata_scr_valid(ap)) {
5181 *val = ap->ops->scr_read(ap, reg);
5188 * sata_scr_write - write SCR register of the specified port
5189 * @ap: ATA port to write SCR for
5190 * @reg: SCR to write
5191 * @val: value to write
5193 * Write @val to SCR register @reg of @ap. This function is
5194 * guaranteed to succeed if the cable type of the port is SATA
5195 * and the port implements ->scr_read.
5201 * 0 on success, negative errno on failure.
5203 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5205 if (sata_scr_valid(ap)) {
5206 ap->ops->scr_write(ap, reg, val);
5213 * sata_scr_write_flush - write SCR register of the specified port and flush
5214 * @ap: ATA port to write SCR for
5215 * @reg: SCR to write
5216 * @val: value to write
5218 * This function is identical to sata_scr_write() except that this
5219 * function performs flush after writing to the register.
5225 * 0 on success, negative errno on failure.
5227 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5229 if (sata_scr_valid(ap)) {
5230 ap->ops->scr_write(ap, reg, val);
5231 ap->ops->scr_read(ap, reg);
5238 * ata_port_online - test whether the given port is online
5239 * @ap: ATA port to test
5241 * Test whether @ap is online. Note that this function returns 0
5242 * if online status of @ap cannot be obtained, so
5243 * ata_port_online(ap) != !ata_port_offline(ap).
5249 * 1 if the port online status is available and online.
5251 int ata_port_online(struct ata_port *ap)
5255 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5261 * ata_port_offline - test whether the given port is offline
5262 * @ap: ATA port to test
5264 * Test whether @ap is offline. Note that this function returns
5265 * 0 if offline status of @ap cannot be obtained, so
5266 * ata_port_online(ap) != !ata_port_offline(ap).
5272 * 1 if the port offline status is available and offline.
5274 int ata_port_offline(struct ata_port *ap)
5278 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5283 int ata_flush_cache(struct ata_device *dev)
5285 unsigned int err_mask;
5288 if (!ata_try_flush_cache(dev))
5291 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5292 cmd = ATA_CMD_FLUSH_EXT;
5294 cmd = ATA_CMD_FLUSH;
5296 err_mask = ata_do_simple_cmd(dev, cmd);
5298 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5305 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5306 unsigned int action, unsigned int ehi_flags,
5309 unsigned long flags;
5312 for (i = 0; i < host->n_ports; i++) {
5313 struct ata_port *ap = host->ports[i];
5315 /* Previous resume operation might still be in
5316 * progress. Wait for PM_PENDING to clear.
5318 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5319 ata_port_wait_eh(ap);
5320 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5323 /* request PM ops to EH */
5324 spin_lock_irqsave(ap->lock, flags);
5329 ap->pm_result = &rc;
5332 ap->pflags |= ATA_PFLAG_PM_PENDING;
5333 ap->eh_info.action |= action;
5334 ap->eh_info.flags |= ehi_flags;
5336 ata_port_schedule_eh(ap);
5338 spin_unlock_irqrestore(ap->lock, flags);
5340 /* wait and check result */
5342 ata_port_wait_eh(ap);
5343 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5353 * ata_host_suspend - suspend host
5354 * @host: host to suspend
5357 * Suspend @host. Actual operation is performed by EH. This
5358 * function requests EH to perform PM operations and waits for EH
5362 * Kernel thread context (may sleep).
5365 * 0 on success, -errno on failure.
5367 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5371 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5375 /* EH is quiescent now. Fail if we have any ready device.
5376 * This happens if hotplug occurs between completion of device
5377 * suspension and here.
5379 for (i = 0; i < host->n_ports; i++) {
5380 struct ata_port *ap = host->ports[i];
5382 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5383 struct ata_device *dev = &ap->device[j];
5385 if (ata_dev_ready(dev)) {
5386 ata_port_printk(ap, KERN_WARNING,
5387 "suspend failed, device %d "
5388 "still active\n", dev->devno);
5395 host->dev->power.power_state = mesg;
5399 ata_host_resume(host);
5404 * ata_host_resume - resume host
5405 * @host: host to resume
5407 * Resume @host. Actual operation is performed by EH. This
5408 * function requests EH to perform PM operations and returns.
5409 * Note that all resume operations are performed parallely.
5412 * Kernel thread context (may sleep).
5414 void ata_host_resume(struct ata_host *host)
5416 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5417 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5418 host->dev->power.power_state = PMSG_ON;
5422 * ata_port_start - Set port up for dma.
5423 * @ap: Port to initialize
5425 * Called just after data structures for each port are
5426 * initialized. Allocates space for PRD table.
5428 * May be used as the port_start() entry in ata_port_operations.
5431 * Inherited from caller.
5433 int ata_port_start(struct ata_port *ap)
5435 struct device *dev = ap->dev;
5438 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5443 rc = ata_pad_alloc(ap, dev);
5447 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5448 (unsigned long long)ap->prd_dma);
5453 * ata_dev_init - Initialize an ata_device structure
5454 * @dev: Device structure to initialize
5456 * Initialize @dev in preparation for probing.
5459 * Inherited from caller.
5461 void ata_dev_init(struct ata_device *dev)
5463 struct ata_port *ap = dev->ap;
5464 unsigned long flags;
5466 /* SATA spd limit is bound to the first device */
5467 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5469 /* High bits of dev->flags are used to record warm plug
5470 * requests which occur asynchronously. Synchronize using
5473 spin_lock_irqsave(ap->lock, flags);
5474 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5475 spin_unlock_irqrestore(ap->lock, flags);
5477 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5478 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5479 dev->pio_mask = UINT_MAX;
5480 dev->mwdma_mask = UINT_MAX;
5481 dev->udma_mask = UINT_MAX;
5485 * ata_port_init - Initialize an ata_port structure
5486 * @ap: Structure to initialize
5487 * @host: Collection of hosts to which @ap belongs
5488 * @ent: Probe information provided by low-level driver
5489 * @port_no: Port number associated with this ata_port
5491 * Initialize a new ata_port structure.
5494 * Inherited from caller.
5496 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5497 const struct ata_probe_ent *ent, unsigned int port_no)
5501 ap->lock = &host->lock;
5502 ap->flags = ATA_FLAG_DISABLED;
5503 ap->id = ata_unique_id++;
5504 ap->ctl = ATA_DEVCTL_OBS;
5507 ap->port_no = port_no;
5508 if (port_no == 1 && ent->pinfo2) {
5509 ap->pio_mask = ent->pinfo2->pio_mask;
5510 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5511 ap->udma_mask = ent->pinfo2->udma_mask;
5512 ap->flags |= ent->pinfo2->flags;
5513 ap->ops = ent->pinfo2->port_ops;
5515 ap->pio_mask = ent->pio_mask;
5516 ap->mwdma_mask = ent->mwdma_mask;
5517 ap->udma_mask = ent->udma_mask;
5518 ap->flags |= ent->port_flags;
5519 ap->ops = ent->port_ops;
5521 ap->hw_sata_spd_limit = UINT_MAX;
5522 ap->active_tag = ATA_TAG_POISON;
5523 ap->last_ctl = 0xFF;
5525 #if defined(ATA_VERBOSE_DEBUG)
5526 /* turn on all debugging levels */
5527 ap->msg_enable = 0x00FF;
5528 #elif defined(ATA_DEBUG)
5529 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5531 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5534 INIT_DELAYED_WORK(&ap->port_task, NULL);
5535 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5536 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
5537 INIT_LIST_HEAD(&ap->eh_done_q);
5538 init_waitqueue_head(&ap->eh_wait_q);
5540 /* set cable type */
5541 ap->cbl = ATA_CBL_NONE;
5542 if (ap->flags & ATA_FLAG_SATA)
5543 ap->cbl = ATA_CBL_SATA;
5545 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5546 struct ata_device *dev = &ap->device[i];
5553 ap->stats.unhandled_irq = 1;
5554 ap->stats.idle_irq = 1;
5557 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5561 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5562 * @ap: ATA port to initialize SCSI host for
5563 * @shost: SCSI host associated with @ap
5565 * Initialize SCSI host @shost associated with ATA port @ap.
5568 * Inherited from caller.
5570 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5572 ap->scsi_host = shost;
5574 shost->unique_id = ap->id;
5577 shost->max_channel = 1;
5578 shost->max_cmd_len = 12;
5582 * ata_port_add - Attach low-level ATA driver to system
5583 * @ent: Information provided by low-level driver
5584 * @host: Collections of ports to which we add
5585 * @port_no: Port number associated with this host
5587 * Attach low-level ATA driver to system.
5590 * PCI/etc. bus probe sem.
5593 * New ata_port on success, for NULL on error.
5595 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5596 struct ata_host *host,
5597 unsigned int port_no)
5599 struct Scsi_Host *shost;
5600 struct ata_port *ap;
5604 if (!ent->port_ops->error_handler &&
5605 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5606 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5611 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5615 shost->transportt = &ata_scsi_transport_template;
5617 ap = ata_shost_to_port(shost);
5619 ata_port_init(ap, host, ent, port_no);
5620 ata_port_init_shost(ap, shost);
5625 static void ata_host_release(struct device *gendev, void *res)
5627 struct ata_host *host = dev_get_drvdata(gendev);
5630 for (i = 0; i < host->n_ports; i++) {
5631 struct ata_port *ap = host->ports[i];
5636 if (ap->ops->port_stop)
5637 ap->ops->port_stop(ap);
5639 scsi_host_put(ap->scsi_host);
5642 if (host->ops->host_stop)
5643 host->ops->host_stop(host);
5647 * ata_sas_host_init - Initialize a host struct
5648 * @host: host to initialize
5649 * @dev: device host is attached to
5650 * @flags: host flags
5654 * PCI/etc. bus probe sem.
5658 void ata_host_init(struct ata_host *host, struct device *dev,
5659 unsigned long flags, const struct ata_port_operations *ops)
5661 spin_lock_init(&host->lock);
5663 host->flags = flags;
5668 * ata_device_add - Register hardware device with ATA and SCSI layers
5669 * @ent: Probe information describing hardware device to be registered
5671 * This function processes the information provided in the probe
5672 * information struct @ent, allocates the necessary ATA and SCSI
5673 * host information structures, initializes them, and registers
5674 * everything with requisite kernel subsystems.
5676 * This function requests irqs, probes the ATA bus, and probes
5680 * PCI/etc. bus probe sem.
5683 * Number of ports registered. Zero on error (no ports registered).
5685 int ata_device_add(const struct ata_probe_ent *ent)
5688 struct device *dev = ent->dev;
5689 struct ata_host *host;
5694 if (ent->irq == 0) {
5695 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5699 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL))
5702 /* alloc a container for our list of ATA ports (buses) */
5703 host = devres_alloc(ata_host_release, sizeof(struct ata_host) +
5704 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5707 devres_add(dev, host);
5708 dev_set_drvdata(dev, host);
5710 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5711 host->n_ports = ent->n_ports;
5712 host->irq = ent->irq;
5713 host->irq2 = ent->irq2;
5714 host->iomap = ent->iomap;
5715 host->private_data = ent->private_data;
5717 /* register each port bound to this device */
5718 for (i = 0; i < host->n_ports; i++) {
5719 struct ata_port *ap;
5720 unsigned long xfer_mode_mask;
5721 int irq_line = ent->irq;
5723 ap = ata_port_add(ent, host, i);
5724 host->ports[i] = ap;
5729 if (ent->dummy_port_mask & (1 << i)) {
5730 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5731 ap->ops = &ata_dummy_port_ops;
5736 rc = ap->ops->port_start(ap);
5738 host->ports[i] = NULL;
5739 scsi_host_put(ap->scsi_host);
5743 /* Report the secondary IRQ for second channel legacy */
5744 if (i == 1 && ent->irq2)
5745 irq_line = ent->irq2;
5747 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5748 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5749 (ap->pio_mask << ATA_SHIFT_PIO);
5751 /* print per-port info to dmesg */
5752 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
5753 "ctl 0x%p bmdma 0x%p irq %d\n",
5754 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5755 ata_mode_string(xfer_mode_mask),
5756 ap->ioaddr.cmd_addr,
5757 ap->ioaddr.ctl_addr,
5758 ap->ioaddr.bmdma_addr,
5761 /* freeze port before requesting IRQ */
5762 ata_eh_freeze_port(ap);
5765 /* obtain irq, that may be shared between channels */
5766 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5767 ent->irq_flags, DRV_NAME, host);
5769 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5774 /* do we have a second IRQ for the other channel, eg legacy mode */
5776 /* We will get weird core code crashes later if this is true
5778 BUG_ON(ent->irq == ent->irq2);
5780 rc = devm_request_irq(dev, ent->irq2,
5781 ent->port_ops->irq_handler, ent->irq_flags,
5784 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5790 /* resource acquisition complete */
5791 devres_remove_group(dev, ata_device_add);
5793 /* perform each probe synchronously */
5794 DPRINTK("probe begin\n");
5795 for (i = 0; i < host->n_ports; i++) {
5796 struct ata_port *ap = host->ports[i];
5800 /* init sata_spd_limit to the current value */
5801 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5802 int spd = (scontrol >> 4) & 0xf;
5803 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5805 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5807 rc = scsi_add_host(ap->scsi_host, dev);
5809 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5810 /* FIXME: do something useful here */
5811 /* FIXME: handle unconditional calls to
5812 * scsi_scan_host and ata_host_remove, below,
5817 if (ap->ops->error_handler) {
5818 struct ata_eh_info *ehi = &ap->eh_info;
5819 unsigned long flags;
5823 /* kick EH for boot probing */
5824 spin_lock_irqsave(ap->lock, flags);
5826 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5827 ehi->action |= ATA_EH_SOFTRESET;
5828 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5830 ap->pflags |= ATA_PFLAG_LOADING;
5831 ata_port_schedule_eh(ap);
5833 spin_unlock_irqrestore(ap->lock, flags);
5835 /* wait for EH to finish */
5836 ata_port_wait_eh(ap);
5838 DPRINTK("ata%u: bus probe begin\n", ap->id);
5839 rc = ata_bus_probe(ap);
5840 DPRINTK("ata%u: bus probe end\n", ap->id);
5843 /* FIXME: do something useful here?
5844 * Current libata behavior will
5845 * tear down everything when
5846 * the module is removed
5847 * or the h/w is unplugged.
5853 /* probes are done, now scan each port's disk(s) */
5854 DPRINTK("host probe begin\n");
5855 for (i = 0; i < host->n_ports; i++) {
5856 struct ata_port *ap = host->ports[i];
5858 ata_scsi_scan_host(ap);
5861 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5862 return ent->n_ports; /* success */
5865 devres_release_group(dev, ata_device_add);
5866 dev_set_drvdata(dev, NULL);
5867 VPRINTK("EXIT, returning %d\n", rc);
5872 * ata_port_detach - Detach ATA port in prepration of device removal
5873 * @ap: ATA port to be detached
5875 * Detach all ATA devices and the associated SCSI devices of @ap;
5876 * then, remove the associated SCSI host. @ap is guaranteed to
5877 * be quiescent on return from this function.
5880 * Kernel thread context (may sleep).
5882 void ata_port_detach(struct ata_port *ap)
5884 unsigned long flags;
5887 if (!ap->ops->error_handler)
5890 /* tell EH we're leaving & flush EH */
5891 spin_lock_irqsave(ap->lock, flags);
5892 ap->pflags |= ATA_PFLAG_UNLOADING;
5893 spin_unlock_irqrestore(ap->lock, flags);
5895 ata_port_wait_eh(ap);
5897 /* EH is now guaranteed to see UNLOADING, so no new device
5898 * will be attached. Disable all existing devices.
5900 spin_lock_irqsave(ap->lock, flags);
5902 for (i = 0; i < ATA_MAX_DEVICES; i++)
5903 ata_dev_disable(&ap->device[i]);
5905 spin_unlock_irqrestore(ap->lock, flags);
5907 /* Final freeze & EH. All in-flight commands are aborted. EH
5908 * will be skipped and retrials will be terminated with bad
5911 spin_lock_irqsave(ap->lock, flags);
5912 ata_port_freeze(ap); /* won't be thawed */
5913 spin_unlock_irqrestore(ap->lock, flags);
5915 ata_port_wait_eh(ap);
5917 /* Flush hotplug task. The sequence is similar to
5918 * ata_port_flush_task().
5920 flush_workqueue(ata_aux_wq);
5921 cancel_delayed_work(&ap->hotplug_task);
5922 flush_workqueue(ata_aux_wq);
5925 /* remove the associated SCSI host */
5926 scsi_remove_host(ap->scsi_host);
5930 * ata_host_detach - Detach all ports of an ATA host
5931 * @host: Host to detach
5933 * Detach all ports of @host.
5936 * Kernel thread context (may sleep).
5938 void ata_host_detach(struct ata_host *host)
5942 for (i = 0; i < host->n_ports; i++)
5943 ata_port_detach(host->ports[i]);
5946 struct ata_probe_ent *
5947 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5949 struct ata_probe_ent *probe_ent;
5951 /* XXX - the following if can go away once all LLDs are managed */
5952 if (!list_empty(&dev->devres_head))
5953 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
5955 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5957 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5958 kobject_name(&(dev->kobj)));
5962 INIT_LIST_HEAD(&probe_ent->node);
5963 probe_ent->dev = dev;
5965 probe_ent->sht = port->sht;
5966 probe_ent->port_flags = port->flags;
5967 probe_ent->pio_mask = port->pio_mask;
5968 probe_ent->mwdma_mask = port->mwdma_mask;
5969 probe_ent->udma_mask = port->udma_mask;
5970 probe_ent->port_ops = port->port_ops;
5971 probe_ent->private_data = port->private_data;
5977 * ata_std_ports - initialize ioaddr with standard port offsets.
5978 * @ioaddr: IO address structure to be initialized
5980 * Utility function which initializes data_addr, error_addr,
5981 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5982 * device_addr, status_addr, and command_addr to standard offsets
5983 * relative to cmd_addr.
5985 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5988 void ata_std_ports(struct ata_ioports *ioaddr)
5990 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5991 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5992 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5993 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5994 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5995 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5996 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5997 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5998 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5999 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
6006 * ata_pci_remove_one - PCI layer callback for device removal
6007 * @pdev: PCI device that was removed
6009 * PCI layer indicates to libata via this hook that hot-unplug or
6010 * module unload event has occurred. Detach all ports. Resource
6011 * release is handled via devres.
6014 * Inherited from PCI layer (may sleep).
6016 void ata_pci_remove_one(struct pci_dev *pdev)
6018 struct device *dev = pci_dev_to_dev(pdev);
6019 struct ata_host *host = dev_get_drvdata(dev);
6021 ata_host_detach(host);
6024 /* move to PCI subsystem */
6025 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
6027 unsigned long tmp = 0;
6029 switch (bits->width) {
6032 pci_read_config_byte(pdev, bits->reg, &tmp8);
6038 pci_read_config_word(pdev, bits->reg, &tmp16);
6044 pci_read_config_dword(pdev, bits->reg, &tmp32);
6055 return (tmp == bits->val) ? 1 : 0;
6058 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6060 pci_save_state(pdev);
6062 if (mesg.event == PM_EVENT_SUSPEND) {
6063 pci_disable_device(pdev);
6064 pci_set_power_state(pdev, PCI_D3hot);
6068 int ata_pci_device_do_resume(struct pci_dev *pdev)
6072 pci_set_power_state(pdev, PCI_D0);
6073 pci_restore_state(pdev);
6075 rc = pcim_enable_device(pdev);
6077 dev_printk(KERN_ERR, &pdev->dev,
6078 "failed to enable device after resume (%d)\n", rc);
6082 pci_set_master(pdev);
6086 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6088 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6091 rc = ata_host_suspend(host, mesg);
6095 ata_pci_device_do_suspend(pdev, mesg);
6100 int ata_pci_device_resume(struct pci_dev *pdev)
6102 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6105 rc = ata_pci_device_do_resume(pdev);
6107 ata_host_resume(host);
6110 #endif /* CONFIG_PCI */
6113 static int __init ata_init(void)
6115 ata_probe_timeout *= HZ;
6116 ata_wq = create_workqueue("ata");
6120 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6122 destroy_workqueue(ata_wq);
6126 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6130 static void __exit ata_exit(void)
6132 destroy_workqueue(ata_wq);
6133 destroy_workqueue(ata_aux_wq);
6136 subsys_initcall(ata_init);
6137 module_exit(ata_exit);
6139 static unsigned long ratelimit_time;
6140 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6142 int ata_ratelimit(void)
6145 unsigned long flags;
6147 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6149 if (time_after(jiffies, ratelimit_time)) {
6151 ratelimit_time = jiffies + (HZ/5);
6155 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6161 * ata_wait_register - wait until register value changes
6162 * @reg: IO-mapped register
6163 * @mask: Mask to apply to read register value
6164 * @val: Wait condition
6165 * @interval_msec: polling interval in milliseconds
6166 * @timeout_msec: timeout in milliseconds
6168 * Waiting for some bits of register to change is a common
6169 * operation for ATA controllers. This function reads 32bit LE
6170 * IO-mapped register @reg and tests for the following condition.
6172 * (*@reg & mask) != val
6174 * If the condition is met, it returns; otherwise, the process is
6175 * repeated after @interval_msec until timeout.
6178 * Kernel thread context (may sleep)
6181 * The final register value.
6183 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6184 unsigned long interval_msec,
6185 unsigned long timeout_msec)
6187 unsigned long timeout;
6190 tmp = ioread32(reg);
6192 /* Calculate timeout _after_ the first read to make sure
6193 * preceding writes reach the controller before starting to
6194 * eat away the timeout.
6196 timeout = jiffies + (timeout_msec * HZ) / 1000;
6198 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6199 msleep(interval_msec);
6200 tmp = ioread32(reg);
6209 static void ata_dummy_noret(struct ata_port *ap) { }
6210 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6211 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6213 static u8 ata_dummy_check_status(struct ata_port *ap)
6218 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6220 return AC_ERR_SYSTEM;
6223 const struct ata_port_operations ata_dummy_port_ops = {
6224 .port_disable = ata_port_disable,
6225 .check_status = ata_dummy_check_status,
6226 .check_altstatus = ata_dummy_check_status,
6227 .dev_select = ata_noop_dev_select,
6228 .qc_prep = ata_noop_qc_prep,
6229 .qc_issue = ata_dummy_qc_issue,
6230 .freeze = ata_dummy_noret,
6231 .thaw = ata_dummy_noret,
6232 .error_handler = ata_dummy_noret,
6233 .post_internal_cmd = ata_dummy_qc_noret,
6234 .irq_clear = ata_dummy_noret,
6235 .port_start = ata_dummy_ret0,
6236 .port_stop = ata_dummy_noret,
6240 * libata is essentially a library of internal helper functions for
6241 * low-level ATA host controller drivers. As such, the API/ABI is
6242 * likely to change as new drivers are added and updated.
6243 * Do not depend on ABI/API stability.
6246 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6247 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6248 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6249 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6250 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6251 EXPORT_SYMBOL_GPL(ata_std_ports);
6252 EXPORT_SYMBOL_GPL(ata_host_init);
6253 EXPORT_SYMBOL_GPL(ata_device_add);
6254 EXPORT_SYMBOL_GPL(ata_host_detach);
6255 EXPORT_SYMBOL_GPL(ata_sg_init);
6256 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6257 EXPORT_SYMBOL_GPL(ata_hsm_move);
6258 EXPORT_SYMBOL_GPL(ata_qc_complete);
6259 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6260 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6261 EXPORT_SYMBOL_GPL(ata_tf_load);
6262 EXPORT_SYMBOL_GPL(ata_tf_read);
6263 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6264 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6265 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6266 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6267 EXPORT_SYMBOL_GPL(ata_check_status);
6268 EXPORT_SYMBOL_GPL(ata_altstatus);
6269 EXPORT_SYMBOL_GPL(ata_exec_command);
6270 EXPORT_SYMBOL_GPL(ata_port_start);
6271 EXPORT_SYMBOL_GPL(ata_interrupt);
6272 EXPORT_SYMBOL_GPL(ata_data_xfer);
6273 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6274 EXPORT_SYMBOL_GPL(ata_qc_prep);
6275 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6276 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6277 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6278 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6279 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6280 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6281 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6282 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6283 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6284 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6285 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6286 EXPORT_SYMBOL_GPL(ata_port_probe);
6287 EXPORT_SYMBOL_GPL(sata_set_spd);
6288 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6289 EXPORT_SYMBOL_GPL(sata_phy_resume);
6290 EXPORT_SYMBOL_GPL(sata_phy_reset);
6291 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6292 EXPORT_SYMBOL_GPL(ata_bus_reset);
6293 EXPORT_SYMBOL_GPL(ata_std_prereset);
6294 EXPORT_SYMBOL_GPL(ata_std_softreset);
6295 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6296 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6297 EXPORT_SYMBOL_GPL(ata_std_postreset);
6298 EXPORT_SYMBOL_GPL(ata_dev_classify);
6299 EXPORT_SYMBOL_GPL(ata_dev_pair);
6300 EXPORT_SYMBOL_GPL(ata_port_disable);
6301 EXPORT_SYMBOL_GPL(ata_ratelimit);
6302 EXPORT_SYMBOL_GPL(ata_wait_register);
6303 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6304 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6305 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6306 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6307 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6308 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6309 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6310 EXPORT_SYMBOL_GPL(ata_host_intr);
6311 EXPORT_SYMBOL_GPL(sata_scr_valid);
6312 EXPORT_SYMBOL_GPL(sata_scr_read);
6313 EXPORT_SYMBOL_GPL(sata_scr_write);
6314 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6315 EXPORT_SYMBOL_GPL(ata_port_online);
6316 EXPORT_SYMBOL_GPL(ata_port_offline);
6317 EXPORT_SYMBOL_GPL(ata_host_suspend);
6318 EXPORT_SYMBOL_GPL(ata_host_resume);
6319 EXPORT_SYMBOL_GPL(ata_id_string);
6320 EXPORT_SYMBOL_GPL(ata_id_c_string);
6321 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6322 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6324 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6325 EXPORT_SYMBOL_GPL(ata_timing_compute);
6326 EXPORT_SYMBOL_GPL(ata_timing_merge);
6329 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6330 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6331 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6332 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6333 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6334 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6335 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6336 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6337 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6338 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6339 #endif /* CONFIG_PCI */
6341 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6342 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6344 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6345 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6346 EXPORT_SYMBOL_GPL(ata_port_abort);
6347 EXPORT_SYMBOL_GPL(ata_port_freeze);
6348 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6349 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6350 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6351 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6352 EXPORT_SYMBOL_GPL(ata_do_eh);
6353 EXPORT_SYMBOL_GPL(ata_irq_on);
6354 EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6355 EXPORT_SYMBOL_GPL(ata_irq_ack);
6356 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);
6357 EXPORT_SYMBOL_GPL(ata_dev_try_classify);