2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/pm_qos_params.h>
42 #include <linux/clockchips.h>
43 #include <linux/cpuidle.h>
44 #include <linux/irqflags.h>
47 * Include the apic definitions for x86 to have the APIC timer related defines
48 * available also for UP (on SMP it gets magically included via linux/smp.h).
49 * asm/acpi.h is not an option, as it would require more include magic. Also
50 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
57 #include <asm/uaccess.h>
59 #include <acpi/acpi_bus.h>
60 #include <acpi/processor.h>
61 #include <asm/processor.h>
63 #define PREFIX "ACPI: "
65 #define ACPI_PROCESSOR_CLASS "processor"
66 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
67 ACPI_MODULE_NAME("processor_idle");
68 #define ACPI_PROCESSOR_FILE_POWER "power"
69 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
70 #define C2_OVERHEAD 1 /* 1us */
71 #define C3_OVERHEAD 1 /* 1us */
72 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
74 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
75 module_param(max_cstate, uint, 0000);
76 static unsigned int nocst __read_mostly;
77 module_param(nocst, uint, 0000);
79 static unsigned int latency_factor __read_mostly = 2;
80 module_param(latency_factor, uint, 0644);
82 static s64 us_to_pm_timer_ticks(s64 t)
84 return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
87 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
88 * For now disable this. Probably a bug somewhere else.
90 * To skip this limit, boot/load with a large max_cstate limit.
92 static int set_max_cstate(const struct dmi_system_id *id)
94 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
97 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
98 " Override with \"processor.max_cstate=%d\"\n", id->ident,
99 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
101 max_cstate = (long)id->driver_data;
106 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
107 callers to only run once -AK */
108 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
109 { set_max_cstate, "Clevo 5600D", {
110 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
111 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
118 * Callers should disable interrupts before the call and enable
119 * interrupts after return.
121 static void acpi_safe_halt(void)
123 current_thread_info()->status &= ~TS_POLLING;
125 * TS_POLLING-cleared state must be visible before we
129 if (!need_resched()) {
133 current_thread_info()->status |= TS_POLLING;
136 #ifdef ARCH_APICTIMER_STOPS_ON_C3
139 * Some BIOS implementations switch to C3 in the published C2 state.
140 * This seems to be a common problem on AMD boxen, but other vendors
141 * are affected too. We pick the most conservative approach: we assume
142 * that the local APIC stops in both C2 and C3.
144 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
145 struct acpi_processor_cx *cx)
147 struct acpi_processor_power *pwr = &pr->power;
148 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
150 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
153 if (boot_cpu_has(X86_FEATURE_AMDC1E))
154 type = ACPI_STATE_C1;
157 * Check, if one of the previous states already marked the lapic
160 if (pwr->timer_broadcast_on_state < state)
163 if (cx->type >= type)
164 pr->power.timer_broadcast_on_state = state;
167 static void __lapic_timer_propagate_broadcast(void *arg)
169 struct acpi_processor *pr = (struct acpi_processor *) arg;
170 unsigned long reason;
172 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
173 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
175 clockevents_notify(reason, &pr->id);
178 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
180 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
184 /* Power(C) State timer broadcast control */
185 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
186 struct acpi_processor_cx *cx,
189 int state = cx - pr->power.states;
191 if (state >= pr->power.timer_broadcast_on_state) {
192 unsigned long reason;
194 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
195 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
196 clockevents_notify(reason, &pr->id);
202 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
203 struct acpi_processor_cx *cstate) { }
204 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
205 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
206 struct acpi_processor_cx *cx,
214 * Suspend / resume control
216 static int acpi_idle_suspend;
217 static u32 saved_bm_rld;
219 static void acpi_idle_bm_rld_save(void)
221 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
223 static void acpi_idle_bm_rld_restore(void)
227 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
229 if (resumed_bm_rld != saved_bm_rld)
230 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
233 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
235 if (acpi_idle_suspend == 1)
238 acpi_idle_bm_rld_save();
239 acpi_idle_suspend = 1;
243 int acpi_processor_resume(struct acpi_device * device)
245 if (acpi_idle_suspend == 0)
248 acpi_idle_bm_rld_restore();
249 acpi_idle_suspend = 0;
253 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
254 static void tsc_check_state(int state)
256 switch (boot_cpu_data.x86_vendor) {
258 case X86_VENDOR_INTEL:
260 * AMD Fam10h TSC will tick in all
261 * C/P/S0/S1 states when this bit is set.
263 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
268 /* TSC could halt in idle, so notify users */
269 if (state > ACPI_STATE_C1)
270 mark_tsc_unstable("TSC halts in idle");
274 static void tsc_check_state(int state) { return; }
277 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
286 /* if info is obtained from pblk/fadt, type equals state */
287 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
288 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
290 #ifndef CONFIG_HOTPLUG_CPU
292 * Check for P_LVL2_UP flag before entering C2 and above on
295 if ((num_online_cpus() > 1) &&
296 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
300 /* determine C2 and C3 address from pblk */
301 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
302 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
304 /* determine latencies from FADT */
305 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
306 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
309 * FADT specified C2 latency must be less than or equal to
312 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
313 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
314 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
316 pr->power.states[ACPI_STATE_C2].address = 0;
320 * FADT supplied C3 latency must be less than or equal to
323 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
324 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
325 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
327 pr->power.states[ACPI_STATE_C3].address = 0;
330 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
331 "lvl2[0x%08x] lvl3[0x%08x]\n",
332 pr->power.states[ACPI_STATE_C2].address,
333 pr->power.states[ACPI_STATE_C3].address));
338 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
340 if (!pr->power.states[ACPI_STATE_C1].valid) {
341 /* set the first C-State to C1 */
342 /* all processors need to support C1 */
343 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
344 pr->power.states[ACPI_STATE_C1].valid = 1;
345 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
347 /* the C0 state only exists as a filler in our array */
348 pr->power.states[ACPI_STATE_C0].valid = 1;
352 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
354 acpi_status status = 0;
358 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
359 union acpi_object *cst;
367 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
368 if (ACPI_FAILURE(status)) {
369 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
373 cst = buffer.pointer;
375 /* There must be at least 2 elements */
376 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
377 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
382 count = cst->package.elements[0].integer.value;
384 /* Validate number of power states. */
385 if (count < 1 || count != cst->package.count - 1) {
386 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
391 /* Tell driver that at least _CST is supported. */
392 pr->flags.has_cst = 1;
394 for (i = 1; i <= count; i++) {
395 union acpi_object *element;
396 union acpi_object *obj;
397 struct acpi_power_register *reg;
398 struct acpi_processor_cx cx;
400 memset(&cx, 0, sizeof(cx));
402 element = &(cst->package.elements[i]);
403 if (element->type != ACPI_TYPE_PACKAGE)
406 if (element->package.count != 4)
409 obj = &(element->package.elements[0]);
411 if (obj->type != ACPI_TYPE_BUFFER)
414 reg = (struct acpi_power_register *)obj->buffer.pointer;
416 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
417 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
420 /* There should be an easy way to extract an integer... */
421 obj = &(element->package.elements[1]);
422 if (obj->type != ACPI_TYPE_INTEGER)
425 cx.type = obj->integer.value;
427 * Some buggy BIOSes won't list C1 in _CST -
428 * Let acpi_processor_get_power_info_default() handle them later
430 if (i == 1 && cx.type != ACPI_STATE_C1)
433 cx.address = reg->address;
434 cx.index = current_count + 1;
436 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
437 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
438 if (acpi_processor_ffh_cstate_probe
439 (pr->id, &cx, reg) == 0) {
440 cx.entry_method = ACPI_CSTATE_FFH;
441 } else if (cx.type == ACPI_STATE_C1) {
443 * C1 is a special case where FIXED_HARDWARE
444 * can be handled in non-MWAIT way as well.
445 * In that case, save this _CST entry info.
446 * Otherwise, ignore this info and continue.
448 cx.entry_method = ACPI_CSTATE_HALT;
449 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
453 if (cx.type == ACPI_STATE_C1 &&
454 (idle_halt || idle_nomwait)) {
456 * In most cases the C1 space_id obtained from
457 * _CST object is FIXED_HARDWARE access mode.
458 * But when the option of idle=halt is added,
459 * the entry_method type should be changed from
460 * CSTATE_FFH to CSTATE_HALT.
461 * When the option of idle=nomwait is added,
462 * the C1 entry_method type should be
465 cx.entry_method = ACPI_CSTATE_HALT;
466 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
469 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
473 if (cx.type == ACPI_STATE_C1) {
477 obj = &(element->package.elements[2]);
478 if (obj->type != ACPI_TYPE_INTEGER)
481 cx.latency = obj->integer.value;
483 obj = &(element->package.elements[3]);
484 if (obj->type != ACPI_TYPE_INTEGER)
487 cx.power = obj->integer.value;
490 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
493 * We support total ACPI_PROCESSOR_MAX_POWER - 1
494 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
496 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
498 "Limiting number of power states to max (%d)\n",
499 ACPI_PROCESSOR_MAX_POWER);
501 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
506 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
509 /* Validate number of power states discovered */
510 if (current_count < 2)
514 kfree(buffer.pointer);
519 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
526 * Otherwise we've met all of our C2 requirements.
527 * Normalize the C2 latency to expidite policy
531 cx->latency_ticks = cx->latency;
536 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
537 struct acpi_processor_cx *cx)
539 static int bm_check_flag = -1;
540 static int bm_control_flag = -1;
547 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
548 * DMA transfers are used by any ISA device to avoid livelock.
549 * Note that we could disable Type-F DMA (as recommended by
550 * the erratum), but this is known to disrupt certain ISA
551 * devices thus we take the conservative approach.
553 else if (errata.piix4.fdma) {
554 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
555 "C3 not supported on PIIX4 with Type-F DMA\n"));
559 /* All the logic here assumes flags.bm_check is same across all CPUs */
560 if (bm_check_flag == -1) {
561 /* Determine whether bm_check is needed based on CPU */
562 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
563 bm_check_flag = pr->flags.bm_check;
564 bm_control_flag = pr->flags.bm_control;
566 pr->flags.bm_check = bm_check_flag;
567 pr->flags.bm_control = bm_control_flag;
570 if (pr->flags.bm_check) {
571 if (!pr->flags.bm_control) {
572 if (pr->flags.has_cst != 1) {
573 /* bus mastering control is necessary */
574 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
575 "C3 support requires BM control\n"));
578 /* Here we enter C3 without bus mastering */
579 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
580 "C3 support without BM control\n"));
585 * WBINVD should be set in fadt, for C3 state to be
586 * supported on when bm_check is not required.
588 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
589 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
590 "Cache invalidation should work properly"
591 " for C3 to be enabled on SMP systems\n"));
597 * Otherwise we've met all of our C3 requirements.
598 * Normalize the C3 latency to expidite policy. Enable
599 * checking of bus mastering status (bm_check) so we can
600 * use this in our C3 policy
604 cx->latency_ticks = cx->latency;
606 * On older chipsets, BM_RLD needs to be set
607 * in order for Bus Master activity to wake the
608 * system from C3. Newer chipsets handle DMA
609 * during C3 automatically and BM_RLD is a NOP.
610 * In either case, the proper way to
611 * handle BM_RLD is to set it and leave it set.
613 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
618 static int acpi_processor_power_verify(struct acpi_processor *pr)
621 unsigned int working = 0;
623 pr->power.timer_broadcast_on_state = INT_MAX;
625 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
626 struct acpi_processor_cx *cx = &pr->power.states[i];
634 acpi_processor_power_verify_c2(cx);
638 acpi_processor_power_verify_c3(pr, cx);
644 lapic_timer_check_state(i, pr, cx);
645 tsc_check_state(cx->type);
649 lapic_timer_propagate_broadcast(pr);
654 static int acpi_processor_get_power_info(struct acpi_processor *pr)
660 /* NOTE: the idle thread may not be running while calling
663 /* Zero initialize all the C-states info. */
664 memset(pr->power.states, 0, sizeof(pr->power.states));
666 result = acpi_processor_get_power_info_cst(pr);
667 if (result == -ENODEV)
668 result = acpi_processor_get_power_info_fadt(pr);
673 acpi_processor_get_power_info_default(pr);
675 pr->power.count = acpi_processor_power_verify(pr);
678 * if one state of type C2 or C3 is available, mark this
679 * CPU as being "idle manageable"
681 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
682 if (pr->power.states[i].valid) {
684 if (pr->power.states[i].type >= ACPI_STATE_C2)
692 #ifdef CONFIG_ACPI_PROCFS
693 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
695 struct acpi_processor *pr = seq->private;
702 seq_printf(seq, "active state: C%zd\n"
704 "maximum allowed latency: %d usec\n",
705 pr->power.state ? pr->power.state - pr->power.states : 0,
706 max_cstate, pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
708 seq_puts(seq, "states:\n");
710 for (i = 1; i <= pr->power.count; i++) {
711 seq_printf(seq, " %cC%d: ",
712 (&pr->power.states[i] ==
713 pr->power.state ? '*' : ' '), i);
715 if (!pr->power.states[i].valid) {
716 seq_puts(seq, "<not supported>\n");
720 switch (pr->power.states[i].type) {
722 seq_printf(seq, "type[C1] ");
725 seq_printf(seq, "type[C2] ");
728 seq_printf(seq, "type[C3] ");
731 seq_printf(seq, "type[--] ");
735 if (pr->power.states[i].promotion.state)
736 seq_printf(seq, "promotion[C%zd] ",
737 (pr->power.states[i].promotion.state -
740 seq_puts(seq, "promotion[--] ");
742 if (pr->power.states[i].demotion.state)
743 seq_printf(seq, "demotion[C%zd] ",
744 (pr->power.states[i].demotion.state -
747 seq_puts(seq, "demotion[--] ");
749 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
750 pr->power.states[i].latency,
751 pr->power.states[i].usage,
752 (unsigned long long)pr->power.states[i].time);
759 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
761 return single_open(file, acpi_processor_power_seq_show,
765 static const struct file_operations acpi_processor_power_fops = {
766 .owner = THIS_MODULE,
767 .open = acpi_processor_power_open_fs,
770 .release = single_release,
775 * acpi_idle_bm_check - checks if bus master activity was detected
777 static int acpi_idle_bm_check(void)
781 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
783 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
785 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
786 * the true state of bus mastering activity; forcing us to
787 * manually check the BMIDEA bit of each IDE channel.
789 else if (errata.piix4.bmisx) {
790 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
791 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
798 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
801 * Caller disables interrupt before call and enables interrupt after return.
803 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
805 /* Don't trace irqs off for idle */
806 stop_critical_timings();
807 if (cx->entry_method == ACPI_CSTATE_FFH) {
808 /* Call into architectural FFH based C-state */
809 acpi_processor_ffh_cstate_enter(cx);
810 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
814 /* IO port based C-state */
816 /* Dummy wait op - must do something useless after P_LVL2 read
817 because chipsets cannot guarantee that STPCLK# signal
818 gets asserted in time to freeze execution properly. */
819 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
821 start_critical_timings();
825 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
826 * @dev: the target CPU
827 * @state: the state data
829 * This is equivalent to the HALT instruction.
831 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
832 struct cpuidle_state *state)
836 struct acpi_processor *pr;
837 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
839 pr = __get_cpu_var(processors);
846 /* Do not access any ACPI IO ports in suspend path */
847 if (acpi_idle_suspend) {
853 lapic_timer_state_broadcast(pr, cx, 1);
854 kt1 = ktime_get_real();
855 acpi_idle_do_entry(cx);
856 kt2 = ktime_get_real();
857 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
861 lapic_timer_state_broadcast(pr, cx, 0);
867 * acpi_idle_enter_simple - enters an ACPI state without BM handling
868 * @dev: the target CPU
869 * @state: the state data
871 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
872 struct cpuidle_state *state)
874 struct acpi_processor *pr;
875 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
880 pr = __get_cpu_var(processors);
885 if (acpi_idle_suspend)
886 return(acpi_idle_enter_c1(dev, state));
889 current_thread_info()->status &= ~TS_POLLING;
891 * TS_POLLING-cleared state must be visible before we test
896 if (unlikely(need_resched())) {
897 current_thread_info()->status |= TS_POLLING;
903 * Must be done before busmaster disable as we might need to
906 lapic_timer_state_broadcast(pr, cx, 1);
908 if (cx->type == ACPI_STATE_C3)
909 ACPI_FLUSH_CPU_CACHE();
911 kt1 = ktime_get_real();
912 /* Tell the scheduler that we are going deep-idle: */
913 sched_clock_idle_sleep_event();
914 acpi_idle_do_entry(cx);
915 kt2 = ktime_get_real();
916 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
918 sleep_ticks = us_to_pm_timer_ticks(idle_time);
920 /* Tell the scheduler how much we idled: */
921 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
924 current_thread_info()->status |= TS_POLLING;
928 lapic_timer_state_broadcast(pr, cx, 0);
929 cx->time += sleep_ticks;
933 static int c3_cpu_count;
934 static DEFINE_SPINLOCK(c3_lock);
937 * acpi_idle_enter_bm - enters C3 with proper BM handling
938 * @dev: the target CPU
939 * @state: the state data
941 * If BM is detected, the deepest non-C3 idle state is entered instead.
943 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
944 struct cpuidle_state *state)
946 struct acpi_processor *pr;
947 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
953 pr = __get_cpu_var(processors);
958 if (acpi_idle_suspend)
959 return(acpi_idle_enter_c1(dev, state));
961 if (acpi_idle_bm_check()) {
962 if (dev->safe_state) {
963 dev->last_state = dev->safe_state;
964 return dev->safe_state->enter(dev, dev->safe_state);
974 current_thread_info()->status &= ~TS_POLLING;
976 * TS_POLLING-cleared state must be visible before we test
981 if (unlikely(need_resched())) {
982 current_thread_info()->status |= TS_POLLING;
987 acpi_unlazy_tlb(smp_processor_id());
989 /* Tell the scheduler that we are going deep-idle: */
990 sched_clock_idle_sleep_event();
992 * Must be done before busmaster disable as we might need to
995 lapic_timer_state_broadcast(pr, cx, 1);
997 kt1 = ktime_get_real();
1000 * bm_check implies we need ARB_DIS
1001 * !bm_check implies we need cache flush
1002 * bm_control implies whether we can do ARB_DIS
1004 * That leaves a case where bm_check is set and bm_control is
1005 * not set. In that case we cannot do much, we enter C3
1006 * without doing anything.
1008 if (pr->flags.bm_check && pr->flags.bm_control) {
1009 spin_lock(&c3_lock);
1011 /* Disable bus master arbitration when all CPUs are in C3 */
1012 if (c3_cpu_count == num_online_cpus())
1013 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
1014 spin_unlock(&c3_lock);
1015 } else if (!pr->flags.bm_check) {
1016 ACPI_FLUSH_CPU_CACHE();
1019 acpi_idle_do_entry(cx);
1021 /* Re-enable bus master arbitration */
1022 if (pr->flags.bm_check && pr->flags.bm_control) {
1023 spin_lock(&c3_lock);
1024 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
1026 spin_unlock(&c3_lock);
1028 kt2 = ktime_get_real();
1029 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
1031 sleep_ticks = us_to_pm_timer_ticks(idle_time);
1032 /* Tell the scheduler how much we idled: */
1033 sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1036 current_thread_info()->status |= TS_POLLING;
1040 lapic_timer_state_broadcast(pr, cx, 0);
1041 cx->time += sleep_ticks;
1045 struct cpuidle_driver acpi_idle_driver = {
1046 .name = "acpi_idle",
1047 .owner = THIS_MODULE,
1051 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1052 * @pr: the ACPI processor
1054 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1056 int i, count = CPUIDLE_DRIVER_STATE_START;
1057 struct acpi_processor_cx *cx;
1058 struct cpuidle_state *state;
1059 struct cpuidle_device *dev = &pr->power.dev;
1061 if (!pr->flags.power_setup_done)
1064 if (pr->flags.power == 0) {
1069 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1070 dev->states[i].name[0] = '\0';
1071 dev->states[i].desc[0] = '\0';
1074 if (max_cstate == 0)
1077 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1078 cx = &pr->power.states[i];
1079 state = &dev->states[count];
1084 #ifdef CONFIG_HOTPLUG_CPU
1085 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1086 !pr->flags.has_cst &&
1087 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1090 cpuidle_set_statedata(state, cx);
1092 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1093 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1094 state->exit_latency = cx->latency;
1095 state->target_residency = cx->latency * latency_factor;
1096 state->power_usage = cx->power;
1101 state->flags |= CPUIDLE_FLAG_SHALLOW;
1102 if (cx->entry_method == ACPI_CSTATE_FFH)
1103 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1105 state->enter = acpi_idle_enter_c1;
1106 dev->safe_state = state;
1110 state->flags |= CPUIDLE_FLAG_BALANCED;
1111 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1112 state->enter = acpi_idle_enter_simple;
1113 dev->safe_state = state;
1117 state->flags |= CPUIDLE_FLAG_DEEP;
1118 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1119 state->flags |= CPUIDLE_FLAG_CHECK_BM;
1120 state->enter = pr->flags.bm_check ?
1121 acpi_idle_enter_bm :
1122 acpi_idle_enter_simple;
1127 if (count == CPUIDLE_STATE_MAX)
1131 dev->state_count = count;
1139 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1143 if (boot_option_idle_override)
1153 if (!pr->flags.power_setup_done)
1156 cpuidle_pause_and_lock();
1157 cpuidle_disable_device(&pr->power.dev);
1158 acpi_processor_get_power_info(pr);
1159 if (pr->flags.power) {
1160 acpi_processor_setup_cpuidle(pr);
1161 ret = cpuidle_enable_device(&pr->power.dev);
1163 cpuidle_resume_and_unlock();
1168 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1169 struct acpi_device *device)
1171 acpi_status status = 0;
1172 static int first_run;
1173 #ifdef CONFIG_ACPI_PROCFS
1174 struct proc_dir_entry *entry = NULL;
1177 if (boot_option_idle_override)
1183 * When the boot option of "idle=halt" is added, halt
1184 * is used for CPU IDLE.
1185 * In such case C2/C3 is meaningless. So the max_cstate
1190 dmi_check_system(processor_power_dmi_table);
1191 max_cstate = acpi_processor_cstate_check(max_cstate);
1192 if (max_cstate < ACPI_C_STATES_MAX)
1194 "ACPI: processor limited to max C-state %d\n",
1202 if (acpi_gbl_FADT.cst_control && !nocst) {
1204 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1205 if (ACPI_FAILURE(status)) {
1206 ACPI_EXCEPTION((AE_INFO, status,
1207 "Notifying BIOS of _CST ability failed"));
1211 acpi_processor_get_power_info(pr);
1212 pr->flags.power_setup_done = 1;
1215 * Install the idle handler if processor power management is supported.
1216 * Note that we use previously set idle handler will be used on
1217 * platforms that only support C1.
1219 if (pr->flags.power) {
1220 acpi_processor_setup_cpuidle(pr);
1221 if (cpuidle_register_device(&pr->power.dev))
1224 #ifdef CONFIG_ACPI_PROCFS
1226 entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
1227 S_IRUGO, acpi_device_dir(device),
1228 &acpi_processor_power_fops,
1229 acpi_driver_data(device));
1236 int acpi_processor_power_exit(struct acpi_processor *pr,
1237 struct acpi_device *device)
1239 if (boot_option_idle_override)
1242 cpuidle_unregister_device(&pr->power.dev);
1243 pr->flags.power_setup_done = 0;
1245 #ifdef CONFIG_ACPI_PROCFS
1246 if (acpi_device_dir(device))
1247 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1248 acpi_device_dir(device));