ACPI: enable C2 and Turbo-mode on Nehalem notebooks on A/C
[safe/jmp/linux-2.6] / drivers / acpi / processor_idle.c
1 /*
2  * processor_idle - idle state submodule to the ACPI processor driver
3  *
4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8  *                      - Added processor hotplug support
9  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10  *                      - Added support for C3 on SMP
11  *
12  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13  *
14  *  This program is free software; you can redistribute it and/or modify
15  *  it under the terms of the GNU General Public License as published by
16  *  the Free Software Foundation; either version 2 of the License, or (at
17  *  your option) any later version.
18  *
19  *  This program is distributed in the hope that it will be useful, but
20  *  WITHOUT ANY WARRANTY; without even the implied warranty of
21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
22  *  General Public License for more details.
23  *
24  *  You should have received a copy of the GNU General Public License along
25  *  with this program; if not, write to the Free Software Foundation, Inc.,
26  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27  *
28  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29  */
30
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h>        /* need_resched() */
41 #include <linux/pm_qos_params.h>
42 #include <linux/clockchips.h>
43 #include <linux/cpuidle.h>
44 #include <linux/irqflags.h>
45
46 /*
47  * Include the apic definitions for x86 to have the APIC timer related defines
48  * available also for UP (on SMP it gets magically included via linux/smp.h).
49  * asm/acpi.h is not an option, as it would require more include magic. Also
50  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
51  */
52 #ifdef CONFIG_X86
53 #include <asm/apic.h>
54 #endif
55
56 #include <asm/io.h>
57 #include <asm/uaccess.h>
58
59 #include <acpi/acpi_bus.h>
60 #include <acpi/processor.h>
61 #include <asm/processor.h>
62
63 #define PREFIX "ACPI: "
64
65 #define ACPI_PROCESSOR_CLASS            "processor"
66 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
67 ACPI_MODULE_NAME("processor_idle");
68 #define ACPI_PROCESSOR_FILE_POWER       "power"
69 #define PM_TIMER_TICK_NS                (1000000000ULL/PM_TIMER_FREQUENCY)
70 #define C2_OVERHEAD                     1       /* 1us */
71 #define C3_OVERHEAD                     1       /* 1us */
72 #define PM_TIMER_TICKS_TO_US(p)         (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
73
74 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
75 module_param(max_cstate, uint, 0000);
76 static unsigned int nocst __read_mostly;
77 module_param(nocst, uint, 0000);
78
79 static unsigned int latency_factor __read_mostly = 2;
80 module_param(latency_factor, uint, 0644);
81
82 static s64 us_to_pm_timer_ticks(s64 t)
83 {
84         return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
85 }
86 /*
87  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
88  * For now disable this. Probably a bug somewhere else.
89  *
90  * To skip this limit, boot/load with a large max_cstate limit.
91  */
92 static int set_max_cstate(const struct dmi_system_id *id)
93 {
94         if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
95                 return 0;
96
97         printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
98                " Override with \"processor.max_cstate=%d\"\n", id->ident,
99                (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
100
101         max_cstate = (long)id->driver_data;
102
103         return 0;
104 }
105
106 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
107    callers to only run once -AK */
108 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
109         { set_max_cstate, "Clevo 5600D", {
110           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
111           DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
112          (void *)2},
113         {},
114 };
115
116
117 /*
118  * Callers should disable interrupts before the call and enable
119  * interrupts after return.
120  */
121 static void acpi_safe_halt(void)
122 {
123         current_thread_info()->status &= ~TS_POLLING;
124         /*
125          * TS_POLLING-cleared state must be visible before we
126          * test NEED_RESCHED:
127          */
128         smp_mb();
129         if (!need_resched()) {
130                 safe_halt();
131                 local_irq_disable();
132         }
133         current_thread_info()->status |= TS_POLLING;
134 }
135
136 #ifdef ARCH_APICTIMER_STOPS_ON_C3
137
138 /*
139  * Some BIOS implementations switch to C3 in the published C2 state.
140  * This seems to be a common problem on AMD boxen, but other vendors
141  * are affected too. We pick the most conservative approach: we assume
142  * that the local APIC stops in both C2 and C3.
143  */
144 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
145                                    struct acpi_processor_cx *cx)
146 {
147         struct acpi_processor_power *pwr = &pr->power;
148         u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
149
150         if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
151                 return;
152
153         if (boot_cpu_has(X86_FEATURE_AMDC1E))
154                 type = ACPI_STATE_C1;
155
156         /*
157          * Check, if one of the previous states already marked the lapic
158          * unstable
159          */
160         if (pwr->timer_broadcast_on_state < state)
161                 return;
162
163         if (cx->type >= type)
164                 pr->power.timer_broadcast_on_state = state;
165 }
166
167 static void __lapic_timer_propagate_broadcast(void *arg)
168 {
169         struct acpi_processor *pr = (struct acpi_processor *) arg;
170         unsigned long reason;
171
172         reason = pr->power.timer_broadcast_on_state < INT_MAX ?
173                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
174
175         clockevents_notify(reason, &pr->id);
176 }
177
178 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
179 {
180         smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
181                                  (void *)pr, 1);
182 }
183
184 /* Power(C) State timer broadcast control */
185 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
186                                        struct acpi_processor_cx *cx,
187                                        int broadcast)
188 {
189         int state = cx - pr->power.states;
190
191         if (state >= pr->power.timer_broadcast_on_state) {
192                 unsigned long reason;
193
194                 reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
195                         CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
196                 clockevents_notify(reason, &pr->id);
197         }
198 }
199
200 #else
201
202 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
203                                    struct acpi_processor_cx *cstate) { }
204 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
205 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
206                                        struct acpi_processor_cx *cx,
207                                        int broadcast)
208 {
209 }
210
211 #endif
212
213 /*
214  * Suspend / resume control
215  */
216 static int acpi_idle_suspend;
217 static u32 saved_bm_rld;
218
219 static void acpi_idle_bm_rld_save(void)
220 {
221         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
222 }
223 static void acpi_idle_bm_rld_restore(void)
224 {
225         u32 resumed_bm_rld;
226
227         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
228
229         if (resumed_bm_rld != saved_bm_rld)
230                 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
231 }
232
233 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
234 {
235         if (acpi_idle_suspend == 1)
236                 return 0;
237
238         acpi_idle_bm_rld_save();
239         acpi_idle_suspend = 1;
240         return 0;
241 }
242
243 int acpi_processor_resume(struct acpi_device * device)
244 {
245         if (acpi_idle_suspend == 0)
246                 return 0;
247
248         acpi_idle_bm_rld_restore();
249         acpi_idle_suspend = 0;
250         return 0;
251 }
252
253 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
254 static void tsc_check_state(int state)
255 {
256         switch (boot_cpu_data.x86_vendor) {
257         case X86_VENDOR_AMD:
258         case X86_VENDOR_INTEL:
259                 /*
260                  * AMD Fam10h TSC will tick in all
261                  * C/P/S0/S1 states when this bit is set.
262                  */
263                 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
264                         return;
265
266                 /*FALL THROUGH*/
267         default:
268                 /* TSC could halt in idle, so notify users */
269                 if (state > ACPI_STATE_C1)
270                         mark_tsc_unstable("TSC halts in idle");
271         }
272 }
273 #else
274 static void tsc_check_state(int state) { return; }
275 #endif
276
277 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
278 {
279
280         if (!pr)
281                 return -EINVAL;
282
283         if (!pr->pblk)
284                 return -ENODEV;
285
286         /* if info is obtained from pblk/fadt, type equals state */
287         pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
288         pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
289
290 #ifndef CONFIG_HOTPLUG_CPU
291         /*
292          * Check for P_LVL2_UP flag before entering C2 and above on
293          * an SMP system.
294          */
295         if ((num_online_cpus() > 1) &&
296             !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
297                 return -ENODEV;
298 #endif
299
300         /* determine C2 and C3 address from pblk */
301         pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
302         pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
303
304         /* determine latencies from FADT */
305         pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
306         pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
307
308         /*
309          * FADT specified C2 latency must be less than or equal to
310          * 100 microseconds.
311          */
312         if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
313                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
314                         "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
315                 /* invalidate C2 */
316                 pr->power.states[ACPI_STATE_C2].address = 0;
317         }
318
319         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
320                           "lvl2[0x%08x] lvl3[0x%08x]\n",
321                           pr->power.states[ACPI_STATE_C2].address,
322                           pr->power.states[ACPI_STATE_C3].address));
323
324         return 0;
325 }
326
327 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
328 {
329         if (!pr->power.states[ACPI_STATE_C1].valid) {
330                 /* set the first C-State to C1 */
331                 /* all processors need to support C1 */
332                 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
333                 pr->power.states[ACPI_STATE_C1].valid = 1;
334                 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
335         }
336         /* the C0 state only exists as a filler in our array */
337         pr->power.states[ACPI_STATE_C0].valid = 1;
338         return 0;
339 }
340
341 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
342 {
343         acpi_status status = 0;
344         acpi_integer count;
345         int current_count;
346         int i;
347         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
348         union acpi_object *cst;
349
350
351         if (nocst)
352                 return -ENODEV;
353
354         current_count = 0;
355
356         status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
357         if (ACPI_FAILURE(status)) {
358                 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
359                 return -ENODEV;
360         }
361
362         cst = buffer.pointer;
363
364         /* There must be at least 2 elements */
365         if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
366                 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
367                 status = -EFAULT;
368                 goto end;
369         }
370
371         count = cst->package.elements[0].integer.value;
372
373         /* Validate number of power states. */
374         if (count < 1 || count != cst->package.count - 1) {
375                 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
376                 status = -EFAULT;
377                 goto end;
378         }
379
380         /* Tell driver that at least _CST is supported. */
381         pr->flags.has_cst = 1;
382
383         for (i = 1; i <= count; i++) {
384                 union acpi_object *element;
385                 union acpi_object *obj;
386                 struct acpi_power_register *reg;
387                 struct acpi_processor_cx cx;
388
389                 memset(&cx, 0, sizeof(cx));
390
391                 element = &(cst->package.elements[i]);
392                 if (element->type != ACPI_TYPE_PACKAGE)
393                         continue;
394
395                 if (element->package.count != 4)
396                         continue;
397
398                 obj = &(element->package.elements[0]);
399
400                 if (obj->type != ACPI_TYPE_BUFFER)
401                         continue;
402
403                 reg = (struct acpi_power_register *)obj->buffer.pointer;
404
405                 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
406                     (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
407                         continue;
408
409                 /* There should be an easy way to extract an integer... */
410                 obj = &(element->package.elements[1]);
411                 if (obj->type != ACPI_TYPE_INTEGER)
412                         continue;
413
414                 cx.type = obj->integer.value;
415                 /*
416                  * Some buggy BIOSes won't list C1 in _CST -
417                  * Let acpi_processor_get_power_info_default() handle them later
418                  */
419                 if (i == 1 && cx.type != ACPI_STATE_C1)
420                         current_count++;
421
422                 cx.address = reg->address;
423                 cx.index = current_count + 1;
424
425                 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
426                 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
427                         if (acpi_processor_ffh_cstate_probe
428                                         (pr->id, &cx, reg) == 0) {
429                                 cx.entry_method = ACPI_CSTATE_FFH;
430                         } else if (cx.type == ACPI_STATE_C1) {
431                                 /*
432                                  * C1 is a special case where FIXED_HARDWARE
433                                  * can be handled in non-MWAIT way as well.
434                                  * In that case, save this _CST entry info.
435                                  * Otherwise, ignore this info and continue.
436                                  */
437                                 cx.entry_method = ACPI_CSTATE_HALT;
438                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
439                         } else {
440                                 continue;
441                         }
442                         if (cx.type == ACPI_STATE_C1 &&
443                                         (idle_halt || idle_nomwait)) {
444                                 /*
445                                  * In most cases the C1 space_id obtained from
446                                  * _CST object is FIXED_HARDWARE access mode.
447                                  * But when the option of idle=halt is added,
448                                  * the entry_method type should be changed from
449                                  * CSTATE_FFH to CSTATE_HALT.
450                                  * When the option of idle=nomwait is added,
451                                  * the C1 entry_method type should be
452                                  * CSTATE_HALT.
453                                  */
454                                 cx.entry_method = ACPI_CSTATE_HALT;
455                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
456                         }
457                 } else {
458                         snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
459                                  cx.address);
460                 }
461
462                 if (cx.type == ACPI_STATE_C1) {
463                         cx.valid = 1;
464                 }
465
466                 obj = &(element->package.elements[2]);
467                 if (obj->type != ACPI_TYPE_INTEGER)
468                         continue;
469
470                 cx.latency = obj->integer.value;
471
472                 obj = &(element->package.elements[3]);
473                 if (obj->type != ACPI_TYPE_INTEGER)
474                         continue;
475
476                 cx.power = obj->integer.value;
477
478                 current_count++;
479                 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
480
481                 /*
482                  * We support total ACPI_PROCESSOR_MAX_POWER - 1
483                  * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
484                  */
485                 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
486                         printk(KERN_WARNING
487                                "Limiting number of power states to max (%d)\n",
488                                ACPI_PROCESSOR_MAX_POWER);
489                         printk(KERN_WARNING
490                                "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
491                         break;
492                 }
493         }
494
495         ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
496                           current_count));
497
498         /* Validate number of power states discovered */
499         if (current_count < 2)
500                 status = -EFAULT;
501
502       end:
503         kfree(buffer.pointer);
504
505         return status;
506 }
507
508 static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
509 {
510
511         if (!cx->address)
512                 return;
513
514         /*
515          * Otherwise we've met all of our C2 requirements.
516          * Normalize the C2 latency to expidite policy
517          */
518         cx->valid = 1;
519
520         cx->latency_ticks = cx->latency;
521
522         return;
523 }
524
525 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
526                                            struct acpi_processor_cx *cx)
527 {
528         static int bm_check_flag = -1;
529         static int bm_control_flag = -1;
530
531
532         if (!cx->address)
533                 return;
534
535         /*
536          * C3 latency must be less than or equal to 1000
537          * microseconds.
538          */
539         else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
540                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
541                                   "latency too large [%d]\n", cx->latency));
542                 return;
543         }
544
545         /*
546          * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
547          * DMA transfers are used by any ISA device to avoid livelock.
548          * Note that we could disable Type-F DMA (as recommended by
549          * the erratum), but this is known to disrupt certain ISA
550          * devices thus we take the conservative approach.
551          */
552         else if (errata.piix4.fdma) {
553                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
554                                   "C3 not supported on PIIX4 with Type-F DMA\n"));
555                 return;
556         }
557
558         /* All the logic here assumes flags.bm_check is same across all CPUs */
559         if (bm_check_flag == -1) {
560                 /* Determine whether bm_check is needed based on CPU  */
561                 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
562                 bm_check_flag = pr->flags.bm_check;
563                 bm_control_flag = pr->flags.bm_control;
564         } else {
565                 pr->flags.bm_check = bm_check_flag;
566                 pr->flags.bm_control = bm_control_flag;
567         }
568
569         if (pr->flags.bm_check) {
570                 if (!pr->flags.bm_control) {
571                         if (pr->flags.has_cst != 1) {
572                                 /* bus mastering control is necessary */
573                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
574                                         "C3 support requires BM control\n"));
575                                 return;
576                         } else {
577                                 /* Here we enter C3 without bus mastering */
578                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
579                                         "C3 support without BM control\n"));
580                         }
581                 }
582         } else {
583                 /*
584                  * WBINVD should be set in fadt, for C3 state to be
585                  * supported on when bm_check is not required.
586                  */
587                 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
588                         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
589                                           "Cache invalidation should work properly"
590                                           " for C3 to be enabled on SMP systems\n"));
591                         return;
592                 }
593         }
594
595         /*
596          * Otherwise we've met all of our C3 requirements.
597          * Normalize the C3 latency to expidite policy.  Enable
598          * checking of bus mastering status (bm_check) so we can
599          * use this in our C3 policy
600          */
601         cx->valid = 1;
602
603         cx->latency_ticks = cx->latency;
604         /*
605          * On older chipsets, BM_RLD needs to be set
606          * in order for Bus Master activity to wake the
607          * system from C3.  Newer chipsets handle DMA
608          * during C3 automatically and BM_RLD is a NOP.
609          * In either case, the proper way to
610          * handle BM_RLD is to set it and leave it set.
611          */
612         acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
613
614         return;
615 }
616
617 static int acpi_processor_power_verify(struct acpi_processor *pr)
618 {
619         unsigned int i;
620         unsigned int working = 0;
621
622         pr->power.timer_broadcast_on_state = INT_MAX;
623
624         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
625                 struct acpi_processor_cx *cx = &pr->power.states[i];
626
627                 switch (cx->type) {
628                 case ACPI_STATE_C1:
629                         cx->valid = 1;
630                         break;
631
632                 case ACPI_STATE_C2:
633                         acpi_processor_power_verify_c2(cx);
634                         break;
635
636                 case ACPI_STATE_C3:
637                         acpi_processor_power_verify_c3(pr, cx);
638                         break;
639                 }
640                 if (!cx->valid)
641                         continue;
642
643                 lapic_timer_check_state(i, pr, cx);
644                 tsc_check_state(cx->type);
645                 working++;
646         }
647
648         lapic_timer_propagate_broadcast(pr);
649
650         return (working);
651 }
652
653 static int acpi_processor_get_power_info(struct acpi_processor *pr)
654 {
655         unsigned int i;
656         int result;
657
658
659         /* NOTE: the idle thread may not be running while calling
660          * this function */
661
662         /* Zero initialize all the C-states info. */
663         memset(pr->power.states, 0, sizeof(pr->power.states));
664
665         result = acpi_processor_get_power_info_cst(pr);
666         if (result == -ENODEV)
667                 result = acpi_processor_get_power_info_fadt(pr);
668
669         if (result)
670                 return result;
671
672         acpi_processor_get_power_info_default(pr);
673
674         pr->power.count = acpi_processor_power_verify(pr);
675
676         /*
677          * if one state of type C2 or C3 is available, mark this
678          * CPU as being "idle manageable"
679          */
680         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
681                 if (pr->power.states[i].valid) {
682                         pr->power.count = i;
683                         if (pr->power.states[i].type >= ACPI_STATE_C2)
684                                 pr->flags.power = 1;
685                 }
686         }
687
688         return 0;
689 }
690
691 #ifdef CONFIG_ACPI_PROCFS
692 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
693 {
694         struct acpi_processor *pr = seq->private;
695         unsigned int i;
696
697
698         if (!pr)
699                 goto end;
700
701         seq_printf(seq, "active state:            C%zd\n"
702                    "max_cstate:              C%d\n"
703                    "maximum allowed latency: %d usec\n",
704                    pr->power.state ? pr->power.state - pr->power.states : 0,
705                    max_cstate, pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY));
706
707         seq_puts(seq, "states:\n");
708
709         for (i = 1; i <= pr->power.count; i++) {
710                 seq_printf(seq, "   %cC%d:                  ",
711                            (&pr->power.states[i] ==
712                             pr->power.state ? '*' : ' '), i);
713
714                 if (!pr->power.states[i].valid) {
715                         seq_puts(seq, "<not supported>\n");
716                         continue;
717                 }
718
719                 switch (pr->power.states[i].type) {
720                 case ACPI_STATE_C1:
721                         seq_printf(seq, "type[C1] ");
722                         break;
723                 case ACPI_STATE_C2:
724                         seq_printf(seq, "type[C2] ");
725                         break;
726                 case ACPI_STATE_C3:
727                         seq_printf(seq, "type[C3] ");
728                         break;
729                 default:
730                         seq_printf(seq, "type[--] ");
731                         break;
732                 }
733
734                 if (pr->power.states[i].promotion.state)
735                         seq_printf(seq, "promotion[C%zd] ",
736                                    (pr->power.states[i].promotion.state -
737                                     pr->power.states));
738                 else
739                         seq_puts(seq, "promotion[--] ");
740
741                 if (pr->power.states[i].demotion.state)
742                         seq_printf(seq, "demotion[C%zd] ",
743                                    (pr->power.states[i].demotion.state -
744                                     pr->power.states));
745                 else
746                         seq_puts(seq, "demotion[--] ");
747
748                 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
749                            pr->power.states[i].latency,
750                            pr->power.states[i].usage,
751                            (unsigned long long)pr->power.states[i].time);
752         }
753
754       end:
755         return 0;
756 }
757
758 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
759 {
760         return single_open(file, acpi_processor_power_seq_show,
761                            PDE(inode)->data);
762 }
763
764 static const struct file_operations acpi_processor_power_fops = {
765         .owner = THIS_MODULE,
766         .open = acpi_processor_power_open_fs,
767         .read = seq_read,
768         .llseek = seq_lseek,
769         .release = single_release,
770 };
771 #endif
772
773 /**
774  * acpi_idle_bm_check - checks if bus master activity was detected
775  */
776 static int acpi_idle_bm_check(void)
777 {
778         u32 bm_status = 0;
779
780         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
781         if (bm_status)
782                 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
783         /*
784          * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
785          * the true state of bus mastering activity; forcing us to
786          * manually check the BMIDEA bit of each IDE channel.
787          */
788         else if (errata.piix4.bmisx) {
789                 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
790                     || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
791                         bm_status = 1;
792         }
793         return bm_status;
794 }
795
796 /**
797  * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
798  * @cx: cstate data
799  *
800  * Caller disables interrupt before call and enables interrupt after return.
801  */
802 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
803 {
804         /* Don't trace irqs off for idle */
805         stop_critical_timings();
806         if (cx->entry_method == ACPI_CSTATE_FFH) {
807                 /* Call into architectural FFH based C-state */
808                 acpi_processor_ffh_cstate_enter(cx);
809         } else if (cx->entry_method == ACPI_CSTATE_HALT) {
810                 acpi_safe_halt();
811         } else {
812                 int unused;
813                 /* IO port based C-state */
814                 inb(cx->address);
815                 /* Dummy wait op - must do something useless after P_LVL2 read
816                    because chipsets cannot guarantee that STPCLK# signal
817                    gets asserted in time to freeze execution properly. */
818                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
819         }
820         start_critical_timings();
821 }
822
823 /**
824  * acpi_idle_enter_c1 - enters an ACPI C1 state-type
825  * @dev: the target CPU
826  * @state: the state data
827  *
828  * This is equivalent to the HALT instruction.
829  */
830 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
831                               struct cpuidle_state *state)
832 {
833         ktime_t  kt1, kt2;
834         s64 idle_time;
835         struct acpi_processor *pr;
836         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
837
838         pr = __get_cpu_var(processors);
839
840         if (unlikely(!pr))
841                 return 0;
842
843         local_irq_disable();
844
845         /* Do not access any ACPI IO ports in suspend path */
846         if (acpi_idle_suspend) {
847                 local_irq_enable();
848                 cpu_relax();
849                 return 0;
850         }
851
852         lapic_timer_state_broadcast(pr, cx, 1);
853         kt1 = ktime_get_real();
854         acpi_idle_do_entry(cx);
855         kt2 = ktime_get_real();
856         idle_time =  ktime_to_us(ktime_sub(kt2, kt1));
857
858         local_irq_enable();
859         cx->usage++;
860         lapic_timer_state_broadcast(pr, cx, 0);
861
862         return idle_time;
863 }
864
865 /**
866  * acpi_idle_enter_simple - enters an ACPI state without BM handling
867  * @dev: the target CPU
868  * @state: the state data
869  */
870 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
871                                   struct cpuidle_state *state)
872 {
873         struct acpi_processor *pr;
874         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
875         ktime_t  kt1, kt2;
876         s64 idle_time;
877         s64 sleep_ticks = 0;
878
879         pr = __get_cpu_var(processors);
880
881         if (unlikely(!pr))
882                 return 0;
883
884         if (acpi_idle_suspend)
885                 return(acpi_idle_enter_c1(dev, state));
886
887         local_irq_disable();
888         current_thread_info()->status &= ~TS_POLLING;
889         /*
890          * TS_POLLING-cleared state must be visible before we test
891          * NEED_RESCHED:
892          */
893         smp_mb();
894
895         if (unlikely(need_resched())) {
896                 current_thread_info()->status |= TS_POLLING;
897                 local_irq_enable();
898                 return 0;
899         }
900
901         /*
902          * Must be done before busmaster disable as we might need to
903          * access HPET !
904          */
905         lapic_timer_state_broadcast(pr, cx, 1);
906
907         if (cx->type == ACPI_STATE_C3)
908                 ACPI_FLUSH_CPU_CACHE();
909
910         kt1 = ktime_get_real();
911         /* Tell the scheduler that we are going deep-idle: */
912         sched_clock_idle_sleep_event();
913         acpi_idle_do_entry(cx);
914         kt2 = ktime_get_real();
915         idle_time =  ktime_to_us(ktime_sub(kt2, kt1));
916
917         sleep_ticks = us_to_pm_timer_ticks(idle_time);
918
919         /* Tell the scheduler how much we idled: */
920         sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
921
922         local_irq_enable();
923         current_thread_info()->status |= TS_POLLING;
924
925         cx->usage++;
926
927         lapic_timer_state_broadcast(pr, cx, 0);
928         cx->time += sleep_ticks;
929         return idle_time;
930 }
931
932 static int c3_cpu_count;
933 static DEFINE_SPINLOCK(c3_lock);
934
935 /**
936  * acpi_idle_enter_bm - enters C3 with proper BM handling
937  * @dev: the target CPU
938  * @state: the state data
939  *
940  * If BM is detected, the deepest non-C3 idle state is entered instead.
941  */
942 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
943                               struct cpuidle_state *state)
944 {
945         struct acpi_processor *pr;
946         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
947         ktime_t  kt1, kt2;
948         s64 idle_time;
949         s64 sleep_ticks = 0;
950
951
952         pr = __get_cpu_var(processors);
953
954         if (unlikely(!pr))
955                 return 0;
956
957         if (acpi_idle_suspend)
958                 return(acpi_idle_enter_c1(dev, state));
959
960         if (acpi_idle_bm_check()) {
961                 if (dev->safe_state) {
962                         dev->last_state = dev->safe_state;
963                         return dev->safe_state->enter(dev, dev->safe_state);
964                 } else {
965                         local_irq_disable();
966                         acpi_safe_halt();
967                         local_irq_enable();
968                         return 0;
969                 }
970         }
971
972         local_irq_disable();
973         current_thread_info()->status &= ~TS_POLLING;
974         /*
975          * TS_POLLING-cleared state must be visible before we test
976          * NEED_RESCHED:
977          */
978         smp_mb();
979
980         if (unlikely(need_resched())) {
981                 current_thread_info()->status |= TS_POLLING;
982                 local_irq_enable();
983                 return 0;
984         }
985
986         acpi_unlazy_tlb(smp_processor_id());
987
988         /* Tell the scheduler that we are going deep-idle: */
989         sched_clock_idle_sleep_event();
990         /*
991          * Must be done before busmaster disable as we might need to
992          * access HPET !
993          */
994         lapic_timer_state_broadcast(pr, cx, 1);
995
996         kt1 = ktime_get_real();
997         /*
998          * disable bus master
999          * bm_check implies we need ARB_DIS
1000          * !bm_check implies we need cache flush
1001          * bm_control implies whether we can do ARB_DIS
1002          *
1003          * That leaves a case where bm_check is set and bm_control is
1004          * not set. In that case we cannot do much, we enter C3
1005          * without doing anything.
1006          */
1007         if (pr->flags.bm_check && pr->flags.bm_control) {
1008                 spin_lock(&c3_lock);
1009                 c3_cpu_count++;
1010                 /* Disable bus master arbitration when all CPUs are in C3 */
1011                 if (c3_cpu_count == num_online_cpus())
1012                         acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
1013                 spin_unlock(&c3_lock);
1014         } else if (!pr->flags.bm_check) {
1015                 ACPI_FLUSH_CPU_CACHE();
1016         }
1017
1018         acpi_idle_do_entry(cx);
1019
1020         /* Re-enable bus master arbitration */
1021         if (pr->flags.bm_check && pr->flags.bm_control) {
1022                 spin_lock(&c3_lock);
1023                 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
1024                 c3_cpu_count--;
1025                 spin_unlock(&c3_lock);
1026         }
1027         kt2 = ktime_get_real();
1028         idle_time =  ktime_to_us(ktime_sub(kt2, kt1));
1029
1030         sleep_ticks = us_to_pm_timer_ticks(idle_time);
1031         /* Tell the scheduler how much we idled: */
1032         sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
1033
1034         local_irq_enable();
1035         current_thread_info()->status |= TS_POLLING;
1036
1037         cx->usage++;
1038
1039         lapic_timer_state_broadcast(pr, cx, 0);
1040         cx->time += sleep_ticks;
1041         return idle_time;
1042 }
1043
1044 struct cpuidle_driver acpi_idle_driver = {
1045         .name =         "acpi_idle",
1046         .owner =        THIS_MODULE,
1047 };
1048
1049 /**
1050  * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1051  * @pr: the ACPI processor
1052  */
1053 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1054 {
1055         int i, count = CPUIDLE_DRIVER_STATE_START;
1056         struct acpi_processor_cx *cx;
1057         struct cpuidle_state *state;
1058         struct cpuidle_device *dev = &pr->power.dev;
1059
1060         if (!pr->flags.power_setup_done)
1061                 return -EINVAL;
1062
1063         if (pr->flags.power == 0) {
1064                 return -EINVAL;
1065         }
1066
1067         dev->cpu = pr->id;
1068         for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1069                 dev->states[i].name[0] = '\0';
1070                 dev->states[i].desc[0] = '\0';
1071         }
1072
1073         if (max_cstate == 0)
1074                 max_cstate = 1;
1075
1076         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1077                 cx = &pr->power.states[i];
1078                 state = &dev->states[count];
1079
1080                 if (!cx->valid)
1081                         continue;
1082
1083 #ifdef CONFIG_HOTPLUG_CPU
1084                 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1085                     !pr->flags.has_cst &&
1086                     !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1087                         continue;
1088 #endif
1089                 cpuidle_set_statedata(state, cx);
1090
1091                 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1092                 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1093                 state->exit_latency = cx->latency;
1094                 state->target_residency = cx->latency * latency_factor;
1095                 state->power_usage = cx->power;
1096
1097                 state->flags = 0;
1098                 switch (cx->type) {
1099                         case ACPI_STATE_C1:
1100                         state->flags |= CPUIDLE_FLAG_SHALLOW;
1101                         if (cx->entry_method == ACPI_CSTATE_FFH)
1102                                 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1103
1104                         state->enter = acpi_idle_enter_c1;
1105                         dev->safe_state = state;
1106                         break;
1107
1108                         case ACPI_STATE_C2:
1109                         state->flags |= CPUIDLE_FLAG_BALANCED;
1110                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1111                         state->enter = acpi_idle_enter_simple;
1112                         dev->safe_state = state;
1113                         break;
1114
1115                         case ACPI_STATE_C3:
1116                         state->flags |= CPUIDLE_FLAG_DEEP;
1117                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1118                         state->flags |= CPUIDLE_FLAG_CHECK_BM;
1119                         state->enter = pr->flags.bm_check ?
1120                                         acpi_idle_enter_bm :
1121                                         acpi_idle_enter_simple;
1122                         break;
1123                 }
1124
1125                 count++;
1126                 if (count == CPUIDLE_STATE_MAX)
1127                         break;
1128         }
1129
1130         dev->state_count = count;
1131
1132         if (!count)
1133                 return -EINVAL;
1134
1135         return 0;
1136 }
1137
1138 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1139 {
1140         int ret = 0;
1141
1142         if (boot_option_idle_override)
1143                 return 0;
1144
1145         if (!pr)
1146                 return -EINVAL;
1147
1148         if (nocst) {
1149                 return -ENODEV;
1150         }
1151
1152         if (!pr->flags.power_setup_done)
1153                 return -ENODEV;
1154
1155         cpuidle_pause_and_lock();
1156         cpuidle_disable_device(&pr->power.dev);
1157         acpi_processor_get_power_info(pr);
1158         if (pr->flags.power) {
1159                 acpi_processor_setup_cpuidle(pr);
1160                 ret = cpuidle_enable_device(&pr->power.dev);
1161         }
1162         cpuidle_resume_and_unlock();
1163
1164         return ret;
1165 }
1166
1167 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1168                               struct acpi_device *device)
1169 {
1170         acpi_status status = 0;
1171         static int first_run;
1172 #ifdef CONFIG_ACPI_PROCFS
1173         struct proc_dir_entry *entry = NULL;
1174 #endif
1175
1176         if (boot_option_idle_override)
1177                 return 0;
1178
1179         if (!first_run) {
1180                 if (idle_halt) {
1181                         /*
1182                          * When the boot option of "idle=halt" is added, halt
1183                          * is used for CPU IDLE.
1184                          * In such case C2/C3 is meaningless. So the max_cstate
1185                          * is set to one.
1186                          */
1187                         max_cstate = 1;
1188                 }
1189                 dmi_check_system(processor_power_dmi_table);
1190                 max_cstate = acpi_processor_cstate_check(max_cstate);
1191                 if (max_cstate < ACPI_C_STATES_MAX)
1192                         printk(KERN_NOTICE
1193                                "ACPI: processor limited to max C-state %d\n",
1194                                max_cstate);
1195                 first_run++;
1196         }
1197
1198         if (!pr)
1199                 return -EINVAL;
1200
1201         if (acpi_gbl_FADT.cst_control && !nocst) {
1202                 status =
1203                     acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1204                 if (ACPI_FAILURE(status)) {
1205                         ACPI_EXCEPTION((AE_INFO, status,
1206                                         "Notifying BIOS of _CST ability failed"));
1207                 }
1208         }
1209
1210         acpi_processor_get_power_info(pr);
1211         pr->flags.power_setup_done = 1;
1212
1213         /*
1214          * Install the idle handler if processor power management is supported.
1215          * Note that we use previously set idle handler will be used on
1216          * platforms that only support C1.
1217          */
1218         if (pr->flags.power) {
1219                 acpi_processor_setup_cpuidle(pr);
1220                 if (cpuidle_register_device(&pr->power.dev))
1221                         return -EIO;
1222         }
1223 #ifdef CONFIG_ACPI_PROCFS
1224         /* 'power' [R] */
1225         entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
1226                                  S_IRUGO, acpi_device_dir(device),
1227                                  &acpi_processor_power_fops,
1228                                  acpi_driver_data(device));
1229         if (!entry)
1230                 return -EIO;
1231 #endif
1232         return 0;
1233 }
1234
1235 int acpi_processor_power_exit(struct acpi_processor *pr,
1236                               struct acpi_device *device)
1237 {
1238         if (boot_option_idle_override)
1239                 return 0;
1240
1241         cpuidle_unregister_device(&pr->power.dev);
1242         pr->flags.power_setup_done = 0;
1243
1244 #ifdef CONFIG_ACPI_PROCFS
1245         if (acpi_device_dir(device))
1246                 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1247                                   acpi_device_dir(device));
1248 #endif
1249
1250         return 0;
1251 }