2 * core routines for the asynchronous memory transfer/transform api
4 * Copyright © 2006, Intel Corporation.
6 * Dan Williams <dan.j.williams@intel.com>
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 #include <linux/rculist.h>
27 #include <linux/kernel.h>
28 #include <linux/async_tx.h>
30 #ifdef CONFIG_DMA_ENGINE
31 static int __init async_tx_init(void)
33 async_dmaengine_get();
35 printk(KERN_INFO "async_tx: api initialized (async)\n");
40 static void __exit async_tx_exit(void)
42 async_dmaengine_put();
46 * __async_tx_find_channel - find a channel to carry out the operation or let
47 * the transaction execute synchronously
48 * @submit: transaction dependency and submission modifiers
49 * @tx_type: transaction type
52 __async_tx_find_channel(struct async_submit_ctl *submit,
53 enum dma_transaction_type tx_type)
55 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
57 /* see if we can keep the chain on one channel */
59 dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
60 return depend_tx->chan;
61 return async_dma_find_channel(tx_type);
63 EXPORT_SYMBOL_GPL(__async_tx_find_channel);
65 static int __init async_tx_init(void)
67 printk(KERN_INFO "async_tx: api initialized (sync-only)\n");
71 static void __exit async_tx_exit(void)
79 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
81 * @depend_tx: the operation that must finish before the new operation runs
82 * @tx: the new operation
85 async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
86 struct dma_async_tx_descriptor *tx)
88 struct dma_chan *chan;
89 struct dma_device *device;
90 struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
92 /* first check to see if we can still append to depend_tx */
93 spin_lock_bh(&depend_tx->lock);
94 if (depend_tx->parent && depend_tx->chan == tx->chan) {
95 tx->parent = depend_tx;
99 spin_unlock_bh(&depend_tx->lock);
104 chan = depend_tx->chan;
105 device = chan->device;
107 /* see if we can schedule an interrupt
108 * otherwise poll for completion
110 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
111 intr_tx = device->device_prep_dma_interrupt(chan, 0);
116 intr_tx->callback = NULL;
117 intr_tx->callback_param = NULL;
118 tx->parent = intr_tx;
119 /* safe to set ->next outside the lock since we know we are
124 /* check if we need to append */
125 spin_lock_bh(&depend_tx->lock);
126 if (depend_tx->parent) {
127 intr_tx->parent = depend_tx;
128 depend_tx->next = intr_tx;
129 async_tx_ack(intr_tx);
132 spin_unlock_bh(&depend_tx->lock);
135 intr_tx->parent = NULL;
136 intr_tx->tx_submit(intr_tx);
137 async_tx_ack(intr_tx);
140 if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
141 panic("%s: DMA_ERROR waiting for depend_tx\n",
149 * submit_disposition - flags for routing an incoming operation
150 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
151 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
152 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
154 * while holding depend_tx->lock we must avoid submitting new operations
155 * to prevent a circular locking dependency with drivers that already
156 * hold a channel lock when calling async_tx_run_dependencies.
158 enum submit_disposition {
160 ASYNC_TX_CHANNEL_SWITCH,
161 ASYNC_TX_DIRECT_SUBMIT,
165 async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
166 struct async_submit_ctl *submit)
168 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
170 tx->callback = submit->cb_fn;
171 tx->callback_param = submit->cb_param;
174 enum submit_disposition s;
176 /* sanity check the dependency chain:
177 * 1/ if ack is already set then we cannot be sure
178 * we are referring to the correct operation
179 * 2/ dependencies are 1:1 i.e. two transactions can
180 * not depend on the same parent
182 BUG_ON(async_tx_test_ack(depend_tx) || depend_tx->next ||
185 /* the lock prevents async_tx_run_dependencies from missing
186 * the setting of ->next when ->parent != NULL
188 spin_lock_bh(&depend_tx->lock);
189 if (depend_tx->parent) {
190 /* we have a parent so we can not submit directly
191 * if we are staying on the same channel: append
192 * else: channel switch
194 if (depend_tx->chan == chan) {
195 tx->parent = depend_tx;
196 depend_tx->next = tx;
197 s = ASYNC_TX_SUBMITTED;
199 s = ASYNC_TX_CHANNEL_SWITCH;
201 /* we do not have a parent so we may be able to submit
202 * directly if we are staying on the same channel
204 if (depend_tx->chan == chan)
205 s = ASYNC_TX_DIRECT_SUBMIT;
207 s = ASYNC_TX_CHANNEL_SWITCH;
209 spin_unlock_bh(&depend_tx->lock);
212 case ASYNC_TX_SUBMITTED:
214 case ASYNC_TX_CHANNEL_SWITCH:
215 async_tx_channel_switch(depend_tx, tx);
217 case ASYNC_TX_DIRECT_SUBMIT:
227 if (submit->flags & ASYNC_TX_ACK)
231 async_tx_ack(depend_tx);
233 EXPORT_SYMBOL_GPL(async_tx_submit);
236 * async_trigger_callback - schedules the callback function to be run
237 * @submit: submission and completion parameters
239 * honored flags: ASYNC_TX_ACK
241 * The callback is run after any dependent operations have completed.
243 struct dma_async_tx_descriptor *
244 async_trigger_callback(struct async_submit_ctl *submit)
246 struct dma_chan *chan;
247 struct dma_device *device;
248 struct dma_async_tx_descriptor *tx;
249 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
252 chan = depend_tx->chan;
253 device = chan->device;
255 /* see if we can schedule an interrupt
256 * otherwise poll for completion
258 if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
261 tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
266 pr_debug("%s: (async)\n", __func__);
268 async_tx_submit(chan, tx, submit);
270 pr_debug("%s: (sync)\n", __func__);
272 /* wait for any prerequisite operations */
273 async_tx_quiesce(&submit->depend_tx);
275 async_tx_sync_epilog(submit);
280 EXPORT_SYMBOL_GPL(async_trigger_callback);
283 * async_tx_quiesce - ensure tx is complete and freeable upon return
284 * @tx - transaction to quiesce
286 void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
289 /* if ack is already set then we cannot be sure
290 * we are referring to the correct operation
292 BUG_ON(async_tx_test_ack(*tx));
293 if (dma_wait_for_async_tx(*tx) == DMA_ERROR)
294 panic("DMA_ERROR waiting for transaction\n");
299 EXPORT_SYMBOL_GPL(async_tx_quiesce);
301 module_init(async_tx_init);
302 module_exit(async_tx_exit);
304 MODULE_AUTHOR("Intel Corporation");
305 MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
306 MODULE_LICENSE("GPL");