SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/x86/mm/pageattr.c

   1 /*
   2  * Copyright 2002 Andi Kleen, SuSE Labs.
   3  * Thanks to Ben LaHaise for precious feedback.
   4  */
   5 #include <linux/highmem.h>
   6 #include <linux/bootmem.h>
   7 #include <linux/module.h>
   8 #include <linux/sched.h>
   9 #include <linux/slab.h>
  10 #include <linux/mm.h>
  11
  12 #include <asm/e820.h>
  13 #include <asm/processor.h>
  14 #include <asm/tlbflush.h>
  15 #include <asm/sections.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/pgalloc.h>
  18
  19 static inline int
  20 within(unsigned long addr, unsigned long start, unsigned long end)
  21 {
  22         return addr >= start && addr < end;
  23 }
  24
  25 /*
  26  * Flushing functions
  27  */
  28
  29 /**
  30  * clflush_cache_range - flush a cache range with clflush
  31  * @addr:       virtual start address
  32  * @size:       number of bytes to flush
  33  *
  34  * clflush is an unordered instruction which needs fencing with mfence
  35  * to avoid ordering issues.
  36  */
  37 void clflush_cache_range(void *vaddr, unsigned int size)
  38 {
  39         void *vend = vaddr + size - 1;
  40
  41         mb();
  42
  43         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
  44                 clflush(vaddr);
  45         /*
  46          * Flush any possible final partial cacheline:
  47          */
  48         clflush(vend);
  49
  50         mb();
  51 }
  52
  53 static void __cpa_flush_all(void *arg)
  54 {
  55         unsigned long cache = (unsigned long)arg;
  56
  57         /*
  58          * Flush all to work around Errata in early athlons regarding
  59          * large page flushing.
  60          */
  61         __flush_tlb_all();
  62
  63         if (cache && boot_cpu_data.x86_model >= 4)
  64                 wbinvd();
  65 }
  66
  67 static void cpa_flush_all(unsigned long cache)
  68 {
  69         BUG_ON(irqs_disabled());
  70
  71         on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
  72 }
  73
  74 static void __cpa_flush_range(void *arg)
  75 {
  76         /*
  77          * We could optimize that further and do individual per page
  78          * tlb invalidates for a low number of pages. Caveat: we must
  79          * flush the high aliases on 64bit as well.
  80          */
  81         __flush_tlb_all();
  82 }
  83
  84 static void cpa_flush_range(unsigned long start, int numpages, int cache)
  85 {
  86         unsigned int i, level;
  87         unsigned long addr;
  88
  89         BUG_ON(irqs_disabled());
  90         WARN_ON(PAGE_ALIGN(start) != start);
  91
  92         on_each_cpu(__cpa_flush_range, NULL, 1, 1);
  93
  94         if (!cache)
  95                 return;
  96
  97         /*
  98          * We only need to flush on one CPU,
  99          * clflush is a MESI-coherent instruction that
 100          * will cause all other CPUs to flush the same
 101          * cachelines:
 102          */
 103         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
 104                 pte_t *pte = lookup_address(addr, &level);
 105
 106                 /*
 107                  * Only flush present addresses:
 108                  */
 109                 if (pte && pte_present(*pte))
 110                         clflush_cache_range((void *) addr, PAGE_SIZE);
 111         }
 112 }
 113
 114 #define HIGH_MAP_START  __START_KERNEL_map
 115 #define HIGH_MAP_END    (__START_KERNEL_map + KERNEL_TEXT_SIZE)
 116
 117
 118 /*
 119  * Converts a virtual address to a X86-64 highmap address
 120  */
 121 static unsigned long virt_to_highmap(void *address)
 122 {
 123 #ifdef CONFIG_X86_64
 124         return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
 125 #else
 126         return (unsigned long)address;
 127 #endif
 128 }
 129
 130 /*
 131  * Certain areas of memory on x86 require very specific protection flags,
 132  * for example the BIOS area or kernel text. Callers don't always get this
 133  * right (again, ioremap() on BIOS memory is not uncommon) so this function
 134  * checks and fixes these known static required protection bits.
 135  */
 136 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
 137 {
 138         pgprot_t forbidden = __pgprot(0);
 139
 140         /*
 141          * The BIOS area between 640k and 1Mb needs to be executable for
 142          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
 143          */
 144         if (within(__pa(address), BIOS_BEGIN, BIOS_END))
 145                 pgprot_val(forbidden) |= _PAGE_NX;
 146
 147         /*
 148          * The kernel text needs to be executable for obvious reasons
 149          * Does not cover __inittext since that is gone later on
 150          */
 151         if (within(address, (unsigned long)_text, (unsigned long)_etext))
 152                 pgprot_val(forbidden) |= _PAGE_NX;
 153         /*
 154          * Do the same for the x86-64 high kernel mapping
 155          */
 156         if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
 157                 pgprot_val(forbidden) |= _PAGE_NX;
 158
 159
 160 #ifdef CONFIG_DEBUG_RODATA
 161         /* The .rodata section needs to be read-only */
 162         if (within(address, (unsigned long)__start_rodata,
 163                                 (unsigned long)__end_rodata))
 164                 pgprot_val(forbidden) |= _PAGE_RW;
 165         /*
 166          * Do the same for the x86-64 high kernel mapping
 167          */
 168         if (within(address, virt_to_highmap(__start_rodata),
 169                                 virt_to_highmap(__end_rodata)))
 170                 pgprot_val(forbidden) |= _PAGE_RW;
 171 #endif
 172
 173         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
 174
 175         return prot;
 176 }
 177
 178 pte_t *lookup_address(unsigned long address, int *level)
 179 {
 180         pgd_t *pgd = pgd_offset_k(address);
 181         pud_t *pud;
 182         pmd_t *pmd;
 183
 184         *level = PG_LEVEL_NONE;
 185
 186         if (pgd_none(*pgd))
 187                 return NULL;
 188         pud = pud_offset(pgd, address);
 189         if (pud_none(*pud))
 190                 return NULL;
 191         pmd = pmd_offset(pud, address);
 192         if (pmd_none(*pmd))
 193                 return NULL;
 194
 195         *level = PG_LEVEL_2M;
 196         if (pmd_large(*pmd))
 197                 return (pte_t *)pmd;
 198
 199         *level = PG_LEVEL_4K;
 200         return pte_offset_kernel(pmd, address);
 201 }
 202
 203 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
 204 {
 205         /* change init_mm */
 206         set_pte_atomic(kpte, pte);
 207 #ifdef CONFIG_X86_32
 208         if (!SHARED_KERNEL_PMD) {
 209                 struct page *page;
 210
 211                 list_for_each_entry(page, &pgd_list, lru) {
 212                         pgd_t *pgd;
 213                         pud_t *pud;
 214                         pmd_t *pmd;
 215
 216                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
 217                         pud = pud_offset(pgd, address);
 218                         pmd = pmd_offset(pud, address);
 219                         set_pte_atomic((pte_t *)pmd, pte);
 220                 }
 221         }
 222 #endif
 223 }
 224
 225 static int split_large_page(pte_t *kpte, unsigned long address)
 226 {
 227         pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
 228         gfp_t gfp_flags = GFP_KERNEL;
 229         unsigned long flags, addr, pfn;
 230         pte_t *pbase, *tmp;
 231         struct page *base;
 232         unsigned int i, level;
 233
 234 #ifdef CONFIG_DEBUG_PAGEALLOC
 235         gfp_flags = __GFP_HIGH | __GFP_NOFAIL | __GFP_NOWARN;
 236         gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
 237 #endif
 238         base = alloc_pages(gfp_flags, 0);
 239         if (!base)
 240                 return -ENOMEM;
 241
 242         spin_lock_irqsave(&pgd_lock, flags);
 243         /*
 244          * Check for races, another CPU might have split this page
 245          * up for us already:
 246          */
 247         tmp = lookup_address(address, &level);
 248         if (tmp != kpte) {
 249                 WARN_ON_ONCE(1);
 250                 goto out_unlock;
 251         }
 252
 253         address = __pa(address);
 254         addr = address & LARGE_PAGE_MASK;
 255         pbase = (pte_t *)page_address(base);
 256 #ifdef CONFIG_X86_32
 257         paravirt_alloc_pt(&init_mm, page_to_pfn(base));
 258 #endif
 259
 260         /*
 261          * Get the target pfn from the original entry:
 262          */
 263         pfn = pte_pfn(*kpte);
 264         for (i = 0; i < PTRS_PER_PTE; i++, pfn++)
 265                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
 266
 267         /*
 268          * Install the new, split up pagetable. Important detail here:
 269          *
 270          * On Intel the NX bit of all levels must be cleared to make a
 271          * page executable. See section 4.13.2 of Intel 64 and IA-32
 272          * Architectures Software Developer's Manual).
 273          */
 274         ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
 275         __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
 276         base = NULL;
 277
 278 out_unlock:
 279         spin_unlock_irqrestore(&pgd_lock, flags);
 280
 281         if (base)
 282                 __free_pages(base, 0);
 283
 284         return 0;
 285 }
 286
 287 static int
 288 __change_page_attr(unsigned long address, pgprot_t mask_set, pgprot_t mask_clr)
 289 {
 290         struct page *kpte_page;
 291         int level, err = 0;
 292         pte_t *kpte;
 293
 294 repeat:
 295         kpte = lookup_address(address, &level);
 296         if (!kpte)
 297                 return -EINVAL;
 298
 299         kpte_page = virt_to_page(kpte);
 300         BUG_ON(PageLRU(kpte_page));
 301         BUG_ON(PageCompound(kpte_page));
 302
 303         if (level == PG_LEVEL_4K) {
 304                 pte_t new_pte, old_pte = *kpte;
 305                 pgprot_t new_prot = pte_pgprot(old_pte);
 306
 307                 if(!pte_val(old_pte)) {
 308                         WARN_ON_ONCE(1);
 309                         return -EINVAL;
 310                 }
 311
 312                 pgprot_val(new_prot) &= ~pgprot_val(mask_clr);
 313                 pgprot_val(new_prot) |= pgprot_val(mask_set);
 314
 315                 new_prot = static_protections(new_prot, address);
 316
 317                 /*
 318                  * We need to keep the pfn from the existing PTE,
 319                  * after all we're only going to change it's attributes
 320                  * not the memory it points to
 321                  */
 322                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
 323                 set_pte_atomic(kpte, new_pte);
 324         } else {
 325                 err = split_large_page(kpte, address);
 326                 if (!err)
 327                         goto repeat;
 328         }
 329         return err;
 330 }
 331
 332 /**
 333  * change_page_attr_addr - Change page table attributes in linear mapping
 334  * @address: Virtual address in linear mapping.
 335  * @prot:    New page table attribute (PAGE_*)
 336  *
 337  * Change page attributes of a page in the direct mapping. This is a variant
 338  * of change_page_attr() that also works on memory holes that do not have
 339  * mem_map entry (pfn_valid() is false).
 340  *
 341  * See change_page_attr() documentation for more details.
 342  *
 343  * Modules and drivers should use the set_memory_* APIs instead.
 344  */
 345
 346
 347 static int
 348 change_page_attr_addr(unsigned long address, pgprot_t mask_set,
 349                       pgprot_t mask_clr)
 350 {
 351         int err;
 352
 353 #ifdef CONFIG_X86_64
 354         unsigned long phys_addr = __pa(address);
 355
 356         /*
 357          * If we are inside the high mapped kernel range, then we
 358          * fixup the low mapping first. __va() returns the virtual
 359          * address in the linear mapping:
 360          */
 361         if (within(address, HIGH_MAP_START, HIGH_MAP_END))
 362                 address = (unsigned long) __va(phys_addr);
 363 #endif
 364
 365         err = __change_page_attr(address, mask_set, mask_clr);
 366         if (err)
 367                 return err;
 368
 369 #ifdef CONFIG_X86_64
 370         /*
 371          * If the physical address is inside the kernel map, we need
 372          * to touch the high mapped kernel as well:
 373          */
 374         if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
 375                 /*
 376                  * Calc the high mapping address. See __phys_addr()
 377                  * for the non obvious details.
 378                  *
 379                  * Note that NX and other required permissions are
 380                  * checked in static_protections().
 381                  */
 382                 address = phys_addr + HIGH_MAP_START - phys_base;
 383
 384                 /*
 385                  * Our high aliases are imprecise, because we check
 386                  * everything between 0 and KERNEL_TEXT_SIZE, so do
 387                  * not propagate lookup failures back to users:
 388                  */
 389                 __change_page_attr(address, mask_set, mask_clr);
 390         }
 391 #endif
 392         return err;
 393 }
 394
 395 static int __change_page_attr_set_clr(unsigned long addr, int numpages,
 396                                       pgprot_t mask_set, pgprot_t mask_clr)
 397 {
 398         unsigned int i;
 399         int ret;
 400
 401         for (i = 0; i < numpages ; i++, addr += PAGE_SIZE) {
 402                 ret = change_page_attr_addr(addr, mask_set, mask_clr);
 403                 if (ret)
 404                         return ret;
 405         }
 406
 407         return 0;
 408 }
 409
 410 static inline int cache_attr(pgprot_t attr)
 411 {
 412         return pgprot_val(attr) &
 413                 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
 414 }
 415
 416 static int change_page_attr_set_clr(unsigned long addr, int numpages,
 417                                     pgprot_t mask_set, pgprot_t mask_clr)
 418 {
 419         int ret, cache;
 420
 421         /*
 422          * Check, if we are requested to change a not supported
 423          * feature:
 424          */
 425         mask_set = canon_pgprot(mask_set);
 426         mask_clr = canon_pgprot(mask_clr);
 427         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
 428                 return 0;
 429
 430         ret = __change_page_attr_set_clr(addr, numpages, mask_set, mask_clr);
 431
 432         /*
 433          * No need to flush, when we did not set any of the caching
 434          * attributes:
 435          */
 436         cache = cache_attr(mask_set);
 437
 438         /*
 439          * On success we use clflush, when the CPU supports it to
 440          * avoid the wbindv. If the CPU does not support it and in the
 441          * error case we fall back to cpa_flush_all (which uses
 442          * wbindv):
 443          */
 444         if (!ret && cpu_has_clflush)
 445                 cpa_flush_range(addr, numpages, cache);
 446         else
 447                 cpa_flush_all(cache);
 448
 449         return ret;
 450 }
 451
 452 static inline int change_page_attr_set(unsigned long addr, int numpages,
 453                                        pgprot_t mask)
 454 {
 455         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
 456 }
 457
 458 static inline int change_page_attr_clear(unsigned long addr, int numpages,
 459                                          pgprot_t mask)
 460 {
 461         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
 462 }
 463
 464 int set_memory_uc(unsigned long addr, int numpages)
 465 {
 466         return change_page_attr_set(addr, numpages,
 467                                     __pgprot(_PAGE_PCD | _PAGE_PWT));
 468 }
 469 EXPORT_SYMBOL(set_memory_uc);
 470
 471 int set_memory_wb(unsigned long addr, int numpages)
 472 {
 473         return change_page_attr_clear(addr, numpages,
 474                                       __pgprot(_PAGE_PCD | _PAGE_PWT));
 475 }
 476 EXPORT_SYMBOL(set_memory_wb);
 477
 478 int set_memory_x(unsigned long addr, int numpages)
 479 {
 480         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
 481 }
 482 EXPORT_SYMBOL(set_memory_x);
 483
 484 int set_memory_nx(unsigned long addr, int numpages)
 485 {
 486         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
 487 }
 488 EXPORT_SYMBOL(set_memory_nx);
 489
 490 int set_memory_ro(unsigned long addr, int numpages)
 491 {
 492         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
 493 }
 494
 495 int set_memory_rw(unsigned long addr, int numpages)
 496 {
 497         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
 498 }
 499
 500 int set_memory_np(unsigned long addr, int numpages)
 501 {
 502         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
 503 }
 504
 505 int set_pages_uc(struct page *page, int numpages)
 506 {
 507         unsigned long addr = (unsigned long)page_address(page);
 508
 509         return set_memory_uc(addr, numpages);
 510 }
 511 EXPORT_SYMBOL(set_pages_uc);
 512
 513 int set_pages_wb(struct page *page, int numpages)
 514 {
 515         unsigned long addr = (unsigned long)page_address(page);
 516
 517         return set_memory_wb(addr, numpages);
 518 }
 519 EXPORT_SYMBOL(set_pages_wb);
 520
 521 int set_pages_x(struct page *page, int numpages)
 522 {
 523         unsigned long addr = (unsigned long)page_address(page);
 524
 525         return set_memory_x(addr, numpages);
 526 }
 527 EXPORT_SYMBOL(set_pages_x);
 528
 529 int set_pages_nx(struct page *page, int numpages)
 530 {
 531         unsigned long addr = (unsigned long)page_address(page);
 532
 533         return set_memory_nx(addr, numpages);
 534 }
 535 EXPORT_SYMBOL(set_pages_nx);
 536
 537 int set_pages_ro(struct page *page, int numpages)
 538 {
 539         unsigned long addr = (unsigned long)page_address(page);
 540
 541         return set_memory_ro(addr, numpages);
 542 }
 543
 544 int set_pages_rw(struct page *page, int numpages)
 545 {
 546         unsigned long addr = (unsigned long)page_address(page);
 547
 548         return set_memory_rw(addr, numpages);
 549 }
 550
 551
 552 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_CPA_DEBUG)
 553 static inline int __change_page_attr_set(unsigned long addr, int numpages,
 554                                          pgprot_t mask)
 555 {
 556         return __change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
 557 }
 558
 559 static inline int __change_page_attr_clear(unsigned long addr, int numpages,
 560                                            pgprot_t mask)
 561 {
 562         return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
 563 }
 564 #endif
 565
 566 #ifdef CONFIG_DEBUG_PAGEALLOC
 567
 568 static int __set_pages_p(struct page *page, int numpages)
 569 {
 570         unsigned long addr = (unsigned long)page_address(page);
 571
 572         return __change_page_attr_set(addr, numpages,
 573                                       __pgprot(_PAGE_PRESENT | _PAGE_RW));
 574 }
 575
 576 static int __set_pages_np(struct page *page, int numpages)
 577 {
 578         unsigned long addr = (unsigned long)page_address(page);
 579
 580         return __change_page_attr_clear(addr, numpages,
 581                                         __pgprot(_PAGE_PRESENT));
 582 }
 583
 584 void kernel_map_pages(struct page *page, int numpages, int enable)
 585 {
 586         if (PageHighMem(page))
 587                 return;
 588         if (!enable) {
 589                 debug_check_no_locks_freed(page_address(page),
 590                                            numpages * PAGE_SIZE);
 591         }
 592
 593         /*
 594          * If page allocator is not up yet then do not call c_p_a():
 595          */
 596         if (!debug_pagealloc_enabled)
 597                 return;
 598
 599         /*
 600          * The return value is ignored - the calls cannot fail,
 601          * large pages are disabled at boot time:
 602          */
 603         if (enable)
 604                 __set_pages_p(page, numpages);
 605         else
 606                 __set_pages_np(page, numpages);
 607
 608         /*
 609          * We should perform an IPI and flush all tlbs,
 610          * but that can deadlock->flush only current cpu:
 611          */
 612         __flush_tlb_all();
 613 }
 614 #endif
 615
 616 /*
 617  * The testcases use internal knowledge of the implementation that shouldn't
 618  * be exposed to the rest of the kernel. Include these directly here.
 619  */
 620 #ifdef CONFIG_CPA_DEBUG
 621 #include "pageattr-test.c"
 622 #endif