2 * Copyright (C) 1995 Linus Torvalds
3 * Copyright (C) 2001,2002 Andi Kleen, SuSE Labs.
6 #include <linux/signal.h>
7 #include <linux/sched.h>
8 #include <linux/kernel.h>
9 #include <linux/errno.h>
10 #include <linux/string.h>
11 #include <linux/types.h>
12 #include <linux/ptrace.h>
13 #include <linux/mman.h>
15 #include <linux/smp.h>
16 #include <linux/interrupt.h>
17 #include <linux/init.h>
18 #include <linux/tty.h>
19 #include <linux/vt_kern.h> /* For unblank_screen() */
20 #include <linux/compiler.h>
21 #include <linux/highmem.h>
22 #include <linux/bootmem.h> /* for max_low_pfn */
23 #include <linux/vmalloc.h>
24 #include <linux/module.h>
25 #include <linux/kprobes.h>
26 #include <linux/uaccess.h>
27 #include <linux/kdebug.h>
29 #include <asm/system.h>
31 #include <asm/segment.h>
32 #include <asm/pgalloc.h>
34 #include <asm/tlbflush.h>
35 #include <asm/proto.h>
36 #include <asm-generic/sections.h>
39 * Page fault error code bits
40 * bit 0 == 0 means no page found, 1 means protection fault
41 * bit 1 == 0 means read, 1 means write
42 * bit 2 == 0 means kernel, 1 means user-mode
43 * bit 3 == 1 means use of reserved bit detected
44 * bit 4 == 1 means fault was an instruction fetch
46 #define PF_PROT (1<<0)
47 #define PF_WRITE (1<<1)
48 #define PF_USER (1<<2)
49 #define PF_RSVD (1<<3)
50 #define PF_INSTR (1<<4)
52 static inline int notify_page_fault(struct pt_regs *regs)
57 /* kprobe_running() needs smp_processor_id() */
58 if (!user_mode_vm(regs)) {
60 if (kprobe_running() && kprobe_fault_handler(regs, 14))
73 * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch.
74 * Check that here and ignore it.
77 * Sometimes the CPU reports invalid exceptions on prefetch.
78 * Check that here and ignore it.
80 * Opcode checker based on code by Richard Brunner
82 static int is_prefetch(struct pt_regs *regs, unsigned long addr,
83 unsigned long error_code)
88 unsigned char *max_instr;
91 * If it was a exec (instruction fetch) fault on NX page, then
92 * do not ignore the fault:
94 if (error_code & PF_INSTR)
97 instr = (unsigned char *)convert_ip_to_linear(current, regs);
98 max_instr = instr + 15;
100 if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE)
103 while (scan_more && instr < max_instr) {
104 unsigned char opcode;
105 unsigned char instr_hi;
106 unsigned char instr_lo;
108 if (probe_kernel_address(instr, opcode))
111 instr_hi = opcode & 0xf0;
112 instr_lo = opcode & 0x0f;
119 * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
120 * In X86_64 long mode, the CPU will signal invalid
121 * opcode if some of these prefixes are present so
122 * X86_64 will never get here anyway
124 scan_more = ((instr_lo & 7) == 0x6);
129 * In AMD64 long mode 0x40..0x4F are valid REX prefixes
130 * Need to figure out under what instruction mode the
131 * instruction was issued. Could check the LDT for lm,
132 * but for now it's good enough to assume that long
133 * mode only uses well known segments or kernel.
135 scan_more = (!user_mode(regs)) || (regs->cs == __USER_CS);
139 /* 0x64 thru 0x67 are valid prefixes in all modes. */
140 scan_more = (instr_lo & 0xC) == 0x4;
143 /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
144 scan_more = !instr_lo || (instr_lo>>1) == 1;
147 /* Prefetch instruction is 0x0F0D or 0x0F18 */
150 if (probe_kernel_address(instr, opcode))
152 prefetch = (instr_lo == 0xF) &&
153 (opcode == 0x0D || opcode == 0x18);
163 static void force_sig_info_fault(int si_signo, int si_code,
164 unsigned long address, struct task_struct *tsk)
168 info.si_signo = si_signo;
170 info.si_code = si_code;
171 info.si_addr = (void __user *)address;
172 force_sig_info(si_signo, &info, tsk);
176 static int bad_address(void *p)
179 return probe_kernel_address((unsigned long *)p, dummy);
183 static void dump_pagetable(unsigned long address)
186 __typeof__(pte_val(__pte(0))) page;
189 page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT];
190 #ifdef CONFIG_X86_PAE
191 printk("*pdpt = %016Lx ", page);
192 if ((page >> PAGE_SHIFT) < max_low_pfn
193 && page & _PAGE_PRESENT) {
195 page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT)
196 & (PTRS_PER_PMD - 1)];
197 printk(KERN_CONT "*pde = %016Lx ", page);
201 printk("*pde = %08lx ", page);
205 * We must not directly access the pte in the highpte
206 * case if the page table is located in highmem.
207 * And let's rather not kmap-atomic the pte, just in case
208 * it's allocated already.
210 if ((page >> PAGE_SHIFT) < max_low_pfn
211 && (page & _PAGE_PRESENT)
212 && !(page & _PAGE_PSE)) {
214 page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT)
215 & (PTRS_PER_PTE - 1)];
216 printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page);
220 #else /* CONFIG_X86_64 */
226 pgd = (pgd_t *)read_cr3();
228 pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK);
229 pgd += pgd_index(address);
230 if (bad_address(pgd)) goto bad;
231 printk("PGD %lx ", pgd_val(*pgd));
232 if (!pgd_present(*pgd)) goto ret;
234 pud = pud_offset(pgd, address);
235 if (bad_address(pud)) goto bad;
236 printk("PUD %lx ", pud_val(*pud));
237 if (!pud_present(*pud) || pud_large(*pud))
240 pmd = pmd_offset(pud, address);
241 if (bad_address(pmd)) goto bad;
242 printk("PMD %lx ", pmd_val(*pmd));
243 if (!pmd_present(*pmd) || pmd_large(*pmd)) goto ret;
245 pte = pte_offset_kernel(pmd, address);
246 if (bad_address(pte)) goto bad;
247 printk("PTE %lx", pte_val(*pte));
257 static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
259 unsigned index = pgd_index(address);
265 pgd_k = init_mm.pgd + index;
267 if (!pgd_present(*pgd_k))
271 * set_pgd(pgd, *pgd_k); here would be useless on PAE
272 * and redundant with the set_pmd() on non-PAE. As would
276 pud = pud_offset(pgd, address);
277 pud_k = pud_offset(pgd_k, address);
278 if (!pud_present(*pud_k))
281 pmd = pmd_offset(pud, address);
282 pmd_k = pmd_offset(pud_k, address);
283 if (!pmd_present(*pmd_k))
285 if (!pmd_present(*pmd)) {
286 set_pmd(pmd, *pmd_k);
287 arch_flush_lazy_mmu_mode();
289 BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
295 static const char errata93_warning[] =
296 KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n"
297 KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n"
298 KERN_ERR "******* Please consider a BIOS update.\n"
299 KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n";
302 /* Workaround for K8 erratum #93 & buggy BIOS.
303 BIOS SMM functions are required to use a specific workaround
304 to avoid corruption of the 64bit RIP register on C stepping K8.
305 A lot of BIOS that didn't get tested properly miss this.
306 The OS sees this as a page fault with the upper 32bits of RIP cleared.
307 Try to work around it here.
308 Note we only handle faults in kernel here.
309 Does nothing for X86_32
311 static int is_errata93(struct pt_regs *regs, unsigned long address)
315 if (address != regs->ip)
317 if ((address >> 32) != 0)
319 address |= 0xffffffffUL << 32;
320 if ((address >= (u64)_stext && address <= (u64)_etext) ||
321 (address >= MODULES_VADDR && address <= MODULES_END)) {
323 printk(errata93_warning);
334 * Work around K8 erratum #100 K8 in compat mode occasionally jumps to illegal
335 * addresses >4GB. We catch this in the page fault handler because these
336 * addresses are not reachable. Just detect this case and return. Any code
337 * segment in LDT is compatibility mode.
339 static int is_errata100(struct pt_regs *regs, unsigned long address)
342 if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) &&
349 void do_invalid_op(struct pt_regs *, unsigned long);
351 static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
353 #ifdef CONFIG_X86_F00F_BUG
356 * Pentium F0 0F C7 C8 bug workaround.
358 if (boot_cpu_data.f00f_bug) {
359 nr = (address - idt_descr.address) >> 3;
362 do_invalid_op(regs, 0);
370 static void show_fault_oops(struct pt_regs *regs, unsigned long error_code,
371 unsigned long address)
374 if (!oops_may_print())
378 #ifdef CONFIG_X86_PAE
379 if (error_code & PF_INSTR) {
381 pte_t *pte = lookup_address(address, &level);
383 if (pte && pte_present(*pte) && !pte_exec(*pte))
384 printk(KERN_CRIT "kernel tried to execute "
385 "NX-protected page - exploit attempt? "
386 "(uid: %d)\n", current->uid);
390 printk(KERN_ALERT "BUG: unable to handle kernel ");
391 if (address < PAGE_SIZE)
392 printk(KERN_CONT "NULL pointer dereference");
394 printk(KERN_CONT "paging request");
396 printk(KERN_CONT " at %08lx\n", address);
398 printk(KERN_CONT " at %016lx\n", address);
400 printk(KERN_ALERT "IP:");
401 printk_address(regs->ip, 1);
402 dump_pagetable(address);
406 static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs,
407 unsigned long error_code)
409 unsigned long flags = oops_begin();
410 struct task_struct *tsk;
412 printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
413 current->comm, address);
414 dump_pagetable(address);
416 tsk->thread.cr2 = address;
417 tsk->thread.trap_no = 14;
418 tsk->thread.error_code = error_code;
419 if (__die("Bad pagetable", regs, error_code))
421 oops_end(flags, regs, SIGKILL);
425 static int spurious_fault_check(unsigned long error_code, pte_t *pte)
427 if ((error_code & PF_WRITE) && !pte_write(*pte))
429 if ((error_code & PF_INSTR) && !pte_exec(*pte))
436 * Handle a spurious fault caused by a stale TLB entry. This allows
437 * us to lazily refresh the TLB when increasing the permissions of a
438 * kernel page (RO -> RW or NX -> X). Doing it eagerly is very
439 * expensive since that implies doing a full cross-processor TLB
440 * flush, even if no stale TLB entries exist on other processors.
441 * There are no security implications to leaving a stale TLB when
442 * increasing the permissions on a page.
444 static int spurious_fault(unsigned long address,
445 unsigned long error_code)
452 /* Reserved-bit violation or user access to kernel space? */
453 if (error_code & (PF_USER | PF_RSVD))
456 pgd = init_mm.pgd + pgd_index(address);
457 if (!pgd_present(*pgd))
460 pud = pud_offset(pgd, address);
461 if (!pud_present(*pud))
465 return spurious_fault_check(error_code, (pte_t *) pud);
467 pmd = pmd_offset(pud, address);
468 if (!pmd_present(*pmd))
472 return spurious_fault_check(error_code, (pte_t *) pmd);
474 pte = pte_offset_kernel(pmd, address);
475 if (!pte_present(*pte))
478 return spurious_fault_check(error_code, pte);
483 * Handle a fault on the vmalloc or module mapping area
486 * Handle a fault on the vmalloc area
488 * This assumes no large pages in there.
490 static int vmalloc_fault(unsigned long address)
493 unsigned long pgd_paddr;
497 /* Make sure we are in vmalloc area */
498 if (!(address >= VMALLOC_START && address < VMALLOC_END))
502 * Synchronize this task's top level page-table
503 * with the 'reference' page table.
505 * Do _not_ use "current" here. We might be inside
506 * an interrupt in the middle of a task switch..
508 pgd_paddr = read_cr3();
509 pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
512 pte_k = pte_offset_kernel(pmd_k, address);
513 if (!pte_present(*pte_k))
517 pgd_t *pgd, *pgd_ref;
518 pud_t *pud, *pud_ref;
519 pmd_t *pmd, *pmd_ref;
520 pte_t *pte, *pte_ref;
522 /* Make sure we are in vmalloc area */
523 if (!(address >= VMALLOC_START && address < VMALLOC_END))
526 /* Copy kernel mappings over when needed. This can also
527 happen within a race in page table update. In the later
530 pgd = pgd_offset(current->mm ?: &init_mm, address);
531 pgd_ref = pgd_offset_k(address);
532 if (pgd_none(*pgd_ref))
535 set_pgd(pgd, *pgd_ref);
537 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
539 /* Below here mismatches are bugs because these lower tables
542 pud = pud_offset(pgd, address);
543 pud_ref = pud_offset(pgd_ref, address);
544 if (pud_none(*pud_ref))
546 if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref))
548 pmd = pmd_offset(pud, address);
549 pmd_ref = pmd_offset(pud_ref, address);
550 if (pmd_none(*pmd_ref))
552 if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref))
554 pte_ref = pte_offset_kernel(pmd_ref, address);
555 if (!pte_present(*pte_ref))
557 pte = pte_offset_kernel(pmd, address);
558 /* Don't use pte_page here, because the mappings can point
559 outside mem_map, and the NUMA hash lookup cannot handle
561 if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref))
567 int show_unhandled_signals = 1;
570 * This routine handles page faults. It determines the address,
571 * and the problem, and then passes it off to one of the appropriate
577 void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
579 struct task_struct *tsk;
580 struct mm_struct *mm;
581 struct vm_area_struct *vma;
582 unsigned long address;
590 * We can fault from pretty much anywhere, with unknown IRQ state.
592 trace_hardirqs_fixup();
596 prefetchw(&mm->mmap_sem);
598 /* get the address */
599 address = read_cr2();
601 si_code = SEGV_MAPERR;
603 if (notify_page_fault(regs))
607 * We fault-in kernel-space virtual memory on-demand. The
608 * 'reference' page table is init_mm.pgd.
610 * NOTE! We MUST NOT take any locks for this case. We may
611 * be in an interrupt or a critical region, and should
612 * only copy the information from the master page table,
615 * This verifies that the fault happens in kernel space
616 * (error_code & 4) == 0, and that the fault was not a
617 * protection error (error_code & 9) == 0.
620 if (unlikely(address >= TASK_SIZE)) {
622 if (unlikely(address >= TASK_SIZE64)) {
624 if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) &&
625 vmalloc_fault(address) >= 0)
628 /* Can handle a stale RO->RW TLB */
629 if (spurious_fault(address, error_code))
633 * Don't take the mm semaphore here. If we fixup a prefetch
634 * fault we could otherwise deadlock.
636 goto bad_area_nosemaphore;
641 /* It's safe to allow irq's after cr2 has been saved and the vmalloc
642 fault has been handled. */
643 if (regs->flags & (X86_EFLAGS_IF | X86_VM_MASK))
647 * If we're in an interrupt, have no user context or are running in an
648 * atomic region then we must not take the fault.
650 if (in_atomic() || !mm)
651 goto bad_area_nosemaphore;
652 #else /* CONFIG_X86_64 */
653 if (likely(regs->flags & X86_EFLAGS_IF))
656 if (unlikely(error_code & PF_RSVD))
657 pgtable_bad(address, regs, error_code);
660 * If we're in an interrupt, have no user context or are running in an
661 * atomic region then we must not take the fault.
663 if (unlikely(in_atomic() || !mm))
664 goto bad_area_nosemaphore;
667 * User-mode registers count as a user access even for any
668 * potential system fault or CPU buglet.
670 if (user_mode_vm(regs))
671 error_code |= PF_USER;
674 /* When running in the kernel we expect faults to occur only to
675 * addresses in user space. All other faults represent errors in the
676 * kernel and should generate an OOPS. Unfortunately, in the case of an
677 * erroneous fault occurring in a code path which already holds mmap_sem
678 * we will deadlock attempting to validate the fault against the
679 * address space. Luckily the kernel only validly references user
680 * space from well defined areas of code, which are listed in the
683 * As the vast majority of faults will be valid we will only perform
684 * the source reference check when there is a possibility of a deadlock.
685 * Attempt to lock the address space, if we cannot we then validate the
686 * source. If this is invalid we can skip the address space check,
687 * thus avoiding the deadlock.
689 if (!down_read_trylock(&mm->mmap_sem)) {
690 if ((error_code & PF_USER) == 0 &&
691 !search_exception_tables(regs->ip))
692 goto bad_area_nosemaphore;
693 down_read(&mm->mmap_sem);
696 vma = find_vma(mm, address);
699 if (vma->vm_start <= address)
701 if (!(vma->vm_flags & VM_GROWSDOWN))
703 if (error_code & PF_USER) {
705 * Accessing the stack below %sp is always a bug.
706 * The large cushion allows instructions like enter
707 * and pusha to work. ("enter $65535,$31" pushes
708 * 32 pointers and then decrements %sp by 65535.)
710 if (address + 65536 + 32 * sizeof(unsigned long) < regs->sp)
713 if (expand_stack(vma, address))
716 * Ok, we have a good vm_area for this memory access, so
720 si_code = SEGV_ACCERR;
722 switch (error_code & (PF_PROT|PF_WRITE)) {
723 default: /* 3: write, present */
725 case PF_WRITE: /* write, not present */
726 if (!(vma->vm_flags & VM_WRITE))
730 case PF_PROT: /* read, present */
732 case 0: /* read, not present */
733 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
741 * If for any reason at all we couldn't handle the fault,
742 * make sure we exit gracefully rather than endlessly redo
745 fault = handle_mm_fault(mm, vma, address, write);
746 if (unlikely(fault & VM_FAULT_ERROR)) {
747 if (fault & VM_FAULT_OOM)
749 else if (fault & VM_FAULT_SIGBUS)
753 if (fault & VM_FAULT_MAJOR)
760 * Did it hit the DOS screen memory VA from vm86 mode?
762 if (v8086_mode(regs)) {
763 unsigned long bit = (address - 0xA0000) >> PAGE_SHIFT;
765 tsk->thread.screen_bitmap |= 1 << bit;
768 up_read(&mm->mmap_sem);
772 * Something tried to access memory that isn't in our memory map..
773 * Fix it, but check if it's kernel or user first..
776 up_read(&mm->mmap_sem);
778 bad_area_nosemaphore:
779 /* User mode accesses just cause a SIGSEGV */
780 if (error_code & PF_USER) {
782 * It's possible to have interrupts off here.
787 * Valid to do another page fault here because this one came
790 if (is_prefetch(regs, address, error_code))
793 if (is_errata100(regs, address))
796 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
797 printk_ratelimit()) {
800 "%s%s[%d]: segfault at %lx ip %08lx sp %08lx error %lx",
802 "%s%s[%d]: segfault at %lx ip %lx sp %lx error %lx",
804 task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
805 tsk->comm, task_pid_nr(tsk), address, regs->ip,
806 regs->sp, error_code);
807 print_vma_addr(" in ", regs->ip);
811 tsk->thread.cr2 = address;
812 /* Kernel addresses are always protection faults */
813 tsk->thread.error_code = error_code | (address >= TASK_SIZE);
814 tsk->thread.trap_no = 14;
815 force_sig_info_fault(SIGSEGV, si_code, address, tsk);
819 if (is_f00f_bug(regs, address))
823 /* Are we prepared to handle this kernel fault? */
824 if (fixup_exception(regs))
829 * Valid to do another page fault here, because if this fault
830 * had been triggered by is_prefetch fixup_exception would have
834 * Hall of shame of CPU/BIOS bugs.
836 if (is_prefetch(regs, address, error_code))
839 if (is_errata93(regs, address))
843 * Oops. The kernel tried to access some bad page. We'll have to
844 * terminate things with extreme prejudice.
849 flags = oops_begin();
852 show_fault_oops(regs, error_code, address);
854 tsk->thread.cr2 = address;
855 tsk->thread.trap_no = 14;
856 tsk->thread.error_code = error_code;
859 die("Oops", regs, error_code);
863 if (__die("Oops", regs, error_code))
865 /* Executive summary in case the body of the oops scrolled away */
866 printk(KERN_EMERG "CR2: %016lx\n", address);
867 oops_end(flags, regs, SIGKILL);
871 * We ran out of memory, or some other thing happened to us that made
872 * us unable to handle the page fault gracefully.
875 up_read(&mm->mmap_sem);
876 if (is_global_init(tsk)) {
879 down_read(&mm->mmap_sem);
886 printk("VM: killing process %s\n", tsk->comm);
887 if (error_code & PF_USER)
888 do_group_exit(SIGKILL);
892 up_read(&mm->mmap_sem);
894 /* Kernel mode? Handle exceptions or die */
895 if (!(error_code & PF_USER))
898 /* User space => ok to do another page fault */
899 if (is_prefetch(regs, address, error_code))
902 tsk->thread.cr2 = address;
903 tsk->thread.error_code = error_code;
904 tsk->thread.trap_no = 14;
905 force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
908 DEFINE_SPINLOCK(pgd_lock);
911 void vmalloc_sync_all(void)
915 * Note that races in the updates of insync and start aren't
916 * problematic: insync can only get set bits added, and updates to
917 * start are only improving performance (without affecting correctness
920 static DECLARE_BITMAP(insync, PTRS_PER_PGD);
921 static unsigned long start = TASK_SIZE;
922 unsigned long address;
924 if (SHARED_KERNEL_PMD)
927 BUILD_BUG_ON(TASK_SIZE & ~PGDIR_MASK);
928 for (address = start; address >= TASK_SIZE; address += PGDIR_SIZE) {
929 if (!test_bit(pgd_index(address), insync)) {
933 spin_lock_irqsave(&pgd_lock, flags);
934 list_for_each_entry(page, &pgd_list, lru) {
935 if (!vmalloc_sync_one(page_address(page),
939 spin_unlock_irqrestore(&pgd_lock, flags);
941 set_bit(pgd_index(address), insync);
943 if (address == start && test_bit(pgd_index(address), insync))
944 start = address + PGDIR_SIZE;
946 #else /* CONFIG_X86_64 */
948 * Note that races in the updates of insync and start aren't
949 * problematic: insync can only get set bits added, and updates to
950 * start are only improving performance (without affecting correctness
953 static DECLARE_BITMAP(insync, PTRS_PER_PGD);
954 static unsigned long start = VMALLOC_START & PGDIR_MASK;
955 unsigned long address;
957 for (address = start; address <= VMALLOC_END; address += PGDIR_SIZE) {
958 if (!test_bit(pgd_index(address), insync)) {
959 const pgd_t *pgd_ref = pgd_offset_k(address);
963 if (pgd_none(*pgd_ref))
965 spin_lock_irqsave(&pgd_lock, flags);
966 list_for_each_entry(page, &pgd_list, lru) {
968 pgd = (pgd_t *)page_address(page) + pgd_index(address);
970 set_pgd(pgd, *pgd_ref);
972 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
974 spin_unlock_irqrestore(&pgd_lock, flags);
975 set_bit(pgd_index(address), insync);
977 if (address == start)
978 start = address + PGDIR_SIZE;