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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <trace/events/kvm.h>
  41 #undef TRACE_INCLUDE_FILE
  42 #define CREATE_TRACE_POINTS
  43 #include "trace.h"
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/msr.h>
  47 #include <asm/desc.h>
  48 #include <asm/mtrr.h>
  49 #include <asm/mce.h>
  50
  51 #define MAX_IO_MSRS 256
  52 #define CR0_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  56 #define CR4_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  61
  62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  63
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  66
  67 /* EFER defaults:
  68  * - enable syscall per default because its emulated by KVM
  69  * - enable LME and LMA per default on 64 bit KVM
  70  */
  71 #ifdef CONFIG_X86_64
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  73 #else
  74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  75 #endif
  76
  77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  79
  80 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  82                                     struct kvm_cpuid_entry2 __user *entries);
  83
  84 struct kvm_x86_ops *kvm_x86_ops;
  85 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  86
  87 int ignore_msrs = 0;
  88 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  89
  90 struct kvm_stats_debugfs_item debugfs_entries[] = {
  91         { "pf_fixed", VCPU_STAT(pf_fixed) },
  92         { "pf_guest", VCPU_STAT(pf_guest) },
  93         { "tlb_flush", VCPU_STAT(tlb_flush) },
  94         { "invlpg", VCPU_STAT(invlpg) },
  95         { "exits", VCPU_STAT(exits) },
  96         { "io_exits", VCPU_STAT(io_exits) },
  97         { "mmio_exits", VCPU_STAT(mmio_exits) },
  98         { "signal_exits", VCPU_STAT(signal_exits) },
  99         { "irq_window", VCPU_STAT(irq_window_exits) },
 100         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 101         { "halt_exits", VCPU_STAT(halt_exits) },
 102         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 103         { "hypercalls", VCPU_STAT(hypercalls) },
 104         { "request_irq", VCPU_STAT(request_irq_exits) },
 105         { "irq_exits", VCPU_STAT(irq_exits) },
 106         { "host_state_reload", VCPU_STAT(host_state_reload) },
 107         { "efer_reload", VCPU_STAT(efer_reload) },
 108         { "fpu_reload", VCPU_STAT(fpu_reload) },
 109         { "insn_emulation", VCPU_STAT(insn_emulation) },
 110         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 111         { "irq_injections", VCPU_STAT(irq_injections) },
 112         { "nmi_injections", VCPU_STAT(nmi_injections) },
 113         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 114         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 115         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 116         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 117         { "mmu_flooded", VM_STAT(mmu_flooded) },
 118         { "mmu_recycled", VM_STAT(mmu_recycled) },
 119         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 120         { "mmu_unsync", VM_STAT(mmu_unsync) },
 121         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 122         { "largepages", VM_STAT(lpages) },
 123         { NULL }
 124 };
 125
 126 unsigned long segment_base(u16 selector)
 127 {
 128         struct descriptor_table gdt;
 129         struct desc_struct *d;
 130         unsigned long table_base;
 131         unsigned long v;
 132
 133         if (selector == 0)
 134                 return 0;
 135
 136         kvm_get_gdt(&gdt);
 137         table_base = gdt.base;
 138
 139         if (selector & 4) {           /* from ldt */
 140                 u16 ldt_selector = kvm_read_ldt();
 141
 142                 table_base = segment_base(ldt_selector);
 143         }
 144         d = (struct desc_struct *)(table_base + (selector & ~7));
 145         v = get_desc_base(d);
 146 #ifdef CONFIG_X86_64
 147         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 148                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 149 #endif
 150         return v;
 151 }
 152 EXPORT_SYMBOL_GPL(segment_base);
 153
 154 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 155 {
 156         if (irqchip_in_kernel(vcpu->kvm))
 157                 return vcpu->arch.apic_base;
 158         else
 159                 return vcpu->arch.apic_base;
 160 }
 161 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 162
 163 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 164 {
 165         /* TODO: reserve bits check */
 166         if (irqchip_in_kernel(vcpu->kvm))
 167                 kvm_lapic_set_base(vcpu, data);
 168         else
 169                 vcpu->arch.apic_base = data;
 170 }
 171 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 172
 173 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 174 {
 175         WARN_ON(vcpu->arch.exception.pending);
 176         vcpu->arch.exception.pending = true;
 177         vcpu->arch.exception.has_error_code = false;
 178         vcpu->arch.exception.nr = nr;
 179 }
 180 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 181
 182 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 183                            u32 error_code)
 184 {
 185         ++vcpu->stat.pf_guest;
 186
 187         if (vcpu->arch.exception.pending) {
 188                 switch(vcpu->arch.exception.nr) {
 189                 case DF_VECTOR:
 190                         /* triple fault -> shutdown */
 191                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 192                         return;
 193                 case PF_VECTOR:
 194                         vcpu->arch.exception.nr = DF_VECTOR;
 195                         vcpu->arch.exception.error_code = 0;
 196                         return;
 197                 default:
 198                         /* replace previous exception with a new one in a hope
 199                            that instruction re-execution will regenerate lost
 200                            exception */
 201                         vcpu->arch.exception.pending = false;
 202                         break;
 203                 }
 204         }
 205         vcpu->arch.cr2 = addr;
 206         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 207 }
 208
 209 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 210 {
 211         vcpu->arch.nmi_pending = 1;
 212 }
 213 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 214
 215 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 216 {
 217         WARN_ON(vcpu->arch.exception.pending);
 218         vcpu->arch.exception.pending = true;
 219         vcpu->arch.exception.has_error_code = true;
 220         vcpu->arch.exception.nr = nr;
 221         vcpu->arch.exception.error_code = error_code;
 222 }
 223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 224
 225 /*
 226  * Load the pae pdptrs.  Return true is they are all valid.
 227  */
 228 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 229 {
 230         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 231         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 232         int i;
 233         int ret;
 234         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 235
 236         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 237                                   offset * sizeof(u64), sizeof(pdpte));
 238         if (ret < 0) {
 239                 ret = 0;
 240                 goto out;
 241         }
 242         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 243                 if (is_present_gpte(pdpte[i]) &&
 244                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 245                         ret = 0;
 246                         goto out;
 247                 }
 248         }
 249         ret = 1;
 250
 251         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 252         __set_bit(VCPU_EXREG_PDPTR,
 253                   (unsigned long *)&vcpu->arch.regs_avail);
 254         __set_bit(VCPU_EXREG_PDPTR,
 255                   (unsigned long *)&vcpu->arch.regs_dirty);
 256 out:
 257
 258         return ret;
 259 }
 260 EXPORT_SYMBOL_GPL(load_pdptrs);
 261
 262 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 263 {
 264         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 265         bool changed = true;
 266         int r;
 267
 268         if (is_long_mode(vcpu) || !is_pae(vcpu))
 269                 return false;
 270
 271         if (!test_bit(VCPU_EXREG_PDPTR,
 272                       (unsigned long *)&vcpu->arch.regs_avail))
 273                 return true;
 274
 275         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 276         if (r < 0)
 277                 goto out;
 278         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 279 out:
 280
 281         return changed;
 282 }
 283
 284 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 285 {
 286         if (cr0 & CR0_RESERVED_BITS) {
 287                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 288                        cr0, vcpu->arch.cr0);
 289                 kvm_inject_gp(vcpu, 0);
 290                 return;
 291         }
 292
 293         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 294                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 295                 kvm_inject_gp(vcpu, 0);
 296                 return;
 297         }
 298
 299         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 300                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 301                        "and a clear PE flag\n");
 302                 kvm_inject_gp(vcpu, 0);
 303                 return;
 304         }
 305
 306         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 307 #ifdef CONFIG_X86_64
 308                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 309                         int cs_db, cs_l;
 310
 311                         if (!is_pae(vcpu)) {
 312                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 313                                        "in long mode while PAE is disabled\n");
 314                                 kvm_inject_gp(vcpu, 0);
 315                                 return;
 316                         }
 317                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 318                         if (cs_l) {
 319                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 320                                        "in long mode while CS.L == 1\n");
 321                                 kvm_inject_gp(vcpu, 0);
 322                                 return;
 323
 324                         }
 325                 } else
 326 #endif
 327                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 328                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 329                                "reserved bits\n");
 330                         kvm_inject_gp(vcpu, 0);
 331                         return;
 332                 }
 333
 334         }
 335
 336         kvm_x86_ops->set_cr0(vcpu, cr0);
 337         vcpu->arch.cr0 = cr0;
 338
 339         kvm_mmu_reset_context(vcpu);
 340         return;
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 343
 344 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 345 {
 346         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 347 }
 348 EXPORT_SYMBOL_GPL(kvm_lmsw);
 349
 350 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 351 {
 352         unsigned long old_cr4 = vcpu->arch.cr4;
 353         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 354
 355         if (cr4 & CR4_RESERVED_BITS) {
 356                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 357                 kvm_inject_gp(vcpu, 0);
 358                 return;
 359         }
 360
 361         if (is_long_mode(vcpu)) {
 362                 if (!(cr4 & X86_CR4_PAE)) {
 363                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 364                                "in long mode\n");
 365                         kvm_inject_gp(vcpu, 0);
 366                         return;
 367                 }
 368         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 369                    && ((cr4 ^ old_cr4) & pdptr_bits)
 370                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 371                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 372                 kvm_inject_gp(vcpu, 0);
 373                 return;
 374         }
 375
 376         if (cr4 & X86_CR4_VMXE) {
 377                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 378                 kvm_inject_gp(vcpu, 0);
 379                 return;
 380         }
 381         kvm_x86_ops->set_cr4(vcpu, cr4);
 382         vcpu->arch.cr4 = cr4;
 383         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 384         kvm_mmu_reset_context(vcpu);
 385 }
 386 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 387
 388 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 389 {
 390         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 391                 kvm_mmu_sync_roots(vcpu);
 392                 kvm_mmu_flush_tlb(vcpu);
 393                 return;
 394         }
 395
 396         if (is_long_mode(vcpu)) {
 397                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 398                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 399                         kvm_inject_gp(vcpu, 0);
 400                         return;
 401                 }
 402         } else {
 403                 if (is_pae(vcpu)) {
 404                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 405                                 printk(KERN_DEBUG
 406                                        "set_cr3: #GP, reserved bits\n");
 407                                 kvm_inject_gp(vcpu, 0);
 408                                 return;
 409                         }
 410                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 411                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 412                                        "reserved bits\n");
 413                                 kvm_inject_gp(vcpu, 0);
 414                                 return;
 415                         }
 416                 }
 417                 /*
 418                  * We don't check reserved bits in nonpae mode, because
 419                  * this isn't enforced, and VMware depends on this.
 420                  */
 421         }
 422
 423         /*
 424          * Does the new cr3 value map to physical memory? (Note, we
 425          * catch an invalid cr3 even in real-mode, because it would
 426          * cause trouble later on when we turn on paging anyway.)
 427          *
 428          * A real CPU would silently accept an invalid cr3 and would
 429          * attempt to use it - with largely undefined (and often hard
 430          * to debug) behavior on the guest side.
 431          */
 432         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 433                 kvm_inject_gp(vcpu, 0);
 434         else {
 435                 vcpu->arch.cr3 = cr3;
 436                 vcpu->arch.mmu.new_cr3(vcpu);
 437         }
 438 }
 439 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 440
 441 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 442 {
 443         if (cr8 & CR8_RESERVED_BITS) {
 444                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 445                 kvm_inject_gp(vcpu, 0);
 446                 return;
 447         }
 448         if (irqchip_in_kernel(vcpu->kvm))
 449                 kvm_lapic_set_tpr(vcpu, cr8);
 450         else
 451                 vcpu->arch.cr8 = cr8;
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 454
 455 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 456 {
 457         if (irqchip_in_kernel(vcpu->kvm))
 458                 return kvm_lapic_get_cr8(vcpu);
 459         else
 460                 return vcpu->arch.cr8;
 461 }
 462 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 463
 464 static inline u32 bit(int bitno)
 465 {
 466         return 1 << (bitno & 31);
 467 }
 468
 469 /*
 470  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 471  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 472  *
 473  * This list is modified at module load time to reflect the
 474  * capabilities of the host cpu.
 475  */
 476 static u32 msrs_to_save[] = {
 477         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 478         MSR_K6_STAR,
 479 #ifdef CONFIG_X86_64
 480         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 481 #endif
 482         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 483         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 484 };
 485
 486 static unsigned num_msrs_to_save;
 487
 488 static u32 emulated_msrs[] = {
 489         MSR_IA32_MISC_ENABLE,
 490 };
 491
 492 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 493 {
 494         if (efer & efer_reserved_bits) {
 495                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 496                        efer);
 497                 kvm_inject_gp(vcpu, 0);
 498                 return;
 499         }
 500
 501         if (is_paging(vcpu)
 502             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 503                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 504                 kvm_inject_gp(vcpu, 0);
 505                 return;
 506         }
 507
 508         if (efer & EFER_FFXSR) {
 509                 struct kvm_cpuid_entry2 *feat;
 510
 511                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 512                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 513                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 514                         kvm_inject_gp(vcpu, 0);
 515                         return;
 516                 }
 517         }
 518
 519         if (efer & EFER_SVME) {
 520                 struct kvm_cpuid_entry2 *feat;
 521
 522                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 523                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 524                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 525                         kvm_inject_gp(vcpu, 0);
 526                         return;
 527                 }
 528         }
 529
 530         kvm_x86_ops->set_efer(vcpu, efer);
 531
 532         efer &= ~EFER_LMA;
 533         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 534
 535         vcpu->arch.shadow_efer = efer;
 536
 537         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 538         kvm_mmu_reset_context(vcpu);
 539 }
 540
 541 void kvm_enable_efer_bits(u64 mask)
 542 {
 543        efer_reserved_bits &= ~mask;
 544 }
 545 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 546
 547
 548 /*
 549  * Writes msr value into into the appropriate "register".
 550  * Returns 0 on success, non-0 otherwise.
 551  * Assumes vcpu_load() was already called.
 552  */
 553 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 554 {
 555         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 556 }
 557
 558 /*
 559  * Adapt set_msr() to msr_io()'s calling convention
 560  */
 561 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 562 {
 563         return kvm_set_msr(vcpu, index, *data);
 564 }
 565
 566 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 567 {
 568         static int version;
 569         struct pvclock_wall_clock wc;
 570         struct timespec now, sys, boot;
 571
 572         if (!wall_clock)
 573                 return;
 574
 575         version++;
 576
 577         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 578
 579         /*
 580          * The guest calculates current wall clock time by adding
 581          * system time (updated by kvm_write_guest_time below) to the
 582          * wall clock specified here.  guest system time equals host
 583          * system time for us, thus we must fill in host boot time here.
 584          */
 585         now = current_kernel_time();
 586         ktime_get_ts(&sys);
 587         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 588
 589         wc.sec = boot.tv_sec;
 590         wc.nsec = boot.tv_nsec;
 591         wc.version = version;
 592
 593         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 594
 595         version++;
 596         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 597 }
 598
 599 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 600 {
 601         uint32_t quotient, remainder;
 602
 603         /* Don't try to replace with do_div(), this one calculates
 604          * "(dividend << 32) / divisor" */
 605         __asm__ ( "divl %4"
 606                   : "=a" (quotient), "=d" (remainder)
 607                   : "0" (0), "1" (dividend), "r" (divisor) );
 608         return quotient;
 609 }
 610
 611 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 612 {
 613         uint64_t nsecs = 1000000000LL;
 614         int32_t  shift = 0;
 615         uint64_t tps64;
 616         uint32_t tps32;
 617
 618         tps64 = tsc_khz * 1000LL;
 619         while (tps64 > nsecs*2) {
 620                 tps64 >>= 1;
 621                 shift--;
 622         }
 623
 624         tps32 = (uint32_t)tps64;
 625         while (tps32 <= (uint32_t)nsecs) {
 626                 tps32 <<= 1;
 627                 shift++;
 628         }
 629
 630         hv_clock->tsc_shift = shift;
 631         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 632
 633         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 634                  __func__, tsc_khz, hv_clock->tsc_shift,
 635                  hv_clock->tsc_to_system_mul);
 636 }
 637
 638 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 639
 640 static void kvm_write_guest_time(struct kvm_vcpu *v)
 641 {
 642         struct timespec ts;
 643         unsigned long flags;
 644         struct kvm_vcpu_arch *vcpu = &v->arch;
 645         void *shared_kaddr;
 646         unsigned long this_tsc_khz;
 647
 648         if ((!vcpu->time_page))
 649                 return;
 650
 651         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 652         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 653                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 654                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 655         }
 656         put_cpu_var(cpu_tsc_khz);
 657
 658         /* Keep irq disabled to prevent changes to the clock */
 659         local_irq_save(flags);
 660         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 661         ktime_get_ts(&ts);
 662         local_irq_restore(flags);
 663
 664         /* With all the info we got, fill in the values */
 665
 666         vcpu->hv_clock.system_time = ts.tv_nsec +
 667                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 668         /*
 669          * The interface expects us to write an even number signaling that the
 670          * update is finished. Since the guest won't see the intermediate
 671          * state, we just increase by 2 at the end.
 672          */
 673         vcpu->hv_clock.version += 2;
 674
 675         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 676
 677         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 678                sizeof(vcpu->hv_clock));
 679
 680         kunmap_atomic(shared_kaddr, KM_USER0);
 681
 682         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 683 }
 684
 685 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 686 {
 687         struct kvm_vcpu_arch *vcpu = &v->arch;
 688
 689         if (!vcpu->time_page)
 690                 return 0;
 691         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 692         return 1;
 693 }
 694
 695 static bool msr_mtrr_valid(unsigned msr)
 696 {
 697         switch (msr) {
 698         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 699         case MSR_MTRRfix64K_00000:
 700         case MSR_MTRRfix16K_80000:
 701         case MSR_MTRRfix16K_A0000:
 702         case MSR_MTRRfix4K_C0000:
 703         case MSR_MTRRfix4K_C8000:
 704         case MSR_MTRRfix4K_D0000:
 705         case MSR_MTRRfix4K_D8000:
 706         case MSR_MTRRfix4K_E0000:
 707         case MSR_MTRRfix4K_E8000:
 708         case MSR_MTRRfix4K_F0000:
 709         case MSR_MTRRfix4K_F8000:
 710         case MSR_MTRRdefType:
 711         case MSR_IA32_CR_PAT:
 712                 return true;
 713         case 0x2f8:
 714                 return true;
 715         }
 716         return false;
 717 }
 718
 719 static bool valid_pat_type(unsigned t)
 720 {
 721         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 722 }
 723
 724 static bool valid_mtrr_type(unsigned t)
 725 {
 726         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 727 }
 728
 729 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 730 {
 731         int i;
 732
 733         if (!msr_mtrr_valid(msr))
 734                 return false;
 735
 736         if (msr == MSR_IA32_CR_PAT) {
 737                 for (i = 0; i < 8; i++)
 738                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 739                                 return false;
 740                 return true;
 741         } else if (msr == MSR_MTRRdefType) {
 742                 if (data & ~0xcff)
 743                         return false;
 744                 return valid_mtrr_type(data & 0xff);
 745         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 746                 for (i = 0; i < 8 ; i++)
 747                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 748                                 return false;
 749                 return true;
 750         }
 751
 752         /* variable MTRRs */
 753         return valid_mtrr_type(data & 0xff);
 754 }
 755
 756 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 757 {
 758         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 759
 760         if (!mtrr_valid(vcpu, msr, data))
 761                 return 1;
 762
 763         if (msr == MSR_MTRRdefType) {
 764                 vcpu->arch.mtrr_state.def_type = data;
 765                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 766         } else if (msr == MSR_MTRRfix64K_00000)
 767                 p[0] = data;
 768         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 769                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 770         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 771                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 772         else if (msr == MSR_IA32_CR_PAT)
 773                 vcpu->arch.pat = data;
 774         else {  /* Variable MTRRs */
 775                 int idx, is_mtrr_mask;
 776                 u64 *pt;
 777
 778                 idx = (msr - 0x200) / 2;
 779                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 780                 if (!is_mtrr_mask)
 781                         pt =
 782                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 783                 else
 784                         pt =
 785                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 786                 *pt = data;
 787         }
 788
 789         kvm_mmu_reset_context(vcpu);
 790         return 0;
 791 }
 792
 793 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 794 {
 795         u64 mcg_cap = vcpu->arch.mcg_cap;
 796         unsigned bank_num = mcg_cap & 0xff;
 797
 798         switch (msr) {
 799         case MSR_IA32_MCG_STATUS:
 800                 vcpu->arch.mcg_status = data;
 801                 break;
 802         case MSR_IA32_MCG_CTL:
 803                 if (!(mcg_cap & MCG_CTL_P))
 804                         return 1;
 805                 if (data != 0 && data != ~(u64)0)
 806                         return -1;
 807                 vcpu->arch.mcg_ctl = data;
 808                 break;
 809         default:
 810                 if (msr >= MSR_IA32_MC0_CTL &&
 811                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 812                         u32 offset = msr - MSR_IA32_MC0_CTL;
 813                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 814                         if ((offset & 0x3) == 0 &&
 815                             data != 0 && data != ~(u64)0)
 816                                 return -1;
 817                         vcpu->arch.mce_banks[offset] = data;
 818                         break;
 819                 }
 820                 return 1;
 821         }
 822         return 0;
 823 }
 824
 825 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 826 {
 827         switch (msr) {
 828         case MSR_EFER:
 829                 set_efer(vcpu, data);
 830                 break;
 831         case MSR_K7_HWCR:
 832                 data &= ~(u64)0x40;     /* ignore flush filter disable */
 833                 if (data != 0) {
 834                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
 835                                 data);
 836                         return 1;
 837                 }
 838                 break;
 839         case MSR_FAM10H_MMIO_CONF_BASE:
 840                 if (data != 0) {
 841                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
 842                                 "0x%llx\n", data);
 843                         return 1;
 844                 }
 845                 break;
 846         case MSR_AMD64_NB_CFG:
 847                 break;
 848         case MSR_IA32_DEBUGCTLMSR:
 849                 if (!data) {
 850                         /* We support the non-activated case already */
 851                         break;
 852                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 853                         /* Values other than LBR and BTF are vendor-specific,
 854                            thus reserved and should throw a #GP */
 855                         return 1;
 856                 }
 857                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 858                         __func__, data);
 859                 break;
 860         case MSR_IA32_UCODE_REV:
 861         case MSR_IA32_UCODE_WRITE:
 862         case MSR_VM_HSAVE_PA:
 863         case MSR_AMD64_PATCH_LOADER:
 864                 break;
 865         case 0x200 ... 0x2ff:
 866                 return set_msr_mtrr(vcpu, msr, data);
 867         case MSR_IA32_APICBASE:
 868                 kvm_set_apic_base(vcpu, data);
 869                 break;
 870         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
 871                 return kvm_x2apic_msr_write(vcpu, msr, data);
 872         case MSR_IA32_MISC_ENABLE:
 873                 vcpu->arch.ia32_misc_enable_msr = data;
 874                 break;
 875         case MSR_KVM_WALL_CLOCK:
 876                 vcpu->kvm->arch.wall_clock = data;
 877                 kvm_write_wall_clock(vcpu->kvm, data);
 878                 break;
 879         case MSR_KVM_SYSTEM_TIME: {
 880                 if (vcpu->arch.time_page) {
 881                         kvm_release_page_dirty(vcpu->arch.time_page);
 882                         vcpu->arch.time_page = NULL;
 883                 }
 884
 885                 vcpu->arch.time = data;
 886
 887                 /* we verify if the enable bit is set... */
 888                 if (!(data & 1))
 889                         break;
 890
 891                 /* ...but clean it before doing the actual write */
 892                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 893
 894                 vcpu->arch.time_page =
 895                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 896
 897                 if (is_error_page(vcpu->arch.time_page)) {
 898                         kvm_release_page_clean(vcpu->arch.time_page);
 899                         vcpu->arch.time_page = NULL;
 900                 }
 901
 902                 kvm_request_guest_time_update(vcpu);
 903                 break;
 904         }
 905         case MSR_IA32_MCG_CTL:
 906         case MSR_IA32_MCG_STATUS:
 907         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 908                 return set_msr_mce(vcpu, msr, data);
 909
 910         /* Performance counters are not protected by a CPUID bit,
 911          * so we should check all of them in the generic path for the sake of
 912          * cross vendor migration.
 913          * Writing a zero into the event select MSRs disables them,
 914          * which we perfectly emulate ;-). Any other value should be at least
 915          * reported, some guests depend on them.
 916          */
 917         case MSR_P6_EVNTSEL0:
 918         case MSR_P6_EVNTSEL1:
 919         case MSR_K7_EVNTSEL0:
 920         case MSR_K7_EVNTSEL1:
 921         case MSR_K7_EVNTSEL2:
 922         case MSR_K7_EVNTSEL3:
 923                 if (data != 0)
 924                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 925                                 "0x%x data 0x%llx\n", msr, data);
 926                 break;
 927         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 928          * so we ignore writes to make it happy.
 929          */
 930         case MSR_P6_PERFCTR0:
 931         case MSR_P6_PERFCTR1:
 932         case MSR_K7_PERFCTR0:
 933         case MSR_K7_PERFCTR1:
 934         case MSR_K7_PERFCTR2:
 935         case MSR_K7_PERFCTR3:
 936                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 937                         "0x%x data 0x%llx\n", msr, data);
 938                 break;
 939         default:
 940                 if (!ignore_msrs) {
 941                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
 942                                 msr, data);
 943                         return 1;
 944                 } else {
 945                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
 946                                 msr, data);
 947                         break;
 948                 }
 949         }
 950         return 0;
 951 }
 952 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 953
 954
 955 /*
 956  * Reads an msr value (of 'msr_index') into 'pdata'.
 957  * Returns 0 on success, non-0 otherwise.
 958  * Assumes vcpu_load() was already called.
 959  */
 960 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 961 {
 962         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 963 }
 964
 965 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 966 {
 967         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 968
 969         if (!msr_mtrr_valid(msr))
 970                 return 1;
 971
 972         if (msr == MSR_MTRRdefType)
 973                 *pdata = vcpu->arch.mtrr_state.def_type +
 974                          (vcpu->arch.mtrr_state.enabled << 10);
 975         else if (msr == MSR_MTRRfix64K_00000)
 976                 *pdata = p[0];
 977         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 978                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 979         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 980                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 981         else if (msr == MSR_IA32_CR_PAT)
 982                 *pdata = vcpu->arch.pat;
 983         else {  /* Variable MTRRs */
 984                 int idx, is_mtrr_mask;
 985                 u64 *pt;
 986
 987                 idx = (msr - 0x200) / 2;
 988                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 989                 if (!is_mtrr_mask)
 990                         pt =
 991                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 992                 else
 993                         pt =
 994                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 995                 *pdata = *pt;
 996         }
 997
 998         return 0;
 999 }
1000
1001 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1002 {
1003         u64 data;
1004         u64 mcg_cap = vcpu->arch.mcg_cap;
1005         unsigned bank_num = mcg_cap & 0xff;
1006
1007         switch (msr) {
1008         case MSR_IA32_P5_MC_ADDR:
1009         case MSR_IA32_P5_MC_TYPE:
1010                 data = 0;
1011                 break;
1012         case MSR_IA32_MCG_CAP:
1013                 data = vcpu->arch.mcg_cap;
1014                 break;
1015         case MSR_IA32_MCG_CTL:
1016                 if (!(mcg_cap & MCG_CTL_P))
1017                         return 1;
1018                 data = vcpu->arch.mcg_ctl;
1019                 break;
1020         case MSR_IA32_MCG_STATUS:
1021                 data = vcpu->arch.mcg_status;
1022                 break;
1023         default:
1024                 if (msr >= MSR_IA32_MC0_CTL &&
1025                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1026                         u32 offset = msr - MSR_IA32_MC0_CTL;
1027                         data = vcpu->arch.mce_banks[offset];
1028                         break;
1029                 }
1030                 return 1;
1031         }
1032         *pdata = data;
1033         return 0;
1034 }
1035
1036 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1037 {
1038         u64 data;
1039
1040         switch (msr) {
1041         case MSR_IA32_PLATFORM_ID:
1042         case MSR_IA32_UCODE_REV:
1043         case MSR_IA32_EBL_CR_POWERON:
1044         case MSR_IA32_DEBUGCTLMSR:
1045         case MSR_IA32_LASTBRANCHFROMIP:
1046         case MSR_IA32_LASTBRANCHTOIP:
1047         case MSR_IA32_LASTINTFROMIP:
1048         case MSR_IA32_LASTINTTOIP:
1049         case MSR_K8_SYSCFG:
1050         case MSR_K7_HWCR:
1051         case MSR_VM_HSAVE_PA:
1052         case MSR_P6_PERFCTR0:
1053         case MSR_P6_PERFCTR1:
1054         case MSR_P6_EVNTSEL0:
1055         case MSR_P6_EVNTSEL1:
1056         case MSR_K7_EVNTSEL0:
1057         case MSR_K7_PERFCTR0:
1058         case MSR_K8_INT_PENDING_MSG:
1059         case MSR_AMD64_NB_CFG:
1060         case MSR_FAM10H_MMIO_CONF_BASE:
1061                 data = 0;
1062                 break;
1063         case MSR_MTRRcap:
1064                 data = 0x500 | KVM_NR_VAR_MTRR;
1065                 break;
1066         case 0x200 ... 0x2ff:
1067                 return get_msr_mtrr(vcpu, msr, pdata);
1068         case 0xcd: /* fsb frequency */
1069                 data = 3;
1070                 break;
1071         case MSR_IA32_APICBASE:
1072                 data = kvm_get_apic_base(vcpu);
1073                 break;
1074         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1075                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1076                 break;
1077         case MSR_IA32_MISC_ENABLE:
1078                 data = vcpu->arch.ia32_misc_enable_msr;
1079                 break;
1080         case MSR_IA32_PERF_STATUS:
1081                 /* TSC increment by tick */
1082                 data = 1000ULL;
1083                 /* CPU multiplier */
1084                 data |= (((uint64_t)4ULL) << 40);
1085                 break;
1086         case MSR_EFER:
1087                 data = vcpu->arch.shadow_efer;
1088                 break;
1089         case MSR_KVM_WALL_CLOCK:
1090                 data = vcpu->kvm->arch.wall_clock;
1091                 break;
1092         case MSR_KVM_SYSTEM_TIME:
1093                 data = vcpu->arch.time;
1094                 break;
1095         case MSR_IA32_P5_MC_ADDR:
1096         case MSR_IA32_P5_MC_TYPE:
1097         case MSR_IA32_MCG_CAP:
1098         case MSR_IA32_MCG_CTL:
1099         case MSR_IA32_MCG_STATUS:
1100         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1101                 return get_msr_mce(vcpu, msr, pdata);
1102         default:
1103                 if (!ignore_msrs) {
1104                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1105                         return 1;
1106                 } else {
1107                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1108                         data = 0;
1109                 }
1110                 break;
1111         }
1112         *pdata = data;
1113         return 0;
1114 }
1115 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1116
1117 /*
1118  * Read or write a bunch of msrs. All parameters are kernel addresses.
1119  *
1120  * @return number of msrs set successfully.
1121  */
1122 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1123                     struct kvm_msr_entry *entries,
1124                     int (*do_msr)(struct kvm_vcpu *vcpu,
1125                                   unsigned index, u64 *data))
1126 {
1127         int i;
1128
1129         vcpu_load(vcpu);
1130
1131         down_read(&vcpu->kvm->slots_lock);
1132         for (i = 0; i < msrs->nmsrs; ++i)
1133                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1134                         break;
1135         up_read(&vcpu->kvm->slots_lock);
1136
1137         vcpu_put(vcpu);
1138
1139         return i;
1140 }
1141
1142 /*
1143  * Read or write a bunch of msrs. Parameters are user addresses.
1144  *
1145  * @return number of msrs set successfully.
1146  */
1147 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1148                   int (*do_msr)(struct kvm_vcpu *vcpu,
1149                                 unsigned index, u64 *data),
1150                   int writeback)
1151 {
1152         struct kvm_msrs msrs;
1153         struct kvm_msr_entry *entries;
1154         int r, n;
1155         unsigned size;
1156
1157         r = -EFAULT;
1158         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1159                 goto out;
1160
1161         r = -E2BIG;
1162         if (msrs.nmsrs >= MAX_IO_MSRS)
1163                 goto out;
1164
1165         r = -ENOMEM;
1166         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1167         entries = vmalloc(size);
1168         if (!entries)
1169                 goto out;
1170
1171         r = -EFAULT;
1172         if (copy_from_user(entries, user_msrs->entries, size))
1173                 goto out_free;
1174
1175         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1176         if (r < 0)
1177                 goto out_free;
1178
1179         r = -EFAULT;
1180         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1181                 goto out_free;
1182
1183         r = n;
1184
1185 out_free:
1186         vfree(entries);
1187 out:
1188         return r;
1189 }
1190
1191 int kvm_dev_ioctl_check_extension(long ext)
1192 {
1193         int r;
1194
1195         switch (ext) {
1196         case KVM_CAP_IRQCHIP:
1197         case KVM_CAP_HLT:
1198         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1199         case KVM_CAP_SET_TSS_ADDR:
1200         case KVM_CAP_EXT_CPUID:
1201         case KVM_CAP_CLOCKSOURCE:
1202         case KVM_CAP_PIT:
1203         case KVM_CAP_NOP_IO_DELAY:
1204         case KVM_CAP_MP_STATE:
1205         case KVM_CAP_SYNC_MMU:
1206         case KVM_CAP_REINJECT_CONTROL:
1207         case KVM_CAP_IRQ_INJECT_STATUS:
1208         case KVM_CAP_ASSIGN_DEV_IRQ:
1209         case KVM_CAP_IRQFD:
1210         case KVM_CAP_IOEVENTFD:
1211         case KVM_CAP_PIT2:
1212         case KVM_CAP_PIT_STATE2:
1213         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1214                 r = 1;
1215                 break;
1216         case KVM_CAP_COALESCED_MMIO:
1217                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1218                 break;
1219         case KVM_CAP_VAPIC:
1220                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1221                 break;
1222         case KVM_CAP_NR_VCPUS:
1223                 r = KVM_MAX_VCPUS;
1224                 break;
1225         case KVM_CAP_NR_MEMSLOTS:
1226                 r = KVM_MEMORY_SLOTS;
1227                 break;
1228         case KVM_CAP_PV_MMU:
1229                 r = !tdp_enabled;
1230                 break;
1231         case KVM_CAP_IOMMU:
1232                 r = iommu_found();
1233                 break;
1234         case KVM_CAP_MCE:
1235                 r = KVM_MAX_MCE_BANKS;
1236                 break;
1237         default:
1238                 r = 0;
1239                 break;
1240         }
1241         return r;
1242
1243 }
1244
1245 long kvm_arch_dev_ioctl(struct file *filp,
1246                         unsigned int ioctl, unsigned long arg)
1247 {
1248         void __user *argp = (void __user *)arg;
1249         long r;
1250
1251         switch (ioctl) {
1252         case KVM_GET_MSR_INDEX_LIST: {
1253                 struct kvm_msr_list __user *user_msr_list = argp;
1254                 struct kvm_msr_list msr_list;
1255                 unsigned n;
1256
1257                 r = -EFAULT;
1258                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1259                         goto out;
1260                 n = msr_list.nmsrs;
1261                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1262                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1263                         goto out;
1264                 r = -E2BIG;
1265                 if (n < msr_list.nmsrs)
1266                         goto out;
1267                 r = -EFAULT;
1268                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1269                                  num_msrs_to_save * sizeof(u32)))
1270                         goto out;
1271                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1272                                  &emulated_msrs,
1273                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1274                         goto out;
1275                 r = 0;
1276                 break;
1277         }
1278         case KVM_GET_SUPPORTED_CPUID: {
1279                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1280                 struct kvm_cpuid2 cpuid;
1281
1282                 r = -EFAULT;
1283                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1284                         goto out;
1285                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1286                                                       cpuid_arg->entries);
1287                 if (r)
1288                         goto out;
1289
1290                 r = -EFAULT;
1291                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1292                         goto out;
1293                 r = 0;
1294                 break;
1295         }
1296         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1297                 u64 mce_cap;
1298
1299                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1300                 r = -EFAULT;
1301                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1302                         goto out;
1303                 r = 0;
1304                 break;
1305         }
1306         default:
1307                 r = -EINVAL;
1308         }
1309 out:
1310         return r;
1311 }
1312
1313 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1314 {
1315         kvm_x86_ops->vcpu_load(vcpu, cpu);
1316         kvm_request_guest_time_update(vcpu);
1317 }
1318
1319 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1320 {
1321         kvm_x86_ops->vcpu_put(vcpu);
1322         kvm_put_guest_fpu(vcpu);
1323 }
1324
1325 static int is_efer_nx(void)
1326 {
1327         unsigned long long efer = 0;
1328
1329         rdmsrl_safe(MSR_EFER, &efer);
1330         return efer & EFER_NX;
1331 }
1332
1333 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1334 {
1335         int i;
1336         struct kvm_cpuid_entry2 *e, *entry;
1337
1338         entry = NULL;
1339         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1340                 e = &vcpu->arch.cpuid_entries[i];
1341                 if (e->function == 0x80000001) {
1342                         entry = e;
1343                         break;
1344                 }
1345         }
1346         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1347                 entry->edx &= ~(1 << 20);
1348                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1349         }
1350 }
1351
1352 /* when an old userspace process fills a new kernel module */
1353 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1354                                     struct kvm_cpuid *cpuid,
1355                                     struct kvm_cpuid_entry __user *entries)
1356 {
1357         int r, i;
1358         struct kvm_cpuid_entry *cpuid_entries;
1359
1360         r = -E2BIG;
1361         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1362                 goto out;
1363         r = -ENOMEM;
1364         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1365         if (!cpuid_entries)
1366                 goto out;
1367         r = -EFAULT;
1368         if (copy_from_user(cpuid_entries, entries,
1369                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1370                 goto out_free;
1371         for (i = 0; i < cpuid->nent; i++) {
1372                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1373                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1374                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1375                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1376                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1377                 vcpu->arch.cpuid_entries[i].index = 0;
1378                 vcpu->arch.cpuid_entries[i].flags = 0;
1379                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1380                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1381                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1382         }
1383         vcpu->arch.cpuid_nent = cpuid->nent;
1384         cpuid_fix_nx_cap(vcpu);
1385         r = 0;
1386         kvm_apic_set_version(vcpu);
1387
1388 out_free:
1389         vfree(cpuid_entries);
1390 out:
1391         return r;
1392 }
1393
1394 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1395                                      struct kvm_cpuid2 *cpuid,
1396                                      struct kvm_cpuid_entry2 __user *entries)
1397 {
1398         int r;
1399
1400         r = -E2BIG;
1401         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1402                 goto out;
1403         r = -EFAULT;
1404         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1405                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1406                 goto out;
1407         vcpu->arch.cpuid_nent = cpuid->nent;
1408         kvm_apic_set_version(vcpu);
1409         return 0;
1410
1411 out:
1412         return r;
1413 }
1414
1415 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1416                                      struct kvm_cpuid2 *cpuid,
1417                                      struct kvm_cpuid_entry2 __user *entries)
1418 {
1419         int r;
1420
1421         r = -E2BIG;
1422         if (cpuid->nent < vcpu->arch.cpuid_nent)
1423                 goto out;
1424         r = -EFAULT;
1425         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1426                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1427                 goto out;
1428         return 0;
1429
1430 out:
1431         cpuid->nent = vcpu->arch.cpuid_nent;
1432         return r;
1433 }
1434
1435 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1436                            u32 index)
1437 {
1438         entry->function = function;
1439         entry->index = index;
1440         cpuid_count(entry->function, entry->index,
1441                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1442         entry->flags = 0;
1443 }
1444
1445 #define F(x) bit(X86_FEATURE_##x)
1446
1447 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1448                          u32 index, int *nent, int maxnent)
1449 {
1450         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1451         unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1452 #ifdef CONFIG_X86_64
1453         unsigned f_lm = F(LM);
1454 #else
1455         unsigned f_lm = 0;
1456 #endif
1457
1458         /* cpuid 1.edx */
1459         const u32 kvm_supported_word0_x86_features =
1460                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1461                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1462                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1463                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1464                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1465                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1466                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1467                 0 /* HTT, TM, Reserved, PBE */;
1468         /* cpuid 0x80000001.edx */
1469         const u32 kvm_supported_word1_x86_features =
1470                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1471                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1472                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1473                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1474                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1475                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1476                 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1477                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1478         /* cpuid 1.ecx */
1479         const u32 kvm_supported_word4_x86_features =
1480                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1481                 0 /* DS-CPL, VMX, SMX, EST */ |
1482                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1483                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1484                 0 /* Reserved, DCA */ | F(XMM4_1) |
1485                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1486                 0 /* Reserved, XSAVE, OSXSAVE */;
1487         /* cpuid 0x80000001.ecx */
1488         const u32 kvm_supported_word6_x86_features =
1489                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1490                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1491                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1492                 0 /* SKINIT */ | 0 /* WDT */;
1493
1494         /* all calls to cpuid_count() should be made on the same cpu */
1495         get_cpu();
1496         do_cpuid_1_ent(entry, function, index);
1497         ++*nent;
1498
1499         switch (function) {
1500         case 0:
1501                 entry->eax = min(entry->eax, (u32)0xb);
1502                 break;
1503         case 1:
1504                 entry->edx &= kvm_supported_word0_x86_features;
1505                 entry->ecx &= kvm_supported_word4_x86_features;
1506                 /* we support x2apic emulation even if host does not support
1507                  * it since we emulate x2apic in software */
1508                 entry->ecx |= F(X2APIC);
1509                 break;
1510         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1511          * may return different values. This forces us to get_cpu() before
1512          * issuing the first command, and also to emulate this annoying behavior
1513          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1514         case 2: {
1515                 int t, times = entry->eax & 0xff;
1516
1517                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1518                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1519                 for (t = 1; t < times && *nent < maxnent; ++t) {
1520                         do_cpuid_1_ent(&entry[t], function, 0);
1521                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1522                         ++*nent;
1523                 }
1524                 break;
1525         }
1526         /* function 4 and 0xb have additional index. */
1527         case 4: {
1528                 int i, cache_type;
1529
1530                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1531                 /* read more entries until cache_type is zero */
1532                 for (i = 1; *nent < maxnent; ++i) {
1533                         cache_type = entry[i - 1].eax & 0x1f;
1534                         if (!cache_type)
1535                                 break;
1536                         do_cpuid_1_ent(&entry[i], function, i);
1537                         entry[i].flags |=
1538                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1539                         ++*nent;
1540                 }
1541                 break;
1542         }
1543         case 0xb: {
1544                 int i, level_type;
1545
1546                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1547                 /* read more entries until level_type is zero */
1548                 for (i = 1; *nent < maxnent; ++i) {
1549                         level_type = entry[i - 1].ecx & 0xff00;
1550                         if (!level_type)
1551                                 break;
1552                         do_cpuid_1_ent(&entry[i], function, i);
1553                         entry[i].flags |=
1554                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1555                         ++*nent;
1556                 }
1557                 break;
1558         }
1559         case 0x80000000:
1560                 entry->eax = min(entry->eax, 0x8000001a);
1561                 break;
1562         case 0x80000001:
1563                 entry->edx &= kvm_supported_word1_x86_features;
1564                 entry->ecx &= kvm_supported_word6_x86_features;
1565                 break;
1566         }
1567         put_cpu();
1568 }
1569
1570 #undef F
1571
1572 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1573                                      struct kvm_cpuid_entry2 __user *entries)
1574 {
1575         struct kvm_cpuid_entry2 *cpuid_entries;
1576         int limit, nent = 0, r = -E2BIG;
1577         u32 func;
1578
1579         if (cpuid->nent < 1)
1580                 goto out;
1581         r = -ENOMEM;
1582         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1583         if (!cpuid_entries)
1584                 goto out;
1585
1586         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1587         limit = cpuid_entries[0].eax;
1588         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1589                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1590                              &nent, cpuid->nent);
1591         r = -E2BIG;
1592         if (nent >= cpuid->nent)
1593                 goto out_free;
1594
1595         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1596         limit = cpuid_entries[nent - 1].eax;
1597         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1598                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1599                              &nent, cpuid->nent);
1600         r = -E2BIG;
1601         if (nent >= cpuid->nent)
1602                 goto out_free;
1603
1604         r = -EFAULT;
1605         if (copy_to_user(entries, cpuid_entries,
1606                          nent * sizeof(struct kvm_cpuid_entry2)))
1607                 goto out_free;
1608         cpuid->nent = nent;
1609         r = 0;
1610
1611 out_free:
1612         vfree(cpuid_entries);
1613 out:
1614         return r;
1615 }
1616
1617 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1618                                     struct kvm_lapic_state *s)
1619 {
1620         vcpu_load(vcpu);
1621         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1622         vcpu_put(vcpu);
1623
1624         return 0;
1625 }
1626
1627 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1628                                     struct kvm_lapic_state *s)
1629 {
1630         vcpu_load(vcpu);
1631         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1632         kvm_apic_post_state_restore(vcpu);
1633         update_cr8_intercept(vcpu);
1634         vcpu_put(vcpu);
1635
1636         return 0;
1637 }
1638
1639 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1640                                     struct kvm_interrupt *irq)
1641 {
1642         if (irq->irq < 0 || irq->irq >= 256)
1643                 return -EINVAL;
1644         if (irqchip_in_kernel(vcpu->kvm))
1645                 return -ENXIO;
1646         vcpu_load(vcpu);
1647
1648         kvm_queue_interrupt(vcpu, irq->irq, false);
1649
1650         vcpu_put(vcpu);
1651
1652         return 0;
1653 }
1654
1655 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1656 {
1657         vcpu_load(vcpu);
1658         kvm_inject_nmi(vcpu);
1659         vcpu_put(vcpu);
1660
1661         return 0;
1662 }
1663
1664 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1665                                            struct kvm_tpr_access_ctl *tac)
1666 {
1667         if (tac->flags)
1668                 return -EINVAL;
1669         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1670         return 0;
1671 }
1672
1673 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1674                                         u64 mcg_cap)
1675 {
1676         int r;
1677         unsigned bank_num = mcg_cap & 0xff, bank;
1678
1679         r = -EINVAL;
1680         if (!bank_num)
1681                 goto out;
1682         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1683                 goto out;
1684         r = 0;
1685         vcpu->arch.mcg_cap = mcg_cap;
1686         /* Init IA32_MCG_CTL to all 1s */
1687         if (mcg_cap & MCG_CTL_P)
1688                 vcpu->arch.mcg_ctl = ~(u64)0;
1689         /* Init IA32_MCi_CTL to all 1s */
1690         for (bank = 0; bank < bank_num; bank++)
1691                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1692 out:
1693         return r;
1694 }
1695
1696 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1697                                       struct kvm_x86_mce *mce)
1698 {
1699         u64 mcg_cap = vcpu->arch.mcg_cap;
1700         unsigned bank_num = mcg_cap & 0xff;
1701         u64 *banks = vcpu->arch.mce_banks;
1702
1703         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1704                 return -EINVAL;
1705         /*
1706          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1707          * reporting is disabled
1708          */
1709         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1710             vcpu->arch.mcg_ctl != ~(u64)0)
1711                 return 0;
1712         banks += 4 * mce->bank;
1713         /*
1714          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1715          * reporting is disabled for the bank
1716          */
1717         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1718                 return 0;
1719         if (mce->status & MCI_STATUS_UC) {
1720                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1721                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1722                         printk(KERN_DEBUG "kvm: set_mce: "
1723                                "injects mce exception while "
1724                                "previous one is in progress!\n");
1725                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1726                         return 0;
1727                 }
1728                 if (banks[1] & MCI_STATUS_VAL)
1729                         mce->status |= MCI_STATUS_OVER;
1730                 banks[2] = mce->addr;
1731                 banks[3] = mce->misc;
1732                 vcpu->arch.mcg_status = mce->mcg_status;
1733                 banks[1] = mce->status;
1734                 kvm_queue_exception(vcpu, MC_VECTOR);
1735         } else if (!(banks[1] & MCI_STATUS_VAL)
1736                    || !(banks[1] & MCI_STATUS_UC)) {
1737                 if (banks[1] & MCI_STATUS_VAL)
1738                         mce->status |= MCI_STATUS_OVER;
1739                 banks[2] = mce->addr;
1740                 banks[3] = mce->misc;
1741                 banks[1] = mce->status;
1742         } else
1743                 banks[1] |= MCI_STATUS_OVER;
1744         return 0;
1745 }
1746
1747 long kvm_arch_vcpu_ioctl(struct file *filp,
1748                          unsigned int ioctl, unsigned long arg)
1749 {
1750         struct kvm_vcpu *vcpu = filp->private_data;
1751         void __user *argp = (void __user *)arg;
1752         int r;
1753         struct kvm_lapic_state *lapic = NULL;
1754
1755         switch (ioctl) {
1756         case KVM_GET_LAPIC: {
1757                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1758
1759                 r = -ENOMEM;
1760                 if (!lapic)
1761                         goto out;
1762                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1763                 if (r)
1764                         goto out;
1765                 r = -EFAULT;
1766                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1767                         goto out;
1768                 r = 0;
1769                 break;
1770         }
1771         case KVM_SET_LAPIC: {
1772                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1773                 r = -ENOMEM;
1774                 if (!lapic)
1775                         goto out;
1776                 r = -EFAULT;
1777                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1778                         goto out;
1779                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1780                 if (r)
1781                         goto out;
1782                 r = 0;
1783                 break;
1784         }
1785         case KVM_INTERRUPT: {
1786                 struct kvm_interrupt irq;
1787
1788                 r = -EFAULT;
1789                 if (copy_from_user(&irq, argp, sizeof irq))
1790                         goto out;
1791                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1792                 if (r)
1793                         goto out;
1794                 r = 0;
1795                 break;
1796         }
1797         case KVM_NMI: {
1798                 r = kvm_vcpu_ioctl_nmi(vcpu);
1799                 if (r)
1800                         goto out;
1801                 r = 0;
1802                 break;
1803         }
1804         case KVM_SET_CPUID: {
1805                 struct kvm_cpuid __user *cpuid_arg = argp;
1806                 struct kvm_cpuid cpuid;
1807
1808                 r = -EFAULT;
1809                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1810                         goto out;
1811                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1812                 if (r)
1813                         goto out;
1814                 break;
1815         }
1816         case KVM_SET_CPUID2: {
1817                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1818                 struct kvm_cpuid2 cpuid;
1819
1820                 r = -EFAULT;
1821                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1822                         goto out;
1823                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1824                                               cpuid_arg->entries);
1825                 if (r)
1826                         goto out;
1827                 break;
1828         }
1829         case KVM_GET_CPUID2: {
1830                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1831                 struct kvm_cpuid2 cpuid;
1832
1833                 r = -EFAULT;
1834                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1835                         goto out;
1836                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1837                                               cpuid_arg->entries);
1838                 if (r)
1839                         goto out;
1840                 r = -EFAULT;
1841                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1842                         goto out;
1843                 r = 0;
1844                 break;
1845         }
1846         case KVM_GET_MSRS:
1847                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1848                 break;
1849         case KVM_SET_MSRS:
1850                 r = msr_io(vcpu, argp, do_set_msr, 0);
1851                 break;
1852         case KVM_TPR_ACCESS_REPORTING: {
1853                 struct kvm_tpr_access_ctl tac;
1854
1855                 r = -EFAULT;
1856                 if (copy_from_user(&tac, argp, sizeof tac))
1857                         goto out;
1858                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1859                 if (r)
1860                         goto out;
1861                 r = -EFAULT;
1862                 if (copy_to_user(argp, &tac, sizeof tac))
1863                         goto out;
1864                 r = 0;
1865                 break;
1866         };
1867         case KVM_SET_VAPIC_ADDR: {
1868                 struct kvm_vapic_addr va;
1869
1870                 r = -EINVAL;
1871                 if (!irqchip_in_kernel(vcpu->kvm))
1872                         goto out;
1873                 r = -EFAULT;
1874                 if (copy_from_user(&va, argp, sizeof va))
1875                         goto out;
1876                 r = 0;
1877                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1878                 break;
1879         }
1880         case KVM_X86_SETUP_MCE: {
1881                 u64 mcg_cap;
1882
1883                 r = -EFAULT;
1884                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1885                         goto out;
1886                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1887                 break;
1888         }
1889         case KVM_X86_SET_MCE: {
1890                 struct kvm_x86_mce mce;
1891
1892                 r = -EFAULT;
1893                 if (copy_from_user(&mce, argp, sizeof mce))
1894                         goto out;
1895                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1896                 break;
1897         }
1898         default:
1899                 r = -EINVAL;
1900         }
1901 out:
1902         kfree(lapic);
1903         return r;
1904 }
1905
1906 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1907 {
1908         int ret;
1909
1910         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1911                 return -1;
1912         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1913         return ret;
1914 }
1915
1916 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
1917                                               u64 ident_addr)
1918 {
1919         kvm->arch.ept_identity_map_addr = ident_addr;
1920         return 0;
1921 }
1922
1923 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1924                                           u32 kvm_nr_mmu_pages)
1925 {
1926         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1927                 return -EINVAL;
1928
1929         down_write(&kvm->slots_lock);
1930         spin_lock(&kvm->mmu_lock);
1931
1932         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1933         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1934
1935         spin_unlock(&kvm->mmu_lock);
1936         up_write(&kvm->slots_lock);
1937         return 0;
1938 }
1939
1940 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1941 {
1942         return kvm->arch.n_alloc_mmu_pages;
1943 }
1944
1945 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1946 {
1947         int i;
1948         struct kvm_mem_alias *alias;
1949
1950         for (i = 0; i < kvm->arch.naliases; ++i) {
1951                 alias = &kvm->arch.aliases[i];
1952                 if (gfn >= alias->base_gfn
1953                     && gfn < alias->base_gfn + alias->npages)
1954                         return alias->target_gfn + gfn - alias->base_gfn;
1955         }
1956         return gfn;
1957 }
1958
1959 /*
1960  * Set a new alias region.  Aliases map a portion of physical memory into
1961  * another portion.  This is useful for memory windows, for example the PC
1962  * VGA region.
1963  */
1964 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1965                                          struct kvm_memory_alias *alias)
1966 {
1967         int r, n;
1968         struct kvm_mem_alias *p;
1969
1970         r = -EINVAL;
1971         /* General sanity checks */
1972         if (alias->memory_size & (PAGE_SIZE - 1))
1973                 goto out;
1974         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1975                 goto out;
1976         if (alias->slot >= KVM_ALIAS_SLOTS)
1977                 goto out;
1978         if (alias->guest_phys_addr + alias->memory_size
1979             < alias->guest_phys_addr)
1980                 goto out;
1981         if (alias->target_phys_addr + alias->memory_size
1982             < alias->target_phys_addr)
1983                 goto out;
1984
1985         down_write(&kvm->slots_lock);
1986         spin_lock(&kvm->mmu_lock);
1987
1988         p = &kvm->arch.aliases[alias->slot];
1989         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1990         p->npages = alias->memory_size >> PAGE_SHIFT;
1991         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1992
1993         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1994                 if (kvm->arch.aliases[n - 1].npages)
1995                         break;
1996         kvm->arch.naliases = n;
1997
1998         spin_unlock(&kvm->mmu_lock);
1999         kvm_mmu_zap_all(kvm);
2000
2001         up_write(&kvm->slots_lock);
2002
2003         return 0;
2004
2005 out:
2006         return r;
2007 }
2008
2009 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2010 {
2011         int r;
2012
2013         r = 0;
2014         switch (chip->chip_id) {
2015         case KVM_IRQCHIP_PIC_MASTER:
2016                 memcpy(&chip->chip.pic,
2017                         &pic_irqchip(kvm)->pics[0],
2018                         sizeof(struct kvm_pic_state));
2019                 break;
2020         case KVM_IRQCHIP_PIC_SLAVE:
2021                 memcpy(&chip->chip.pic,
2022                         &pic_irqchip(kvm)->pics[1],
2023                         sizeof(struct kvm_pic_state));
2024                 break;
2025         case KVM_IRQCHIP_IOAPIC:
2026                 memcpy(&chip->chip.ioapic,
2027                         ioapic_irqchip(kvm),
2028                         sizeof(struct kvm_ioapic_state));
2029                 break;
2030         default:
2031                 r = -EINVAL;
2032                 break;
2033         }
2034         return r;
2035 }
2036
2037 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2038 {
2039         int r;
2040
2041         r = 0;
2042         switch (chip->chip_id) {
2043         case KVM_IRQCHIP_PIC_MASTER:
2044                 spin_lock(&pic_irqchip(kvm)->lock);
2045                 memcpy(&pic_irqchip(kvm)->pics[0],
2046                         &chip->chip.pic,
2047                         sizeof(struct kvm_pic_state));
2048                 spin_unlock(&pic_irqchip(kvm)->lock);
2049                 break;
2050         case KVM_IRQCHIP_PIC_SLAVE:
2051                 spin_lock(&pic_irqchip(kvm)->lock);
2052                 memcpy(&pic_irqchip(kvm)->pics[1],
2053                         &chip->chip.pic,
2054                         sizeof(struct kvm_pic_state));
2055                 spin_unlock(&pic_irqchip(kvm)->lock);
2056                 break;
2057         case KVM_IRQCHIP_IOAPIC:
2058                 mutex_lock(&kvm->irq_lock);
2059                 memcpy(ioapic_irqchip(kvm),
2060                         &chip->chip.ioapic,
2061                         sizeof(struct kvm_ioapic_state));
2062                 mutex_unlock(&kvm->irq_lock);
2063                 break;
2064         default:
2065                 r = -EINVAL;
2066                 break;
2067         }
2068         kvm_pic_update_irq(pic_irqchip(kvm));
2069         return r;
2070 }
2071
2072 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2073 {
2074         int r = 0;
2075
2076         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2077         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2078         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2079         return r;
2080 }
2081
2082 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2083 {
2084         int r = 0;
2085
2086         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2087         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2088         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2089         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2090         return r;
2091 }
2092
2093 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2094 {
2095         int r = 0;
2096
2097         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2098         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2099                 sizeof(ps->channels));
2100         ps->flags = kvm->arch.vpit->pit_state.flags;
2101         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2102         return r;
2103 }
2104
2105 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2106 {
2107         int r = 0, start = 0;
2108         u32 prev_legacy, cur_legacy;
2109         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2110         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2111         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2112         if (!prev_legacy && cur_legacy)
2113                 start = 1;
2114         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2115                sizeof(kvm->arch.vpit->pit_state.channels));
2116         kvm->arch.vpit->pit_state.flags = ps->flags;
2117         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2118         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2119         return r;
2120 }
2121
2122 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2123                                  struct kvm_reinject_control *control)
2124 {
2125         if (!kvm->arch.vpit)
2126                 return -ENXIO;
2127         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2128         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2129         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2130         return 0;
2131 }
2132
2133 /*
2134  * Get (and clear) the dirty memory log for a memory slot.
2135  */
2136 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2137                                       struct kvm_dirty_log *log)
2138 {
2139         int r;
2140         int n;
2141         struct kvm_memory_slot *memslot;
2142         int is_dirty = 0;
2143
2144         down_write(&kvm->slots_lock);
2145
2146         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2147         if (r)
2148                 goto out;
2149
2150         /* If nothing is dirty, don't bother messing with page tables. */
2151         if (is_dirty) {
2152                 spin_lock(&kvm->mmu_lock);
2153                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2154                 spin_unlock(&kvm->mmu_lock);
2155                 kvm_flush_remote_tlbs(kvm);
2156                 memslot = &kvm->memslots[log->slot];
2157                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2158                 memset(memslot->dirty_bitmap, 0, n);
2159         }
2160         r = 0;
2161 out:
2162         up_write(&kvm->slots_lock);
2163         return r;
2164 }
2165
2166 long kvm_arch_vm_ioctl(struct file *filp,
2167                        unsigned int ioctl, unsigned long arg)
2168 {
2169         struct kvm *kvm = filp->private_data;
2170         void __user *argp = (void __user *)arg;
2171         int r = -EINVAL;
2172         /*
2173          * This union makes it completely explicit to gcc-3.x
2174          * that these two variables' stack usage should be
2175          * combined, not added together.
2176          */
2177         union {
2178                 struct kvm_pit_state ps;
2179                 struct kvm_pit_state2 ps2;
2180                 struct kvm_memory_alias alias;
2181                 struct kvm_pit_config pit_config;
2182         } u;
2183
2184         switch (ioctl) {
2185         case KVM_SET_TSS_ADDR:
2186                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2187                 if (r < 0)
2188                         goto out;
2189                 break;
2190         case KVM_SET_IDENTITY_MAP_ADDR: {
2191                 u64 ident_addr;
2192
2193                 r = -EFAULT;
2194                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2195                         goto out;
2196                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2197                 if (r < 0)
2198                         goto out;
2199                 break;
2200         }
2201         case KVM_SET_MEMORY_REGION: {
2202                 struct kvm_memory_region kvm_mem;
2203                 struct kvm_userspace_memory_region kvm_userspace_mem;
2204
2205                 r = -EFAULT;
2206                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2207                         goto out;
2208                 kvm_userspace_mem.slot = kvm_mem.slot;
2209                 kvm_userspace_mem.flags = kvm_mem.flags;
2210                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2211                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2212                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2213                 if (r)
2214                         goto out;
2215                 break;
2216         }
2217         case KVM_SET_NR_MMU_PAGES:
2218                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2219                 if (r)
2220                         goto out;
2221                 break;
2222         case KVM_GET_NR_MMU_PAGES:
2223                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2224                 break;
2225         case KVM_SET_MEMORY_ALIAS:
2226                 r = -EFAULT;
2227                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2228                         goto out;
2229                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2230                 if (r)
2231                         goto out;
2232                 break;
2233         case KVM_CREATE_IRQCHIP:
2234                 r = -ENOMEM;
2235                 kvm->arch.vpic = kvm_create_pic(kvm);
2236                 if (kvm->arch.vpic) {
2237                         r = kvm_ioapic_init(kvm);
2238                         if (r) {
2239                                 kfree(kvm->arch.vpic);
2240                                 kvm->arch.vpic = NULL;
2241                                 goto out;
2242                         }
2243                 } else
2244                         goto out;
2245                 r = kvm_setup_default_irq_routing(kvm);
2246                 if (r) {
2247                         kfree(kvm->arch.vpic);
2248                         kfree(kvm->arch.vioapic);
2249                         goto out;
2250                 }
2251                 break;
2252         case KVM_CREATE_PIT:
2253                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2254                 goto create_pit;
2255         case KVM_CREATE_PIT2:
2256                 r = -EFAULT;
2257                 if (copy_from_user(&u.pit_config, argp,
2258                                    sizeof(struct kvm_pit_config)))
2259                         goto out;
2260         create_pit:
2261                 down_write(&kvm->slots_lock);
2262                 r = -EEXIST;
2263                 if (kvm->arch.vpit)
2264                         goto create_pit_unlock;
2265                 r = -ENOMEM;
2266                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2267                 if (kvm->arch.vpit)
2268                         r = 0;
2269         create_pit_unlock:
2270                 up_write(&kvm->slots_lock);
2271                 break;
2272         case KVM_IRQ_LINE_STATUS:
2273         case KVM_IRQ_LINE: {
2274                 struct kvm_irq_level irq_event;
2275
2276                 r = -EFAULT;
2277                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2278                         goto out;
2279                 if (irqchip_in_kernel(kvm)) {
2280                         __s32 status;
2281                         mutex_lock(&kvm->irq_lock);
2282                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2283                                         irq_event.irq, irq_event.level);
2284                         mutex_unlock(&kvm->irq_lock);
2285                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2286                                 irq_event.status = status;
2287                                 if (copy_to_user(argp, &irq_event,
2288                                                         sizeof irq_event))
2289                                         goto out;
2290                         }
2291                         r = 0;
2292                 }
2293                 break;
2294         }
2295         case KVM_GET_IRQCHIP: {
2296                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2297                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2298
2299                 r = -ENOMEM;
2300                 if (!chip)
2301                         goto out;
2302                 r = -EFAULT;
2303                 if (copy_from_user(chip, argp, sizeof *chip))
2304                         goto get_irqchip_out;
2305                 r = -ENXIO;
2306                 if (!irqchip_in_kernel(kvm))
2307                         goto get_irqchip_out;
2308                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2309                 if (r)
2310                         goto get_irqchip_out;
2311                 r = -EFAULT;
2312                 if (copy_to_user(argp, chip, sizeof *chip))
2313                         goto get_irqchip_out;
2314                 r = 0;
2315         get_irqchip_out:
2316                 kfree(chip);
2317                 if (r)
2318                         goto out;
2319                 break;
2320         }
2321         case KVM_SET_IRQCHIP: {
2322                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2323                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2324
2325                 r = -ENOMEM;
2326                 if (!chip)
2327                         goto out;
2328                 r = -EFAULT;
2329                 if (copy_from_user(chip, argp, sizeof *chip))
2330                         goto set_irqchip_out;
2331                 r = -ENXIO;
2332                 if (!irqchip_in_kernel(kvm))
2333                         goto set_irqchip_out;
2334                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2335                 if (r)
2336                         goto set_irqchip_out;
2337                 r = 0;
2338         set_irqchip_out:
2339                 kfree(chip);
2340                 if (r)
2341                         goto out;
2342                 break;
2343         }
2344         case KVM_GET_PIT: {
2345                 r = -EFAULT;
2346                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2347                         goto out;
2348                 r = -ENXIO;
2349                 if (!kvm->arch.vpit)
2350                         goto out;
2351                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2352                 if (r)
2353                         goto out;
2354                 r = -EFAULT;
2355                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2356                         goto out;
2357                 r = 0;
2358                 break;
2359         }
2360         case KVM_SET_PIT: {
2361                 r = -EFAULT;
2362                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2363                         goto out;
2364                 r = -ENXIO;
2365                 if (!kvm->arch.vpit)
2366                         goto out;
2367                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2368                 if (r)
2369                         goto out;
2370                 r = 0;
2371                 break;
2372         }
2373         case KVM_GET_PIT2: {
2374                 r = -ENXIO;
2375                 if (!kvm->arch.vpit)
2376                         goto out;
2377                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2378                 if (r)
2379                         goto out;
2380                 r = -EFAULT;
2381                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2382                         goto out;
2383                 r = 0;
2384                 break;
2385         }
2386         case KVM_SET_PIT2: {
2387                 r = -EFAULT;
2388                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2389                         goto out;
2390                 r = -ENXIO;
2391                 if (!kvm->arch.vpit)
2392                         goto out;
2393                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2394                 if (r)
2395                         goto out;
2396                 r = 0;
2397                 break;
2398         }
2399         case KVM_REINJECT_CONTROL: {
2400                 struct kvm_reinject_control control;
2401                 r =  -EFAULT;
2402                 if (copy_from_user(&control, argp, sizeof(control)))
2403                         goto out;
2404                 r = kvm_vm_ioctl_reinject(kvm, &control);
2405                 if (r)
2406                         goto out;
2407                 r = 0;
2408                 break;
2409         }
2410         default:
2411                 ;
2412         }
2413 out:
2414         return r;
2415 }
2416
2417 static void kvm_init_msr_list(void)
2418 {
2419         u32 dummy[2];
2420         unsigned i, j;
2421
2422         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2423                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2424                         continue;
2425                 if (j < i)
2426                         msrs_to_save[j] = msrs_to_save[i];
2427                 j++;
2428         }
2429         num_msrs_to_save = j;
2430 }
2431
2432 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2433                            const void *v)
2434 {
2435         if (vcpu->arch.apic &&
2436             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2437                 return 0;
2438
2439         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2440 }
2441
2442 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2443 {
2444         if (vcpu->arch.apic &&
2445             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2446                 return 0;
2447
2448         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2449 }
2450
2451 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2452                                struct kvm_vcpu *vcpu)
2453 {
2454         void *data = val;
2455         int r = X86EMUL_CONTINUE;
2456
2457         while (bytes) {
2458                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2459                 unsigned offset = addr & (PAGE_SIZE-1);
2460                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2461                 int ret;
2462
2463                 if (gpa == UNMAPPED_GVA) {
2464                         r = X86EMUL_PROPAGATE_FAULT;
2465                         goto out;
2466                 }
2467                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2468                 if (ret < 0) {
2469                         r = X86EMUL_UNHANDLEABLE;
2470                         goto out;
2471                 }
2472
2473                 bytes -= toread;
2474                 data += toread;
2475                 addr += toread;
2476         }
2477 out:
2478         return r;
2479 }
2480
2481 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2482                                 struct kvm_vcpu *vcpu)
2483 {
2484         void *data = val;
2485         int r = X86EMUL_CONTINUE;
2486
2487         while (bytes) {
2488                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2489                 unsigned offset = addr & (PAGE_SIZE-1);
2490                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2491                 int ret;
2492
2493                 if (gpa == UNMAPPED_GVA) {
2494                         r = X86EMUL_PROPAGATE_FAULT;
2495                         goto out;
2496                 }
2497                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2498                 if (ret < 0) {
2499                         r = X86EMUL_UNHANDLEABLE;
2500                         goto out;
2501                 }
2502
2503                 bytes -= towrite;
2504                 data += towrite;
2505                 addr += towrite;
2506         }
2507 out:
2508         return r;
2509 }
2510
2511
2512 static int emulator_read_emulated(unsigned long addr,
2513                                   void *val,
2514                                   unsigned int bytes,
2515                                   struct kvm_vcpu *vcpu)
2516 {
2517         gpa_t                 gpa;
2518
2519         if (vcpu->mmio_read_completed) {
2520                 memcpy(val, vcpu->mmio_data, bytes);
2521                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2522                                vcpu->mmio_phys_addr, *(u64 *)val);
2523                 vcpu->mmio_read_completed = 0;
2524                 return X86EMUL_CONTINUE;
2525         }
2526
2527         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2528
2529         /* For APIC access vmexit */
2530         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2531                 goto mmio;
2532
2533         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2534                                 == X86EMUL_CONTINUE)
2535                 return X86EMUL_CONTINUE;
2536         if (gpa == UNMAPPED_GVA)
2537                 return X86EMUL_PROPAGATE_FAULT;
2538
2539 mmio:
2540         /*
2541          * Is this MMIO handled locally?
2542          */
2543         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2544                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2545                 return X86EMUL_CONTINUE;
2546         }
2547
2548         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2549
2550         vcpu->mmio_needed = 1;
2551         vcpu->mmio_phys_addr = gpa;
2552         vcpu->mmio_size = bytes;
2553         vcpu->mmio_is_write = 0;
2554
2555         return X86EMUL_UNHANDLEABLE;
2556 }
2557
2558 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2559                           const void *val, int bytes)
2560 {
2561         int ret;
2562
2563         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2564         if (ret < 0)
2565                 return 0;
2566         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2567         return 1;
2568 }
2569
2570 static int emulator_write_emulated_onepage(unsigned long addr,
2571                                            const void *val,
2572                                            unsigned int bytes,
2573                                            struct kvm_vcpu *vcpu)
2574 {
2575         gpa_t                 gpa;
2576
2577         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2578
2579         if (gpa == UNMAPPED_GVA) {
2580                 kvm_inject_page_fault(vcpu, addr, 2);
2581                 return X86EMUL_PROPAGATE_FAULT;
2582         }
2583
2584         /* For APIC access vmexit */
2585         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2586                 goto mmio;
2587
2588         if (emulator_write_phys(vcpu, gpa, val, bytes))
2589                 return X86EMUL_CONTINUE;
2590
2591 mmio:
2592         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2593         /*
2594          * Is this MMIO handled locally?
2595          */
2596         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2597                 return X86EMUL_CONTINUE;
2598
2599         vcpu->mmio_needed = 1;
2600         vcpu->mmio_phys_addr = gpa;
2601         vcpu->mmio_size = bytes;
2602         vcpu->mmio_is_write = 1;
2603         memcpy(vcpu->mmio_data, val, bytes);
2604
2605         return X86EMUL_CONTINUE;
2606 }
2607
2608 int emulator_write_emulated(unsigned long addr,
2609                                    const void *val,
2610                                    unsigned int bytes,
2611                                    struct kvm_vcpu *vcpu)
2612 {
2613         /* Crossing a page boundary? */
2614         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2615                 int rc, now;
2616
2617                 now = -addr & ~PAGE_MASK;
2618                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2619                 if (rc != X86EMUL_CONTINUE)
2620                         return rc;
2621                 addr += now;
2622                 val += now;
2623                 bytes -= now;
2624         }
2625         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2626 }
2627 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2628
2629 static int emulator_cmpxchg_emulated(unsigned long addr,
2630                                      const void *old,
2631                                      const void *new,
2632                                      unsigned int bytes,
2633                                      struct kvm_vcpu *vcpu)
2634 {
2635         static int reported;
2636
2637         if (!reported) {
2638                 reported = 1;
2639                 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2640         }
2641 #ifndef CONFIG_X86_64
2642         /* guests cmpxchg8b have to be emulated atomically */
2643         if (bytes == 8) {
2644                 gpa_t gpa;
2645                 struct page *page;
2646                 char *kaddr;
2647                 u64 val;
2648
2649                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2650
2651                 if (gpa == UNMAPPED_GVA ||
2652                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2653                         goto emul_write;
2654
2655                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2656                         goto emul_write;
2657
2658                 val = *(u64 *)new;
2659
2660                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2661
2662                 kaddr = kmap_atomic(page, KM_USER0);
2663                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2664                 kunmap_atomic(kaddr, KM_USER0);
2665                 kvm_release_page_dirty(page);
2666         }
2667 emul_write:
2668 #endif
2669
2670         return emulator_write_emulated(addr, new, bytes, vcpu);
2671 }
2672
2673 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2674 {
2675         return kvm_x86_ops->get_segment_base(vcpu, seg);
2676 }
2677
2678 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2679 {
2680         kvm_mmu_invlpg(vcpu, address);
2681         return X86EMUL_CONTINUE;
2682 }
2683
2684 int emulate_clts(struct kvm_vcpu *vcpu)
2685 {
2686         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2687         return X86EMUL_CONTINUE;
2688 }
2689
2690 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2691 {
2692         struct kvm_vcpu *vcpu = ctxt->vcpu;
2693
2694         switch (dr) {
2695         case 0 ... 3:
2696                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2697                 return X86EMUL_CONTINUE;
2698         default:
2699                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2700                 return X86EMUL_UNHANDLEABLE;
2701         }
2702 }
2703
2704 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2705 {
2706         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2707         int exception;
2708
2709         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2710         if (exception) {
2711                 /* FIXME: better handling */
2712                 return X86EMUL_UNHANDLEABLE;
2713         }
2714         return X86EMUL_CONTINUE;
2715 }
2716
2717 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2718 {
2719         u8 opcodes[4];
2720         unsigned long rip = kvm_rip_read(vcpu);
2721         unsigned long rip_linear;
2722
2723         if (!printk_ratelimit())
2724                 return;
2725
2726         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2727
2728         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2729
2730         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2731                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2732 }
2733 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2734
2735 static struct x86_emulate_ops emulate_ops = {
2736         .read_std            = kvm_read_guest_virt,
2737         .read_emulated       = emulator_read_emulated,
2738         .write_emulated      = emulator_write_emulated,
2739         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2740 };
2741
2742 static void cache_all_regs(struct kvm_vcpu *vcpu)
2743 {
2744         kvm_register_read(vcpu, VCPU_REGS_RAX);
2745         kvm_register_read(vcpu, VCPU_REGS_RSP);
2746         kvm_register_read(vcpu, VCPU_REGS_RIP);
2747         vcpu->arch.regs_dirty = ~0;
2748 }
2749
2750 int emulate_instruction(struct kvm_vcpu *vcpu,
2751                         struct kvm_run *run,
2752                         unsigned long cr2,
2753                         u16 error_code,
2754                         int emulation_type)
2755 {
2756         int r, shadow_mask;
2757         struct decode_cache *c;
2758
2759         kvm_clear_exception_queue(vcpu);
2760         vcpu->arch.mmio_fault_cr2 = cr2;
2761         /*
2762          * TODO: fix emulate.c to use guest_read/write_register
2763          * instead of direct ->regs accesses, can save hundred cycles
2764          * on Intel for instructions that don't read/change RSP, for
2765          * for example.
2766          */
2767         cache_all_regs(vcpu);
2768
2769         vcpu->mmio_is_write = 0;
2770         vcpu->arch.pio.string = 0;
2771
2772         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2773                 int cs_db, cs_l;
2774                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2775
2776                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2777                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2778                 vcpu->arch.emulate_ctxt.mode =
2779                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2780                         ? X86EMUL_MODE_REAL : cs_l
2781                         ? X86EMUL_MODE_PROT64 : cs_db
2782                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2783
2784                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2785
2786                 /* Only allow emulation of specific instructions on #UD
2787                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2788                 c = &vcpu->arch.emulate_ctxt.decode;
2789                 if (emulation_type & EMULTYPE_TRAP_UD) {
2790                         if (!c->twobyte)
2791                                 return EMULATE_FAIL;
2792                         switch (c->b) {
2793                         case 0x01: /* VMMCALL */
2794                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2795                                         return EMULATE_FAIL;
2796                                 break;
2797                         case 0x34: /* sysenter */
2798                         case 0x35: /* sysexit */
2799                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2800                                         return EMULATE_FAIL;
2801                                 break;
2802                         case 0x05: /* syscall */
2803                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2804                                         return EMULATE_FAIL;
2805                                 break;
2806                         default:
2807                                 return EMULATE_FAIL;
2808                         }
2809
2810                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2811                                 return EMULATE_FAIL;
2812                 }
2813
2814                 ++vcpu->stat.insn_emulation;
2815                 if (r)  {
2816                         ++vcpu->stat.insn_emulation_fail;
2817                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2818                                 return EMULATE_DONE;
2819                         return EMULATE_FAIL;
2820                 }
2821         }
2822
2823         if (emulation_type & EMULTYPE_SKIP) {
2824                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2825                 return EMULATE_DONE;
2826         }
2827
2828         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2829         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2830
2831         if (r == 0)
2832                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2833
2834         if (vcpu->arch.pio.string)
2835                 return EMULATE_DO_MMIO;
2836
2837         if ((r || vcpu->mmio_is_write) && run) {
2838                 run->exit_reason = KVM_EXIT_MMIO;
2839                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2840                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2841                 run->mmio.len = vcpu->mmio_size;
2842                 run->mmio.is_write = vcpu->mmio_is_write;
2843         }
2844
2845         if (r) {
2846                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2847                         return EMULATE_DONE;
2848                 if (!vcpu->mmio_needed) {
2849                         kvm_report_emulation_failure(vcpu, "mmio");
2850                         return EMULATE_FAIL;
2851                 }
2852                 return EMULATE_DO_MMIO;
2853         }
2854
2855         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2856
2857         if (vcpu->mmio_is_write) {
2858                 vcpu->mmio_needed = 0;
2859                 return EMULATE_DO_MMIO;
2860         }
2861
2862         return EMULATE_DONE;
2863 }
2864 EXPORT_SYMBOL_GPL(emulate_instruction);
2865
2866 static int pio_copy_data(struct kvm_vcpu *vcpu)
2867 {
2868         void *p = vcpu->arch.pio_data;
2869         gva_t q = vcpu->arch.pio.guest_gva;
2870         unsigned bytes;
2871         int ret;
2872
2873         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2874         if (vcpu->arch.pio.in)
2875                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2876         else
2877                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2878         return ret;
2879 }
2880
2881 int complete_pio(struct kvm_vcpu *vcpu)
2882 {
2883         struct kvm_pio_request *io = &vcpu->arch.pio;
2884         long delta;
2885         int r;
2886         unsigned long val;
2887
2888         if (!io->string) {
2889                 if (io->in) {
2890                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2891                         memcpy(&val, vcpu->arch.pio_data, io->size);
2892                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2893                 }
2894         } else {
2895                 if (io->in) {
2896                         r = pio_copy_data(vcpu);
2897                         if (r)
2898                                 return r;
2899                 }
2900
2901                 delta = 1;
2902                 if (io->rep) {
2903                         delta *= io->cur_count;
2904                         /*
2905                          * The size of the register should really depend on
2906                          * current address size.
2907                          */
2908                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2909                         val -= delta;
2910                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2911                 }
2912                 if (io->down)
2913                         delta = -delta;
2914                 delta *= io->size;
2915                 if (io->in) {
2916                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2917                         val += delta;
2918                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2919                 } else {
2920                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2921                         val += delta;
2922                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2923                 }
2924         }
2925
2926         io->count -= io->cur_count;
2927         io->cur_count = 0;
2928
2929         return 0;
2930 }
2931
2932 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2933 {
2934         /* TODO: String I/O for in kernel device */
2935         int r;
2936
2937         if (vcpu->arch.pio.in)
2938                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2939                                     vcpu->arch.pio.size, pd);
2940         else
2941                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2942                                      vcpu->arch.pio.size, pd);
2943         return r;
2944 }
2945
2946 static int pio_string_write(struct kvm_vcpu *vcpu)
2947 {
2948         struct kvm_pio_request *io = &vcpu->arch.pio;
2949         void *pd = vcpu->arch.pio_data;
2950         int i, r = 0;
2951
2952         for (i = 0; i < io->cur_count; i++) {
2953                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2954                                      io->port, io->size, pd)) {
2955                         r = -EOPNOTSUPP;
2956                         break;
2957                 }
2958                 pd += io->size;
2959         }
2960         return r;
2961 }
2962
2963 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2964                   int size, unsigned port)
2965 {
2966         unsigned long val;
2967
2968         vcpu->run->exit_reason = KVM_EXIT_IO;
2969         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2970         vcpu->run->io.size = vcpu->arch.pio.size = size;
2971         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2972         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2973         vcpu->run->io.port = vcpu->arch.pio.port = port;
2974         vcpu->arch.pio.in = in;
2975         vcpu->arch.pio.string = 0;
2976         vcpu->arch.pio.down = 0;
2977         vcpu->arch.pio.rep = 0;
2978
2979         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2980                       size, 1);
2981
2982         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2983         memcpy(vcpu->arch.pio_data, &val, 4);
2984
2985         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
2986                 complete_pio(vcpu);
2987                 return 1;
2988         }
2989         return 0;
2990 }
2991 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2992
2993 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2994                   int size, unsigned long count, int down,
2995                   gva_t address, int rep, unsigned port)
2996 {
2997         unsigned now, in_page;
2998         int ret = 0;
2999
3000         vcpu->run->exit_reason = KVM_EXIT_IO;
3001         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3002         vcpu->run->io.size = vcpu->arch.pio.size = size;
3003         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3004         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3005         vcpu->run->io.port = vcpu->arch.pio.port = port;
3006         vcpu->arch.pio.in = in;
3007         vcpu->arch.pio.string = 1;
3008         vcpu->arch.pio.down = down;
3009         vcpu->arch.pio.rep = rep;
3010
3011         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3012                       size, count);
3013
3014         if (!count) {
3015                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3016                 return 1;
3017         }
3018
3019         if (!down)
3020                 in_page = PAGE_SIZE - offset_in_page(address);
3021         else
3022                 in_page = offset_in_page(address) + size;
3023         now = min(count, (unsigned long)in_page / size);
3024         if (!now)
3025                 now = 1;
3026         if (down) {
3027                 /*
3028                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3029                  */
3030                 pr_unimpl(vcpu, "guest string pio down\n");
3031                 kvm_inject_gp(vcpu, 0);
3032                 return 1;
3033         }
3034         vcpu->run->io.count = now;
3035         vcpu->arch.pio.cur_count = now;
3036
3037         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3038                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3039
3040         vcpu->arch.pio.guest_gva = address;
3041
3042         if (!vcpu->arch.pio.in) {
3043                 /* string PIO write */
3044                 ret = pio_copy_data(vcpu);
3045                 if (ret == X86EMUL_PROPAGATE_FAULT) {
3046                         kvm_inject_gp(vcpu, 0);
3047                         return 1;
3048                 }
3049                 if (ret == 0 && !pio_string_write(vcpu)) {
3050                         complete_pio(vcpu);
3051                         if (vcpu->arch.pio.count == 0)
3052                                 ret = 1;
3053                 }
3054         }
3055         /* no string PIO read support yet */
3056
3057         return ret;
3058 }
3059 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3060
3061 static void bounce_off(void *info)
3062 {
3063         /* nothing */
3064 }
3065
3066 static unsigned int  ref_freq;
3067 static unsigned long tsc_khz_ref;
3068
3069 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3070                                      void *data)
3071 {
3072         struct cpufreq_freqs *freq = data;
3073         struct kvm *kvm;
3074         struct kvm_vcpu *vcpu;
3075         int i, send_ipi = 0;
3076
3077         if (!ref_freq)
3078                 ref_freq = freq->old;
3079
3080         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3081                 return 0;
3082         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3083                 return 0;
3084         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3085
3086         spin_lock(&kvm_lock);
3087         list_for_each_entry(kvm, &vm_list, vm_list) {
3088                 kvm_for_each_vcpu(i, vcpu, kvm) {
3089                         if (vcpu->cpu != freq->cpu)
3090                                 continue;
3091                         if (!kvm_request_guest_time_update(vcpu))
3092                                 continue;
3093                         if (vcpu->cpu != smp_processor_id())
3094                                 send_ipi++;
3095                 }
3096         }
3097         spin_unlock(&kvm_lock);
3098
3099         if (freq->old < freq->new && send_ipi) {
3100                 /*
3101                  * We upscale the frequency.  Must make the guest
3102                  * doesn't see old kvmclock values while running with
3103                  * the new frequency, otherwise we risk the guest sees
3104                  * time go backwards.
3105                  *
3106                  * In case we update the frequency for another cpu
3107                  * (which might be in guest context) send an interrupt
3108                  * to kick the cpu out of guest context.  Next time
3109                  * guest context is entered kvmclock will be updated,
3110                  * so the guest will not see stale values.
3111                  */
3112                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3113         }
3114         return 0;
3115 }
3116
3117 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3118         .notifier_call  = kvmclock_cpufreq_notifier
3119 };
3120
3121 int kvm_arch_init(void *opaque)
3122 {
3123         int r, cpu;
3124         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3125
3126         if (kvm_x86_ops) {
3127                 printk(KERN_ERR "kvm: already loaded the other module\n");
3128                 r = -EEXIST;
3129                 goto out;
3130         }
3131
3132         if (!ops->cpu_has_kvm_support()) {
3133                 printk(KERN_ERR "kvm: no hardware support\n");
3134                 r = -EOPNOTSUPP;
3135                 goto out;
3136         }
3137         if (ops->disabled_by_bios()) {
3138                 printk(KERN_ERR "kvm: disabled by bios\n");
3139                 r = -EOPNOTSUPP;
3140                 goto out;
3141         }
3142
3143         r = kvm_mmu_module_init();
3144         if (r)
3145                 goto out;
3146
3147         kvm_init_msr_list();
3148
3149         kvm_x86_ops = ops;
3150         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3151         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3152         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3153                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3154
3155         for_each_possible_cpu(cpu)
3156                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3157         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3158                 tsc_khz_ref = tsc_khz;
3159                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3160                                           CPUFREQ_TRANSITION_NOTIFIER);
3161         }
3162
3163         return 0;
3164
3165 out:
3166         return r;
3167 }
3168
3169 void kvm_arch_exit(void)
3170 {
3171         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3172                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3173                                             CPUFREQ_TRANSITION_NOTIFIER);
3174         kvm_x86_ops = NULL;
3175         kvm_mmu_module_exit();
3176 }
3177
3178 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3179 {
3180         ++vcpu->stat.halt_exits;
3181         if (irqchip_in_kernel(vcpu->kvm)) {
3182                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3183                 return 1;
3184         } else {
3185                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3186                 return 0;
3187         }
3188 }
3189 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3190
3191 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3192                            unsigned long a1)
3193 {
3194         if (is_long_mode(vcpu))
3195                 return a0;
3196         else
3197                 return a0 | ((gpa_t)a1 << 32);
3198 }
3199
3200 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3201 {
3202         unsigned long nr, a0, a1, a2, a3, ret;
3203         int r = 1;
3204
3205         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3206         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3207         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3208         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3209         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3210
3211         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3212
3213         if (!is_long_mode(vcpu)) {
3214                 nr &= 0xFFFFFFFF;
3215                 a0 &= 0xFFFFFFFF;
3216                 a1 &= 0xFFFFFFFF;
3217                 a2 &= 0xFFFFFFFF;
3218                 a3 &= 0xFFFFFFFF;
3219         }
3220
3221         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3222                 ret = -KVM_EPERM;
3223                 goto out;
3224         }
3225
3226         switch (nr) {
3227         case KVM_HC_VAPIC_POLL_IRQ:
3228                 ret = 0;
3229                 break;
3230         case KVM_HC_MMU_OP:
3231                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3232                 break;
3233         default:
3234                 ret = -KVM_ENOSYS;
3235                 break;
3236         }
3237 out:
3238         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3239         ++vcpu->stat.hypercalls;
3240         return r;
3241 }
3242 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3243
3244 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3245 {
3246         char instruction[3];
3247         int ret = 0;
3248         unsigned long rip = kvm_rip_read(vcpu);
3249
3250
3251         /*
3252          * Blow out the MMU to ensure that no other VCPU has an active mapping
3253          * to ensure that the updated hypercall appears atomically across all
3254          * VCPUs.
3255          */
3256         kvm_mmu_zap_all(vcpu->kvm);
3257
3258         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3259         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3260             != X86EMUL_CONTINUE)
3261                 ret = -EFAULT;
3262
3263         return ret;
3264 }
3265
3266 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3267 {
3268         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3269 }
3270
3271 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3272 {
3273         struct descriptor_table dt = { limit, base };
3274
3275         kvm_x86_ops->set_gdt(vcpu, &dt);
3276 }
3277
3278 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3279 {
3280         struct descriptor_table dt = { limit, base };
3281
3282         kvm_x86_ops->set_idt(vcpu, &dt);
3283 }
3284
3285 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3286                    unsigned long *rflags)
3287 {
3288         kvm_lmsw(vcpu, msw);
3289         *rflags = kvm_x86_ops->get_rflags(vcpu);
3290 }
3291
3292 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3293 {
3294         unsigned long value;
3295
3296         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3297         switch (cr) {
3298         case 0:
3299                 value = vcpu->arch.cr0;
3300                 break;
3301         case 2:
3302                 value = vcpu->arch.cr2;
3303                 break;
3304         case 3:
3305                 value = vcpu->arch.cr3;
3306                 break;
3307         case 4:
3308                 value = vcpu->arch.cr4;
3309                 break;
3310         case 8:
3311                 value = kvm_get_cr8(vcpu);
3312                 break;
3313         default:
3314                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3315                 return 0;
3316         }
3317
3318         return value;
3319 }
3320
3321 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3322                      unsigned long *rflags)
3323 {
3324         switch (cr) {
3325         case 0:
3326                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3327                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3328                 break;
3329         case 2:
3330                 vcpu->arch.cr2 = val;
3331                 break;
3332         case 3:
3333                 kvm_set_cr3(vcpu, val);
3334                 break;
3335         case 4:
3336                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3337                 break;
3338         case 8:
3339                 kvm_set_cr8(vcpu, val & 0xfUL);
3340                 break;
3341         default:
3342                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3343         }
3344 }
3345
3346 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3347 {
3348         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3349         int j, nent = vcpu->arch.cpuid_nent;
3350
3351         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3352         /* when no next entry is found, the current entry[i] is reselected */
3353         for (j = i + 1; ; j = (j + 1) % nent) {
3354                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3355                 if (ej->function == e->function) {
3356                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3357                         return j;
3358                 }
3359         }
3360         return 0; /* silence gcc, even though control never reaches here */
3361 }
3362
3363 /* find an entry with matching function, matching index (if needed), and that
3364  * should be read next (if it's stateful) */
3365 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3366         u32 function, u32 index)
3367 {
3368         if (e->function != function)
3369                 return 0;
3370         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3371                 return 0;
3372         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3373             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3374                 return 0;
3375         return 1;
3376 }
3377
3378 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3379                                               u32 function, u32 index)
3380 {
3381         int i;
3382         struct kvm_cpuid_entry2 *best = NULL;
3383
3384         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3385                 struct kvm_cpuid_entry2 *e;
3386
3387                 e = &vcpu->arch.cpuid_entries[i];
3388                 if (is_matching_cpuid_entry(e, function, index)) {
3389                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3390                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3391                         best = e;
3392                         break;
3393                 }
3394                 /*
3395                  * Both basic or both extended?
3396                  */
3397                 if (((e->function ^ function) & 0x80000000) == 0)
3398                         if (!best || e->function > best->function)
3399                                 best = e;
3400         }
3401         return best;
3402 }
3403
3404 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3405 {
3406         struct kvm_cpuid_entry2 *best;
3407
3408         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3409         if (best)
3410                 return best->eax & 0xff;
3411         return 36;
3412 }
3413
3414 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3415 {
3416         u32 function, index;
3417         struct kvm_cpuid_entry2 *best;
3418
3419         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3420         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3421         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3422         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3423         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3424         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3425         best = kvm_find_cpuid_entry(vcpu, function, index);
3426         if (best) {
3427                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3428                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3429                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3430                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3431         }
3432         kvm_x86_ops->skip_emulated_instruction(vcpu);
3433         trace_kvm_cpuid(function,
3434                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3435                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3436                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3437                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3438 }
3439 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3440
3441 /*
3442  * Check if userspace requested an interrupt window, and that the
3443  * interrupt window is open.
3444  *
3445  * No need to exit to userspace if we already have an interrupt queued.
3446  */
3447 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3448                                           struct kvm_run *kvm_run)
3449 {
3450         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3451                 kvm_run->request_interrupt_window &&
3452                 kvm_arch_interrupt_allowed(vcpu));
3453 }
3454
3455 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3456                               struct kvm_run *kvm_run)
3457 {
3458         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3459         kvm_run->cr8 = kvm_get_cr8(vcpu);
3460         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3461         if (irqchip_in_kernel(vcpu->kvm))
3462                 kvm_run->ready_for_interrupt_injection = 1;
3463         else
3464                 kvm_run->ready_for_interrupt_injection =
3465                         kvm_arch_interrupt_allowed(vcpu) &&
3466                         !kvm_cpu_has_interrupt(vcpu) &&
3467                         !kvm_event_needs_reinjection(vcpu);
3468 }
3469
3470 static void vapic_enter(struct kvm_vcpu *vcpu)
3471 {
3472         struct kvm_lapic *apic = vcpu->arch.apic;
3473         struct page *page;
3474
3475         if (!apic || !apic->vapic_addr)
3476                 return;
3477
3478         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3479
3480         vcpu->arch.apic->vapic_page = page;
3481 }
3482
3483 static void vapic_exit(struct kvm_vcpu *vcpu)
3484 {
3485         struct kvm_lapic *apic = vcpu->arch.apic;
3486
3487         if (!apic || !apic->vapic_addr)
3488                 return;
3489
3490         down_read(&vcpu->kvm->slots_lock);
3491         kvm_release_page_dirty(apic->vapic_page);
3492         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3493         up_read(&vcpu->kvm->slots_lock);
3494 }
3495
3496 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3497 {
3498         int max_irr, tpr;
3499
3500         if (!kvm_x86_ops->update_cr8_intercept)
3501                 return;
3502
3503         if (!vcpu->arch.apic->vapic_addr)
3504                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3505         else
3506                 max_irr = -1;
3507
3508         if (max_irr != -1)
3509                 max_irr >>= 4;
3510
3511         tpr = kvm_lapic_get_cr8(vcpu);
3512
3513         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3514 }
3515
3516 static void inject_pending_event(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3517 {
3518         /* try to reinject previous events if any */
3519         if (vcpu->arch.exception.pending) {
3520                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3521                                           vcpu->arch.exception.has_error_code,
3522                                           vcpu->arch.exception.error_code);
3523                 return;
3524         }
3525
3526         if (vcpu->arch.nmi_injected) {
3527                 kvm_x86_ops->set_nmi(vcpu);
3528                 return;
3529         }
3530
3531         if (vcpu->arch.interrupt.pending) {
3532                 kvm_x86_ops->set_irq(vcpu);
3533                 return;
3534         }
3535
3536         /* try to inject new event if pending */
3537         if (vcpu->arch.nmi_pending) {
3538                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3539                         vcpu->arch.nmi_pending = false;
3540                         vcpu->arch.nmi_injected = true;
3541                         kvm_x86_ops->set_nmi(vcpu);
3542                 }
3543         } else if (kvm_cpu_has_interrupt(vcpu)) {
3544                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3545                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3546                                             false);
3547                         kvm_x86_ops->set_irq(vcpu);
3548                 }
3549         }
3550 }
3551
3552 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3553 {
3554         int r;
3555         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3556                 kvm_run->request_interrupt_window;
3557
3558         if (vcpu->requests)
3559                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3560                         kvm_mmu_unload(vcpu);
3561
3562         r = kvm_mmu_reload(vcpu);
3563         if (unlikely(r))
3564                 goto out;
3565
3566         if (vcpu->requests) {
3567                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3568                         __kvm_migrate_timers(vcpu);
3569                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3570                         kvm_write_guest_time(vcpu);
3571                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3572                         kvm_mmu_sync_roots(vcpu);
3573                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3574                         kvm_x86_ops->tlb_flush(vcpu);
3575                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3576                                        &vcpu->requests)) {
3577                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3578                         r = 0;
3579                         goto out;
3580                 }
3581                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3582                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3583                         r = 0;
3584                         goto out;
3585                 }
3586         }
3587
3588         preempt_disable();
3589
3590         kvm_x86_ops->prepare_guest_switch(vcpu);
3591         kvm_load_guest_fpu(vcpu);
3592
3593         local_irq_disable();
3594
3595         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3596         smp_mb__after_clear_bit();
3597
3598         if (vcpu->requests || need_resched() || signal_pending(current)) {
3599                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3600                 local_irq_enable();
3601                 preempt_enable();
3602                 r = 1;
3603                 goto out;
3604         }
3605
3606         inject_pending_event(vcpu, kvm_run);
3607
3608         /* enable NMI/IRQ window open exits if needed */
3609         if (vcpu->arch.nmi_pending)
3610                 kvm_x86_ops->enable_nmi_window(vcpu);
3611         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3612                 kvm_x86_ops->enable_irq_window(vcpu);
3613
3614         if (kvm_lapic_enabled(vcpu)) {
3615                 update_cr8_intercept(vcpu);
3616                 kvm_lapic_sync_to_vapic(vcpu);
3617         }
3618
3619         up_read(&vcpu->kvm->slots_lock);
3620
3621         kvm_guest_enter();
3622
3623         get_debugreg(vcpu->arch.host_dr6, 6);
3624         get_debugreg(vcpu->arch.host_dr7, 7);
3625         if (unlikely(vcpu->arch.switch_db_regs)) {
3626                 get_debugreg(vcpu->arch.host_db[0], 0);
3627                 get_debugreg(vcpu->arch.host_db[1], 1);
3628                 get_debugreg(vcpu->arch.host_db[2], 2);
3629                 get_debugreg(vcpu->arch.host_db[3], 3);
3630
3631                 set_debugreg(0, 7);
3632                 set_debugreg(vcpu->arch.eff_db[0], 0);
3633                 set_debugreg(vcpu->arch.eff_db[1], 1);
3634                 set_debugreg(vcpu->arch.eff_db[2], 2);
3635                 set_debugreg(vcpu->arch.eff_db[3], 3);
3636         }
3637
3638         trace_kvm_entry(vcpu->vcpu_id);
3639         kvm_x86_ops->run(vcpu, kvm_run);
3640
3641         if (unlikely(vcpu->arch.switch_db_regs)) {
3642                 set_debugreg(0, 7);
3643                 set_debugreg(vcpu->arch.host_db[0], 0);
3644                 set_debugreg(vcpu->arch.host_db[1], 1);
3645                 set_debugreg(vcpu->arch.host_db[2], 2);
3646                 set_debugreg(vcpu->arch.host_db[3], 3);
3647         }
3648         set_debugreg(vcpu->arch.host_dr6, 6);
3649         set_debugreg(vcpu->arch.host_dr7, 7);
3650
3651         set_bit(KVM_REQ_KICK, &vcpu->requests);
3652         local_irq_enable();
3653
3654         ++vcpu->stat.exits;
3655
3656         /*
3657          * We must have an instruction between local_irq_enable() and
3658          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3659          * the interrupt shadow.  The stat.exits increment will do nicely.
3660          * But we need to prevent reordering, hence this barrier():
3661          */
3662         barrier();
3663
3664         kvm_guest_exit();
3665
3666         preempt_enable();
3667
3668         down_read(&vcpu->kvm->slots_lock);
3669
3670         /*
3671          * Profile KVM exit RIPs:
3672          */
3673         if (unlikely(prof_on == KVM_PROFILING)) {
3674                 unsigned long rip = kvm_rip_read(vcpu);
3675                 profile_hit(KVM_PROFILING, (void *)rip);
3676         }
3677
3678
3679         kvm_lapic_sync_from_vapic(vcpu);
3680
3681         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3682 out:
3683         return r;
3684 }
3685
3686
3687 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3688 {
3689         int r;
3690
3691         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3692                 pr_debug("vcpu %d received sipi with vector # %x\n",
3693                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3694                 kvm_lapic_reset(vcpu);
3695                 r = kvm_arch_vcpu_reset(vcpu);
3696                 if (r)
3697                         return r;
3698                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3699         }
3700
3701         down_read(&vcpu->kvm->slots_lock);
3702         vapic_enter(vcpu);
3703
3704         r = 1;
3705         while (r > 0) {
3706                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3707                         r = vcpu_enter_guest(vcpu, kvm_run);
3708                 else {
3709                         up_read(&vcpu->kvm->slots_lock);
3710                         kvm_vcpu_block(vcpu);
3711                         down_read(&vcpu->kvm->slots_lock);
3712                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3713                         {
3714                                 switch(vcpu->arch.mp_state) {
3715                                 case KVM_MP_STATE_HALTED:
3716                                         vcpu->arch.mp_state =
3717                                                 KVM_MP_STATE_RUNNABLE;
3718                                 case KVM_MP_STATE_RUNNABLE:
3719                                         break;
3720                                 case KVM_MP_STATE_SIPI_RECEIVED:
3721                                 default:
3722                                         r = -EINTR;
3723                                         break;
3724                                 }
3725                         }
3726                 }
3727
3728                 if (r <= 0)
3729                         break;
3730
3731                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3732                 if (kvm_cpu_has_pending_timer(vcpu))
3733                         kvm_inject_pending_timer_irqs(vcpu);
3734
3735                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3736                         r = -EINTR;
3737                         kvm_run->exit_reason = KVM_EXIT_INTR;
3738                         ++vcpu->stat.request_irq_exits;
3739                 }
3740                 if (signal_pending(current)) {
3741                         r = -EINTR;
3742                         kvm_run->exit_reason = KVM_EXIT_INTR;
3743                         ++vcpu->stat.signal_exits;
3744                 }
3745                 if (need_resched()) {
3746                         up_read(&vcpu->kvm->slots_lock);
3747                         kvm_resched(vcpu);
3748                         down_read(&vcpu->kvm->slots_lock);
3749                 }
3750         }
3751
3752         up_read(&vcpu->kvm->slots_lock);
3753         post_kvm_run_save(vcpu, kvm_run);
3754
3755         vapic_exit(vcpu);
3756
3757         return r;
3758 }
3759
3760 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3761 {
3762         int r;
3763         sigset_t sigsaved;
3764
3765         vcpu_load(vcpu);
3766
3767         if (vcpu->sigset_active)
3768                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3769
3770         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3771                 kvm_vcpu_block(vcpu);
3772                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3773                 r = -EAGAIN;
3774                 goto out;
3775         }
3776
3777         /* re-sync apic's tpr */
3778         if (!irqchip_in_kernel(vcpu->kvm))
3779                 kvm_set_cr8(vcpu, kvm_run->cr8);
3780
3781         if (vcpu->arch.pio.cur_count) {
3782                 r = complete_pio(vcpu);
3783                 if (r)
3784                         goto out;
3785         }
3786 #if CONFIG_HAS_IOMEM
3787         if (vcpu->mmio_needed) {
3788                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3789                 vcpu->mmio_read_completed = 1;
3790                 vcpu->mmio_needed = 0;
3791
3792                 down_read(&vcpu->kvm->slots_lock);
3793                 r = emulate_instruction(vcpu, kvm_run,
3794                                         vcpu->arch.mmio_fault_cr2, 0,
3795                                         EMULTYPE_NO_DECODE);
3796                 up_read(&vcpu->kvm->slots_lock);
3797                 if (r == EMULATE_DO_MMIO) {
3798                         /*
3799                          * Read-modify-write.  Back to userspace.
3800                          */
3801                         r = 0;
3802                         goto out;
3803                 }
3804         }
3805 #endif
3806         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3807                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3808                                      kvm_run->hypercall.ret);
3809
3810         r = __vcpu_run(vcpu, kvm_run);
3811
3812 out:
3813         if (vcpu->sigset_active)
3814                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3815
3816         vcpu_put(vcpu);
3817         return r;
3818 }
3819
3820 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3821 {
3822         vcpu_load(vcpu);
3823
3824         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3825         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3826         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3827         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3828         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3829         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3830         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3831         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3832 #ifdef CONFIG_X86_64
3833         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3834         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3835         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3836         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3837         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3838         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3839         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3840         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3841 #endif
3842
3843         regs->rip = kvm_rip_read(vcpu);
3844         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3845
3846         /*
3847          * Don't leak debug flags in case they were set for guest debugging
3848          */
3849         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3850                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3851
3852         vcpu_put(vcpu);
3853
3854         return 0;
3855 }
3856
3857 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3858 {
3859         vcpu_load(vcpu);
3860
3861         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3862         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3863         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3864         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3865         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3866         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3867         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3868         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3869 #ifdef CONFIG_X86_64
3870         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3871         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3872         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3873         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3874         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3875         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3876         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3877         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3878
3879 #endif
3880
3881         kvm_rip_write(vcpu, regs->rip);
3882         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3883
3884
3885         vcpu->arch.exception.pending = false;
3886
3887         vcpu_put(vcpu);
3888
3889         return 0;
3890 }
3891
3892 void kvm_get_segment(struct kvm_vcpu *vcpu,
3893                      struct kvm_segment *var, int seg)
3894 {
3895         kvm_x86_ops->get_segment(vcpu, var, seg);
3896 }
3897
3898 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3899 {
3900         struct kvm_segment cs;
3901
3902         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3903         *db = cs.db;
3904         *l = cs.l;
3905 }
3906 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3907
3908 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3909                                   struct kvm_sregs *sregs)
3910 {
3911         struct descriptor_table dt;
3912
3913         vcpu_load(vcpu);
3914
3915         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3916         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3917         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3918         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3919         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3920         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3921
3922         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3923         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3924
3925         kvm_x86_ops->get_idt(vcpu, &dt);
3926         sregs->idt.limit = dt.limit;
3927         sregs->idt.base = dt.base;
3928         kvm_x86_ops->get_gdt(vcpu, &dt);
3929         sregs->gdt.limit = dt.limit;
3930         sregs->gdt.base = dt.base;
3931
3932         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3933         sregs->cr0 = vcpu->arch.cr0;
3934         sregs->cr2 = vcpu->arch.cr2;
3935         sregs->cr3 = vcpu->arch.cr3;
3936         sregs->cr4 = vcpu->arch.cr4;
3937         sregs->cr8 = kvm_get_cr8(vcpu);
3938         sregs->efer = vcpu->arch.shadow_efer;
3939         sregs->apic_base = kvm_get_apic_base(vcpu);
3940
3941         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3942
3943         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3944                 set_bit(vcpu->arch.interrupt.nr,
3945                         (unsigned long *)sregs->interrupt_bitmap);
3946
3947         vcpu_put(vcpu);
3948
3949         return 0;
3950 }
3951
3952 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3953                                     struct kvm_mp_state *mp_state)
3954 {
3955         vcpu_load(vcpu);
3956         mp_state->mp_state = vcpu->arch.mp_state;
3957         vcpu_put(vcpu);
3958         return 0;
3959 }
3960
3961 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3962                                     struct kvm_mp_state *mp_state)
3963 {
3964         vcpu_load(vcpu);
3965         vcpu->arch.mp_state = mp_state->mp_state;
3966         vcpu_put(vcpu);
3967         return 0;
3968 }
3969
3970 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3971                         struct kvm_segment *var, int seg)
3972 {
3973         kvm_x86_ops->set_segment(vcpu, var, seg);
3974 }
3975
3976 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3977                                    struct kvm_segment *kvm_desct)
3978 {
3979         kvm_desct->base = get_desc_base(seg_desc);
3980         kvm_desct->limit = get_desc_limit(seg_desc);
3981         if (seg_desc->g) {
3982                 kvm_desct->limit <<= 12;
3983                 kvm_desct->limit |= 0xfff;
3984         }
3985         kvm_desct->selector = selector;
3986         kvm_desct->type = seg_desc->type;
3987         kvm_desct->present = seg_desc->p;
3988         kvm_desct->dpl = seg_desc->dpl;
3989         kvm_desct->db = seg_desc->d;
3990         kvm_desct->s = seg_desc->s;
3991         kvm_desct->l = seg_desc->l;
3992         kvm_desct->g = seg_desc->g;
3993         kvm_desct->avl = seg_desc->avl;
3994         if (!selector)
3995                 kvm_desct->unusable = 1;
3996         else
3997                 kvm_desct->unusable = 0;
3998         kvm_desct->padding = 0;
3999 }
4000
4001 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4002                                           u16 selector,
4003                                           struct descriptor_table *dtable)
4004 {
4005         if (selector & 1 << 2) {
4006                 struct kvm_segment kvm_seg;
4007
4008                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4009
4010                 if (kvm_seg.unusable)
4011                         dtable->limit = 0;
4012                 else
4013                         dtable->limit = kvm_seg.limit;
4014                 dtable->base = kvm_seg.base;
4015         }
4016         else
4017                 kvm_x86_ops->get_gdt(vcpu, dtable);
4018 }
4019
4020 /* allowed just for 8 bytes segments */
4021 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4022                                          struct desc_struct *seg_desc)
4023 {
4024         struct descriptor_table dtable;
4025         u16 index = selector >> 3;
4026
4027         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4028
4029         if (dtable.limit < index * 8 + 7) {
4030                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4031                 return 1;
4032         }
4033         return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4034 }
4035
4036 /* allowed just for 8 bytes segments */
4037 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4038                                          struct desc_struct *seg_desc)
4039 {
4040         struct descriptor_table dtable;
4041         u16 index = selector >> 3;
4042
4043         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4044
4045         if (dtable.limit < index * 8 + 7)
4046                 return 1;
4047         return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4048 }
4049
4050 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
4051                              struct desc_struct *seg_desc)
4052 {
4053         u32 base_addr = get_desc_base(seg_desc);
4054
4055         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4056 }
4057
4058 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4059 {
4060         struct kvm_segment kvm_seg;
4061
4062         kvm_get_segment(vcpu, &kvm_seg, seg);
4063         return kvm_seg.selector;
4064 }
4065
4066 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4067                                                 u16 selector,
4068                                                 struct kvm_segment *kvm_seg)
4069 {
4070         struct desc_struct seg_desc;
4071
4072         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4073                 return 1;
4074         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4075         return 0;
4076 }
4077
4078 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4079 {
4080         struct kvm_segment segvar = {
4081                 .base = selector << 4,
4082                 .limit = 0xffff,
4083                 .selector = selector,
4084                 .type = 3,
4085                 .present = 1,
4086                 .dpl = 3,
4087                 .db = 0,
4088                 .s = 1,
4089                 .l = 0,
4090                 .g = 0,
4091                 .avl = 0,
4092                 .unusable = 0,
4093         };
4094         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4095         return 0;
4096 }
4097
4098 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4099 {
4100         return (seg != VCPU_SREG_LDTR) &&
4101                 (seg != VCPU_SREG_TR) &&
4102                 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_VM);
4103 }
4104
4105 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4106                                 int type_bits, int seg)
4107 {
4108         struct kvm_segment kvm_seg;
4109
4110         if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4111                 return kvm_load_realmode_segment(vcpu, selector, seg);
4112         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4113                 return 1;
4114         kvm_seg.type |= type_bits;
4115
4116         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4117             seg != VCPU_SREG_LDTR)
4118                 if (!kvm_seg.s)
4119                         kvm_seg.unusable = 1;
4120
4121         kvm_set_segment(vcpu, &kvm_seg, seg);
4122         return 0;
4123 }
4124
4125 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4126                                 struct tss_segment_32 *tss)
4127 {
4128         tss->cr3 = vcpu->arch.cr3;
4129         tss->eip = kvm_rip_read(vcpu);
4130         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4131         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4132         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4133         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4134         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4135         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4136         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4137         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4138         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4139         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4140         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4141         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4142         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4143         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4144         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4145         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4146 }
4147
4148 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4149                                   struct tss_segment_32 *tss)
4150 {
4151         kvm_set_cr3(vcpu, tss->cr3);
4152
4153         kvm_rip_write(vcpu, tss->eip);
4154         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4155
4156         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4157         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4158         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4159         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4160         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4161         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4162         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4163         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4164
4165         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4166                 return 1;
4167
4168         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4169                 return 1;
4170
4171         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4172                 return 1;
4173
4174         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4175                 return 1;
4176
4177         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4178                 return 1;
4179
4180         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4181                 return 1;
4182
4183         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4184                 return 1;
4185         return 0;
4186 }
4187
4188 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4189                                 struct tss_segment_16 *tss)
4190 {
4191         tss->ip = kvm_rip_read(vcpu);
4192         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4193         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4194         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4195         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4196         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4197         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4198         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4199         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4200         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4201
4202         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4203         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4204         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4205         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4206         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4207         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4208 }
4209
4210 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4211                                  struct tss_segment_16 *tss)
4212 {
4213         kvm_rip_write(vcpu, tss->ip);
4214         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4215         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4216         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4217         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4218         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4219         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4220         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4221         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4222         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4223
4224         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4225                 return 1;
4226
4227         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4228                 return 1;
4229
4230         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4231                 return 1;
4232
4233         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4234                 return 1;
4235
4236         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4237                 return 1;
4238         return 0;
4239 }
4240
4241 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4242                               u16 old_tss_sel, u32 old_tss_base,
4243                               struct desc_struct *nseg_desc)
4244 {
4245         struct tss_segment_16 tss_segment_16;
4246         int ret = 0;
4247
4248         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4249                            sizeof tss_segment_16))
4250                 goto out;
4251
4252         save_state_to_tss16(vcpu, &tss_segment_16);
4253
4254         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4255                             sizeof tss_segment_16))
4256                 goto out;
4257
4258         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4259                            &tss_segment_16, sizeof tss_segment_16))
4260                 goto out;
4261
4262         if (old_tss_sel != 0xffff) {
4263                 tss_segment_16.prev_task_link = old_tss_sel;
4264
4265                 if (kvm_write_guest(vcpu->kvm,
4266                                     get_tss_base_addr(vcpu, nseg_desc),
4267                                     &tss_segment_16.prev_task_link,
4268                                     sizeof tss_segment_16.prev_task_link))
4269                         goto out;
4270         }
4271
4272         if (load_state_from_tss16(vcpu, &tss_segment_16))
4273                 goto out;
4274
4275         ret = 1;
4276 out:
4277         return ret;
4278 }
4279
4280 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4281                        u16 old_tss_sel, u32 old_tss_base,
4282                        struct desc_struct *nseg_desc)
4283 {
4284         struct tss_segment_32 tss_segment_32;
4285         int ret = 0;
4286
4287         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4288                            sizeof tss_segment_32))
4289                 goto out;
4290
4291         save_state_to_tss32(vcpu, &tss_segment_32);
4292
4293         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4294                             sizeof tss_segment_32))
4295                 goto out;
4296
4297         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4298                            &tss_segment_32, sizeof tss_segment_32))
4299                 goto out;
4300
4301         if (old_tss_sel != 0xffff) {
4302                 tss_segment_32.prev_task_link = old_tss_sel;
4303
4304                 if (kvm_write_guest(vcpu->kvm,
4305                                     get_tss_base_addr(vcpu, nseg_desc),
4306                                     &tss_segment_32.prev_task_link,
4307                                     sizeof tss_segment_32.prev_task_link))
4308                         goto out;
4309         }
4310
4311         if (load_state_from_tss32(vcpu, &tss_segment_32))
4312                 goto out;
4313
4314         ret = 1;
4315 out:
4316         return ret;
4317 }
4318
4319 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4320 {
4321         struct kvm_segment tr_seg;
4322         struct desc_struct cseg_desc;
4323         struct desc_struct nseg_desc;
4324         int ret = 0;
4325         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4326         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4327
4328         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4329
4330         /* FIXME: Handle errors. Failure to read either TSS or their
4331          * descriptors should generate a pagefault.
4332          */
4333         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4334                 goto out;
4335
4336         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4337                 goto out;
4338
4339         if (reason != TASK_SWITCH_IRET) {
4340                 int cpl;
4341
4342                 cpl = kvm_x86_ops->get_cpl(vcpu);
4343                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4344                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4345                         return 1;
4346                 }
4347         }
4348
4349         if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4350                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4351                 return 1;
4352         }
4353
4354         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4355                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4356                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4357         }
4358
4359         if (reason == TASK_SWITCH_IRET) {
4360                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4361                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4362         }
4363
4364         /* set back link to prev task only if NT bit is set in eflags
4365            note that old_tss_sel is not used afetr this point */
4366         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4367                 old_tss_sel = 0xffff;
4368
4369         /* set back link to prev task only if NT bit is set in eflags
4370            note that old_tss_sel is not used afetr this point */
4371         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4372                 old_tss_sel = 0xffff;
4373
4374         if (nseg_desc.type & 8)
4375                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4376                                          old_tss_base, &nseg_desc);
4377         else
4378                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4379                                          old_tss_base, &nseg_desc);
4380
4381         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4382                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4383                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4384         }
4385
4386         if (reason != TASK_SWITCH_IRET) {
4387                 nseg_desc.type |= (1 << 1);
4388                 save_guest_segment_descriptor(vcpu, tss_selector,
4389                                               &nseg_desc);
4390         }
4391
4392         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4393         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4394         tr_seg.type = 11;
4395         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4396 out:
4397         return ret;
4398 }
4399 EXPORT_SYMBOL_GPL(kvm_task_switch);
4400
4401 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4402                                   struct kvm_sregs *sregs)
4403 {
4404         int mmu_reset_needed = 0;
4405         int pending_vec, max_bits;
4406         struct descriptor_table dt;
4407
4408         vcpu_load(vcpu);
4409
4410         dt.limit = sregs->idt.limit;
4411         dt.base = sregs->idt.base;
4412         kvm_x86_ops->set_idt(vcpu, &dt);
4413         dt.limit = sregs->gdt.limit;
4414         dt.base = sregs->gdt.base;
4415         kvm_x86_ops->set_gdt(vcpu, &dt);
4416
4417         vcpu->arch.cr2 = sregs->cr2;
4418         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4419         vcpu->arch.cr3 = sregs->cr3;
4420
4421         kvm_set_cr8(vcpu, sregs->cr8);
4422
4423         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4424         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4425         kvm_set_apic_base(vcpu, sregs->apic_base);
4426
4427         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4428
4429         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4430         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4431         vcpu->arch.cr0 = sregs->cr0;
4432
4433         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4434         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4435         if (!is_long_mode(vcpu) && is_pae(vcpu))
4436                 load_pdptrs(vcpu, vcpu->arch.cr3);
4437
4438         if (mmu_reset_needed)
4439                 kvm_mmu_reset_context(vcpu);
4440
4441         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4442         pending_vec = find_first_bit(
4443                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4444         if (pending_vec < max_bits) {
4445                 kvm_queue_interrupt(vcpu, pending_vec, false);
4446                 pr_debug("Set back pending irq %d\n", pending_vec);
4447                 if (irqchip_in_kernel(vcpu->kvm))
4448                         kvm_pic_clear_isr_ack(vcpu->kvm);
4449         }
4450
4451         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4452         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4453         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4454         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4455         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4456         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4457
4458         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4459         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4460
4461         update_cr8_intercept(vcpu);
4462
4463         /* Older userspace won't unhalt the vcpu on reset. */
4464         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4465             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4466             !(vcpu->arch.cr0 & X86_CR0_PE))
4467                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4468
4469         vcpu_put(vcpu);
4470
4471         return 0;
4472 }
4473
4474 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4475                                         struct kvm_guest_debug *dbg)
4476 {
4477         int i, r;
4478
4479         vcpu_load(vcpu);
4480
4481         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4482             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4483                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4484                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4485                 vcpu->arch.switch_db_regs =
4486                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4487         } else {
4488                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4489                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4490                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4491         }
4492
4493         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4494
4495         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4496                 kvm_queue_exception(vcpu, DB_VECTOR);
4497         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4498                 kvm_queue_exception(vcpu, BP_VECTOR);
4499
4500         vcpu_put(vcpu);
4501
4502         return r;
4503 }
4504
4505 /*
4506  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4507  * we have asm/x86/processor.h
4508  */
4509 struct fxsave {
4510         u16     cwd;
4511         u16     swd;
4512         u16     twd;
4513         u16     fop;
4514         u64     rip;
4515         u64     rdp;
4516         u32     mxcsr;
4517         u32     mxcsr_mask;
4518         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4519 #ifdef CONFIG_X86_64
4520         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4521 #else
4522         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4523 #endif
4524 };
4525
4526 /*
4527  * Translate a guest virtual address to a guest physical address.
4528  */
4529 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4530                                     struct kvm_translation *tr)
4531 {
4532         unsigned long vaddr = tr->linear_address;
4533         gpa_t gpa;
4534
4535         vcpu_load(vcpu);
4536         down_read(&vcpu->kvm->slots_lock);
4537         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4538         up_read(&vcpu->kvm->slots_lock);
4539         tr->physical_address = gpa;
4540         tr->valid = gpa != UNMAPPED_GVA;
4541         tr->writeable = 1;
4542         tr->usermode = 0;
4543         vcpu_put(vcpu);
4544
4545         return 0;
4546 }
4547
4548 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4549 {
4550         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4551
4552         vcpu_load(vcpu);
4553
4554         memcpy(fpu->fpr, fxsave->st_space, 128);
4555         fpu->fcw = fxsave->cwd;
4556         fpu->fsw = fxsave->swd;
4557         fpu->ftwx = fxsave->twd;
4558         fpu->last_opcode = fxsave->fop;
4559         fpu->last_ip = fxsave->rip;
4560         fpu->last_dp = fxsave->rdp;
4561         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4562
4563         vcpu_put(vcpu);
4564
4565         return 0;
4566 }
4567
4568 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4569 {
4570         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4571
4572         vcpu_load(vcpu);
4573
4574         memcpy(fxsave->st_space, fpu->fpr, 128);
4575         fxsave->cwd = fpu->fcw;
4576         fxsave->swd = fpu->fsw;
4577         fxsave->twd = fpu->ftwx;
4578         fxsave->fop = fpu->last_opcode;
4579         fxsave->rip = fpu->last_ip;
4580         fxsave->rdp = fpu->last_dp;
4581         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4582
4583         vcpu_put(vcpu);
4584
4585         return 0;
4586 }
4587
4588 void fx_init(struct kvm_vcpu *vcpu)
4589 {
4590         unsigned after_mxcsr_mask;
4591
4592         /*
4593          * Touch the fpu the first time in non atomic context as if
4594          * this is the first fpu instruction the exception handler
4595          * will fire before the instruction returns and it'll have to
4596          * allocate ram with GFP_KERNEL.
4597          */
4598         if (!used_math())
4599                 kvm_fx_save(&vcpu->arch.host_fx_image);
4600
4601         /* Initialize guest FPU by resetting ours and saving into guest's */
4602         preempt_disable();
4603         kvm_fx_save(&vcpu->arch.host_fx_image);
4604         kvm_fx_finit();
4605         kvm_fx_save(&vcpu->arch.guest_fx_image);
4606         kvm_fx_restore(&vcpu->arch.host_fx_image);
4607         preempt_enable();
4608
4609         vcpu->arch.cr0 |= X86_CR0_ET;
4610         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4611         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4612         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4613                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4614 }
4615 EXPORT_SYMBOL_GPL(fx_init);
4616
4617 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4618 {
4619         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4620                 return;
4621
4622         vcpu->guest_fpu_loaded = 1;
4623         kvm_fx_save(&vcpu->arch.host_fx_image);
4624         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4625 }
4626 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4627
4628 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4629 {
4630         if (!vcpu->guest_fpu_loaded)
4631                 return;
4632
4633         vcpu->guest_fpu_loaded = 0;
4634         kvm_fx_save(&vcpu->arch.guest_fx_image);
4635         kvm_fx_restore(&vcpu->arch.host_fx_image);
4636         ++vcpu->stat.fpu_reload;
4637 }
4638 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4639
4640 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4641 {
4642         if (vcpu->arch.time_page) {
4643                 kvm_release_page_dirty(vcpu->arch.time_page);
4644                 vcpu->arch.time_page = NULL;
4645         }
4646
4647         kvm_x86_ops->vcpu_free(vcpu);
4648 }
4649
4650 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4651                                                 unsigned int id)
4652 {
4653         return kvm_x86_ops->vcpu_create(kvm, id);
4654 }
4655
4656 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4657 {
4658         int r;
4659
4660         /* We do fxsave: this must be aligned. */
4661         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4662
4663         vcpu->arch.mtrr_state.have_fixed = 1;
4664         vcpu_load(vcpu);
4665         r = kvm_arch_vcpu_reset(vcpu);
4666         if (r == 0)
4667                 r = kvm_mmu_setup(vcpu);
4668         vcpu_put(vcpu);
4669         if (r < 0)
4670                 goto free_vcpu;
4671
4672         return 0;
4673 free_vcpu:
4674         kvm_x86_ops->vcpu_free(vcpu);
4675         return r;
4676 }
4677
4678 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4679 {
4680         vcpu_load(vcpu);
4681         kvm_mmu_unload(vcpu);
4682         vcpu_put(vcpu);
4683
4684         kvm_x86_ops->vcpu_free(vcpu);
4685 }
4686
4687 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4688 {
4689         vcpu->arch.nmi_pending = false;
4690         vcpu->arch.nmi_injected = false;
4691
4692         vcpu->arch.switch_db_regs = 0;
4693         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4694         vcpu->arch.dr6 = DR6_FIXED_1;
4695         vcpu->arch.dr7 = DR7_FIXED_1;
4696
4697         return kvm_x86_ops->vcpu_reset(vcpu);
4698 }
4699
4700 void kvm_arch_hardware_enable(void *garbage)
4701 {
4702         kvm_x86_ops->hardware_enable(garbage);
4703 }
4704
4705 void kvm_arch_hardware_disable(void *garbage)
4706 {
4707         kvm_x86_ops->hardware_disable(garbage);
4708 }
4709
4710 int kvm_arch_hardware_setup(void)
4711 {
4712         return kvm_x86_ops->hardware_setup();
4713 }
4714
4715 void kvm_arch_hardware_unsetup(void)
4716 {
4717         kvm_x86_ops->hardware_unsetup();
4718 }
4719
4720 void kvm_arch_check_processor_compat(void *rtn)
4721 {
4722         kvm_x86_ops->check_processor_compatibility(rtn);
4723 }
4724
4725 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4726 {
4727         struct page *page;
4728         struct kvm *kvm;
4729         int r;
4730
4731         BUG_ON(vcpu->kvm == NULL);
4732         kvm = vcpu->kvm;
4733
4734         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4735         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4736                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4737         else
4738                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4739
4740         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4741         if (!page) {
4742                 r = -ENOMEM;
4743                 goto fail;
4744         }
4745         vcpu->arch.pio_data = page_address(page);
4746
4747         r = kvm_mmu_create(vcpu);
4748         if (r < 0)
4749                 goto fail_free_pio_data;
4750
4751         if (irqchip_in_kernel(kvm)) {
4752                 r = kvm_create_lapic(vcpu);
4753                 if (r < 0)
4754                         goto fail_mmu_destroy;
4755         }
4756
4757         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4758                                        GFP_KERNEL);
4759         if (!vcpu->arch.mce_banks) {
4760                 r = -ENOMEM;
4761                 goto fail_mmu_destroy;
4762         }
4763         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4764
4765         return 0;
4766
4767 fail_mmu_destroy:
4768         kvm_mmu_destroy(vcpu);
4769 fail_free_pio_data:
4770         free_page((unsigned long)vcpu->arch.pio_data);
4771 fail:
4772         return r;
4773 }
4774
4775 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4776 {
4777         kvm_free_lapic(vcpu);
4778         down_read(&vcpu->kvm->slots_lock);
4779         kvm_mmu_destroy(vcpu);
4780         up_read(&vcpu->kvm->slots_lock);
4781         free_page((unsigned long)vcpu->arch.pio_data);
4782 }
4783
4784 struct  kvm *kvm_arch_create_vm(void)
4785 {
4786         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4787
4788         if (!kvm)
4789                 return ERR_PTR(-ENOMEM);
4790
4791         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4792         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4793
4794         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4795         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4796
4797         rdtscll(kvm->arch.vm_init_tsc);
4798
4799         return kvm;
4800 }
4801
4802 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4803 {
4804         vcpu_load(vcpu);
4805         kvm_mmu_unload(vcpu);
4806         vcpu_put(vcpu);
4807 }
4808
4809 static void kvm_free_vcpus(struct kvm *kvm)
4810 {
4811         unsigned int i;
4812         struct kvm_vcpu *vcpu;
4813
4814         /*
4815          * Unpin any mmu pages first.
4816          */
4817         kvm_for_each_vcpu(i, vcpu, kvm)
4818                 kvm_unload_vcpu_mmu(vcpu);
4819         kvm_for_each_vcpu(i, vcpu, kvm)
4820                 kvm_arch_vcpu_free(vcpu);
4821
4822         mutex_lock(&kvm->lock);
4823         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4824                 kvm->vcpus[i] = NULL;
4825
4826         atomic_set(&kvm->online_vcpus, 0);
4827         mutex_unlock(&kvm->lock);
4828 }
4829
4830 void kvm_arch_sync_events(struct kvm *kvm)
4831 {
4832         kvm_free_all_assigned_devices(kvm);
4833 }
4834
4835 void kvm_arch_destroy_vm(struct kvm *kvm)
4836 {
4837         kvm_iommu_unmap_guest(kvm);
4838         kvm_free_pit(kvm);
4839         kfree(kvm->arch.vpic);
4840         kfree(kvm->arch.vioapic);
4841         kvm_free_vcpus(kvm);
4842         kvm_free_physmem(kvm);
4843         if (kvm->arch.apic_access_page)
4844                 put_page(kvm->arch.apic_access_page);
4845         if (kvm->arch.ept_identity_pagetable)
4846                 put_page(kvm->arch.ept_identity_pagetable);
4847         kfree(kvm);
4848 }
4849
4850 int kvm_arch_set_memory_region(struct kvm *kvm,
4851                                 struct kvm_userspace_memory_region *mem,
4852                                 struct kvm_memory_slot old,
4853                                 int user_alloc)
4854 {
4855         int npages = mem->memory_size >> PAGE_SHIFT;
4856         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4857
4858         /*To keep backward compatibility with older userspace,
4859          *x86 needs to hanlde !user_alloc case.
4860          */
4861         if (!user_alloc) {
4862                 if (npages && !old.rmap) {
4863                         unsigned long userspace_addr;
4864
4865                         down_write(&current->mm->mmap_sem);
4866                         userspace_addr = do_mmap(NULL, 0,
4867                                                  npages * PAGE_SIZE,
4868                                                  PROT_READ | PROT_WRITE,
4869                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4870                                                  0);
4871                         up_write(&current->mm->mmap_sem);
4872
4873                         if (IS_ERR((void *)userspace_addr))
4874                                 return PTR_ERR((void *)userspace_addr);
4875
4876                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4877                         spin_lock(&kvm->mmu_lock);
4878                         memslot->userspace_addr = userspace_addr;
4879                         spin_unlock(&kvm->mmu_lock);
4880                 } else {
4881                         if (!old.user_alloc && old.rmap) {
4882                                 int ret;
4883
4884                                 down_write(&current->mm->mmap_sem);
4885                                 ret = do_munmap(current->mm, old.userspace_addr,
4886                                                 old.npages * PAGE_SIZE);
4887                                 up_write(&current->mm->mmap_sem);
4888                                 if (ret < 0)
4889                                         printk(KERN_WARNING
4890                                        "kvm_vm_ioctl_set_memory_region: "
4891                                        "failed to munmap memory\n");
4892                         }
4893                 }
4894         }
4895
4896         spin_lock(&kvm->mmu_lock);
4897         if (!kvm->arch.n_requested_mmu_pages) {
4898                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4899                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4900         }
4901
4902         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4903         spin_unlock(&kvm->mmu_lock);
4904         kvm_flush_remote_tlbs(kvm);
4905
4906         return 0;
4907 }
4908
4909 void kvm_arch_flush_shadow(struct kvm *kvm)
4910 {
4911         kvm_mmu_zap_all(kvm);
4912         kvm_reload_remote_mmus(kvm);
4913 }
4914
4915 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4916 {
4917         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4918                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4919                 || vcpu->arch.nmi_pending ||
4920                 (kvm_arch_interrupt_allowed(vcpu) &&
4921                  kvm_cpu_has_interrupt(vcpu));
4922 }
4923
4924 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4925 {
4926         int me;
4927         int cpu = vcpu->cpu;
4928
4929         if (waitqueue_active(&vcpu->wq)) {
4930                 wake_up_interruptible(&vcpu->wq);
4931                 ++vcpu->stat.halt_wakeup;
4932         }
4933
4934         me = get_cpu();
4935         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4936                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4937                         smp_send_reschedule(cpu);
4938         put_cpu();
4939 }
4940
4941 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4942 {
4943         return kvm_x86_ops->interrupt_allowed(vcpu);
4944 }
4945
4946 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4947 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4948 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4949 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4950 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);