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   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  *
  10  * Authors:
  11  *   Avi Kivity   <avi@qumranet.com>
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Amit Shah    <amit.shah@qumranet.com>
  14  *   Ben-Ami Yassour <benami@il.ibm.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include <linux/kvm_host.h>
  22 #include "irq.h"
  23 #include "mmu.h"
  24 #include "i8254.h"
  25 #include "tss.h"
  26 #include "kvm_cache_regs.h"
  27 #include "x86.h"
  28
  29 #include <linux/clocksource.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/kvm.h>
  32 #include <linux/fs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/module.h>
  35 #include <linux/mman.h>
  36 #include <linux/highmem.h>
  37 #include <linux/iommu.h>
  38 #include <linux/intel-iommu.h>
  39 #include <linux/cpufreq.h>
  40 #include <trace/events/kvm.h>
  41 #undef TRACE_INCLUDE_FILE
  42 #define CREATE_TRACE_POINTS
  43 #include "trace.h"
  44
  45 #include <asm/uaccess.h>
  46 #include <asm/msr.h>
  47 #include <asm/desc.h>
  48 #include <asm/mtrr.h>
  49 #include <asm/mce.h>
  50
  51 #define MAX_IO_MSRS 256
  52 #define CR0_RESERVED_BITS                                               \
  53         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  54                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  55                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  56 #define CR4_RESERVED_BITS                                               \
  57         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  58                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  59                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  60                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  61
  62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  63
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  66
  67 /* EFER defaults:
  68  * - enable syscall per default because its emulated by KVM
  69  * - enable LME and LMA per default on 64 bit KVM
  70  */
  71 #ifdef CONFIG_X86_64
  72 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  73 #else
  74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  75 #endif
  76
  77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  79
  80 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  82                                     struct kvm_cpuid_entry2 __user *entries);
  83
  84 struct kvm_x86_ops *kvm_x86_ops;
  85 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  86
  87 int ignore_msrs = 0;
  88 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  89
  90 struct kvm_stats_debugfs_item debugfs_entries[] = {
  91         { "pf_fixed", VCPU_STAT(pf_fixed) },
  92         { "pf_guest", VCPU_STAT(pf_guest) },
  93         { "tlb_flush", VCPU_STAT(tlb_flush) },
  94         { "invlpg", VCPU_STAT(invlpg) },
  95         { "exits", VCPU_STAT(exits) },
  96         { "io_exits", VCPU_STAT(io_exits) },
  97         { "mmio_exits", VCPU_STAT(mmio_exits) },
  98         { "signal_exits", VCPU_STAT(signal_exits) },
  99         { "irq_window", VCPU_STAT(irq_window_exits) },
 100         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 101         { "halt_exits", VCPU_STAT(halt_exits) },
 102         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 103         { "hypercalls", VCPU_STAT(hypercalls) },
 104         { "request_irq", VCPU_STAT(request_irq_exits) },
 105         { "irq_exits", VCPU_STAT(irq_exits) },
 106         { "host_state_reload", VCPU_STAT(host_state_reload) },
 107         { "efer_reload", VCPU_STAT(efer_reload) },
 108         { "fpu_reload", VCPU_STAT(fpu_reload) },
 109         { "insn_emulation", VCPU_STAT(insn_emulation) },
 110         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 111         { "irq_injections", VCPU_STAT(irq_injections) },
 112         { "nmi_injections", VCPU_STAT(nmi_injections) },
 113         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 114         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 115         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 116         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 117         { "mmu_flooded", VM_STAT(mmu_flooded) },
 118         { "mmu_recycled", VM_STAT(mmu_recycled) },
 119         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 120         { "mmu_unsync", VM_STAT(mmu_unsync) },
 121         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 122         { "largepages", VM_STAT(lpages) },
 123         { NULL }
 124 };
 125
 126 unsigned long segment_base(u16 selector)
 127 {
 128         struct descriptor_table gdt;
 129         struct desc_struct *d;
 130         unsigned long table_base;
 131         unsigned long v;
 132
 133         if (selector == 0)
 134                 return 0;
 135
 136         kvm_get_gdt(&gdt);
 137         table_base = gdt.base;
 138
 139         if (selector & 4) {           /* from ldt */
 140                 u16 ldt_selector = kvm_read_ldt();
 141
 142                 table_base = segment_base(ldt_selector);
 143         }
 144         d = (struct desc_struct *)(table_base + (selector & ~7));
 145         v = get_desc_base(d);
 146 #ifdef CONFIG_X86_64
 147         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
 148                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
 149 #endif
 150         return v;
 151 }
 152 EXPORT_SYMBOL_GPL(segment_base);
 153
 154 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 155 {
 156         if (irqchip_in_kernel(vcpu->kvm))
 157                 return vcpu->arch.apic_base;
 158         else
 159                 return vcpu->arch.apic_base;
 160 }
 161 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 162
 163 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 164 {
 165         /* TODO: reserve bits check */
 166         if (irqchip_in_kernel(vcpu->kvm))
 167                 kvm_lapic_set_base(vcpu, data);
 168         else
 169                 vcpu->arch.apic_base = data;
 170 }
 171 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 172
 173 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 174 {
 175         WARN_ON(vcpu->arch.exception.pending);
 176         vcpu->arch.exception.pending = true;
 177         vcpu->arch.exception.has_error_code = false;
 178         vcpu->arch.exception.nr = nr;
 179 }
 180 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 181
 182 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 183                            u32 error_code)
 184 {
 185         ++vcpu->stat.pf_guest;
 186
 187         if (vcpu->arch.exception.pending) {
 188                 switch(vcpu->arch.exception.nr) {
 189                 case DF_VECTOR:
 190                         /* triple fault -> shutdown */
 191                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
 192                         return;
 193                 case PF_VECTOR:
 194                         vcpu->arch.exception.nr = DF_VECTOR;
 195                         vcpu->arch.exception.error_code = 0;
 196                         return;
 197                 default:
 198                         /* replace previous exception with a new one in a hope
 199                            that instruction re-execution will regenerate lost
 200                            exception */
 201                         vcpu->arch.exception.pending = false;
 202                         break;
 203                 }
 204         }
 205         vcpu->arch.cr2 = addr;
 206         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 207 }
 208
 209 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 210 {
 211         vcpu->arch.nmi_pending = 1;
 212 }
 213 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 214
 215 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 216 {
 217         WARN_ON(vcpu->arch.exception.pending);
 218         vcpu->arch.exception.pending = true;
 219         vcpu->arch.exception.has_error_code = true;
 220         vcpu->arch.exception.nr = nr;
 221         vcpu->arch.exception.error_code = error_code;
 222 }
 223 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 224
 225 /*
 226  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 227  * a #GP and return false.
 228  */
 229 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 230 {
 231         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 232                 return true;
 233         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 234         return false;
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 237
 238 /*
 239  * Load the pae pdptrs.  Return true is they are all valid.
 240  */
 241 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 242 {
 243         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 244         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 245         int i;
 246         int ret;
 247         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 248
 249         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 250                                   offset * sizeof(u64), sizeof(pdpte));
 251         if (ret < 0) {
 252                 ret = 0;
 253                 goto out;
 254         }
 255         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 256                 if (is_present_gpte(pdpte[i]) &&
 257                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 258                         ret = 0;
 259                         goto out;
 260                 }
 261         }
 262         ret = 1;
 263
 264         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 265         __set_bit(VCPU_EXREG_PDPTR,
 266                   (unsigned long *)&vcpu->arch.regs_avail);
 267         __set_bit(VCPU_EXREG_PDPTR,
 268                   (unsigned long *)&vcpu->arch.regs_dirty);
 269 out:
 270
 271         return ret;
 272 }
 273 EXPORT_SYMBOL_GPL(load_pdptrs);
 274
 275 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 276 {
 277         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 278         bool changed = true;
 279         int r;
 280
 281         if (is_long_mode(vcpu) || !is_pae(vcpu))
 282                 return false;
 283
 284         if (!test_bit(VCPU_EXREG_PDPTR,
 285                       (unsigned long *)&vcpu->arch.regs_avail))
 286                 return true;
 287
 288         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 289         if (r < 0)
 290                 goto out;
 291         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 292 out:
 293
 294         return changed;
 295 }
 296
 297 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 298 {
 299         if (cr0 & CR0_RESERVED_BITS) {
 300                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
 301                        cr0, vcpu->arch.cr0);
 302                 kvm_inject_gp(vcpu, 0);
 303                 return;
 304         }
 305
 306         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
 307                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
 308                 kvm_inject_gp(vcpu, 0);
 309                 return;
 310         }
 311
 312         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
 313                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
 314                        "and a clear PE flag\n");
 315                 kvm_inject_gp(vcpu, 0);
 316                 return;
 317         }
 318
 319         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 320 #ifdef CONFIG_X86_64
 321                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
 322                         int cs_db, cs_l;
 323
 324                         if (!is_pae(vcpu)) {
 325                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 326                                        "in long mode while PAE is disabled\n");
 327                                 kvm_inject_gp(vcpu, 0);
 328                                 return;
 329                         }
 330                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 331                         if (cs_l) {
 332                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
 333                                        "in long mode while CS.L == 1\n");
 334                                 kvm_inject_gp(vcpu, 0);
 335                                 return;
 336
 337                         }
 338                 } else
 339 #endif
 340                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 341                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
 342                                "reserved bits\n");
 343                         kvm_inject_gp(vcpu, 0);
 344                         return;
 345                 }
 346
 347         }
 348
 349         kvm_x86_ops->set_cr0(vcpu, cr0);
 350         vcpu->arch.cr0 = cr0;
 351
 352         kvm_mmu_reset_context(vcpu);
 353         return;
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 356
 357 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 358 {
 359         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_lmsw);
 362
 363 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 364 {
 365         unsigned long old_cr4 = vcpu->arch.cr4;
 366         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 367
 368         if (cr4 & CR4_RESERVED_BITS) {
 369                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
 370                 kvm_inject_gp(vcpu, 0);
 371                 return;
 372         }
 373
 374         if (is_long_mode(vcpu)) {
 375                 if (!(cr4 & X86_CR4_PAE)) {
 376                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
 377                                "in long mode\n");
 378                         kvm_inject_gp(vcpu, 0);
 379                         return;
 380                 }
 381         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 382                    && ((cr4 ^ old_cr4) & pdptr_bits)
 383                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
 384                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
 385                 kvm_inject_gp(vcpu, 0);
 386                 return;
 387         }
 388
 389         if (cr4 & X86_CR4_VMXE) {
 390                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
 391                 kvm_inject_gp(vcpu, 0);
 392                 return;
 393         }
 394         kvm_x86_ops->set_cr4(vcpu, cr4);
 395         vcpu->arch.cr4 = cr4;
 396         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
 397         kvm_mmu_reset_context(vcpu);
 398 }
 399 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 400
 401 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 402 {
 403         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 404                 kvm_mmu_sync_roots(vcpu);
 405                 kvm_mmu_flush_tlb(vcpu);
 406                 return;
 407         }
 408
 409         if (is_long_mode(vcpu)) {
 410                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
 411                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
 412                         kvm_inject_gp(vcpu, 0);
 413                         return;
 414                 }
 415         } else {
 416                 if (is_pae(vcpu)) {
 417                         if (cr3 & CR3_PAE_RESERVED_BITS) {
 418                                 printk(KERN_DEBUG
 419                                        "set_cr3: #GP, reserved bits\n");
 420                                 kvm_inject_gp(vcpu, 0);
 421                                 return;
 422                         }
 423                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
 424                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
 425                                        "reserved bits\n");
 426                                 kvm_inject_gp(vcpu, 0);
 427                                 return;
 428                         }
 429                 }
 430                 /*
 431                  * We don't check reserved bits in nonpae mode, because
 432                  * this isn't enforced, and VMware depends on this.
 433                  */
 434         }
 435
 436         /*
 437          * Does the new cr3 value map to physical memory? (Note, we
 438          * catch an invalid cr3 even in real-mode, because it would
 439          * cause trouble later on when we turn on paging anyway.)
 440          *
 441          * A real CPU would silently accept an invalid cr3 and would
 442          * attempt to use it - with largely undefined (and often hard
 443          * to debug) behavior on the guest side.
 444          */
 445         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 446                 kvm_inject_gp(vcpu, 0);
 447         else {
 448                 vcpu->arch.cr3 = cr3;
 449                 vcpu->arch.mmu.new_cr3(vcpu);
 450         }
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 453
 454 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 455 {
 456         if (cr8 & CR8_RESERVED_BITS) {
 457                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
 458                 kvm_inject_gp(vcpu, 0);
 459                 return;
 460         }
 461         if (irqchip_in_kernel(vcpu->kvm))
 462                 kvm_lapic_set_tpr(vcpu, cr8);
 463         else
 464                 vcpu->arch.cr8 = cr8;
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 467
 468 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 469 {
 470         if (irqchip_in_kernel(vcpu->kvm))
 471                 return kvm_lapic_get_cr8(vcpu);
 472         else
 473                 return vcpu->arch.cr8;
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 476
 477 static inline u32 bit(int bitno)
 478 {
 479         return 1 << (bitno & 31);
 480 }
 481
 482 /*
 483  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 484  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 485  *
 486  * This list is modified at module load time to reflect the
 487  * capabilities of the host cpu.
 488  */
 489 static u32 msrs_to_save[] = {
 490         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 491         MSR_K6_STAR,
 492 #ifdef CONFIG_X86_64
 493         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 494 #endif
 495         MSR_IA32_TSC, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 496         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 497 };
 498
 499 static unsigned num_msrs_to_save;
 500
 501 static u32 emulated_msrs[] = {
 502         MSR_IA32_MISC_ENABLE,
 503 };
 504
 505 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
 506 {
 507         if (efer & efer_reserved_bits) {
 508                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
 509                        efer);
 510                 kvm_inject_gp(vcpu, 0);
 511                 return;
 512         }
 513
 514         if (is_paging(vcpu)
 515             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
 516                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
 517                 kvm_inject_gp(vcpu, 0);
 518                 return;
 519         }
 520
 521         if (efer & EFER_FFXSR) {
 522                 struct kvm_cpuid_entry2 *feat;
 523
 524                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 525                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
 526                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
 527                         kvm_inject_gp(vcpu, 0);
 528                         return;
 529                 }
 530         }
 531
 532         if (efer & EFER_SVME) {
 533                 struct kvm_cpuid_entry2 *feat;
 534
 535                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 536                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
 537                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
 538                         kvm_inject_gp(vcpu, 0);
 539                         return;
 540                 }
 541         }
 542
 543         kvm_x86_ops->set_efer(vcpu, efer);
 544
 545         efer &= ~EFER_LMA;
 546         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 547
 548         vcpu->arch.shadow_efer = efer;
 549
 550         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 551         kvm_mmu_reset_context(vcpu);
 552 }
 553
 554 void kvm_enable_efer_bits(u64 mask)
 555 {
 556        efer_reserved_bits &= ~mask;
 557 }
 558 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 559
 560
 561 /*
 562  * Writes msr value into into the appropriate "register".
 563  * Returns 0 on success, non-0 otherwise.
 564  * Assumes vcpu_load() was already called.
 565  */
 566 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 567 {
 568         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 569 }
 570
 571 /*
 572  * Adapt set_msr() to msr_io()'s calling convention
 573  */
 574 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 575 {
 576         return kvm_set_msr(vcpu, index, *data);
 577 }
 578
 579 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 580 {
 581         static int version;
 582         struct pvclock_wall_clock wc;
 583         struct timespec now, sys, boot;
 584
 585         if (!wall_clock)
 586                 return;
 587
 588         version++;
 589
 590         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 591
 592         /*
 593          * The guest calculates current wall clock time by adding
 594          * system time (updated by kvm_write_guest_time below) to the
 595          * wall clock specified here.  guest system time equals host
 596          * system time for us, thus we must fill in host boot time here.
 597          */
 598         now = current_kernel_time();
 599         ktime_get_ts(&sys);
 600         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
 601
 602         wc.sec = boot.tv_sec;
 603         wc.nsec = boot.tv_nsec;
 604         wc.version = version;
 605
 606         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 607
 608         version++;
 609         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 610 }
 611
 612 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 613 {
 614         uint32_t quotient, remainder;
 615
 616         /* Don't try to replace with do_div(), this one calculates
 617          * "(dividend << 32) / divisor" */
 618         __asm__ ( "divl %4"
 619                   : "=a" (quotient), "=d" (remainder)
 620                   : "0" (0), "1" (dividend), "r" (divisor) );
 621         return quotient;
 622 }
 623
 624 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 625 {
 626         uint64_t nsecs = 1000000000LL;
 627         int32_t  shift = 0;
 628         uint64_t tps64;
 629         uint32_t tps32;
 630
 631         tps64 = tsc_khz * 1000LL;
 632         while (tps64 > nsecs*2) {
 633                 tps64 >>= 1;
 634                 shift--;
 635         }
 636
 637         tps32 = (uint32_t)tps64;
 638         while (tps32 <= (uint32_t)nsecs) {
 639                 tps32 <<= 1;
 640                 shift++;
 641         }
 642
 643         hv_clock->tsc_shift = shift;
 644         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 645
 646         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 647                  __func__, tsc_khz, hv_clock->tsc_shift,
 648                  hv_clock->tsc_to_system_mul);
 649 }
 650
 651 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 652
 653 static void kvm_write_guest_time(struct kvm_vcpu *v)
 654 {
 655         struct timespec ts;
 656         unsigned long flags;
 657         struct kvm_vcpu_arch *vcpu = &v->arch;
 658         void *shared_kaddr;
 659         unsigned long this_tsc_khz;
 660
 661         if ((!vcpu->time_page))
 662                 return;
 663
 664         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
 665         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
 666                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 667                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
 668         }
 669         put_cpu_var(cpu_tsc_khz);
 670
 671         /* Keep irq disabled to prevent changes to the clock */
 672         local_irq_save(flags);
 673         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 674         ktime_get_ts(&ts);
 675         local_irq_restore(flags);
 676
 677         /* With all the info we got, fill in the values */
 678
 679         vcpu->hv_clock.system_time = ts.tv_nsec +
 680                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
 681         /*
 682          * The interface expects us to write an even number signaling that the
 683          * update is finished. Since the guest won't see the intermediate
 684          * state, we just increase by 2 at the end.
 685          */
 686         vcpu->hv_clock.version += 2;
 687
 688         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 689
 690         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 691                sizeof(vcpu->hv_clock));
 692
 693         kunmap_atomic(shared_kaddr, KM_USER0);
 694
 695         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 696 }
 697
 698 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
 699 {
 700         struct kvm_vcpu_arch *vcpu = &v->arch;
 701
 702         if (!vcpu->time_page)
 703                 return 0;
 704         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
 705         return 1;
 706 }
 707
 708 static bool msr_mtrr_valid(unsigned msr)
 709 {
 710         switch (msr) {
 711         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
 712         case MSR_MTRRfix64K_00000:
 713         case MSR_MTRRfix16K_80000:
 714         case MSR_MTRRfix16K_A0000:
 715         case MSR_MTRRfix4K_C0000:
 716         case MSR_MTRRfix4K_C8000:
 717         case MSR_MTRRfix4K_D0000:
 718         case MSR_MTRRfix4K_D8000:
 719         case MSR_MTRRfix4K_E0000:
 720         case MSR_MTRRfix4K_E8000:
 721         case MSR_MTRRfix4K_F0000:
 722         case MSR_MTRRfix4K_F8000:
 723         case MSR_MTRRdefType:
 724         case MSR_IA32_CR_PAT:
 725                 return true;
 726         case 0x2f8:
 727                 return true;
 728         }
 729         return false;
 730 }
 731
 732 static bool valid_pat_type(unsigned t)
 733 {
 734         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
 735 }
 736
 737 static bool valid_mtrr_type(unsigned t)
 738 {
 739         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
 740 }
 741
 742 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 743 {
 744         int i;
 745
 746         if (!msr_mtrr_valid(msr))
 747                 return false;
 748
 749         if (msr == MSR_IA32_CR_PAT) {
 750                 for (i = 0; i < 8; i++)
 751                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
 752                                 return false;
 753                 return true;
 754         } else if (msr == MSR_MTRRdefType) {
 755                 if (data & ~0xcff)
 756                         return false;
 757                 return valid_mtrr_type(data & 0xff);
 758         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
 759                 for (i = 0; i < 8 ; i++)
 760                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
 761                                 return false;
 762                 return true;
 763         }
 764
 765         /* variable MTRRs */
 766         return valid_mtrr_type(data & 0xff);
 767 }
 768
 769 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 770 {
 771         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 772
 773         if (!mtrr_valid(vcpu, msr, data))
 774                 return 1;
 775
 776         if (msr == MSR_MTRRdefType) {
 777                 vcpu->arch.mtrr_state.def_type = data;
 778                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
 779         } else if (msr == MSR_MTRRfix64K_00000)
 780                 p[0] = data;
 781         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 782                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
 783         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 784                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
 785         else if (msr == MSR_IA32_CR_PAT)
 786                 vcpu->arch.pat = data;
 787         else {  /* Variable MTRRs */
 788                 int idx, is_mtrr_mask;
 789                 u64 *pt;
 790
 791                 idx = (msr - 0x200) / 2;
 792                 is_mtrr_mask = msr - 0x200 - 2 * idx;
 793                 if (!is_mtrr_mask)
 794                         pt =
 795                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
 796                 else
 797                         pt =
 798                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
 799                 *pt = data;
 800         }
 801
 802         kvm_mmu_reset_context(vcpu);
 803         return 0;
 804 }
 805
 806 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 807 {
 808         u64 mcg_cap = vcpu->arch.mcg_cap;
 809         unsigned bank_num = mcg_cap & 0xff;
 810
 811         switch (msr) {
 812         case MSR_IA32_MCG_STATUS:
 813                 vcpu->arch.mcg_status = data;
 814                 break;
 815         case MSR_IA32_MCG_CTL:
 816                 if (!(mcg_cap & MCG_CTL_P))
 817                         return 1;
 818                 if (data != 0 && data != ~(u64)0)
 819                         return -1;
 820                 vcpu->arch.mcg_ctl = data;
 821                 break;
 822         default:
 823                 if (msr >= MSR_IA32_MC0_CTL &&
 824                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
 825                         u32 offset = msr - MSR_IA32_MC0_CTL;
 826                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
 827                         if ((offset & 0x3) == 0 &&
 828                             data != 0 && data != ~(u64)0)
 829                                 return -1;
 830                         vcpu->arch.mce_banks[offset] = data;
 831                         break;
 832                 }
 833                 return 1;
 834         }
 835         return 0;
 836 }
 837
 838 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 839 {
 840         switch (msr) {
 841         case MSR_EFER:
 842                 set_efer(vcpu, data);
 843                 break;
 844         case MSR_K7_HWCR:
 845                 data &= ~(u64)0x40;     /* ignore flush filter disable */
 846                 if (data != 0) {
 847                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
 848                                 data);
 849                         return 1;
 850                 }
 851                 break;
 852         case MSR_FAM10H_MMIO_CONF_BASE:
 853                 if (data != 0) {
 854                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
 855                                 "0x%llx\n", data);
 856                         return 1;
 857                 }
 858                 break;
 859         case MSR_AMD64_NB_CFG:
 860                 break;
 861         case MSR_IA32_DEBUGCTLMSR:
 862                 if (!data) {
 863                         /* We support the non-activated case already */
 864                         break;
 865                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
 866                         /* Values other than LBR and BTF are vendor-specific,
 867                            thus reserved and should throw a #GP */
 868                         return 1;
 869                 }
 870                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
 871                         __func__, data);
 872                 break;
 873         case MSR_IA32_UCODE_REV:
 874         case MSR_IA32_UCODE_WRITE:
 875         case MSR_VM_HSAVE_PA:
 876         case MSR_AMD64_PATCH_LOADER:
 877                 break;
 878         case 0x200 ... 0x2ff:
 879                 return set_msr_mtrr(vcpu, msr, data);
 880         case MSR_IA32_APICBASE:
 881                 kvm_set_apic_base(vcpu, data);
 882                 break;
 883         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
 884                 return kvm_x2apic_msr_write(vcpu, msr, data);
 885         case MSR_IA32_MISC_ENABLE:
 886                 vcpu->arch.ia32_misc_enable_msr = data;
 887                 break;
 888         case MSR_KVM_WALL_CLOCK:
 889                 vcpu->kvm->arch.wall_clock = data;
 890                 kvm_write_wall_clock(vcpu->kvm, data);
 891                 break;
 892         case MSR_KVM_SYSTEM_TIME: {
 893                 if (vcpu->arch.time_page) {
 894                         kvm_release_page_dirty(vcpu->arch.time_page);
 895                         vcpu->arch.time_page = NULL;
 896                 }
 897
 898                 vcpu->arch.time = data;
 899
 900                 /* we verify if the enable bit is set... */
 901                 if (!(data & 1))
 902                         break;
 903
 904                 /* ...but clean it before doing the actual write */
 905                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 906
 907                 vcpu->arch.time_page =
 908                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
 909
 910                 if (is_error_page(vcpu->arch.time_page)) {
 911                         kvm_release_page_clean(vcpu->arch.time_page);
 912                         vcpu->arch.time_page = NULL;
 913                 }
 914
 915                 kvm_request_guest_time_update(vcpu);
 916                 break;
 917         }
 918         case MSR_IA32_MCG_CTL:
 919         case MSR_IA32_MCG_STATUS:
 920         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
 921                 return set_msr_mce(vcpu, msr, data);
 922
 923         /* Performance counters are not protected by a CPUID bit,
 924          * so we should check all of them in the generic path for the sake of
 925          * cross vendor migration.
 926          * Writing a zero into the event select MSRs disables them,
 927          * which we perfectly emulate ;-). Any other value should be at least
 928          * reported, some guests depend on them.
 929          */
 930         case MSR_P6_EVNTSEL0:
 931         case MSR_P6_EVNTSEL1:
 932         case MSR_K7_EVNTSEL0:
 933         case MSR_K7_EVNTSEL1:
 934         case MSR_K7_EVNTSEL2:
 935         case MSR_K7_EVNTSEL3:
 936                 if (data != 0)
 937                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 938                                 "0x%x data 0x%llx\n", msr, data);
 939                 break;
 940         /* at least RHEL 4 unconditionally writes to the perfctr registers,
 941          * so we ignore writes to make it happy.
 942          */
 943         case MSR_P6_PERFCTR0:
 944         case MSR_P6_PERFCTR1:
 945         case MSR_K7_PERFCTR0:
 946         case MSR_K7_PERFCTR1:
 947         case MSR_K7_PERFCTR2:
 948         case MSR_K7_PERFCTR3:
 949                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 950                         "0x%x data 0x%llx\n", msr, data);
 951                 break;
 952         default:
 953                 if (!ignore_msrs) {
 954                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
 955                                 msr, data);
 956                         return 1;
 957                 } else {
 958                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
 959                                 msr, data);
 960                         break;
 961                 }
 962         }
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
 966
 967
 968 /*
 969  * Reads an msr value (of 'msr_index') into 'pdata'.
 970  * Returns 0 on success, non-0 otherwise.
 971  * Assumes vcpu_load() was already called.
 972  */
 973 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 974 {
 975         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
 976 }
 977
 978 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 979 {
 980         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
 981
 982         if (!msr_mtrr_valid(msr))
 983                 return 1;
 984
 985         if (msr == MSR_MTRRdefType)
 986                 *pdata = vcpu->arch.mtrr_state.def_type +
 987                          (vcpu->arch.mtrr_state.enabled << 10);
 988         else if (msr == MSR_MTRRfix64K_00000)
 989                 *pdata = p[0];
 990         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
 991                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
 992         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
 993                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
 994         else if (msr == MSR_IA32_CR_PAT)
 995                 *pdata = vcpu->arch.pat;
 996         else {  /* Variable MTRRs */
 997                 int idx, is_mtrr_mask;
 998                 u64 *pt;
 999
1000                 idx = (msr - 0x200) / 2;
1001                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1002                 if (!is_mtrr_mask)
1003                         pt =
1004                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1005                 else
1006                         pt =
1007                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1008                 *pdata = *pt;
1009         }
1010
1011         return 0;
1012 }
1013
1014 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1015 {
1016         u64 data;
1017         u64 mcg_cap = vcpu->arch.mcg_cap;
1018         unsigned bank_num = mcg_cap & 0xff;
1019
1020         switch (msr) {
1021         case MSR_IA32_P5_MC_ADDR:
1022         case MSR_IA32_P5_MC_TYPE:
1023                 data = 0;
1024                 break;
1025         case MSR_IA32_MCG_CAP:
1026                 data = vcpu->arch.mcg_cap;
1027                 break;
1028         case MSR_IA32_MCG_CTL:
1029                 if (!(mcg_cap & MCG_CTL_P))
1030                         return 1;
1031                 data = vcpu->arch.mcg_ctl;
1032                 break;
1033         case MSR_IA32_MCG_STATUS:
1034                 data = vcpu->arch.mcg_status;
1035                 break;
1036         default:
1037                 if (msr >= MSR_IA32_MC0_CTL &&
1038                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1039                         u32 offset = msr - MSR_IA32_MC0_CTL;
1040                         data = vcpu->arch.mce_banks[offset];
1041                         break;
1042                 }
1043                 return 1;
1044         }
1045         *pdata = data;
1046         return 0;
1047 }
1048
1049 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1050 {
1051         u64 data;
1052
1053         switch (msr) {
1054         case MSR_IA32_PLATFORM_ID:
1055         case MSR_IA32_UCODE_REV:
1056         case MSR_IA32_EBL_CR_POWERON:
1057         case MSR_IA32_DEBUGCTLMSR:
1058         case MSR_IA32_LASTBRANCHFROMIP:
1059         case MSR_IA32_LASTBRANCHTOIP:
1060         case MSR_IA32_LASTINTFROMIP:
1061         case MSR_IA32_LASTINTTOIP:
1062         case MSR_K8_SYSCFG:
1063         case MSR_K7_HWCR:
1064         case MSR_VM_HSAVE_PA:
1065         case MSR_P6_PERFCTR0:
1066         case MSR_P6_PERFCTR1:
1067         case MSR_P6_EVNTSEL0:
1068         case MSR_P6_EVNTSEL1:
1069         case MSR_K7_EVNTSEL0:
1070         case MSR_K7_PERFCTR0:
1071         case MSR_K8_INT_PENDING_MSG:
1072         case MSR_AMD64_NB_CFG:
1073         case MSR_FAM10H_MMIO_CONF_BASE:
1074                 data = 0;
1075                 break;
1076         case MSR_MTRRcap:
1077                 data = 0x500 | KVM_NR_VAR_MTRR;
1078                 break;
1079         case 0x200 ... 0x2ff:
1080                 return get_msr_mtrr(vcpu, msr, pdata);
1081         case 0xcd: /* fsb frequency */
1082                 data = 3;
1083                 break;
1084         case MSR_IA32_APICBASE:
1085                 data = kvm_get_apic_base(vcpu);
1086                 break;
1087         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1088                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1089                 break;
1090         case MSR_IA32_MISC_ENABLE:
1091                 data = vcpu->arch.ia32_misc_enable_msr;
1092                 break;
1093         case MSR_IA32_PERF_STATUS:
1094                 /* TSC increment by tick */
1095                 data = 1000ULL;
1096                 /* CPU multiplier */
1097                 data |= (((uint64_t)4ULL) << 40);
1098                 break;
1099         case MSR_EFER:
1100                 data = vcpu->arch.shadow_efer;
1101                 break;
1102         case MSR_KVM_WALL_CLOCK:
1103                 data = vcpu->kvm->arch.wall_clock;
1104                 break;
1105         case MSR_KVM_SYSTEM_TIME:
1106                 data = vcpu->arch.time;
1107                 break;
1108         case MSR_IA32_P5_MC_ADDR:
1109         case MSR_IA32_P5_MC_TYPE:
1110         case MSR_IA32_MCG_CAP:
1111         case MSR_IA32_MCG_CTL:
1112         case MSR_IA32_MCG_STATUS:
1113         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1114                 return get_msr_mce(vcpu, msr, pdata);
1115         default:
1116                 if (!ignore_msrs) {
1117                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1118                         return 1;
1119                 } else {
1120                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1121                         data = 0;
1122                 }
1123                 break;
1124         }
1125         *pdata = data;
1126         return 0;
1127 }
1128 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1129
1130 /*
1131  * Read or write a bunch of msrs. All parameters are kernel addresses.
1132  *
1133  * @return number of msrs set successfully.
1134  */
1135 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1136                     struct kvm_msr_entry *entries,
1137                     int (*do_msr)(struct kvm_vcpu *vcpu,
1138                                   unsigned index, u64 *data))
1139 {
1140         int i;
1141
1142         vcpu_load(vcpu);
1143
1144         down_read(&vcpu->kvm->slots_lock);
1145         for (i = 0; i < msrs->nmsrs; ++i)
1146                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1147                         break;
1148         up_read(&vcpu->kvm->slots_lock);
1149
1150         vcpu_put(vcpu);
1151
1152         return i;
1153 }
1154
1155 /*
1156  * Read or write a bunch of msrs. Parameters are user addresses.
1157  *
1158  * @return number of msrs set successfully.
1159  */
1160 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1161                   int (*do_msr)(struct kvm_vcpu *vcpu,
1162                                 unsigned index, u64 *data),
1163                   int writeback)
1164 {
1165         struct kvm_msrs msrs;
1166         struct kvm_msr_entry *entries;
1167         int r, n;
1168         unsigned size;
1169
1170         r = -EFAULT;
1171         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1172                 goto out;
1173
1174         r = -E2BIG;
1175         if (msrs.nmsrs >= MAX_IO_MSRS)
1176                 goto out;
1177
1178         r = -ENOMEM;
1179         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1180         entries = vmalloc(size);
1181         if (!entries)
1182                 goto out;
1183
1184         r = -EFAULT;
1185         if (copy_from_user(entries, user_msrs->entries, size))
1186                 goto out_free;
1187
1188         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1189         if (r < 0)
1190                 goto out_free;
1191
1192         r = -EFAULT;
1193         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1194                 goto out_free;
1195
1196         r = n;
1197
1198 out_free:
1199         vfree(entries);
1200 out:
1201         return r;
1202 }
1203
1204 int kvm_dev_ioctl_check_extension(long ext)
1205 {
1206         int r;
1207
1208         switch (ext) {
1209         case KVM_CAP_IRQCHIP:
1210         case KVM_CAP_HLT:
1211         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1212         case KVM_CAP_SET_TSS_ADDR:
1213         case KVM_CAP_EXT_CPUID:
1214         case KVM_CAP_CLOCKSOURCE:
1215         case KVM_CAP_PIT:
1216         case KVM_CAP_NOP_IO_DELAY:
1217         case KVM_CAP_MP_STATE:
1218         case KVM_CAP_SYNC_MMU:
1219         case KVM_CAP_REINJECT_CONTROL:
1220         case KVM_CAP_IRQ_INJECT_STATUS:
1221         case KVM_CAP_ASSIGN_DEV_IRQ:
1222         case KVM_CAP_IRQFD:
1223         case KVM_CAP_IOEVENTFD:
1224         case KVM_CAP_PIT2:
1225         case KVM_CAP_PIT_STATE2:
1226         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1227                 r = 1;
1228                 break;
1229         case KVM_CAP_COALESCED_MMIO:
1230                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1231                 break;
1232         case KVM_CAP_VAPIC:
1233                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1234                 break;
1235         case KVM_CAP_NR_VCPUS:
1236                 r = KVM_MAX_VCPUS;
1237                 break;
1238         case KVM_CAP_NR_MEMSLOTS:
1239                 r = KVM_MEMORY_SLOTS;
1240                 break;
1241         case KVM_CAP_PV_MMU:
1242                 r = !tdp_enabled;
1243                 break;
1244         case KVM_CAP_IOMMU:
1245                 r = iommu_found();
1246                 break;
1247         case KVM_CAP_MCE:
1248                 r = KVM_MAX_MCE_BANKS;
1249                 break;
1250         default:
1251                 r = 0;
1252                 break;
1253         }
1254         return r;
1255
1256 }
1257
1258 long kvm_arch_dev_ioctl(struct file *filp,
1259                         unsigned int ioctl, unsigned long arg)
1260 {
1261         void __user *argp = (void __user *)arg;
1262         long r;
1263
1264         switch (ioctl) {
1265         case KVM_GET_MSR_INDEX_LIST: {
1266                 struct kvm_msr_list __user *user_msr_list = argp;
1267                 struct kvm_msr_list msr_list;
1268                 unsigned n;
1269
1270                 r = -EFAULT;
1271                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1272                         goto out;
1273                 n = msr_list.nmsrs;
1274                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1275                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1276                         goto out;
1277                 r = -E2BIG;
1278                 if (n < msr_list.nmsrs)
1279                         goto out;
1280                 r = -EFAULT;
1281                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1282                                  num_msrs_to_save * sizeof(u32)))
1283                         goto out;
1284                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1285                                  &emulated_msrs,
1286                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1287                         goto out;
1288                 r = 0;
1289                 break;
1290         }
1291         case KVM_GET_SUPPORTED_CPUID: {
1292                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1293                 struct kvm_cpuid2 cpuid;
1294
1295                 r = -EFAULT;
1296                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1297                         goto out;
1298                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1299                                                       cpuid_arg->entries);
1300                 if (r)
1301                         goto out;
1302
1303                 r = -EFAULT;
1304                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1305                         goto out;
1306                 r = 0;
1307                 break;
1308         }
1309         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1310                 u64 mce_cap;
1311
1312                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1313                 r = -EFAULT;
1314                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1315                         goto out;
1316                 r = 0;
1317                 break;
1318         }
1319         default:
1320                 r = -EINVAL;
1321         }
1322 out:
1323         return r;
1324 }
1325
1326 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1327 {
1328         kvm_x86_ops->vcpu_load(vcpu, cpu);
1329         kvm_request_guest_time_update(vcpu);
1330 }
1331
1332 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1333 {
1334         kvm_x86_ops->vcpu_put(vcpu);
1335         kvm_put_guest_fpu(vcpu);
1336 }
1337
1338 static int is_efer_nx(void)
1339 {
1340         unsigned long long efer = 0;
1341
1342         rdmsrl_safe(MSR_EFER, &efer);
1343         return efer & EFER_NX;
1344 }
1345
1346 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1347 {
1348         int i;
1349         struct kvm_cpuid_entry2 *e, *entry;
1350
1351         entry = NULL;
1352         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1353                 e = &vcpu->arch.cpuid_entries[i];
1354                 if (e->function == 0x80000001) {
1355                         entry = e;
1356                         break;
1357                 }
1358         }
1359         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1360                 entry->edx &= ~(1 << 20);
1361                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1362         }
1363 }
1364
1365 /* when an old userspace process fills a new kernel module */
1366 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1367                                     struct kvm_cpuid *cpuid,
1368                                     struct kvm_cpuid_entry __user *entries)
1369 {
1370         int r, i;
1371         struct kvm_cpuid_entry *cpuid_entries;
1372
1373         r = -E2BIG;
1374         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1375                 goto out;
1376         r = -ENOMEM;
1377         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1378         if (!cpuid_entries)
1379                 goto out;
1380         r = -EFAULT;
1381         if (copy_from_user(cpuid_entries, entries,
1382                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1383                 goto out_free;
1384         for (i = 0; i < cpuid->nent; i++) {
1385                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1386                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1387                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1388                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1389                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1390                 vcpu->arch.cpuid_entries[i].index = 0;
1391                 vcpu->arch.cpuid_entries[i].flags = 0;
1392                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1393                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1394                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1395         }
1396         vcpu->arch.cpuid_nent = cpuid->nent;
1397         cpuid_fix_nx_cap(vcpu);
1398         r = 0;
1399         kvm_apic_set_version(vcpu);
1400
1401 out_free:
1402         vfree(cpuid_entries);
1403 out:
1404         return r;
1405 }
1406
1407 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1408                                      struct kvm_cpuid2 *cpuid,
1409                                      struct kvm_cpuid_entry2 __user *entries)
1410 {
1411         int r;
1412
1413         r = -E2BIG;
1414         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1415                 goto out;
1416         r = -EFAULT;
1417         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1418                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1419                 goto out;
1420         vcpu->arch.cpuid_nent = cpuid->nent;
1421         kvm_apic_set_version(vcpu);
1422         return 0;
1423
1424 out:
1425         return r;
1426 }
1427
1428 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1429                                      struct kvm_cpuid2 *cpuid,
1430                                      struct kvm_cpuid_entry2 __user *entries)
1431 {
1432         int r;
1433
1434         r = -E2BIG;
1435         if (cpuid->nent < vcpu->arch.cpuid_nent)
1436                 goto out;
1437         r = -EFAULT;
1438         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1439                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1440                 goto out;
1441         return 0;
1442
1443 out:
1444         cpuid->nent = vcpu->arch.cpuid_nent;
1445         return r;
1446 }
1447
1448 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1449                            u32 index)
1450 {
1451         entry->function = function;
1452         entry->index = index;
1453         cpuid_count(entry->function, entry->index,
1454                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1455         entry->flags = 0;
1456 }
1457
1458 #define F(x) bit(X86_FEATURE_##x)
1459
1460 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1461                          u32 index, int *nent, int maxnent)
1462 {
1463         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1464         unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1465 #ifdef CONFIG_X86_64
1466         unsigned f_lm = F(LM);
1467 #else
1468         unsigned f_lm = 0;
1469 #endif
1470
1471         /* cpuid 1.edx */
1472         const u32 kvm_supported_word0_x86_features =
1473                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1474                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1475                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1476                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1477                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1478                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1479                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1480                 0 /* HTT, TM, Reserved, PBE */;
1481         /* cpuid 0x80000001.edx */
1482         const u32 kvm_supported_word1_x86_features =
1483                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1484                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1485                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1486                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1487                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1488                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1489                 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1490                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1491         /* cpuid 1.ecx */
1492         const u32 kvm_supported_word4_x86_features =
1493                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1494                 0 /* DS-CPL, VMX, SMX, EST */ |
1495                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1496                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1497                 0 /* Reserved, DCA */ | F(XMM4_1) |
1498                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1499                 0 /* Reserved, XSAVE, OSXSAVE */;
1500         /* cpuid 0x80000001.ecx */
1501         const u32 kvm_supported_word6_x86_features =
1502                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1503                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1504                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1505                 0 /* SKINIT */ | 0 /* WDT */;
1506
1507         /* all calls to cpuid_count() should be made on the same cpu */
1508         get_cpu();
1509         do_cpuid_1_ent(entry, function, index);
1510         ++*nent;
1511
1512         switch (function) {
1513         case 0:
1514                 entry->eax = min(entry->eax, (u32)0xb);
1515                 break;
1516         case 1:
1517                 entry->edx &= kvm_supported_word0_x86_features;
1518                 entry->ecx &= kvm_supported_word4_x86_features;
1519                 /* we support x2apic emulation even if host does not support
1520                  * it since we emulate x2apic in software */
1521                 entry->ecx |= F(X2APIC);
1522                 break;
1523         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1524          * may return different values. This forces us to get_cpu() before
1525          * issuing the first command, and also to emulate this annoying behavior
1526          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1527         case 2: {
1528                 int t, times = entry->eax & 0xff;
1529
1530                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1531                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1532                 for (t = 1; t < times && *nent < maxnent; ++t) {
1533                         do_cpuid_1_ent(&entry[t], function, 0);
1534                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1535                         ++*nent;
1536                 }
1537                 break;
1538         }
1539         /* function 4 and 0xb have additional index. */
1540         case 4: {
1541                 int i, cache_type;
1542
1543                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1544                 /* read more entries until cache_type is zero */
1545                 for (i = 1; *nent < maxnent; ++i) {
1546                         cache_type = entry[i - 1].eax & 0x1f;
1547                         if (!cache_type)
1548                                 break;
1549                         do_cpuid_1_ent(&entry[i], function, i);
1550                         entry[i].flags |=
1551                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1552                         ++*nent;
1553                 }
1554                 break;
1555         }
1556         case 0xb: {
1557                 int i, level_type;
1558
1559                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1560                 /* read more entries until level_type is zero */
1561                 for (i = 1; *nent < maxnent; ++i) {
1562                         level_type = entry[i - 1].ecx & 0xff00;
1563                         if (!level_type)
1564                                 break;
1565                         do_cpuid_1_ent(&entry[i], function, i);
1566                         entry[i].flags |=
1567                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1568                         ++*nent;
1569                 }
1570                 break;
1571         }
1572         case 0x80000000:
1573                 entry->eax = min(entry->eax, 0x8000001a);
1574                 break;
1575         case 0x80000001:
1576                 entry->edx &= kvm_supported_word1_x86_features;
1577                 entry->ecx &= kvm_supported_word6_x86_features;
1578                 break;
1579         }
1580         put_cpu();
1581 }
1582
1583 #undef F
1584
1585 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1586                                      struct kvm_cpuid_entry2 __user *entries)
1587 {
1588         struct kvm_cpuid_entry2 *cpuid_entries;
1589         int limit, nent = 0, r = -E2BIG;
1590         u32 func;
1591
1592         if (cpuid->nent < 1)
1593                 goto out;
1594         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1595                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1596         r = -ENOMEM;
1597         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1598         if (!cpuid_entries)
1599                 goto out;
1600
1601         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1602         limit = cpuid_entries[0].eax;
1603         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1604                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1605                              &nent, cpuid->nent);
1606         r = -E2BIG;
1607         if (nent >= cpuid->nent)
1608                 goto out_free;
1609
1610         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1611         limit = cpuid_entries[nent - 1].eax;
1612         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1613                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1614                              &nent, cpuid->nent);
1615         r = -E2BIG;
1616         if (nent >= cpuid->nent)
1617                 goto out_free;
1618
1619         r = -EFAULT;
1620         if (copy_to_user(entries, cpuid_entries,
1621                          nent * sizeof(struct kvm_cpuid_entry2)))
1622                 goto out_free;
1623         cpuid->nent = nent;
1624         r = 0;
1625
1626 out_free:
1627         vfree(cpuid_entries);
1628 out:
1629         return r;
1630 }
1631
1632 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1633                                     struct kvm_lapic_state *s)
1634 {
1635         vcpu_load(vcpu);
1636         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1637         vcpu_put(vcpu);
1638
1639         return 0;
1640 }
1641
1642 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1643                                     struct kvm_lapic_state *s)
1644 {
1645         vcpu_load(vcpu);
1646         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1647         kvm_apic_post_state_restore(vcpu);
1648         update_cr8_intercept(vcpu);
1649         vcpu_put(vcpu);
1650
1651         return 0;
1652 }
1653
1654 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1655                                     struct kvm_interrupt *irq)
1656 {
1657         if (irq->irq < 0 || irq->irq >= 256)
1658                 return -EINVAL;
1659         if (irqchip_in_kernel(vcpu->kvm))
1660                 return -ENXIO;
1661         vcpu_load(vcpu);
1662
1663         kvm_queue_interrupt(vcpu, irq->irq, false);
1664
1665         vcpu_put(vcpu);
1666
1667         return 0;
1668 }
1669
1670 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1671 {
1672         vcpu_load(vcpu);
1673         kvm_inject_nmi(vcpu);
1674         vcpu_put(vcpu);
1675
1676         return 0;
1677 }
1678
1679 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1680                                            struct kvm_tpr_access_ctl *tac)
1681 {
1682         if (tac->flags)
1683                 return -EINVAL;
1684         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1685         return 0;
1686 }
1687
1688 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1689                                         u64 mcg_cap)
1690 {
1691         int r;
1692         unsigned bank_num = mcg_cap & 0xff, bank;
1693
1694         r = -EINVAL;
1695         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
1696                 goto out;
1697         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1698                 goto out;
1699         r = 0;
1700         vcpu->arch.mcg_cap = mcg_cap;
1701         /* Init IA32_MCG_CTL to all 1s */
1702         if (mcg_cap & MCG_CTL_P)
1703                 vcpu->arch.mcg_ctl = ~(u64)0;
1704         /* Init IA32_MCi_CTL to all 1s */
1705         for (bank = 0; bank < bank_num; bank++)
1706                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1707 out:
1708         return r;
1709 }
1710
1711 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1712                                       struct kvm_x86_mce *mce)
1713 {
1714         u64 mcg_cap = vcpu->arch.mcg_cap;
1715         unsigned bank_num = mcg_cap & 0xff;
1716         u64 *banks = vcpu->arch.mce_banks;
1717
1718         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1719                 return -EINVAL;
1720         /*
1721          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1722          * reporting is disabled
1723          */
1724         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1725             vcpu->arch.mcg_ctl != ~(u64)0)
1726                 return 0;
1727         banks += 4 * mce->bank;
1728         /*
1729          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1730          * reporting is disabled for the bank
1731          */
1732         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1733                 return 0;
1734         if (mce->status & MCI_STATUS_UC) {
1735                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1736                     !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1737                         printk(KERN_DEBUG "kvm: set_mce: "
1738                                "injects mce exception while "
1739                                "previous one is in progress!\n");
1740                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1741                         return 0;
1742                 }
1743                 if (banks[1] & MCI_STATUS_VAL)
1744                         mce->status |= MCI_STATUS_OVER;
1745                 banks[2] = mce->addr;
1746                 banks[3] = mce->misc;
1747                 vcpu->arch.mcg_status = mce->mcg_status;
1748                 banks[1] = mce->status;
1749                 kvm_queue_exception(vcpu, MC_VECTOR);
1750         } else if (!(banks[1] & MCI_STATUS_VAL)
1751                    || !(banks[1] & MCI_STATUS_UC)) {
1752                 if (banks[1] & MCI_STATUS_VAL)
1753                         mce->status |= MCI_STATUS_OVER;
1754                 banks[2] = mce->addr;
1755                 banks[3] = mce->misc;
1756                 banks[1] = mce->status;
1757         } else
1758                 banks[1] |= MCI_STATUS_OVER;
1759         return 0;
1760 }
1761
1762 long kvm_arch_vcpu_ioctl(struct file *filp,
1763                          unsigned int ioctl, unsigned long arg)
1764 {
1765         struct kvm_vcpu *vcpu = filp->private_data;
1766         void __user *argp = (void __user *)arg;
1767         int r;
1768         struct kvm_lapic_state *lapic = NULL;
1769
1770         switch (ioctl) {
1771         case KVM_GET_LAPIC: {
1772                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1773
1774                 r = -ENOMEM;
1775                 if (!lapic)
1776                         goto out;
1777                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1778                 if (r)
1779                         goto out;
1780                 r = -EFAULT;
1781                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1782                         goto out;
1783                 r = 0;
1784                 break;
1785         }
1786         case KVM_SET_LAPIC: {
1787                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1788                 r = -ENOMEM;
1789                 if (!lapic)
1790                         goto out;
1791                 r = -EFAULT;
1792                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1793                         goto out;
1794                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1795                 if (r)
1796                         goto out;
1797                 r = 0;
1798                 break;
1799         }
1800         case KVM_INTERRUPT: {
1801                 struct kvm_interrupt irq;
1802
1803                 r = -EFAULT;
1804                 if (copy_from_user(&irq, argp, sizeof irq))
1805                         goto out;
1806                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1807                 if (r)
1808                         goto out;
1809                 r = 0;
1810                 break;
1811         }
1812         case KVM_NMI: {
1813                 r = kvm_vcpu_ioctl_nmi(vcpu);
1814                 if (r)
1815                         goto out;
1816                 r = 0;
1817                 break;
1818         }
1819         case KVM_SET_CPUID: {
1820                 struct kvm_cpuid __user *cpuid_arg = argp;
1821                 struct kvm_cpuid cpuid;
1822
1823                 r = -EFAULT;
1824                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1825                         goto out;
1826                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1827                 if (r)
1828                         goto out;
1829                 break;
1830         }
1831         case KVM_SET_CPUID2: {
1832                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1833                 struct kvm_cpuid2 cpuid;
1834
1835                 r = -EFAULT;
1836                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1837                         goto out;
1838                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1839                                               cpuid_arg->entries);
1840                 if (r)
1841                         goto out;
1842                 break;
1843         }
1844         case KVM_GET_CPUID2: {
1845                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1846                 struct kvm_cpuid2 cpuid;
1847
1848                 r = -EFAULT;
1849                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1850                         goto out;
1851                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1852                                               cpuid_arg->entries);
1853                 if (r)
1854                         goto out;
1855                 r = -EFAULT;
1856                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1857                         goto out;
1858                 r = 0;
1859                 break;
1860         }
1861         case KVM_GET_MSRS:
1862                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1863                 break;
1864         case KVM_SET_MSRS:
1865                 r = msr_io(vcpu, argp, do_set_msr, 0);
1866                 break;
1867         case KVM_TPR_ACCESS_REPORTING: {
1868                 struct kvm_tpr_access_ctl tac;
1869
1870                 r = -EFAULT;
1871                 if (copy_from_user(&tac, argp, sizeof tac))
1872                         goto out;
1873                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1874                 if (r)
1875                         goto out;
1876                 r = -EFAULT;
1877                 if (copy_to_user(argp, &tac, sizeof tac))
1878                         goto out;
1879                 r = 0;
1880                 break;
1881         };
1882         case KVM_SET_VAPIC_ADDR: {
1883                 struct kvm_vapic_addr va;
1884
1885                 r = -EINVAL;
1886                 if (!irqchip_in_kernel(vcpu->kvm))
1887                         goto out;
1888                 r = -EFAULT;
1889                 if (copy_from_user(&va, argp, sizeof va))
1890                         goto out;
1891                 r = 0;
1892                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1893                 break;
1894         }
1895         case KVM_X86_SETUP_MCE: {
1896                 u64 mcg_cap;
1897
1898                 r = -EFAULT;
1899                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
1900                         goto out;
1901                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
1902                 break;
1903         }
1904         case KVM_X86_SET_MCE: {
1905                 struct kvm_x86_mce mce;
1906
1907                 r = -EFAULT;
1908                 if (copy_from_user(&mce, argp, sizeof mce))
1909                         goto out;
1910                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
1911                 break;
1912         }
1913         default:
1914                 r = -EINVAL;
1915         }
1916 out:
1917         kfree(lapic);
1918         return r;
1919 }
1920
1921 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1922 {
1923         int ret;
1924
1925         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1926                 return -1;
1927         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1928         return ret;
1929 }
1930
1931 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
1932                                               u64 ident_addr)
1933 {
1934         kvm->arch.ept_identity_map_addr = ident_addr;
1935         return 0;
1936 }
1937
1938 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1939                                           u32 kvm_nr_mmu_pages)
1940 {
1941         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1942                 return -EINVAL;
1943
1944         down_write(&kvm->slots_lock);
1945         spin_lock(&kvm->mmu_lock);
1946
1947         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1948         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1949
1950         spin_unlock(&kvm->mmu_lock);
1951         up_write(&kvm->slots_lock);
1952         return 0;
1953 }
1954
1955 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1956 {
1957         return kvm->arch.n_alloc_mmu_pages;
1958 }
1959
1960 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1961 {
1962         int i;
1963         struct kvm_mem_alias *alias;
1964
1965         for (i = 0; i < kvm->arch.naliases; ++i) {
1966                 alias = &kvm->arch.aliases[i];
1967                 if (gfn >= alias->base_gfn
1968                     && gfn < alias->base_gfn + alias->npages)
1969                         return alias->target_gfn + gfn - alias->base_gfn;
1970         }
1971         return gfn;
1972 }
1973
1974 /*
1975  * Set a new alias region.  Aliases map a portion of physical memory into
1976  * another portion.  This is useful for memory windows, for example the PC
1977  * VGA region.
1978  */
1979 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1980                                          struct kvm_memory_alias *alias)
1981 {
1982         int r, n;
1983         struct kvm_mem_alias *p;
1984
1985         r = -EINVAL;
1986         /* General sanity checks */
1987         if (alias->memory_size & (PAGE_SIZE - 1))
1988                 goto out;
1989         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1990                 goto out;
1991         if (alias->slot >= KVM_ALIAS_SLOTS)
1992                 goto out;
1993         if (alias->guest_phys_addr + alias->memory_size
1994             < alias->guest_phys_addr)
1995                 goto out;
1996         if (alias->target_phys_addr + alias->memory_size
1997             < alias->target_phys_addr)
1998                 goto out;
1999
2000         down_write(&kvm->slots_lock);
2001         spin_lock(&kvm->mmu_lock);
2002
2003         p = &kvm->arch.aliases[alias->slot];
2004         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2005         p->npages = alias->memory_size >> PAGE_SHIFT;
2006         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2007
2008         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2009                 if (kvm->arch.aliases[n - 1].npages)
2010                         break;
2011         kvm->arch.naliases = n;
2012
2013         spin_unlock(&kvm->mmu_lock);
2014         kvm_mmu_zap_all(kvm);
2015
2016         up_write(&kvm->slots_lock);
2017
2018         return 0;
2019
2020 out:
2021         return r;
2022 }
2023
2024 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2025 {
2026         int r;
2027
2028         r = 0;
2029         switch (chip->chip_id) {
2030         case KVM_IRQCHIP_PIC_MASTER:
2031                 memcpy(&chip->chip.pic,
2032                         &pic_irqchip(kvm)->pics[0],
2033                         sizeof(struct kvm_pic_state));
2034                 break;
2035         case KVM_IRQCHIP_PIC_SLAVE:
2036                 memcpy(&chip->chip.pic,
2037                         &pic_irqchip(kvm)->pics[1],
2038                         sizeof(struct kvm_pic_state));
2039                 break;
2040         case KVM_IRQCHIP_IOAPIC:
2041                 memcpy(&chip->chip.ioapic,
2042                         ioapic_irqchip(kvm),
2043                         sizeof(struct kvm_ioapic_state));
2044                 break;
2045         default:
2046                 r = -EINVAL;
2047                 break;
2048         }
2049         return r;
2050 }
2051
2052 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2053 {
2054         int r;
2055
2056         r = 0;
2057         switch (chip->chip_id) {
2058         case KVM_IRQCHIP_PIC_MASTER:
2059                 spin_lock(&pic_irqchip(kvm)->lock);
2060                 memcpy(&pic_irqchip(kvm)->pics[0],
2061                         &chip->chip.pic,
2062                         sizeof(struct kvm_pic_state));
2063                 spin_unlock(&pic_irqchip(kvm)->lock);
2064                 break;
2065         case KVM_IRQCHIP_PIC_SLAVE:
2066                 spin_lock(&pic_irqchip(kvm)->lock);
2067                 memcpy(&pic_irqchip(kvm)->pics[1],
2068                         &chip->chip.pic,
2069                         sizeof(struct kvm_pic_state));
2070                 spin_unlock(&pic_irqchip(kvm)->lock);
2071                 break;
2072         case KVM_IRQCHIP_IOAPIC:
2073                 mutex_lock(&kvm->irq_lock);
2074                 memcpy(ioapic_irqchip(kvm),
2075                         &chip->chip.ioapic,
2076                         sizeof(struct kvm_ioapic_state));
2077                 mutex_unlock(&kvm->irq_lock);
2078                 break;
2079         default:
2080                 r = -EINVAL;
2081                 break;
2082         }
2083         kvm_pic_update_irq(pic_irqchip(kvm));
2084         return r;
2085 }
2086
2087 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2088 {
2089         int r = 0;
2090
2091         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2092         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2093         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2094         return r;
2095 }
2096
2097 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2098 {
2099         int r = 0;
2100
2101         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2102         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2103         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2104         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2105         return r;
2106 }
2107
2108 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2109 {
2110         int r = 0;
2111
2112         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2113         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2114                 sizeof(ps->channels));
2115         ps->flags = kvm->arch.vpit->pit_state.flags;
2116         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2117         return r;
2118 }
2119
2120 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2121 {
2122         int r = 0, start = 0;
2123         u32 prev_legacy, cur_legacy;
2124         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2125         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2126         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2127         if (!prev_legacy && cur_legacy)
2128                 start = 1;
2129         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2130                sizeof(kvm->arch.vpit->pit_state.channels));
2131         kvm->arch.vpit->pit_state.flags = ps->flags;
2132         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2133         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2134         return r;
2135 }
2136
2137 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2138                                  struct kvm_reinject_control *control)
2139 {
2140         if (!kvm->arch.vpit)
2141                 return -ENXIO;
2142         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2143         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2144         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2145         return 0;
2146 }
2147
2148 /*
2149  * Get (and clear) the dirty memory log for a memory slot.
2150  */
2151 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2152                                       struct kvm_dirty_log *log)
2153 {
2154         int r;
2155         int n;
2156         struct kvm_memory_slot *memslot;
2157         int is_dirty = 0;
2158
2159         down_write(&kvm->slots_lock);
2160
2161         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2162         if (r)
2163                 goto out;
2164
2165         /* If nothing is dirty, don't bother messing with page tables. */
2166         if (is_dirty) {
2167                 spin_lock(&kvm->mmu_lock);
2168                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2169                 spin_unlock(&kvm->mmu_lock);
2170                 memslot = &kvm->memslots[log->slot];
2171                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2172                 memset(memslot->dirty_bitmap, 0, n);
2173         }
2174         r = 0;
2175 out:
2176         up_write(&kvm->slots_lock);
2177         return r;
2178 }
2179
2180 long kvm_arch_vm_ioctl(struct file *filp,
2181                        unsigned int ioctl, unsigned long arg)
2182 {
2183         struct kvm *kvm = filp->private_data;
2184         void __user *argp = (void __user *)arg;
2185         int r = -EINVAL;
2186         /*
2187          * This union makes it completely explicit to gcc-3.x
2188          * that these two variables' stack usage should be
2189          * combined, not added together.
2190          */
2191         union {
2192                 struct kvm_pit_state ps;
2193                 struct kvm_pit_state2 ps2;
2194                 struct kvm_memory_alias alias;
2195                 struct kvm_pit_config pit_config;
2196         } u;
2197
2198         switch (ioctl) {
2199         case KVM_SET_TSS_ADDR:
2200                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2201                 if (r < 0)
2202                         goto out;
2203                 break;
2204         case KVM_SET_IDENTITY_MAP_ADDR: {
2205                 u64 ident_addr;
2206
2207                 r = -EFAULT;
2208                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2209                         goto out;
2210                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2211                 if (r < 0)
2212                         goto out;
2213                 break;
2214         }
2215         case KVM_SET_MEMORY_REGION: {
2216                 struct kvm_memory_region kvm_mem;
2217                 struct kvm_userspace_memory_region kvm_userspace_mem;
2218
2219                 r = -EFAULT;
2220                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2221                         goto out;
2222                 kvm_userspace_mem.slot = kvm_mem.slot;
2223                 kvm_userspace_mem.flags = kvm_mem.flags;
2224                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2225                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2226                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2227                 if (r)
2228                         goto out;
2229                 break;
2230         }
2231         case KVM_SET_NR_MMU_PAGES:
2232                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2233                 if (r)
2234                         goto out;
2235                 break;
2236         case KVM_GET_NR_MMU_PAGES:
2237                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2238                 break;
2239         case KVM_SET_MEMORY_ALIAS:
2240                 r = -EFAULT;
2241                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2242                         goto out;
2243                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2244                 if (r)
2245                         goto out;
2246                 break;
2247         case KVM_CREATE_IRQCHIP:
2248                 r = -ENOMEM;
2249                 kvm->arch.vpic = kvm_create_pic(kvm);
2250                 if (kvm->arch.vpic) {
2251                         r = kvm_ioapic_init(kvm);
2252                         if (r) {
2253                                 kfree(kvm->arch.vpic);
2254                                 kvm->arch.vpic = NULL;
2255                                 goto out;
2256                         }
2257                 } else
2258                         goto out;
2259                 r = kvm_setup_default_irq_routing(kvm);
2260                 if (r) {
2261                         kfree(kvm->arch.vpic);
2262                         kfree(kvm->arch.vioapic);
2263                         goto out;
2264                 }
2265                 break;
2266         case KVM_CREATE_PIT:
2267                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2268                 goto create_pit;
2269         case KVM_CREATE_PIT2:
2270                 r = -EFAULT;
2271                 if (copy_from_user(&u.pit_config, argp,
2272                                    sizeof(struct kvm_pit_config)))
2273                         goto out;
2274         create_pit:
2275                 down_write(&kvm->slots_lock);
2276                 r = -EEXIST;
2277                 if (kvm->arch.vpit)
2278                         goto create_pit_unlock;
2279                 r = -ENOMEM;
2280                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2281                 if (kvm->arch.vpit)
2282                         r = 0;
2283         create_pit_unlock:
2284                 up_write(&kvm->slots_lock);
2285                 break;
2286         case KVM_IRQ_LINE_STATUS:
2287         case KVM_IRQ_LINE: {
2288                 struct kvm_irq_level irq_event;
2289
2290                 r = -EFAULT;
2291                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2292                         goto out;
2293                 if (irqchip_in_kernel(kvm)) {
2294                         __s32 status;
2295                         mutex_lock(&kvm->irq_lock);
2296                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2297                                         irq_event.irq, irq_event.level);
2298                         mutex_unlock(&kvm->irq_lock);
2299                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2300                                 irq_event.status = status;
2301                                 if (copy_to_user(argp, &irq_event,
2302                                                         sizeof irq_event))
2303                                         goto out;
2304                         }
2305                         r = 0;
2306                 }
2307                 break;
2308         }
2309         case KVM_GET_IRQCHIP: {
2310                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2311                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2312
2313                 r = -ENOMEM;
2314                 if (!chip)
2315                         goto out;
2316                 r = -EFAULT;
2317                 if (copy_from_user(chip, argp, sizeof *chip))
2318                         goto get_irqchip_out;
2319                 r = -ENXIO;
2320                 if (!irqchip_in_kernel(kvm))
2321                         goto get_irqchip_out;
2322                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2323                 if (r)
2324                         goto get_irqchip_out;
2325                 r = -EFAULT;
2326                 if (copy_to_user(argp, chip, sizeof *chip))
2327                         goto get_irqchip_out;
2328                 r = 0;
2329         get_irqchip_out:
2330                 kfree(chip);
2331                 if (r)
2332                         goto out;
2333                 break;
2334         }
2335         case KVM_SET_IRQCHIP: {
2336                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2337                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2338
2339                 r = -ENOMEM;
2340                 if (!chip)
2341                         goto out;
2342                 r = -EFAULT;
2343                 if (copy_from_user(chip, argp, sizeof *chip))
2344                         goto set_irqchip_out;
2345                 r = -ENXIO;
2346                 if (!irqchip_in_kernel(kvm))
2347                         goto set_irqchip_out;
2348                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2349                 if (r)
2350                         goto set_irqchip_out;
2351                 r = 0;
2352         set_irqchip_out:
2353                 kfree(chip);
2354                 if (r)
2355                         goto out;
2356                 break;
2357         }
2358         case KVM_GET_PIT: {
2359                 r = -EFAULT;
2360                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2361                         goto out;
2362                 r = -ENXIO;
2363                 if (!kvm->arch.vpit)
2364                         goto out;
2365                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2366                 if (r)
2367                         goto out;
2368                 r = -EFAULT;
2369                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2370                         goto out;
2371                 r = 0;
2372                 break;
2373         }
2374         case KVM_SET_PIT: {
2375                 r = -EFAULT;
2376                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2377                         goto out;
2378                 r = -ENXIO;
2379                 if (!kvm->arch.vpit)
2380                         goto out;
2381                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2382                 if (r)
2383                         goto out;
2384                 r = 0;
2385                 break;
2386         }
2387         case KVM_GET_PIT2: {
2388                 r = -ENXIO;
2389                 if (!kvm->arch.vpit)
2390                         goto out;
2391                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2392                 if (r)
2393                         goto out;
2394                 r = -EFAULT;
2395                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2396                         goto out;
2397                 r = 0;
2398                 break;
2399         }
2400         case KVM_SET_PIT2: {
2401                 r = -EFAULT;
2402                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2403                         goto out;
2404                 r = -ENXIO;
2405                 if (!kvm->arch.vpit)
2406                         goto out;
2407                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2408                 if (r)
2409                         goto out;
2410                 r = 0;
2411                 break;
2412         }
2413         case KVM_REINJECT_CONTROL: {
2414                 struct kvm_reinject_control control;
2415                 r =  -EFAULT;
2416                 if (copy_from_user(&control, argp, sizeof(control)))
2417                         goto out;
2418                 r = kvm_vm_ioctl_reinject(kvm, &control);
2419                 if (r)
2420                         goto out;
2421                 r = 0;
2422                 break;
2423         }
2424         default:
2425                 ;
2426         }
2427 out:
2428         return r;
2429 }
2430
2431 static void kvm_init_msr_list(void)
2432 {
2433         u32 dummy[2];
2434         unsigned i, j;
2435
2436         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2437                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2438                         continue;
2439                 if (j < i)
2440                         msrs_to_save[j] = msrs_to_save[i];
2441                 j++;
2442         }
2443         num_msrs_to_save = j;
2444 }
2445
2446 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2447                            const void *v)
2448 {
2449         if (vcpu->arch.apic &&
2450             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2451                 return 0;
2452
2453         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2454 }
2455
2456 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2457 {
2458         if (vcpu->arch.apic &&
2459             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2460                 return 0;
2461
2462         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2463 }
2464
2465 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2466                                struct kvm_vcpu *vcpu)
2467 {
2468         void *data = val;
2469         int r = X86EMUL_CONTINUE;
2470
2471         while (bytes) {
2472                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2473                 unsigned offset = addr & (PAGE_SIZE-1);
2474                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2475                 int ret;
2476
2477                 if (gpa == UNMAPPED_GVA) {
2478                         r = X86EMUL_PROPAGATE_FAULT;
2479                         goto out;
2480                 }
2481                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2482                 if (ret < 0) {
2483                         r = X86EMUL_UNHANDLEABLE;
2484                         goto out;
2485                 }
2486
2487                 bytes -= toread;
2488                 data += toread;
2489                 addr += toread;
2490         }
2491 out:
2492         return r;
2493 }
2494
2495 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2496                                 struct kvm_vcpu *vcpu)
2497 {
2498         void *data = val;
2499         int r = X86EMUL_CONTINUE;
2500
2501         while (bytes) {
2502                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2503                 unsigned offset = addr & (PAGE_SIZE-1);
2504                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2505                 int ret;
2506
2507                 if (gpa == UNMAPPED_GVA) {
2508                         r = X86EMUL_PROPAGATE_FAULT;
2509                         goto out;
2510                 }
2511                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2512                 if (ret < 0) {
2513                         r = X86EMUL_UNHANDLEABLE;
2514                         goto out;
2515                 }
2516
2517                 bytes -= towrite;
2518                 data += towrite;
2519                 addr += towrite;
2520         }
2521 out:
2522         return r;
2523 }
2524
2525
2526 static int emulator_read_emulated(unsigned long addr,
2527                                   void *val,
2528                                   unsigned int bytes,
2529                                   struct kvm_vcpu *vcpu)
2530 {
2531         gpa_t                 gpa;
2532
2533         if (vcpu->mmio_read_completed) {
2534                 memcpy(val, vcpu->mmio_data, bytes);
2535                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2536                                vcpu->mmio_phys_addr, *(u64 *)val);
2537                 vcpu->mmio_read_completed = 0;
2538                 return X86EMUL_CONTINUE;
2539         }
2540
2541         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2542
2543         /* For APIC access vmexit */
2544         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2545                 goto mmio;
2546
2547         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2548                                 == X86EMUL_CONTINUE)
2549                 return X86EMUL_CONTINUE;
2550         if (gpa == UNMAPPED_GVA)
2551                 return X86EMUL_PROPAGATE_FAULT;
2552
2553 mmio:
2554         /*
2555          * Is this MMIO handled locally?
2556          */
2557         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2558                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2559                 return X86EMUL_CONTINUE;
2560         }
2561
2562         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2563
2564         vcpu->mmio_needed = 1;
2565         vcpu->mmio_phys_addr = gpa;
2566         vcpu->mmio_size = bytes;
2567         vcpu->mmio_is_write = 0;
2568
2569         return X86EMUL_UNHANDLEABLE;
2570 }
2571
2572 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2573                           const void *val, int bytes)
2574 {
2575         int ret;
2576
2577         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2578         if (ret < 0)
2579                 return 0;
2580         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2581         return 1;
2582 }
2583
2584 static int emulator_write_emulated_onepage(unsigned long addr,
2585                                            const void *val,
2586                                            unsigned int bytes,
2587                                            struct kvm_vcpu *vcpu)
2588 {
2589         gpa_t                 gpa;
2590
2591         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2592
2593         if (gpa == UNMAPPED_GVA) {
2594                 kvm_inject_page_fault(vcpu, addr, 2);
2595                 return X86EMUL_PROPAGATE_FAULT;
2596         }
2597
2598         /* For APIC access vmexit */
2599         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2600                 goto mmio;
2601
2602         if (emulator_write_phys(vcpu, gpa, val, bytes))
2603                 return X86EMUL_CONTINUE;
2604
2605 mmio:
2606         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2607         /*
2608          * Is this MMIO handled locally?
2609          */
2610         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2611                 return X86EMUL_CONTINUE;
2612
2613         vcpu->mmio_needed = 1;
2614         vcpu->mmio_phys_addr = gpa;
2615         vcpu->mmio_size = bytes;
2616         vcpu->mmio_is_write = 1;
2617         memcpy(vcpu->mmio_data, val, bytes);
2618
2619         return X86EMUL_CONTINUE;
2620 }
2621
2622 int emulator_write_emulated(unsigned long addr,
2623                                    const void *val,
2624                                    unsigned int bytes,
2625                                    struct kvm_vcpu *vcpu)
2626 {
2627         /* Crossing a page boundary? */
2628         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2629                 int rc, now;
2630
2631                 now = -addr & ~PAGE_MASK;
2632                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2633                 if (rc != X86EMUL_CONTINUE)
2634                         return rc;
2635                 addr += now;
2636                 val += now;
2637                 bytes -= now;
2638         }
2639         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2640 }
2641 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2642
2643 static int emulator_cmpxchg_emulated(unsigned long addr,
2644                                      const void *old,
2645                                      const void *new,
2646                                      unsigned int bytes,
2647                                      struct kvm_vcpu *vcpu)
2648 {
2649         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
2650 #ifndef CONFIG_X86_64
2651         /* guests cmpxchg8b have to be emulated atomically */
2652         if (bytes == 8) {
2653                 gpa_t gpa;
2654                 struct page *page;
2655                 char *kaddr;
2656                 u64 val;
2657
2658                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2659
2660                 if (gpa == UNMAPPED_GVA ||
2661                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2662                         goto emul_write;
2663
2664                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2665                         goto emul_write;
2666
2667                 val = *(u64 *)new;
2668
2669                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2670
2671                 kaddr = kmap_atomic(page, KM_USER0);
2672                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2673                 kunmap_atomic(kaddr, KM_USER0);
2674                 kvm_release_page_dirty(page);
2675         }
2676 emul_write:
2677 #endif
2678
2679         return emulator_write_emulated(addr, new, bytes, vcpu);
2680 }
2681
2682 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2683 {
2684         return kvm_x86_ops->get_segment_base(vcpu, seg);
2685 }
2686
2687 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2688 {
2689         kvm_mmu_invlpg(vcpu, address);
2690         return X86EMUL_CONTINUE;
2691 }
2692
2693 int emulate_clts(struct kvm_vcpu *vcpu)
2694 {
2695         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2696         return X86EMUL_CONTINUE;
2697 }
2698
2699 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2700 {
2701         struct kvm_vcpu *vcpu = ctxt->vcpu;
2702
2703         switch (dr) {
2704         case 0 ... 3:
2705                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2706                 return X86EMUL_CONTINUE;
2707         default:
2708                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2709                 return X86EMUL_UNHANDLEABLE;
2710         }
2711 }
2712
2713 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2714 {
2715         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2716         int exception;
2717
2718         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2719         if (exception) {
2720                 /* FIXME: better handling */
2721                 return X86EMUL_UNHANDLEABLE;
2722         }
2723         return X86EMUL_CONTINUE;
2724 }
2725
2726 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2727 {
2728         u8 opcodes[4];
2729         unsigned long rip = kvm_rip_read(vcpu);
2730         unsigned long rip_linear;
2731
2732         if (!printk_ratelimit())
2733                 return;
2734
2735         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2736
2737         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2738
2739         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2740                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2741 }
2742 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2743
2744 static struct x86_emulate_ops emulate_ops = {
2745         .read_std            = kvm_read_guest_virt,
2746         .read_emulated       = emulator_read_emulated,
2747         .write_emulated      = emulator_write_emulated,
2748         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2749 };
2750
2751 static void cache_all_regs(struct kvm_vcpu *vcpu)
2752 {
2753         kvm_register_read(vcpu, VCPU_REGS_RAX);
2754         kvm_register_read(vcpu, VCPU_REGS_RSP);
2755         kvm_register_read(vcpu, VCPU_REGS_RIP);
2756         vcpu->arch.regs_dirty = ~0;
2757 }
2758
2759 int emulate_instruction(struct kvm_vcpu *vcpu,
2760                         unsigned long cr2,
2761                         u16 error_code,
2762                         int emulation_type)
2763 {
2764         int r, shadow_mask;
2765         struct decode_cache *c;
2766         struct kvm_run *run = vcpu->run;
2767
2768         kvm_clear_exception_queue(vcpu);
2769         vcpu->arch.mmio_fault_cr2 = cr2;
2770         /*
2771          * TODO: fix emulate.c to use guest_read/write_register
2772          * instead of direct ->regs accesses, can save hundred cycles
2773          * on Intel for instructions that don't read/change RSP, for
2774          * for example.
2775          */
2776         cache_all_regs(vcpu);
2777
2778         vcpu->mmio_is_write = 0;
2779         vcpu->arch.pio.string = 0;
2780
2781         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2782                 int cs_db, cs_l;
2783                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2784
2785                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2786                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2787                 vcpu->arch.emulate_ctxt.mode =
2788                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2789                         ? X86EMUL_MODE_REAL : cs_l
2790                         ? X86EMUL_MODE_PROT64 : cs_db
2791                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2792
2793                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2794
2795                 /* Only allow emulation of specific instructions on #UD
2796                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
2797                 c = &vcpu->arch.emulate_ctxt.decode;
2798                 if (emulation_type & EMULTYPE_TRAP_UD) {
2799                         if (!c->twobyte)
2800                                 return EMULATE_FAIL;
2801                         switch (c->b) {
2802                         case 0x01: /* VMMCALL */
2803                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
2804                                         return EMULATE_FAIL;
2805                                 break;
2806                         case 0x34: /* sysenter */
2807                         case 0x35: /* sysexit */
2808                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2809                                         return EMULATE_FAIL;
2810                                 break;
2811                         case 0x05: /* syscall */
2812                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
2813                                         return EMULATE_FAIL;
2814                                 break;
2815                         default:
2816                                 return EMULATE_FAIL;
2817                         }
2818
2819                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
2820                                 return EMULATE_FAIL;
2821                 }
2822
2823                 ++vcpu->stat.insn_emulation;
2824                 if (r)  {
2825                         ++vcpu->stat.insn_emulation_fail;
2826                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2827                                 return EMULATE_DONE;
2828                         return EMULATE_FAIL;
2829                 }
2830         }
2831
2832         if (emulation_type & EMULTYPE_SKIP) {
2833                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2834                 return EMULATE_DONE;
2835         }
2836
2837         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2838         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2839
2840         if (r == 0)
2841                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2842
2843         if (vcpu->arch.pio.string)
2844                 return EMULATE_DO_MMIO;
2845
2846         if ((r || vcpu->mmio_is_write) && run) {
2847                 run->exit_reason = KVM_EXIT_MMIO;
2848                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2849                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2850                 run->mmio.len = vcpu->mmio_size;
2851                 run->mmio.is_write = vcpu->mmio_is_write;
2852         }
2853
2854         if (r) {
2855                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2856                         return EMULATE_DONE;
2857                 if (!vcpu->mmio_needed) {
2858                         kvm_report_emulation_failure(vcpu, "mmio");
2859                         return EMULATE_FAIL;
2860                 }
2861                 return EMULATE_DO_MMIO;
2862         }
2863
2864         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2865
2866         if (vcpu->mmio_is_write) {
2867                 vcpu->mmio_needed = 0;
2868                 return EMULATE_DO_MMIO;
2869         }
2870
2871         return EMULATE_DONE;
2872 }
2873 EXPORT_SYMBOL_GPL(emulate_instruction);
2874
2875 static int pio_copy_data(struct kvm_vcpu *vcpu)
2876 {
2877         void *p = vcpu->arch.pio_data;
2878         gva_t q = vcpu->arch.pio.guest_gva;
2879         unsigned bytes;
2880         int ret;
2881
2882         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2883         if (vcpu->arch.pio.in)
2884                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2885         else
2886                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2887         return ret;
2888 }
2889
2890 int complete_pio(struct kvm_vcpu *vcpu)
2891 {
2892         struct kvm_pio_request *io = &vcpu->arch.pio;
2893         long delta;
2894         int r;
2895         unsigned long val;
2896
2897         if (!io->string) {
2898                 if (io->in) {
2899                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2900                         memcpy(&val, vcpu->arch.pio_data, io->size);
2901                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2902                 }
2903         } else {
2904                 if (io->in) {
2905                         r = pio_copy_data(vcpu);
2906                         if (r)
2907                                 return r;
2908                 }
2909
2910                 delta = 1;
2911                 if (io->rep) {
2912                         delta *= io->cur_count;
2913                         /*
2914                          * The size of the register should really depend on
2915                          * current address size.
2916                          */
2917                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2918                         val -= delta;
2919                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2920                 }
2921                 if (io->down)
2922                         delta = -delta;
2923                 delta *= io->size;
2924                 if (io->in) {
2925                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2926                         val += delta;
2927                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2928                 } else {
2929                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2930                         val += delta;
2931                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2932                 }
2933         }
2934
2935         io->count -= io->cur_count;
2936         io->cur_count = 0;
2937
2938         return 0;
2939 }
2940
2941 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
2942 {
2943         /* TODO: String I/O for in kernel device */
2944         int r;
2945
2946         if (vcpu->arch.pio.in)
2947                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2948                                     vcpu->arch.pio.size, pd);
2949         else
2950                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
2951                                      vcpu->arch.pio.size, pd);
2952         return r;
2953 }
2954
2955 static int pio_string_write(struct kvm_vcpu *vcpu)
2956 {
2957         struct kvm_pio_request *io = &vcpu->arch.pio;
2958         void *pd = vcpu->arch.pio_data;
2959         int i, r = 0;
2960
2961         for (i = 0; i < io->cur_count; i++) {
2962                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
2963                                      io->port, io->size, pd)) {
2964                         r = -EOPNOTSUPP;
2965                         break;
2966                 }
2967                 pd += io->size;
2968         }
2969         return r;
2970 }
2971
2972 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
2973 {
2974         unsigned long val;
2975
2976         vcpu->run->exit_reason = KVM_EXIT_IO;
2977         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2978         vcpu->run->io.size = vcpu->arch.pio.size = size;
2979         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2980         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2981         vcpu->run->io.port = vcpu->arch.pio.port = port;
2982         vcpu->arch.pio.in = in;
2983         vcpu->arch.pio.string = 0;
2984         vcpu->arch.pio.down = 0;
2985         vcpu->arch.pio.rep = 0;
2986
2987         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
2988                       size, 1);
2989
2990         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2991         memcpy(vcpu->arch.pio_data, &val, 4);
2992
2993         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
2994                 complete_pio(vcpu);
2995                 return 1;
2996         }
2997         return 0;
2998 }
2999 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3000
3001 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3002                   int size, unsigned long count, int down,
3003                   gva_t address, int rep, unsigned port)
3004 {
3005         unsigned now, in_page;
3006         int ret = 0;
3007
3008         vcpu->run->exit_reason = KVM_EXIT_IO;
3009         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3010         vcpu->run->io.size = vcpu->arch.pio.size = size;
3011         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3012         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3013         vcpu->run->io.port = vcpu->arch.pio.port = port;
3014         vcpu->arch.pio.in = in;
3015         vcpu->arch.pio.string = 1;
3016         vcpu->arch.pio.down = down;
3017         vcpu->arch.pio.rep = rep;
3018
3019         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3020                       size, count);
3021
3022         if (!count) {
3023                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3024                 return 1;
3025         }
3026
3027         if (!down)
3028                 in_page = PAGE_SIZE - offset_in_page(address);
3029         else
3030                 in_page = offset_in_page(address) + size;
3031         now = min(count, (unsigned long)in_page / size);
3032         if (!now)
3033                 now = 1;
3034         if (down) {
3035                 /*
3036                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3037                  */
3038                 pr_unimpl(vcpu, "guest string pio down\n");
3039                 kvm_inject_gp(vcpu, 0);
3040                 return 1;
3041         }
3042         vcpu->run->io.count = now;
3043         vcpu->arch.pio.cur_count = now;
3044
3045         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3046                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3047
3048         vcpu->arch.pio.guest_gva = address;
3049
3050         if (!vcpu->arch.pio.in) {
3051                 /* string PIO write */
3052                 ret = pio_copy_data(vcpu);
3053                 if (ret == X86EMUL_PROPAGATE_FAULT) {
3054                         kvm_inject_gp(vcpu, 0);
3055                         return 1;
3056                 }
3057                 if (ret == 0 && !pio_string_write(vcpu)) {
3058                         complete_pio(vcpu);
3059                         if (vcpu->arch.pio.count == 0)
3060                                 ret = 1;
3061                 }
3062         }
3063         /* no string PIO read support yet */
3064
3065         return ret;
3066 }
3067 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3068
3069 static void bounce_off(void *info)
3070 {
3071         /* nothing */
3072 }
3073
3074 static unsigned int  ref_freq;
3075 static unsigned long tsc_khz_ref;
3076
3077 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3078                                      void *data)
3079 {
3080         struct cpufreq_freqs *freq = data;
3081         struct kvm *kvm;
3082         struct kvm_vcpu *vcpu;
3083         int i, send_ipi = 0;
3084
3085         if (!ref_freq)
3086                 ref_freq = freq->old;
3087
3088         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3089                 return 0;
3090         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3091                 return 0;
3092         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
3093
3094         spin_lock(&kvm_lock);
3095         list_for_each_entry(kvm, &vm_list, vm_list) {
3096                 kvm_for_each_vcpu(i, vcpu, kvm) {
3097                         if (vcpu->cpu != freq->cpu)
3098                                 continue;
3099                         if (!kvm_request_guest_time_update(vcpu))
3100                                 continue;
3101                         if (vcpu->cpu != smp_processor_id())
3102                                 send_ipi++;
3103                 }
3104         }
3105         spin_unlock(&kvm_lock);
3106
3107         if (freq->old < freq->new && send_ipi) {
3108                 /*
3109                  * We upscale the frequency.  Must make the guest
3110                  * doesn't see old kvmclock values while running with
3111                  * the new frequency, otherwise we risk the guest sees
3112                  * time go backwards.
3113                  *
3114                  * In case we update the frequency for another cpu
3115                  * (which might be in guest context) send an interrupt
3116                  * to kick the cpu out of guest context.  Next time
3117                  * guest context is entered kvmclock will be updated,
3118                  * so the guest will not see stale values.
3119                  */
3120                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3121         }
3122         return 0;
3123 }
3124
3125 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3126         .notifier_call  = kvmclock_cpufreq_notifier
3127 };
3128
3129 int kvm_arch_init(void *opaque)
3130 {
3131         int r, cpu;
3132         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3133
3134         if (kvm_x86_ops) {
3135                 printk(KERN_ERR "kvm: already loaded the other module\n");
3136                 r = -EEXIST;
3137                 goto out;
3138         }
3139
3140         if (!ops->cpu_has_kvm_support()) {
3141                 printk(KERN_ERR "kvm: no hardware support\n");
3142                 r = -EOPNOTSUPP;
3143                 goto out;
3144         }
3145         if (ops->disabled_by_bios()) {
3146                 printk(KERN_ERR "kvm: disabled by bios\n");
3147                 r = -EOPNOTSUPP;
3148                 goto out;
3149         }
3150
3151         r = kvm_mmu_module_init();
3152         if (r)
3153                 goto out;
3154
3155         kvm_init_msr_list();
3156
3157         kvm_x86_ops = ops;
3158         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3159         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3160         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3161                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3162
3163         for_each_possible_cpu(cpu)
3164                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3165         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3166                 tsc_khz_ref = tsc_khz;
3167                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3168                                           CPUFREQ_TRANSITION_NOTIFIER);
3169         }
3170
3171         return 0;
3172
3173 out:
3174         return r;
3175 }
3176
3177 void kvm_arch_exit(void)
3178 {
3179         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3180                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3181                                             CPUFREQ_TRANSITION_NOTIFIER);
3182         kvm_x86_ops = NULL;
3183         kvm_mmu_module_exit();
3184 }
3185
3186 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3187 {
3188         ++vcpu->stat.halt_exits;
3189         if (irqchip_in_kernel(vcpu->kvm)) {
3190                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3191                 return 1;
3192         } else {
3193                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3194                 return 0;
3195         }
3196 }
3197 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3198
3199 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3200                            unsigned long a1)
3201 {
3202         if (is_long_mode(vcpu))
3203                 return a0;
3204         else
3205                 return a0 | ((gpa_t)a1 << 32);
3206 }
3207
3208 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3209 {
3210         unsigned long nr, a0, a1, a2, a3, ret;
3211         int r = 1;
3212
3213         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3214         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3215         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3216         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3217         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3218
3219         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3220
3221         if (!is_long_mode(vcpu)) {
3222                 nr &= 0xFFFFFFFF;
3223                 a0 &= 0xFFFFFFFF;
3224                 a1 &= 0xFFFFFFFF;
3225                 a2 &= 0xFFFFFFFF;
3226                 a3 &= 0xFFFFFFFF;
3227         }
3228
3229         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3230                 ret = -KVM_EPERM;
3231                 goto out;
3232         }
3233
3234         switch (nr) {
3235         case KVM_HC_VAPIC_POLL_IRQ:
3236                 ret = 0;
3237                 break;
3238         case KVM_HC_MMU_OP:
3239                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3240                 break;
3241         default:
3242                 ret = -KVM_ENOSYS;
3243                 break;
3244         }
3245 out:
3246         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3247         ++vcpu->stat.hypercalls;
3248         return r;
3249 }
3250 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3251
3252 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3253 {
3254         char instruction[3];
3255         int ret = 0;
3256         unsigned long rip = kvm_rip_read(vcpu);
3257
3258
3259         /*
3260          * Blow out the MMU to ensure that no other VCPU has an active mapping
3261          * to ensure that the updated hypercall appears atomically across all
3262          * VCPUs.
3263          */
3264         kvm_mmu_zap_all(vcpu->kvm);
3265
3266         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3267         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3268             != X86EMUL_CONTINUE)
3269                 ret = -EFAULT;
3270
3271         return ret;
3272 }
3273
3274 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3275 {
3276         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3277 }
3278
3279 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3280 {
3281         struct descriptor_table dt = { limit, base };
3282
3283         kvm_x86_ops->set_gdt(vcpu, &dt);
3284 }
3285
3286 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3287 {
3288         struct descriptor_table dt = { limit, base };
3289
3290         kvm_x86_ops->set_idt(vcpu, &dt);
3291 }
3292
3293 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3294                    unsigned long *rflags)
3295 {
3296         kvm_lmsw(vcpu, msw);
3297         *rflags = kvm_x86_ops->get_rflags(vcpu);
3298 }
3299
3300 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3301 {
3302         unsigned long value;
3303
3304         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3305         switch (cr) {
3306         case 0:
3307                 value = vcpu->arch.cr0;
3308                 break;
3309         case 2:
3310                 value = vcpu->arch.cr2;
3311                 break;
3312         case 3:
3313                 value = vcpu->arch.cr3;
3314                 break;
3315         case 4:
3316                 value = vcpu->arch.cr4;
3317                 break;
3318         case 8:
3319                 value = kvm_get_cr8(vcpu);
3320                 break;
3321         default:
3322                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3323                 return 0;
3324         }
3325
3326         return value;
3327 }
3328
3329 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3330                      unsigned long *rflags)
3331 {
3332         switch (cr) {
3333         case 0:
3334                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3335                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3336                 break;
3337         case 2:
3338                 vcpu->arch.cr2 = val;
3339                 break;
3340         case 3:
3341                 kvm_set_cr3(vcpu, val);
3342                 break;
3343         case 4:
3344                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3345                 break;
3346         case 8:
3347                 kvm_set_cr8(vcpu, val & 0xfUL);
3348                 break;
3349         default:
3350                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3351         }
3352 }
3353
3354 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3355 {
3356         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3357         int j, nent = vcpu->arch.cpuid_nent;
3358
3359         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3360         /* when no next entry is found, the current entry[i] is reselected */
3361         for (j = i + 1; ; j = (j + 1) % nent) {
3362                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3363                 if (ej->function == e->function) {
3364                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3365                         return j;
3366                 }
3367         }
3368         return 0; /* silence gcc, even though control never reaches here */
3369 }
3370
3371 /* find an entry with matching function, matching index (if needed), and that
3372  * should be read next (if it's stateful) */
3373 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3374         u32 function, u32 index)
3375 {
3376         if (e->function != function)
3377                 return 0;
3378         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3379                 return 0;
3380         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3381             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3382                 return 0;
3383         return 1;
3384 }
3385
3386 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3387                                               u32 function, u32 index)
3388 {
3389         int i;
3390         struct kvm_cpuid_entry2 *best = NULL;
3391
3392         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3393                 struct kvm_cpuid_entry2 *e;
3394
3395                 e = &vcpu->arch.cpuid_entries[i];
3396                 if (is_matching_cpuid_entry(e, function, index)) {
3397                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3398                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3399                         best = e;
3400                         break;
3401                 }
3402                 /*
3403                  * Both basic or both extended?
3404                  */
3405                 if (((e->function ^ function) & 0x80000000) == 0)
3406                         if (!best || e->function > best->function)
3407                                 best = e;
3408         }
3409         return best;
3410 }
3411
3412 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3413 {
3414         struct kvm_cpuid_entry2 *best;
3415
3416         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3417         if (best)
3418                 return best->eax & 0xff;
3419         return 36;
3420 }
3421
3422 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3423 {
3424         u32 function, index;
3425         struct kvm_cpuid_entry2 *best;
3426
3427         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3428         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3429         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3430         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3431         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3432         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3433         best = kvm_find_cpuid_entry(vcpu, function, index);
3434         if (best) {
3435                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3436                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3437                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3438                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3439         }
3440         kvm_x86_ops->skip_emulated_instruction(vcpu);
3441         trace_kvm_cpuid(function,
3442                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3443                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3444                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3445                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3446 }
3447 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3448
3449 /*
3450  * Check if userspace requested an interrupt window, and that the
3451  * interrupt window is open.
3452  *
3453  * No need to exit to userspace if we already have an interrupt queued.
3454  */
3455 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
3456 {
3457         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3458                 vcpu->run->request_interrupt_window &&
3459                 kvm_arch_interrupt_allowed(vcpu));
3460 }
3461
3462 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
3463 {
3464         struct kvm_run *kvm_run = vcpu->run;
3465
3466         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3467         kvm_run->cr8 = kvm_get_cr8(vcpu);
3468         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3469         if (irqchip_in_kernel(vcpu->kvm))
3470                 kvm_run->ready_for_interrupt_injection = 1;
3471         else
3472                 kvm_run->ready_for_interrupt_injection =
3473                         kvm_arch_interrupt_allowed(vcpu) &&
3474                         !kvm_cpu_has_interrupt(vcpu) &&
3475                         !kvm_event_needs_reinjection(vcpu);
3476 }
3477
3478 static void vapic_enter(struct kvm_vcpu *vcpu)
3479 {
3480         struct kvm_lapic *apic = vcpu->arch.apic;
3481         struct page *page;
3482
3483         if (!apic || !apic->vapic_addr)
3484                 return;
3485
3486         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3487
3488         vcpu->arch.apic->vapic_page = page;
3489 }
3490
3491 static void vapic_exit(struct kvm_vcpu *vcpu)
3492 {
3493         struct kvm_lapic *apic = vcpu->arch.apic;
3494
3495         if (!apic || !apic->vapic_addr)
3496                 return;
3497
3498         down_read(&vcpu->kvm->slots_lock);
3499         kvm_release_page_dirty(apic->vapic_page);
3500         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3501         up_read(&vcpu->kvm->slots_lock);
3502 }
3503
3504 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3505 {
3506         int max_irr, tpr;
3507
3508         if (!kvm_x86_ops->update_cr8_intercept)
3509                 return;
3510
3511         if (!vcpu->arch.apic)
3512                 return;
3513
3514         if (!vcpu->arch.apic->vapic_addr)
3515                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3516         else
3517                 max_irr = -1;
3518
3519         if (max_irr != -1)
3520                 max_irr >>= 4;
3521
3522         tpr = kvm_lapic_get_cr8(vcpu);
3523
3524         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3525 }
3526
3527 static void inject_pending_event(struct kvm_vcpu *vcpu)
3528 {
3529         /* try to reinject previous events if any */
3530         if (vcpu->arch.exception.pending) {
3531                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3532                                           vcpu->arch.exception.has_error_code,
3533                                           vcpu->arch.exception.error_code);
3534                 return;
3535         }
3536
3537         if (vcpu->arch.nmi_injected) {
3538                 kvm_x86_ops->set_nmi(vcpu);
3539                 return;
3540         }
3541
3542         if (vcpu->arch.interrupt.pending) {
3543                 kvm_x86_ops->set_irq(vcpu);
3544                 return;
3545         }
3546
3547         /* try to inject new event if pending */
3548         if (vcpu->arch.nmi_pending) {
3549                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3550                         vcpu->arch.nmi_pending = false;
3551                         vcpu->arch.nmi_injected = true;
3552                         kvm_x86_ops->set_nmi(vcpu);
3553                 }
3554         } else if (kvm_cpu_has_interrupt(vcpu)) {
3555                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3556                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3557                                             false);
3558                         kvm_x86_ops->set_irq(vcpu);
3559                 }
3560         }
3561 }
3562
3563 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
3564 {
3565         int r;
3566         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3567                 vcpu->run->request_interrupt_window;
3568
3569         if (vcpu->requests)
3570                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3571                         kvm_mmu_unload(vcpu);
3572
3573         r = kvm_mmu_reload(vcpu);
3574         if (unlikely(r))
3575                 goto out;
3576
3577         if (vcpu->requests) {
3578                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3579                         __kvm_migrate_timers(vcpu);
3580                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3581                         kvm_write_guest_time(vcpu);
3582                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3583                         kvm_mmu_sync_roots(vcpu);
3584                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3585                         kvm_x86_ops->tlb_flush(vcpu);
3586                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3587                                        &vcpu->requests)) {
3588                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
3589                         r = 0;
3590                         goto out;
3591                 }
3592                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3593                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
3594                         r = 0;
3595                         goto out;
3596                 }
3597         }
3598
3599         preempt_disable();
3600
3601         kvm_x86_ops->prepare_guest_switch(vcpu);
3602         kvm_load_guest_fpu(vcpu);
3603
3604         local_irq_disable();
3605
3606         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3607         smp_mb__after_clear_bit();
3608
3609         if (vcpu->requests || need_resched() || signal_pending(current)) {
3610                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3611                 local_irq_enable();
3612                 preempt_enable();
3613                 r = 1;
3614                 goto out;
3615         }
3616
3617         inject_pending_event(vcpu);
3618
3619         /* enable NMI/IRQ window open exits if needed */
3620         if (vcpu->arch.nmi_pending)
3621                 kvm_x86_ops->enable_nmi_window(vcpu);
3622         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3623                 kvm_x86_ops->enable_irq_window(vcpu);
3624
3625         if (kvm_lapic_enabled(vcpu)) {
3626                 update_cr8_intercept(vcpu);
3627                 kvm_lapic_sync_to_vapic(vcpu);
3628         }
3629
3630         up_read(&vcpu->kvm->slots_lock);
3631
3632         kvm_guest_enter();
3633
3634         if (unlikely(vcpu->arch.switch_db_regs)) {
3635                 set_debugreg(0, 7);
3636                 set_debugreg(vcpu->arch.eff_db[0], 0);
3637                 set_debugreg(vcpu->arch.eff_db[1], 1);
3638                 set_debugreg(vcpu->arch.eff_db[2], 2);
3639                 set_debugreg(vcpu->arch.eff_db[3], 3);
3640         }
3641
3642         trace_kvm_entry(vcpu->vcpu_id);
3643         kvm_x86_ops->run(vcpu);
3644
3645         if (unlikely(vcpu->arch.switch_db_regs || test_thread_flag(TIF_DEBUG))) {
3646                 set_debugreg(current->thread.debugreg0, 0);
3647                 set_debugreg(current->thread.debugreg1, 1);
3648                 set_debugreg(current->thread.debugreg2, 2);
3649                 set_debugreg(current->thread.debugreg3, 3);
3650                 set_debugreg(current->thread.debugreg6, 6);
3651                 set_debugreg(current->thread.debugreg7, 7);
3652         }
3653
3654         set_bit(KVM_REQ_KICK, &vcpu->requests);
3655         local_irq_enable();
3656
3657         ++vcpu->stat.exits;
3658
3659         /*
3660          * We must have an instruction between local_irq_enable() and
3661          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3662          * the interrupt shadow.  The stat.exits increment will do nicely.
3663          * But we need to prevent reordering, hence this barrier():
3664          */
3665         barrier();
3666
3667         kvm_guest_exit();
3668
3669         preempt_enable();
3670
3671         down_read(&vcpu->kvm->slots_lock);
3672
3673         /*
3674          * Profile KVM exit RIPs:
3675          */
3676         if (unlikely(prof_on == KVM_PROFILING)) {
3677                 unsigned long rip = kvm_rip_read(vcpu);
3678                 profile_hit(KVM_PROFILING, (void *)rip);
3679         }
3680
3681
3682         kvm_lapic_sync_from_vapic(vcpu);
3683
3684         r = kvm_x86_ops->handle_exit(vcpu);
3685 out:
3686         return r;
3687 }
3688
3689
3690 static int __vcpu_run(struct kvm_vcpu *vcpu)
3691 {
3692         int r;
3693
3694         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3695                 pr_debug("vcpu %d received sipi with vector # %x\n",
3696                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3697                 kvm_lapic_reset(vcpu);
3698                 r = kvm_arch_vcpu_reset(vcpu);
3699                 if (r)
3700                         return r;
3701                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3702         }
3703
3704         down_read(&vcpu->kvm->slots_lock);
3705         vapic_enter(vcpu);
3706
3707         r = 1;
3708         while (r > 0) {
3709                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3710                         r = vcpu_enter_guest(vcpu);
3711                 else {
3712                         up_read(&vcpu->kvm->slots_lock);
3713                         kvm_vcpu_block(vcpu);
3714                         down_read(&vcpu->kvm->slots_lock);
3715                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3716                         {
3717                                 switch(vcpu->arch.mp_state) {
3718                                 case KVM_MP_STATE_HALTED:
3719                                         vcpu->arch.mp_state =
3720                                                 KVM_MP_STATE_RUNNABLE;
3721                                 case KVM_MP_STATE_RUNNABLE:
3722                                         break;
3723                                 case KVM_MP_STATE_SIPI_RECEIVED:
3724                                 default:
3725                                         r = -EINTR;
3726                                         break;
3727                                 }
3728                         }
3729                 }
3730
3731                 if (r <= 0)
3732                         break;
3733
3734                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3735                 if (kvm_cpu_has_pending_timer(vcpu))
3736                         kvm_inject_pending_timer_irqs(vcpu);
3737
3738                 if (dm_request_for_irq_injection(vcpu)) {
3739                         r = -EINTR;
3740                         vcpu->run->exit_reason = KVM_EXIT_INTR;
3741                         ++vcpu->stat.request_irq_exits;
3742                 }
3743                 if (signal_pending(current)) {
3744                         r = -EINTR;
3745                         vcpu->run->exit_reason = KVM_EXIT_INTR;
3746                         ++vcpu->stat.signal_exits;
3747                 }
3748                 if (need_resched()) {
3749                         up_read(&vcpu->kvm->slots_lock);
3750                         kvm_resched(vcpu);
3751                         down_read(&vcpu->kvm->slots_lock);
3752                 }
3753         }
3754
3755         up_read(&vcpu->kvm->slots_lock);
3756         post_kvm_run_save(vcpu);
3757
3758         vapic_exit(vcpu);
3759
3760         return r;
3761 }
3762
3763 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3764 {
3765         int r;
3766         sigset_t sigsaved;
3767
3768         vcpu_load(vcpu);
3769
3770         if (vcpu->sigset_active)
3771                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3772
3773         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3774                 kvm_vcpu_block(vcpu);
3775                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3776                 r = -EAGAIN;
3777                 goto out;
3778         }
3779
3780         /* re-sync apic's tpr */
3781         if (!irqchip_in_kernel(vcpu->kvm))
3782                 kvm_set_cr8(vcpu, kvm_run->cr8);
3783
3784         if (vcpu->arch.pio.cur_count) {
3785                 r = complete_pio(vcpu);
3786                 if (r)
3787                         goto out;
3788         }
3789 #if CONFIG_HAS_IOMEM
3790         if (vcpu->mmio_needed) {
3791                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3792                 vcpu->mmio_read_completed = 1;
3793                 vcpu->mmio_needed = 0;
3794
3795                 down_read(&vcpu->kvm->slots_lock);
3796                 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
3797                                         EMULTYPE_NO_DECODE);
3798                 up_read(&vcpu->kvm->slots_lock);
3799                 if (r == EMULATE_DO_MMIO) {
3800                         /*
3801                          * Read-modify-write.  Back to userspace.
3802                          */
3803                         r = 0;
3804                         goto out;
3805                 }
3806         }
3807 #endif
3808         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3809                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3810                                      kvm_run->hypercall.ret);
3811
3812         r = __vcpu_run(vcpu);
3813
3814 out:
3815         if (vcpu->sigset_active)
3816                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3817
3818         vcpu_put(vcpu);
3819         return r;
3820 }
3821
3822 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3823 {
3824         vcpu_load(vcpu);
3825
3826         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3827         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3828         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3829         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3830         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3831         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3832         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3833         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3834 #ifdef CONFIG_X86_64
3835         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3836         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3837         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3838         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3839         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3840         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3841         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3842         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3843 #endif
3844
3845         regs->rip = kvm_rip_read(vcpu);
3846         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3847
3848         /*
3849          * Don't leak debug flags in case they were set for guest debugging
3850          */
3851         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3852                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3853
3854         vcpu_put(vcpu);
3855
3856         return 0;
3857 }
3858
3859 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3860 {
3861         vcpu_load(vcpu);
3862
3863         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3864         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3865         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3866         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3867         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3868         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3869         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3870         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3871 #ifdef CONFIG_X86_64
3872         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3873         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3874         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3875         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3876         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3877         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3878         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3879         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3880
3881 #endif
3882
3883         kvm_rip_write(vcpu, regs->rip);
3884         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3885
3886
3887         vcpu->arch.exception.pending = false;
3888
3889         vcpu_put(vcpu);
3890
3891         return 0;
3892 }
3893
3894 void kvm_get_segment(struct kvm_vcpu *vcpu,
3895                      struct kvm_segment *var, int seg)
3896 {
3897         kvm_x86_ops->get_segment(vcpu, var, seg);
3898 }
3899
3900 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3901 {
3902         struct kvm_segment cs;
3903
3904         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3905         *db = cs.db;
3906         *l = cs.l;
3907 }
3908 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3909
3910 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3911                                   struct kvm_sregs *sregs)
3912 {
3913         struct descriptor_table dt;
3914
3915         vcpu_load(vcpu);
3916
3917         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3918         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3919         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3920         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3921         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3922         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3923
3924         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3925         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3926
3927         kvm_x86_ops->get_idt(vcpu, &dt);
3928         sregs->idt.limit = dt.limit;
3929         sregs->idt.base = dt.base;
3930         kvm_x86_ops->get_gdt(vcpu, &dt);
3931         sregs->gdt.limit = dt.limit;
3932         sregs->gdt.base = dt.base;
3933
3934         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3935         sregs->cr0 = vcpu->arch.cr0;
3936         sregs->cr2 = vcpu->arch.cr2;
3937         sregs->cr3 = vcpu->arch.cr3;
3938         sregs->cr4 = vcpu->arch.cr4;
3939         sregs->cr8 = kvm_get_cr8(vcpu);
3940         sregs->efer = vcpu->arch.shadow_efer;
3941         sregs->apic_base = kvm_get_apic_base(vcpu);
3942
3943         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3944
3945         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3946                 set_bit(vcpu->arch.interrupt.nr,
3947                         (unsigned long *)sregs->interrupt_bitmap);
3948
3949         vcpu_put(vcpu);
3950
3951         return 0;
3952 }
3953
3954 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3955                                     struct kvm_mp_state *mp_state)
3956 {
3957         vcpu_load(vcpu);
3958         mp_state->mp_state = vcpu->arch.mp_state;
3959         vcpu_put(vcpu);
3960         return 0;
3961 }
3962
3963 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3964                                     struct kvm_mp_state *mp_state)
3965 {
3966         vcpu_load(vcpu);
3967         vcpu->arch.mp_state = mp_state->mp_state;
3968         vcpu_put(vcpu);
3969         return 0;
3970 }
3971
3972 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3973                         struct kvm_segment *var, int seg)
3974 {
3975         kvm_x86_ops->set_segment(vcpu, var, seg);
3976 }
3977
3978 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3979                                    struct kvm_segment *kvm_desct)
3980 {
3981         kvm_desct->base = get_desc_base(seg_desc);
3982         kvm_desct->limit = get_desc_limit(seg_desc);
3983         if (seg_desc->g) {
3984                 kvm_desct->limit <<= 12;
3985                 kvm_desct->limit |= 0xfff;
3986         }
3987         kvm_desct->selector = selector;
3988         kvm_desct->type = seg_desc->type;
3989         kvm_desct->present = seg_desc->p;
3990         kvm_desct->dpl = seg_desc->dpl;
3991         kvm_desct->db = seg_desc->d;
3992         kvm_desct->s = seg_desc->s;
3993         kvm_desct->l = seg_desc->l;
3994         kvm_desct->g = seg_desc->g;
3995         kvm_desct->avl = seg_desc->avl;
3996         if (!selector)
3997                 kvm_desct->unusable = 1;
3998         else
3999                 kvm_desct->unusable = 0;
4000         kvm_desct->padding = 0;
4001 }
4002
4003 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4004                                           u16 selector,
4005                                           struct descriptor_table *dtable)
4006 {
4007         if (selector & 1 << 2) {
4008                 struct kvm_segment kvm_seg;
4009
4010                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4011
4012                 if (kvm_seg.unusable)
4013                         dtable->limit = 0;
4014                 else
4015                         dtable->limit = kvm_seg.limit;
4016                 dtable->base = kvm_seg.base;
4017         }
4018         else
4019                 kvm_x86_ops->get_gdt(vcpu, dtable);
4020 }
4021
4022 /* allowed just for 8 bytes segments */
4023 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4024                                          struct desc_struct *seg_desc)
4025 {
4026         struct descriptor_table dtable;
4027         u16 index = selector >> 3;
4028
4029         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4030
4031         if (dtable.limit < index * 8 + 7) {
4032                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4033                 return 1;
4034         }
4035         return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4036 }
4037
4038 /* allowed just for 8 bytes segments */
4039 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4040                                          struct desc_struct *seg_desc)
4041 {
4042         struct descriptor_table dtable;
4043         u16 index = selector >> 3;
4044
4045         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4046
4047         if (dtable.limit < index * 8 + 7)
4048                 return 1;
4049         return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4050 }
4051
4052 static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4053                              struct desc_struct *seg_desc)
4054 {
4055         u32 base_addr = get_desc_base(seg_desc);
4056
4057         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4058 }
4059
4060 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4061 {
4062         struct kvm_segment kvm_seg;
4063
4064         kvm_get_segment(vcpu, &kvm_seg, seg);
4065         return kvm_seg.selector;
4066 }
4067
4068 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4069                                                 u16 selector,
4070                                                 struct kvm_segment *kvm_seg)
4071 {
4072         struct desc_struct seg_desc;
4073
4074         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4075                 return 1;
4076         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4077         return 0;
4078 }
4079
4080 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4081 {
4082         struct kvm_segment segvar = {
4083                 .base = selector << 4,
4084                 .limit = 0xffff,
4085                 .selector = selector,
4086                 .type = 3,
4087                 .present = 1,
4088                 .dpl = 3,
4089                 .db = 0,
4090                 .s = 1,
4091                 .l = 0,
4092                 .g = 0,
4093                 .avl = 0,
4094                 .unusable = 0,
4095         };
4096         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4097         return 0;
4098 }
4099
4100 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4101 {
4102         return (seg != VCPU_SREG_LDTR) &&
4103                 (seg != VCPU_SREG_TR) &&
4104                 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_VM);
4105 }
4106
4107 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4108                                 int type_bits, int seg)
4109 {
4110         struct kvm_segment kvm_seg;
4111
4112         if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4113                 return kvm_load_realmode_segment(vcpu, selector, seg);
4114         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4115                 return 1;
4116         kvm_seg.type |= type_bits;
4117
4118         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4119             seg != VCPU_SREG_LDTR)
4120                 if (!kvm_seg.s)
4121                         kvm_seg.unusable = 1;
4122
4123         kvm_set_segment(vcpu, &kvm_seg, seg);
4124         return 0;
4125 }
4126
4127 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4128                                 struct tss_segment_32 *tss)
4129 {
4130         tss->cr3 = vcpu->arch.cr3;
4131         tss->eip = kvm_rip_read(vcpu);
4132         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
4133         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4134         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4135         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4136         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4137         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4138         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4139         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4140         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4141         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4142         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4143         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4144         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4145         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4146         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4147         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4148 }
4149
4150 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4151                                   struct tss_segment_32 *tss)
4152 {
4153         kvm_set_cr3(vcpu, tss->cr3);
4154
4155         kvm_rip_write(vcpu, tss->eip);
4156         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
4157
4158         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4159         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4160         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4161         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4162         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4163         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4164         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4165         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4166
4167         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4168                 return 1;
4169
4170         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4171                 return 1;
4172
4173         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4174                 return 1;
4175
4176         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4177                 return 1;
4178
4179         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4180                 return 1;
4181
4182         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4183                 return 1;
4184
4185         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4186                 return 1;
4187         return 0;
4188 }
4189
4190 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4191                                 struct tss_segment_16 *tss)
4192 {
4193         tss->ip = kvm_rip_read(vcpu);
4194         tss->flag = kvm_x86_ops->get_rflags(vcpu);
4195         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4196         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4197         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4198         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4199         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4200         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4201         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4202         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4203
4204         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4205         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4206         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4207         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4208         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4209         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
4210 }
4211
4212 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4213                                  struct tss_segment_16 *tss)
4214 {
4215         kvm_rip_write(vcpu, tss->ip);
4216         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
4217         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4218         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4219         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4220         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4221         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4222         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4223         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4224         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4225
4226         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4227                 return 1;
4228
4229         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4230                 return 1;
4231
4232         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4233                 return 1;
4234
4235         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4236                 return 1;
4237
4238         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4239                 return 1;
4240         return 0;
4241 }
4242
4243 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4244                               u16 old_tss_sel, u32 old_tss_base,
4245                               struct desc_struct *nseg_desc)
4246 {
4247         struct tss_segment_16 tss_segment_16;
4248         int ret = 0;
4249
4250         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4251                            sizeof tss_segment_16))
4252                 goto out;
4253
4254         save_state_to_tss16(vcpu, &tss_segment_16);
4255
4256         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4257                             sizeof tss_segment_16))
4258                 goto out;
4259
4260         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4261                            &tss_segment_16, sizeof tss_segment_16))
4262                 goto out;
4263
4264         if (old_tss_sel != 0xffff) {
4265                 tss_segment_16.prev_task_link = old_tss_sel;
4266
4267                 if (kvm_write_guest(vcpu->kvm,
4268                                     get_tss_base_addr(vcpu, nseg_desc),
4269                                     &tss_segment_16.prev_task_link,
4270                                     sizeof tss_segment_16.prev_task_link))
4271                         goto out;
4272         }
4273
4274         if (load_state_from_tss16(vcpu, &tss_segment_16))
4275                 goto out;
4276
4277         ret = 1;
4278 out:
4279         return ret;
4280 }
4281
4282 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4283                        u16 old_tss_sel, u32 old_tss_base,
4284                        struct desc_struct *nseg_desc)
4285 {
4286         struct tss_segment_32 tss_segment_32;
4287         int ret = 0;
4288
4289         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4290                            sizeof tss_segment_32))
4291                 goto out;
4292
4293         save_state_to_tss32(vcpu, &tss_segment_32);
4294
4295         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4296                             sizeof tss_segment_32))
4297                 goto out;
4298
4299         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4300                            &tss_segment_32, sizeof tss_segment_32))
4301                 goto out;
4302
4303         if (old_tss_sel != 0xffff) {
4304                 tss_segment_32.prev_task_link = old_tss_sel;
4305
4306                 if (kvm_write_guest(vcpu->kvm,
4307                                     get_tss_base_addr(vcpu, nseg_desc),
4308                                     &tss_segment_32.prev_task_link,
4309                                     sizeof tss_segment_32.prev_task_link))
4310                         goto out;
4311         }
4312
4313         if (load_state_from_tss32(vcpu, &tss_segment_32))
4314                 goto out;
4315
4316         ret = 1;
4317 out:
4318         return ret;
4319 }
4320
4321 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4322 {
4323         struct kvm_segment tr_seg;
4324         struct desc_struct cseg_desc;
4325         struct desc_struct nseg_desc;
4326         int ret = 0;
4327         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4328         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4329
4330         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4331
4332         /* FIXME: Handle errors. Failure to read either TSS or their
4333          * descriptors should generate a pagefault.
4334          */
4335         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4336                 goto out;
4337
4338         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4339                 goto out;
4340
4341         if (reason != TASK_SWITCH_IRET) {
4342                 int cpl;
4343
4344                 cpl = kvm_x86_ops->get_cpl(vcpu);
4345                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4346                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4347                         return 1;
4348                 }
4349         }
4350
4351         if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4352                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4353                 return 1;
4354         }
4355
4356         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4357                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4358                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4359         }
4360
4361         if (reason == TASK_SWITCH_IRET) {
4362                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4363                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4364         }
4365
4366         /* set back link to prev task only if NT bit is set in eflags
4367            note that old_tss_sel is not used afetr this point */
4368         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4369                 old_tss_sel = 0xffff;
4370
4371         /* set back link to prev task only if NT bit is set in eflags
4372            note that old_tss_sel is not used afetr this point */
4373         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4374                 old_tss_sel = 0xffff;
4375
4376         if (nseg_desc.type & 8)
4377                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4378                                          old_tss_base, &nseg_desc);
4379         else
4380                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4381                                          old_tss_base, &nseg_desc);
4382
4383         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4384                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4385                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4386         }
4387
4388         if (reason != TASK_SWITCH_IRET) {
4389                 nseg_desc.type |= (1 << 1);
4390                 save_guest_segment_descriptor(vcpu, tss_selector,
4391                                               &nseg_desc);
4392         }
4393
4394         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4395         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4396         tr_seg.type = 11;
4397         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4398 out:
4399         return ret;
4400 }
4401 EXPORT_SYMBOL_GPL(kvm_task_switch);
4402
4403 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4404                                   struct kvm_sregs *sregs)
4405 {
4406         int mmu_reset_needed = 0;
4407         int pending_vec, max_bits;
4408         struct descriptor_table dt;
4409
4410         vcpu_load(vcpu);
4411
4412         dt.limit = sregs->idt.limit;
4413         dt.base = sregs->idt.base;
4414         kvm_x86_ops->set_idt(vcpu, &dt);
4415         dt.limit = sregs->gdt.limit;
4416         dt.base = sregs->gdt.base;
4417         kvm_x86_ops->set_gdt(vcpu, &dt);
4418
4419         vcpu->arch.cr2 = sregs->cr2;
4420         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4421         vcpu->arch.cr3 = sregs->cr3;
4422
4423         kvm_set_cr8(vcpu, sregs->cr8);
4424
4425         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4426         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4427         kvm_set_apic_base(vcpu, sregs->apic_base);
4428
4429         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4430
4431         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4432         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4433         vcpu->arch.cr0 = sregs->cr0;
4434
4435         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4436         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4437         if (!is_long_mode(vcpu) && is_pae(vcpu))
4438                 load_pdptrs(vcpu, vcpu->arch.cr3);
4439
4440         if (mmu_reset_needed)
4441                 kvm_mmu_reset_context(vcpu);
4442
4443         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4444         pending_vec = find_first_bit(
4445                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4446         if (pending_vec < max_bits) {
4447                 kvm_queue_interrupt(vcpu, pending_vec, false);
4448                 pr_debug("Set back pending irq %d\n", pending_vec);
4449                 if (irqchip_in_kernel(vcpu->kvm))
4450                         kvm_pic_clear_isr_ack(vcpu->kvm);
4451         }
4452
4453         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4454         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4455         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4456         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4457         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4458         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4459
4460         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4461         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4462
4463         update_cr8_intercept(vcpu);
4464
4465         /* Older userspace won't unhalt the vcpu on reset. */
4466         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4467             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4468             !(vcpu->arch.cr0 & X86_CR0_PE))
4469                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4470
4471         vcpu_put(vcpu);
4472
4473         return 0;
4474 }
4475
4476 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4477                                         struct kvm_guest_debug *dbg)
4478 {
4479         int i, r;
4480
4481         vcpu_load(vcpu);
4482
4483         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4484             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4485                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4486                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4487                 vcpu->arch.switch_db_regs =
4488                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4489         } else {
4490                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4491                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4492                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4493         }
4494
4495         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4496
4497         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4498                 kvm_queue_exception(vcpu, DB_VECTOR);
4499         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4500                 kvm_queue_exception(vcpu, BP_VECTOR);
4501
4502         vcpu_put(vcpu);
4503
4504         return r;
4505 }
4506
4507 /*
4508  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4509  * we have asm/x86/processor.h
4510  */
4511 struct fxsave {
4512         u16     cwd;
4513         u16     swd;
4514         u16     twd;
4515         u16     fop;
4516         u64     rip;
4517         u64     rdp;
4518         u32     mxcsr;
4519         u32     mxcsr_mask;
4520         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4521 #ifdef CONFIG_X86_64
4522         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4523 #else
4524         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4525 #endif
4526 };
4527
4528 /*
4529  * Translate a guest virtual address to a guest physical address.
4530  */
4531 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4532                                     struct kvm_translation *tr)
4533 {
4534         unsigned long vaddr = tr->linear_address;
4535         gpa_t gpa;
4536
4537         vcpu_load(vcpu);
4538         down_read(&vcpu->kvm->slots_lock);
4539         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4540         up_read(&vcpu->kvm->slots_lock);
4541         tr->physical_address = gpa;
4542         tr->valid = gpa != UNMAPPED_GVA;
4543         tr->writeable = 1;
4544         tr->usermode = 0;
4545         vcpu_put(vcpu);
4546
4547         return 0;
4548 }
4549
4550 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4551 {
4552         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4553
4554         vcpu_load(vcpu);
4555
4556         memcpy(fpu->fpr, fxsave->st_space, 128);
4557         fpu->fcw = fxsave->cwd;
4558         fpu->fsw = fxsave->swd;
4559         fpu->ftwx = fxsave->twd;
4560         fpu->last_opcode = fxsave->fop;
4561         fpu->last_ip = fxsave->rip;
4562         fpu->last_dp = fxsave->rdp;
4563         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4564
4565         vcpu_put(vcpu);
4566
4567         return 0;
4568 }
4569
4570 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4571 {
4572         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4573
4574         vcpu_load(vcpu);
4575
4576         memcpy(fxsave->st_space, fpu->fpr, 128);
4577         fxsave->cwd = fpu->fcw;
4578         fxsave->swd = fpu->fsw;
4579         fxsave->twd = fpu->ftwx;
4580         fxsave->fop = fpu->last_opcode;
4581         fxsave->rip = fpu->last_ip;
4582         fxsave->rdp = fpu->last_dp;
4583         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4584
4585         vcpu_put(vcpu);
4586
4587         return 0;
4588 }
4589
4590 void fx_init(struct kvm_vcpu *vcpu)
4591 {
4592         unsigned after_mxcsr_mask;
4593
4594         /*
4595          * Touch the fpu the first time in non atomic context as if
4596          * this is the first fpu instruction the exception handler
4597          * will fire before the instruction returns and it'll have to
4598          * allocate ram with GFP_KERNEL.
4599          */
4600         if (!used_math())
4601                 kvm_fx_save(&vcpu->arch.host_fx_image);
4602
4603         /* Initialize guest FPU by resetting ours and saving into guest's */
4604         preempt_disable();
4605         kvm_fx_save(&vcpu->arch.host_fx_image);
4606         kvm_fx_finit();
4607         kvm_fx_save(&vcpu->arch.guest_fx_image);
4608         kvm_fx_restore(&vcpu->arch.host_fx_image);
4609         preempt_enable();
4610
4611         vcpu->arch.cr0 |= X86_CR0_ET;
4612         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4613         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4614         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4615                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4616 }
4617 EXPORT_SYMBOL_GPL(fx_init);
4618
4619 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4620 {
4621         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4622                 return;
4623
4624         vcpu->guest_fpu_loaded = 1;
4625         kvm_fx_save(&vcpu->arch.host_fx_image);
4626         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4627 }
4628 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4629
4630 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4631 {
4632         if (!vcpu->guest_fpu_loaded)
4633                 return;
4634
4635         vcpu->guest_fpu_loaded = 0;
4636         kvm_fx_save(&vcpu->arch.guest_fx_image);
4637         kvm_fx_restore(&vcpu->arch.host_fx_image);
4638         ++vcpu->stat.fpu_reload;
4639 }
4640 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4641
4642 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4643 {
4644         if (vcpu->arch.time_page) {
4645                 kvm_release_page_dirty(vcpu->arch.time_page);
4646                 vcpu->arch.time_page = NULL;
4647         }
4648
4649         kvm_x86_ops->vcpu_free(vcpu);
4650 }
4651
4652 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4653                                                 unsigned int id)
4654 {
4655         return kvm_x86_ops->vcpu_create(kvm, id);
4656 }
4657
4658 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4659 {
4660         int r;
4661
4662         /* We do fxsave: this must be aligned. */
4663         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4664
4665         vcpu->arch.mtrr_state.have_fixed = 1;
4666         vcpu_load(vcpu);
4667         r = kvm_arch_vcpu_reset(vcpu);
4668         if (r == 0)
4669                 r = kvm_mmu_setup(vcpu);
4670         vcpu_put(vcpu);
4671         if (r < 0)
4672                 goto free_vcpu;
4673
4674         return 0;
4675 free_vcpu:
4676         kvm_x86_ops->vcpu_free(vcpu);
4677         return r;
4678 }
4679
4680 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4681 {
4682         vcpu_load(vcpu);
4683         kvm_mmu_unload(vcpu);
4684         vcpu_put(vcpu);
4685
4686         kvm_x86_ops->vcpu_free(vcpu);
4687 }
4688
4689 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4690 {
4691         vcpu->arch.nmi_pending = false;
4692         vcpu->arch.nmi_injected = false;
4693
4694         vcpu->arch.switch_db_regs = 0;
4695         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4696         vcpu->arch.dr6 = DR6_FIXED_1;
4697         vcpu->arch.dr7 = DR7_FIXED_1;
4698
4699         return kvm_x86_ops->vcpu_reset(vcpu);
4700 }
4701
4702 void kvm_arch_hardware_enable(void *garbage)
4703 {
4704         kvm_x86_ops->hardware_enable(garbage);
4705 }
4706
4707 void kvm_arch_hardware_disable(void *garbage)
4708 {
4709         kvm_x86_ops->hardware_disable(garbage);
4710 }
4711
4712 int kvm_arch_hardware_setup(void)
4713 {
4714         return kvm_x86_ops->hardware_setup();
4715 }
4716
4717 void kvm_arch_hardware_unsetup(void)
4718 {
4719         kvm_x86_ops->hardware_unsetup();
4720 }
4721
4722 void kvm_arch_check_processor_compat(void *rtn)
4723 {
4724         kvm_x86_ops->check_processor_compatibility(rtn);
4725 }
4726
4727 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4728 {
4729         struct page *page;
4730         struct kvm *kvm;
4731         int r;
4732
4733         BUG_ON(vcpu->kvm == NULL);
4734         kvm = vcpu->kvm;
4735
4736         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4737         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
4738                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4739         else
4740                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4741
4742         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4743         if (!page) {
4744                 r = -ENOMEM;
4745                 goto fail;
4746         }
4747         vcpu->arch.pio_data = page_address(page);
4748
4749         r = kvm_mmu_create(vcpu);
4750         if (r < 0)
4751                 goto fail_free_pio_data;
4752
4753         if (irqchip_in_kernel(kvm)) {
4754                 r = kvm_create_lapic(vcpu);
4755                 if (r < 0)
4756                         goto fail_mmu_destroy;
4757         }
4758
4759         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
4760                                        GFP_KERNEL);
4761         if (!vcpu->arch.mce_banks) {
4762                 r = -ENOMEM;
4763                 goto fail_mmu_destroy;
4764         }
4765         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
4766
4767         return 0;
4768
4769 fail_mmu_destroy:
4770         kvm_mmu_destroy(vcpu);
4771 fail_free_pio_data:
4772         free_page((unsigned long)vcpu->arch.pio_data);
4773 fail:
4774         return r;
4775 }
4776
4777 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4778 {
4779         kvm_free_lapic(vcpu);
4780         down_read(&vcpu->kvm->slots_lock);
4781         kvm_mmu_destroy(vcpu);
4782         up_read(&vcpu->kvm->slots_lock);
4783         free_page((unsigned long)vcpu->arch.pio_data);
4784 }
4785
4786 struct  kvm *kvm_arch_create_vm(void)
4787 {
4788         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4789
4790         if (!kvm)
4791                 return ERR_PTR(-ENOMEM);
4792
4793         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4794         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4795
4796         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4797         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4798
4799         rdtscll(kvm->arch.vm_init_tsc);
4800
4801         return kvm;
4802 }
4803
4804 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4805 {
4806         vcpu_load(vcpu);
4807         kvm_mmu_unload(vcpu);
4808         vcpu_put(vcpu);
4809 }
4810
4811 static void kvm_free_vcpus(struct kvm *kvm)
4812 {
4813         unsigned int i;
4814         struct kvm_vcpu *vcpu;
4815
4816         /*
4817          * Unpin any mmu pages first.
4818          */
4819         kvm_for_each_vcpu(i, vcpu, kvm)
4820                 kvm_unload_vcpu_mmu(vcpu);
4821         kvm_for_each_vcpu(i, vcpu, kvm)
4822                 kvm_arch_vcpu_free(vcpu);
4823
4824         mutex_lock(&kvm->lock);
4825         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
4826                 kvm->vcpus[i] = NULL;
4827
4828         atomic_set(&kvm->online_vcpus, 0);
4829         mutex_unlock(&kvm->lock);
4830 }
4831
4832 void kvm_arch_sync_events(struct kvm *kvm)
4833 {
4834         kvm_free_all_assigned_devices(kvm);
4835 }
4836
4837 void kvm_arch_destroy_vm(struct kvm *kvm)
4838 {
4839         kvm_iommu_unmap_guest(kvm);
4840         kvm_free_pit(kvm);
4841         kfree(kvm->arch.vpic);
4842         kfree(kvm->arch.vioapic);
4843         kvm_free_vcpus(kvm);
4844         kvm_free_physmem(kvm);
4845         if (kvm->arch.apic_access_page)
4846                 put_page(kvm->arch.apic_access_page);
4847         if (kvm->arch.ept_identity_pagetable)
4848                 put_page(kvm->arch.ept_identity_pagetable);
4849         kfree(kvm);
4850 }
4851
4852 int kvm_arch_set_memory_region(struct kvm *kvm,
4853                                 struct kvm_userspace_memory_region *mem,
4854                                 struct kvm_memory_slot old,
4855                                 int user_alloc)
4856 {
4857         int npages = mem->memory_size >> PAGE_SHIFT;
4858         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4859
4860         /*To keep backward compatibility with older userspace,
4861          *x86 needs to hanlde !user_alloc case.
4862          */
4863         if (!user_alloc) {
4864                 if (npages && !old.rmap) {
4865                         unsigned long userspace_addr;
4866
4867                         down_write(&current->mm->mmap_sem);
4868                         userspace_addr = do_mmap(NULL, 0,
4869                                                  npages * PAGE_SIZE,
4870                                                  PROT_READ | PROT_WRITE,
4871                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4872                                                  0);
4873                         up_write(&current->mm->mmap_sem);
4874
4875                         if (IS_ERR((void *)userspace_addr))
4876                                 return PTR_ERR((void *)userspace_addr);
4877
4878                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4879                         spin_lock(&kvm->mmu_lock);
4880                         memslot->userspace_addr = userspace_addr;
4881                         spin_unlock(&kvm->mmu_lock);
4882                 } else {
4883                         if (!old.user_alloc && old.rmap) {
4884                                 int ret;
4885
4886                                 down_write(&current->mm->mmap_sem);
4887                                 ret = do_munmap(current->mm, old.userspace_addr,
4888                                                 old.npages * PAGE_SIZE);
4889                                 up_write(&current->mm->mmap_sem);
4890                                 if (ret < 0)
4891                                         printk(KERN_WARNING
4892                                        "kvm_vm_ioctl_set_memory_region: "
4893                                        "failed to munmap memory\n");
4894                         }
4895                 }
4896         }
4897
4898         spin_lock(&kvm->mmu_lock);
4899         if (!kvm->arch.n_requested_mmu_pages) {
4900                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4901                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4902         }
4903
4904         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4905         spin_unlock(&kvm->mmu_lock);
4906
4907         return 0;
4908 }
4909
4910 void kvm_arch_flush_shadow(struct kvm *kvm)
4911 {
4912         kvm_mmu_zap_all(kvm);
4913         kvm_reload_remote_mmus(kvm);
4914 }
4915
4916 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4917 {
4918         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4919                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4920                 || vcpu->arch.nmi_pending ||
4921                 (kvm_arch_interrupt_allowed(vcpu) &&
4922                  kvm_cpu_has_interrupt(vcpu));
4923 }
4924
4925 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4926 {
4927         int me;
4928         int cpu = vcpu->cpu;
4929
4930         if (waitqueue_active(&vcpu->wq)) {
4931                 wake_up_interruptible(&vcpu->wq);
4932                 ++vcpu->stat.halt_wakeup;
4933         }
4934
4935         me = get_cpu();
4936         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4937                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4938                         smp_send_reschedule(cpu);
4939         put_cpu();
4940 }
4941
4942 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4943 {
4944         return kvm_x86_ops->interrupt_allowed(vcpu);
4945 }
4946
4947 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
4948 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
4949 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
4950 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
4951 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);