KVM: Extended shared_msr_global to per CPU
[safe/jmp/linux-2.6] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  *
10  * Authors:
11  *   Avi Kivity   <avi@qumranet.com>
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Amit Shah    <amit.shah@qumranet.com>
14  *   Ben-Ami Yassour <benami@il.ibm.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <trace/events/kvm.h>
42 #undef TRACE_INCLUDE_FILE
43 #define CREATE_TRACE_POINTS
44 #include "trace.h"
45
46 #include <asm/debugreg.h>
47 #include <asm/uaccess.h>
48 #include <asm/msr.h>
49 #include <asm/desc.h>
50 #include <asm/mtrr.h>
51 #include <asm/mce.h>
52
53 #define MAX_IO_MSRS 256
54 #define CR0_RESERVED_BITS                                               \
55         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
56                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
57                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
58 #define CR4_RESERVED_BITS                                               \
59         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
60                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
61                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
62                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
63
64 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
65
66 #define KVM_MAX_MCE_BANKS 32
67 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
68
69 /* EFER defaults:
70  * - enable syscall per default because its emulated by KVM
71  * - enable LME and LMA per default on 64 bit KVM
72  */
73 #ifdef CONFIG_X86_64
74 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
75 #else
76 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
77 #endif
78
79 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
80 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
81
82 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
83 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
84                                     struct kvm_cpuid_entry2 __user *entries);
85
86 struct kvm_x86_ops *kvm_x86_ops;
87 EXPORT_SYMBOL_GPL(kvm_x86_ops);
88
89 int ignore_msrs = 0;
90 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
91
92 #define KVM_NR_SHARED_MSRS 16
93
94 struct kvm_shared_msrs_global {
95         int nr;
96         u32 msrs[KVM_NR_SHARED_MSRS];
97 };
98
99 struct kvm_shared_msrs {
100         struct user_return_notifier urn;
101         bool registered;
102         struct kvm_shared_msr_values {
103                 u64 host;
104                 u64 curr;
105         } values[KVM_NR_SHARED_MSRS];
106 };
107
108 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
109 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
110
111 struct kvm_stats_debugfs_item debugfs_entries[] = {
112         { "pf_fixed", VCPU_STAT(pf_fixed) },
113         { "pf_guest", VCPU_STAT(pf_guest) },
114         { "tlb_flush", VCPU_STAT(tlb_flush) },
115         { "invlpg", VCPU_STAT(invlpg) },
116         { "exits", VCPU_STAT(exits) },
117         { "io_exits", VCPU_STAT(io_exits) },
118         { "mmio_exits", VCPU_STAT(mmio_exits) },
119         { "signal_exits", VCPU_STAT(signal_exits) },
120         { "irq_window", VCPU_STAT(irq_window_exits) },
121         { "nmi_window", VCPU_STAT(nmi_window_exits) },
122         { "halt_exits", VCPU_STAT(halt_exits) },
123         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
124         { "hypercalls", VCPU_STAT(hypercalls) },
125         { "request_irq", VCPU_STAT(request_irq_exits) },
126         { "irq_exits", VCPU_STAT(irq_exits) },
127         { "host_state_reload", VCPU_STAT(host_state_reload) },
128         { "efer_reload", VCPU_STAT(efer_reload) },
129         { "fpu_reload", VCPU_STAT(fpu_reload) },
130         { "insn_emulation", VCPU_STAT(insn_emulation) },
131         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
132         { "irq_injections", VCPU_STAT(irq_injections) },
133         { "nmi_injections", VCPU_STAT(nmi_injections) },
134         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
135         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
136         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
137         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
138         { "mmu_flooded", VM_STAT(mmu_flooded) },
139         { "mmu_recycled", VM_STAT(mmu_recycled) },
140         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
141         { "mmu_unsync", VM_STAT(mmu_unsync) },
142         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
143         { "largepages", VM_STAT(lpages) },
144         { NULL }
145 };
146
147 static void kvm_on_user_return(struct user_return_notifier *urn)
148 {
149         unsigned slot;
150         struct kvm_shared_msrs *locals
151                 = container_of(urn, struct kvm_shared_msrs, urn);
152         struct kvm_shared_msr_values *values;
153
154         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
155                 values = &locals->values[slot];
156                 if (values->host != values->curr) {
157                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
158                         values->curr = values->host;
159                 }
160         }
161         locals->registered = false;
162         user_return_notifier_unregister(urn);
163 }
164
165 static void shared_msr_update(unsigned slot, u32 msr)
166 {
167         struct kvm_shared_msrs *smsr;
168         u64 value;
169
170         smsr = &__get_cpu_var(shared_msrs);
171         /* only read, and nobody should modify it at this time,
172          * so don't need lock */
173         if (slot >= shared_msrs_global.nr) {
174                 printk(KERN_ERR "kvm: invalid MSR slot!");
175                 return;
176         }
177         rdmsrl_safe(msr, &value);
178         smsr->values[slot].host = value;
179         smsr->values[slot].curr = value;
180 }
181
182 void kvm_define_shared_msr(unsigned slot, u32 msr)
183 {
184         if (slot >= shared_msrs_global.nr)
185                 shared_msrs_global.nr = slot + 1;
186         shared_msrs_global.msrs[slot] = msr;
187         /* we need ensured the shared_msr_global have been updated */
188         smp_wmb();
189 }
190 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
191
192 static void kvm_shared_msr_cpu_online(void)
193 {
194         unsigned i;
195
196         for (i = 0; i < shared_msrs_global.nr; ++i)
197                 shared_msr_update(i, shared_msrs_global.msrs[i]);
198 }
199
200 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
201 {
202         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
203
204         if (((value ^ smsr->values[slot].curr) & mask) == 0)
205                 return;
206         smsr->values[slot].curr = value;
207         wrmsrl(shared_msrs_global.msrs[slot], value);
208         if (!smsr->registered) {
209                 smsr->urn.on_user_return = kvm_on_user_return;
210                 user_return_notifier_register(&smsr->urn);
211                 smsr->registered = true;
212         }
213 }
214 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
215
216 static void drop_user_return_notifiers(void *ignore)
217 {
218         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
219
220         if (smsr->registered)
221                 kvm_on_user_return(&smsr->urn);
222 }
223
224 unsigned long segment_base(u16 selector)
225 {
226         struct descriptor_table gdt;
227         struct desc_struct *d;
228         unsigned long table_base;
229         unsigned long v;
230
231         if (selector == 0)
232                 return 0;
233
234         kvm_get_gdt(&gdt);
235         table_base = gdt.base;
236
237         if (selector & 4) {           /* from ldt */
238                 u16 ldt_selector = kvm_read_ldt();
239
240                 table_base = segment_base(ldt_selector);
241         }
242         d = (struct desc_struct *)(table_base + (selector & ~7));
243         v = get_desc_base(d);
244 #ifdef CONFIG_X86_64
245         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
246                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
247 #endif
248         return v;
249 }
250 EXPORT_SYMBOL_GPL(segment_base);
251
252 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
253 {
254         if (irqchip_in_kernel(vcpu->kvm))
255                 return vcpu->arch.apic_base;
256         else
257                 return vcpu->arch.apic_base;
258 }
259 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
260
261 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
262 {
263         /* TODO: reserve bits check */
264         if (irqchip_in_kernel(vcpu->kvm))
265                 kvm_lapic_set_base(vcpu, data);
266         else
267                 vcpu->arch.apic_base = data;
268 }
269 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
270
271 #define EXCPT_BENIGN            0
272 #define EXCPT_CONTRIBUTORY      1
273 #define EXCPT_PF                2
274
275 static int exception_class(int vector)
276 {
277         switch (vector) {
278         case PF_VECTOR:
279                 return EXCPT_PF;
280         case DE_VECTOR:
281         case TS_VECTOR:
282         case NP_VECTOR:
283         case SS_VECTOR:
284         case GP_VECTOR:
285                 return EXCPT_CONTRIBUTORY;
286         default:
287                 break;
288         }
289         return EXCPT_BENIGN;
290 }
291
292 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
293                 unsigned nr, bool has_error, u32 error_code)
294 {
295         u32 prev_nr;
296         int class1, class2;
297
298         if (!vcpu->arch.exception.pending) {
299         queue:
300                 vcpu->arch.exception.pending = true;
301                 vcpu->arch.exception.has_error_code = has_error;
302                 vcpu->arch.exception.nr = nr;
303                 vcpu->arch.exception.error_code = error_code;
304                 return;
305         }
306
307         /* to check exception */
308         prev_nr = vcpu->arch.exception.nr;
309         if (prev_nr == DF_VECTOR) {
310                 /* triple fault -> shutdown */
311                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
312                 return;
313         }
314         class1 = exception_class(prev_nr);
315         class2 = exception_class(nr);
316         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
317                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
318                 /* generate double fault per SDM Table 5-5 */
319                 vcpu->arch.exception.pending = true;
320                 vcpu->arch.exception.has_error_code = true;
321                 vcpu->arch.exception.nr = DF_VECTOR;
322                 vcpu->arch.exception.error_code = 0;
323         } else
324                 /* replace previous exception with a new one in a hope
325                    that instruction re-execution will regenerate lost
326                    exception */
327                 goto queue;
328 }
329
330 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
331 {
332         kvm_multiple_exception(vcpu, nr, false, 0);
333 }
334 EXPORT_SYMBOL_GPL(kvm_queue_exception);
335
336 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
337                            u32 error_code)
338 {
339         ++vcpu->stat.pf_guest;
340         vcpu->arch.cr2 = addr;
341         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
342 }
343
344 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
345 {
346         vcpu->arch.nmi_pending = 1;
347 }
348 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
349
350 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
351 {
352         kvm_multiple_exception(vcpu, nr, true, error_code);
353 }
354 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
355
356 /*
357  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
358  * a #GP and return false.
359  */
360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
361 {
362         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
363                 return true;
364         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
365         return false;
366 }
367 EXPORT_SYMBOL_GPL(kvm_require_cpl);
368
369 /*
370  * Load the pae pdptrs.  Return true is they are all valid.
371  */
372 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
373 {
374         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
375         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
376         int i;
377         int ret;
378         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
379
380         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
381                                   offset * sizeof(u64), sizeof(pdpte));
382         if (ret < 0) {
383                 ret = 0;
384                 goto out;
385         }
386         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
387                 if (is_present_gpte(pdpte[i]) &&
388                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
389                         ret = 0;
390                         goto out;
391                 }
392         }
393         ret = 1;
394
395         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
396         __set_bit(VCPU_EXREG_PDPTR,
397                   (unsigned long *)&vcpu->arch.regs_avail);
398         __set_bit(VCPU_EXREG_PDPTR,
399                   (unsigned long *)&vcpu->arch.regs_dirty);
400 out:
401
402         return ret;
403 }
404 EXPORT_SYMBOL_GPL(load_pdptrs);
405
406 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
407 {
408         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
409         bool changed = true;
410         int r;
411
412         if (is_long_mode(vcpu) || !is_pae(vcpu))
413                 return false;
414
415         if (!test_bit(VCPU_EXREG_PDPTR,
416                       (unsigned long *)&vcpu->arch.regs_avail))
417                 return true;
418
419         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
420         if (r < 0)
421                 goto out;
422         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
423 out:
424
425         return changed;
426 }
427
428 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
429 {
430         if (cr0 & CR0_RESERVED_BITS) {
431                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
432                        cr0, vcpu->arch.cr0);
433                 kvm_inject_gp(vcpu, 0);
434                 return;
435         }
436
437         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
438                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
439                 kvm_inject_gp(vcpu, 0);
440                 return;
441         }
442
443         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
444                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
445                        "and a clear PE flag\n");
446                 kvm_inject_gp(vcpu, 0);
447                 return;
448         }
449
450         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
451 #ifdef CONFIG_X86_64
452                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
453                         int cs_db, cs_l;
454
455                         if (!is_pae(vcpu)) {
456                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
457                                        "in long mode while PAE is disabled\n");
458                                 kvm_inject_gp(vcpu, 0);
459                                 return;
460                         }
461                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
462                         if (cs_l) {
463                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
464                                        "in long mode while CS.L == 1\n");
465                                 kvm_inject_gp(vcpu, 0);
466                                 return;
467
468                         }
469                 } else
470 #endif
471                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
472                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
473                                "reserved bits\n");
474                         kvm_inject_gp(vcpu, 0);
475                         return;
476                 }
477
478         }
479
480         kvm_x86_ops->set_cr0(vcpu, cr0);
481         vcpu->arch.cr0 = cr0;
482
483         kvm_mmu_reset_context(vcpu);
484         return;
485 }
486 EXPORT_SYMBOL_GPL(kvm_set_cr0);
487
488 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
489 {
490         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
491 }
492 EXPORT_SYMBOL_GPL(kvm_lmsw);
493
494 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
495 {
496         unsigned long old_cr4 = kvm_read_cr4(vcpu);
497         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
498
499         if (cr4 & CR4_RESERVED_BITS) {
500                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
501                 kvm_inject_gp(vcpu, 0);
502                 return;
503         }
504
505         if (is_long_mode(vcpu)) {
506                 if (!(cr4 & X86_CR4_PAE)) {
507                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
508                                "in long mode\n");
509                         kvm_inject_gp(vcpu, 0);
510                         return;
511                 }
512         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
513                    && ((cr4 ^ old_cr4) & pdptr_bits)
514                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
515                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
516                 kvm_inject_gp(vcpu, 0);
517                 return;
518         }
519
520         if (cr4 & X86_CR4_VMXE) {
521                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
522                 kvm_inject_gp(vcpu, 0);
523                 return;
524         }
525         kvm_x86_ops->set_cr4(vcpu, cr4);
526         vcpu->arch.cr4 = cr4;
527         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
528         kvm_mmu_reset_context(vcpu);
529 }
530 EXPORT_SYMBOL_GPL(kvm_set_cr4);
531
532 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
533 {
534         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
535                 kvm_mmu_sync_roots(vcpu);
536                 kvm_mmu_flush_tlb(vcpu);
537                 return;
538         }
539
540         if (is_long_mode(vcpu)) {
541                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
542                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
543                         kvm_inject_gp(vcpu, 0);
544                         return;
545                 }
546         } else {
547                 if (is_pae(vcpu)) {
548                         if (cr3 & CR3_PAE_RESERVED_BITS) {
549                                 printk(KERN_DEBUG
550                                        "set_cr3: #GP, reserved bits\n");
551                                 kvm_inject_gp(vcpu, 0);
552                                 return;
553                         }
554                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
555                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
556                                        "reserved bits\n");
557                                 kvm_inject_gp(vcpu, 0);
558                                 return;
559                         }
560                 }
561                 /*
562                  * We don't check reserved bits in nonpae mode, because
563                  * this isn't enforced, and VMware depends on this.
564                  */
565         }
566
567         /*
568          * Does the new cr3 value map to physical memory? (Note, we
569          * catch an invalid cr3 even in real-mode, because it would
570          * cause trouble later on when we turn on paging anyway.)
571          *
572          * A real CPU would silently accept an invalid cr3 and would
573          * attempt to use it - with largely undefined (and often hard
574          * to debug) behavior on the guest side.
575          */
576         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
577                 kvm_inject_gp(vcpu, 0);
578         else {
579                 vcpu->arch.cr3 = cr3;
580                 vcpu->arch.mmu.new_cr3(vcpu);
581         }
582 }
583 EXPORT_SYMBOL_GPL(kvm_set_cr3);
584
585 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
586 {
587         if (cr8 & CR8_RESERVED_BITS) {
588                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
589                 kvm_inject_gp(vcpu, 0);
590                 return;
591         }
592         if (irqchip_in_kernel(vcpu->kvm))
593                 kvm_lapic_set_tpr(vcpu, cr8);
594         else
595                 vcpu->arch.cr8 = cr8;
596 }
597 EXPORT_SYMBOL_GPL(kvm_set_cr8);
598
599 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
600 {
601         if (irqchip_in_kernel(vcpu->kvm))
602                 return kvm_lapic_get_cr8(vcpu);
603         else
604                 return vcpu->arch.cr8;
605 }
606 EXPORT_SYMBOL_GPL(kvm_get_cr8);
607
608 static inline u32 bit(int bitno)
609 {
610         return 1 << (bitno & 31);
611 }
612
613 /*
614  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
615  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
616  *
617  * This list is modified at module load time to reflect the
618  * capabilities of the host cpu. This capabilities test skips MSRs that are
619  * kvm-specific. Those are put in the beginning of the list.
620  */
621
622 #define KVM_SAVE_MSRS_BEGIN     2
623 static u32 msrs_to_save[] = {
624         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
625         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
626         MSR_K6_STAR,
627 #ifdef CONFIG_X86_64
628         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
629 #endif
630         MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
631 };
632
633 static unsigned num_msrs_to_save;
634
635 static u32 emulated_msrs[] = {
636         MSR_IA32_MISC_ENABLE,
637 };
638
639 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
640 {
641         if (efer & efer_reserved_bits) {
642                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
643                        efer);
644                 kvm_inject_gp(vcpu, 0);
645                 return;
646         }
647
648         if (is_paging(vcpu)
649             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
650                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
651                 kvm_inject_gp(vcpu, 0);
652                 return;
653         }
654
655         if (efer & EFER_FFXSR) {
656                 struct kvm_cpuid_entry2 *feat;
657
658                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
659                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
660                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
661                         kvm_inject_gp(vcpu, 0);
662                         return;
663                 }
664         }
665
666         if (efer & EFER_SVME) {
667                 struct kvm_cpuid_entry2 *feat;
668
669                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
670                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
671                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
672                         kvm_inject_gp(vcpu, 0);
673                         return;
674                 }
675         }
676
677         kvm_x86_ops->set_efer(vcpu, efer);
678
679         efer &= ~EFER_LMA;
680         efer |= vcpu->arch.shadow_efer & EFER_LMA;
681
682         vcpu->arch.shadow_efer = efer;
683
684         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
685         kvm_mmu_reset_context(vcpu);
686 }
687
688 void kvm_enable_efer_bits(u64 mask)
689 {
690        efer_reserved_bits &= ~mask;
691 }
692 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
693
694
695 /*
696  * Writes msr value into into the appropriate "register".
697  * Returns 0 on success, non-0 otherwise.
698  * Assumes vcpu_load() was already called.
699  */
700 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
701 {
702         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
703 }
704
705 /*
706  * Adapt set_msr() to msr_io()'s calling convention
707  */
708 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
709 {
710         return kvm_set_msr(vcpu, index, *data);
711 }
712
713 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
714 {
715         static int version;
716         struct pvclock_wall_clock wc;
717         struct timespec boot;
718
719         if (!wall_clock)
720                 return;
721
722         version++;
723
724         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
725
726         /*
727          * The guest calculates current wall clock time by adding
728          * system time (updated by kvm_write_guest_time below) to the
729          * wall clock specified here.  guest system time equals host
730          * system time for us, thus we must fill in host boot time here.
731          */
732         getboottime(&boot);
733
734         wc.sec = boot.tv_sec;
735         wc.nsec = boot.tv_nsec;
736         wc.version = version;
737
738         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
739
740         version++;
741         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
742 }
743
744 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
745 {
746         uint32_t quotient, remainder;
747
748         /* Don't try to replace with do_div(), this one calculates
749          * "(dividend << 32) / divisor" */
750         __asm__ ( "divl %4"
751                   : "=a" (quotient), "=d" (remainder)
752                   : "0" (0), "1" (dividend), "r" (divisor) );
753         return quotient;
754 }
755
756 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
757 {
758         uint64_t nsecs = 1000000000LL;
759         int32_t  shift = 0;
760         uint64_t tps64;
761         uint32_t tps32;
762
763         tps64 = tsc_khz * 1000LL;
764         while (tps64 > nsecs*2) {
765                 tps64 >>= 1;
766                 shift--;
767         }
768
769         tps32 = (uint32_t)tps64;
770         while (tps32 <= (uint32_t)nsecs) {
771                 tps32 <<= 1;
772                 shift++;
773         }
774
775         hv_clock->tsc_shift = shift;
776         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
777
778         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
779                  __func__, tsc_khz, hv_clock->tsc_shift,
780                  hv_clock->tsc_to_system_mul);
781 }
782
783 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
784
785 static void kvm_write_guest_time(struct kvm_vcpu *v)
786 {
787         struct timespec ts;
788         unsigned long flags;
789         struct kvm_vcpu_arch *vcpu = &v->arch;
790         void *shared_kaddr;
791         unsigned long this_tsc_khz;
792
793         if ((!vcpu->time_page))
794                 return;
795
796         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
797         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
798                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
799                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
800         }
801         put_cpu_var(cpu_tsc_khz);
802
803         /* Keep irq disabled to prevent changes to the clock */
804         local_irq_save(flags);
805         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
806         ktime_get_ts(&ts);
807         monotonic_to_bootbased(&ts);
808         local_irq_restore(flags);
809
810         /* With all the info we got, fill in the values */
811
812         vcpu->hv_clock.system_time = ts.tv_nsec +
813                                      (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
814
815         /*
816          * The interface expects us to write an even number signaling that the
817          * update is finished. Since the guest won't see the intermediate
818          * state, we just increase by 2 at the end.
819          */
820         vcpu->hv_clock.version += 2;
821
822         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
823
824         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
825                sizeof(vcpu->hv_clock));
826
827         kunmap_atomic(shared_kaddr, KM_USER0);
828
829         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
830 }
831
832 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
833 {
834         struct kvm_vcpu_arch *vcpu = &v->arch;
835
836         if (!vcpu->time_page)
837                 return 0;
838         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
839         return 1;
840 }
841
842 static bool msr_mtrr_valid(unsigned msr)
843 {
844         switch (msr) {
845         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
846         case MSR_MTRRfix64K_00000:
847         case MSR_MTRRfix16K_80000:
848         case MSR_MTRRfix16K_A0000:
849         case MSR_MTRRfix4K_C0000:
850         case MSR_MTRRfix4K_C8000:
851         case MSR_MTRRfix4K_D0000:
852         case MSR_MTRRfix4K_D8000:
853         case MSR_MTRRfix4K_E0000:
854         case MSR_MTRRfix4K_E8000:
855         case MSR_MTRRfix4K_F0000:
856         case MSR_MTRRfix4K_F8000:
857         case MSR_MTRRdefType:
858         case MSR_IA32_CR_PAT:
859                 return true;
860         case 0x2f8:
861                 return true;
862         }
863         return false;
864 }
865
866 static bool valid_pat_type(unsigned t)
867 {
868         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
869 }
870
871 static bool valid_mtrr_type(unsigned t)
872 {
873         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
874 }
875
876 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
877 {
878         int i;
879
880         if (!msr_mtrr_valid(msr))
881                 return false;
882
883         if (msr == MSR_IA32_CR_PAT) {
884                 for (i = 0; i < 8; i++)
885                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
886                                 return false;
887                 return true;
888         } else if (msr == MSR_MTRRdefType) {
889                 if (data & ~0xcff)
890                         return false;
891                 return valid_mtrr_type(data & 0xff);
892         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
893                 for (i = 0; i < 8 ; i++)
894                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
895                                 return false;
896                 return true;
897         }
898
899         /* variable MTRRs */
900         return valid_mtrr_type(data & 0xff);
901 }
902
903 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
904 {
905         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
906
907         if (!mtrr_valid(vcpu, msr, data))
908                 return 1;
909
910         if (msr == MSR_MTRRdefType) {
911                 vcpu->arch.mtrr_state.def_type = data;
912                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
913         } else if (msr == MSR_MTRRfix64K_00000)
914                 p[0] = data;
915         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
916                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
917         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
918                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
919         else if (msr == MSR_IA32_CR_PAT)
920                 vcpu->arch.pat = data;
921         else {  /* Variable MTRRs */
922                 int idx, is_mtrr_mask;
923                 u64 *pt;
924
925                 idx = (msr - 0x200) / 2;
926                 is_mtrr_mask = msr - 0x200 - 2 * idx;
927                 if (!is_mtrr_mask)
928                         pt =
929                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
930                 else
931                         pt =
932                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
933                 *pt = data;
934         }
935
936         kvm_mmu_reset_context(vcpu);
937         return 0;
938 }
939
940 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
941 {
942         u64 mcg_cap = vcpu->arch.mcg_cap;
943         unsigned bank_num = mcg_cap & 0xff;
944
945         switch (msr) {
946         case MSR_IA32_MCG_STATUS:
947                 vcpu->arch.mcg_status = data;
948                 break;
949         case MSR_IA32_MCG_CTL:
950                 if (!(mcg_cap & MCG_CTL_P))
951                         return 1;
952                 if (data != 0 && data != ~(u64)0)
953                         return -1;
954                 vcpu->arch.mcg_ctl = data;
955                 break;
956         default:
957                 if (msr >= MSR_IA32_MC0_CTL &&
958                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
959                         u32 offset = msr - MSR_IA32_MC0_CTL;
960                         /* only 0 or all 1s can be written to IA32_MCi_CTL */
961                         if ((offset & 0x3) == 0 &&
962                             data != 0 && data != ~(u64)0)
963                                 return -1;
964                         vcpu->arch.mce_banks[offset] = data;
965                         break;
966                 }
967                 return 1;
968         }
969         return 0;
970 }
971
972 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
973 {
974         struct kvm *kvm = vcpu->kvm;
975         int lm = is_long_mode(vcpu);
976         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
977                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
978         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
979                 : kvm->arch.xen_hvm_config.blob_size_32;
980         u32 page_num = data & ~PAGE_MASK;
981         u64 page_addr = data & PAGE_MASK;
982         u8 *page;
983         int r;
984
985         r = -E2BIG;
986         if (page_num >= blob_size)
987                 goto out;
988         r = -ENOMEM;
989         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
990         if (!page)
991                 goto out;
992         r = -EFAULT;
993         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
994                 goto out_free;
995         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
996                 goto out_free;
997         r = 0;
998 out_free:
999         kfree(page);
1000 out:
1001         return r;
1002 }
1003
1004 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1005 {
1006         switch (msr) {
1007         case MSR_EFER:
1008                 set_efer(vcpu, data);
1009                 break;
1010         case MSR_K7_HWCR:
1011                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1012                 if (data != 0) {
1013                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1014                                 data);
1015                         return 1;
1016                 }
1017                 break;
1018         case MSR_FAM10H_MMIO_CONF_BASE:
1019                 if (data != 0) {
1020                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1021                                 "0x%llx\n", data);
1022                         return 1;
1023                 }
1024                 break;
1025         case MSR_AMD64_NB_CFG:
1026                 break;
1027         case MSR_IA32_DEBUGCTLMSR:
1028                 if (!data) {
1029                         /* We support the non-activated case already */
1030                         break;
1031                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1032                         /* Values other than LBR and BTF are vendor-specific,
1033                            thus reserved and should throw a #GP */
1034                         return 1;
1035                 }
1036                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1037                         __func__, data);
1038                 break;
1039         case MSR_IA32_UCODE_REV:
1040         case MSR_IA32_UCODE_WRITE:
1041         case MSR_VM_HSAVE_PA:
1042         case MSR_AMD64_PATCH_LOADER:
1043                 break;
1044         case 0x200 ... 0x2ff:
1045                 return set_msr_mtrr(vcpu, msr, data);
1046         case MSR_IA32_APICBASE:
1047                 kvm_set_apic_base(vcpu, data);
1048                 break;
1049         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1050                 return kvm_x2apic_msr_write(vcpu, msr, data);
1051         case MSR_IA32_MISC_ENABLE:
1052                 vcpu->arch.ia32_misc_enable_msr = data;
1053                 break;
1054         case MSR_KVM_WALL_CLOCK:
1055                 vcpu->kvm->arch.wall_clock = data;
1056                 kvm_write_wall_clock(vcpu->kvm, data);
1057                 break;
1058         case MSR_KVM_SYSTEM_TIME: {
1059                 if (vcpu->arch.time_page) {
1060                         kvm_release_page_dirty(vcpu->arch.time_page);
1061                         vcpu->arch.time_page = NULL;
1062                 }
1063
1064                 vcpu->arch.time = data;
1065
1066                 /* we verify if the enable bit is set... */
1067                 if (!(data & 1))
1068                         break;
1069
1070                 /* ...but clean it before doing the actual write */
1071                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1072
1073                 vcpu->arch.time_page =
1074                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1075
1076                 if (is_error_page(vcpu->arch.time_page)) {
1077                         kvm_release_page_clean(vcpu->arch.time_page);
1078                         vcpu->arch.time_page = NULL;
1079                 }
1080
1081                 kvm_request_guest_time_update(vcpu);
1082                 break;
1083         }
1084         case MSR_IA32_MCG_CTL:
1085         case MSR_IA32_MCG_STATUS:
1086         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1087                 return set_msr_mce(vcpu, msr, data);
1088
1089         /* Performance counters are not protected by a CPUID bit,
1090          * so we should check all of them in the generic path for the sake of
1091          * cross vendor migration.
1092          * Writing a zero into the event select MSRs disables them,
1093          * which we perfectly emulate ;-). Any other value should be at least
1094          * reported, some guests depend on them.
1095          */
1096         case MSR_P6_EVNTSEL0:
1097         case MSR_P6_EVNTSEL1:
1098         case MSR_K7_EVNTSEL0:
1099         case MSR_K7_EVNTSEL1:
1100         case MSR_K7_EVNTSEL2:
1101         case MSR_K7_EVNTSEL3:
1102                 if (data != 0)
1103                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1104                                 "0x%x data 0x%llx\n", msr, data);
1105                 break;
1106         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1107          * so we ignore writes to make it happy.
1108          */
1109         case MSR_P6_PERFCTR0:
1110         case MSR_P6_PERFCTR1:
1111         case MSR_K7_PERFCTR0:
1112         case MSR_K7_PERFCTR1:
1113         case MSR_K7_PERFCTR2:
1114         case MSR_K7_PERFCTR3:
1115                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1116                         "0x%x data 0x%llx\n", msr, data);
1117                 break;
1118         default:
1119                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1120                         return xen_hvm_config(vcpu, data);
1121                 if (!ignore_msrs) {
1122                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1123                                 msr, data);
1124                         return 1;
1125                 } else {
1126                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1127                                 msr, data);
1128                         break;
1129                 }
1130         }
1131         return 0;
1132 }
1133 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1134
1135
1136 /*
1137  * Reads an msr value (of 'msr_index') into 'pdata'.
1138  * Returns 0 on success, non-0 otherwise.
1139  * Assumes vcpu_load() was already called.
1140  */
1141 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1142 {
1143         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1144 }
1145
1146 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1147 {
1148         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1149
1150         if (!msr_mtrr_valid(msr))
1151                 return 1;
1152
1153         if (msr == MSR_MTRRdefType)
1154                 *pdata = vcpu->arch.mtrr_state.def_type +
1155                          (vcpu->arch.mtrr_state.enabled << 10);
1156         else if (msr == MSR_MTRRfix64K_00000)
1157                 *pdata = p[0];
1158         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1159                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1160         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1161                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1162         else if (msr == MSR_IA32_CR_PAT)
1163                 *pdata = vcpu->arch.pat;
1164         else {  /* Variable MTRRs */
1165                 int idx, is_mtrr_mask;
1166                 u64 *pt;
1167
1168                 idx = (msr - 0x200) / 2;
1169                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1170                 if (!is_mtrr_mask)
1171                         pt =
1172                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1173                 else
1174                         pt =
1175                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1176                 *pdata = *pt;
1177         }
1178
1179         return 0;
1180 }
1181
1182 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1183 {
1184         u64 data;
1185         u64 mcg_cap = vcpu->arch.mcg_cap;
1186         unsigned bank_num = mcg_cap & 0xff;
1187
1188         switch (msr) {
1189         case MSR_IA32_P5_MC_ADDR:
1190         case MSR_IA32_P5_MC_TYPE:
1191                 data = 0;
1192                 break;
1193         case MSR_IA32_MCG_CAP:
1194                 data = vcpu->arch.mcg_cap;
1195                 break;
1196         case MSR_IA32_MCG_CTL:
1197                 if (!(mcg_cap & MCG_CTL_P))
1198                         return 1;
1199                 data = vcpu->arch.mcg_ctl;
1200                 break;
1201         case MSR_IA32_MCG_STATUS:
1202                 data = vcpu->arch.mcg_status;
1203                 break;
1204         default:
1205                 if (msr >= MSR_IA32_MC0_CTL &&
1206                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1207                         u32 offset = msr - MSR_IA32_MC0_CTL;
1208                         data = vcpu->arch.mce_banks[offset];
1209                         break;
1210                 }
1211                 return 1;
1212         }
1213         *pdata = data;
1214         return 0;
1215 }
1216
1217 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1218 {
1219         u64 data;
1220
1221         switch (msr) {
1222         case MSR_IA32_PLATFORM_ID:
1223         case MSR_IA32_UCODE_REV:
1224         case MSR_IA32_EBL_CR_POWERON:
1225         case MSR_IA32_DEBUGCTLMSR:
1226         case MSR_IA32_LASTBRANCHFROMIP:
1227         case MSR_IA32_LASTBRANCHTOIP:
1228         case MSR_IA32_LASTINTFROMIP:
1229         case MSR_IA32_LASTINTTOIP:
1230         case MSR_K8_SYSCFG:
1231         case MSR_K7_HWCR:
1232         case MSR_VM_HSAVE_PA:
1233         case MSR_P6_PERFCTR0:
1234         case MSR_P6_PERFCTR1:
1235         case MSR_P6_EVNTSEL0:
1236         case MSR_P6_EVNTSEL1:
1237         case MSR_K7_EVNTSEL0:
1238         case MSR_K7_PERFCTR0:
1239         case MSR_K8_INT_PENDING_MSG:
1240         case MSR_AMD64_NB_CFG:
1241         case MSR_FAM10H_MMIO_CONF_BASE:
1242                 data = 0;
1243                 break;
1244         case MSR_MTRRcap:
1245                 data = 0x500 | KVM_NR_VAR_MTRR;
1246                 break;
1247         case 0x200 ... 0x2ff:
1248                 return get_msr_mtrr(vcpu, msr, pdata);
1249         case 0xcd: /* fsb frequency */
1250                 data = 3;
1251                 break;
1252         case MSR_IA32_APICBASE:
1253                 data = kvm_get_apic_base(vcpu);
1254                 break;
1255         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1256                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1257                 break;
1258         case MSR_IA32_MISC_ENABLE:
1259                 data = vcpu->arch.ia32_misc_enable_msr;
1260                 break;
1261         case MSR_IA32_PERF_STATUS:
1262                 /* TSC increment by tick */
1263                 data = 1000ULL;
1264                 /* CPU multiplier */
1265                 data |= (((uint64_t)4ULL) << 40);
1266                 break;
1267         case MSR_EFER:
1268                 data = vcpu->arch.shadow_efer;
1269                 break;
1270         case MSR_KVM_WALL_CLOCK:
1271                 data = vcpu->kvm->arch.wall_clock;
1272                 break;
1273         case MSR_KVM_SYSTEM_TIME:
1274                 data = vcpu->arch.time;
1275                 break;
1276         case MSR_IA32_P5_MC_ADDR:
1277         case MSR_IA32_P5_MC_TYPE:
1278         case MSR_IA32_MCG_CAP:
1279         case MSR_IA32_MCG_CTL:
1280         case MSR_IA32_MCG_STATUS:
1281         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1282                 return get_msr_mce(vcpu, msr, pdata);
1283         default:
1284                 if (!ignore_msrs) {
1285                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1286                         return 1;
1287                 } else {
1288                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1289                         data = 0;
1290                 }
1291                 break;
1292         }
1293         *pdata = data;
1294         return 0;
1295 }
1296 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1297
1298 /*
1299  * Read or write a bunch of msrs. All parameters are kernel addresses.
1300  *
1301  * @return number of msrs set successfully.
1302  */
1303 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1304                     struct kvm_msr_entry *entries,
1305                     int (*do_msr)(struct kvm_vcpu *vcpu,
1306                                   unsigned index, u64 *data))
1307 {
1308         int i;
1309
1310         vcpu_load(vcpu);
1311
1312         down_read(&vcpu->kvm->slots_lock);
1313         for (i = 0; i < msrs->nmsrs; ++i)
1314                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1315                         break;
1316         up_read(&vcpu->kvm->slots_lock);
1317
1318         vcpu_put(vcpu);
1319
1320         return i;
1321 }
1322
1323 /*
1324  * Read or write a bunch of msrs. Parameters are user addresses.
1325  *
1326  * @return number of msrs set successfully.
1327  */
1328 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1329                   int (*do_msr)(struct kvm_vcpu *vcpu,
1330                                 unsigned index, u64 *data),
1331                   int writeback)
1332 {
1333         struct kvm_msrs msrs;
1334         struct kvm_msr_entry *entries;
1335         int r, n;
1336         unsigned size;
1337
1338         r = -EFAULT;
1339         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1340                 goto out;
1341
1342         r = -E2BIG;
1343         if (msrs.nmsrs >= MAX_IO_MSRS)
1344                 goto out;
1345
1346         r = -ENOMEM;
1347         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1348         entries = vmalloc(size);
1349         if (!entries)
1350                 goto out;
1351
1352         r = -EFAULT;
1353         if (copy_from_user(entries, user_msrs->entries, size))
1354                 goto out_free;
1355
1356         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1357         if (r < 0)
1358                 goto out_free;
1359
1360         r = -EFAULT;
1361         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1362                 goto out_free;
1363
1364         r = n;
1365
1366 out_free:
1367         vfree(entries);
1368 out:
1369         return r;
1370 }
1371
1372 int kvm_dev_ioctl_check_extension(long ext)
1373 {
1374         int r;
1375
1376         switch (ext) {
1377         case KVM_CAP_IRQCHIP:
1378         case KVM_CAP_HLT:
1379         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1380         case KVM_CAP_SET_TSS_ADDR:
1381         case KVM_CAP_EXT_CPUID:
1382         case KVM_CAP_CLOCKSOURCE:
1383         case KVM_CAP_PIT:
1384         case KVM_CAP_NOP_IO_DELAY:
1385         case KVM_CAP_MP_STATE:
1386         case KVM_CAP_SYNC_MMU:
1387         case KVM_CAP_REINJECT_CONTROL:
1388         case KVM_CAP_IRQ_INJECT_STATUS:
1389         case KVM_CAP_ASSIGN_DEV_IRQ:
1390         case KVM_CAP_IRQFD:
1391         case KVM_CAP_IOEVENTFD:
1392         case KVM_CAP_PIT2:
1393         case KVM_CAP_PIT_STATE2:
1394         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1395         case KVM_CAP_XEN_HVM:
1396         case KVM_CAP_ADJUST_CLOCK:
1397         case KVM_CAP_VCPU_EVENTS:
1398                 r = 1;
1399                 break;
1400         case KVM_CAP_COALESCED_MMIO:
1401                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1402                 break;
1403         case KVM_CAP_VAPIC:
1404                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1405                 break;
1406         case KVM_CAP_NR_VCPUS:
1407                 r = KVM_MAX_VCPUS;
1408                 break;
1409         case KVM_CAP_NR_MEMSLOTS:
1410                 r = KVM_MEMORY_SLOTS;
1411                 break;
1412         case KVM_CAP_PV_MMU:    /* obsolete */
1413                 r = 0;
1414                 break;
1415         case KVM_CAP_IOMMU:
1416                 r = iommu_found();
1417                 break;
1418         case KVM_CAP_MCE:
1419                 r = KVM_MAX_MCE_BANKS;
1420                 break;
1421         default:
1422                 r = 0;
1423                 break;
1424         }
1425         return r;
1426
1427 }
1428
1429 long kvm_arch_dev_ioctl(struct file *filp,
1430                         unsigned int ioctl, unsigned long arg)
1431 {
1432         void __user *argp = (void __user *)arg;
1433         long r;
1434
1435         switch (ioctl) {
1436         case KVM_GET_MSR_INDEX_LIST: {
1437                 struct kvm_msr_list __user *user_msr_list = argp;
1438                 struct kvm_msr_list msr_list;
1439                 unsigned n;
1440
1441                 r = -EFAULT;
1442                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1443                         goto out;
1444                 n = msr_list.nmsrs;
1445                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1446                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1447                         goto out;
1448                 r = -E2BIG;
1449                 if (n < msr_list.nmsrs)
1450                         goto out;
1451                 r = -EFAULT;
1452                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1453                                  num_msrs_to_save * sizeof(u32)))
1454                         goto out;
1455                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1456                                  &emulated_msrs,
1457                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1458                         goto out;
1459                 r = 0;
1460                 break;
1461         }
1462         case KVM_GET_SUPPORTED_CPUID: {
1463                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1464                 struct kvm_cpuid2 cpuid;
1465
1466                 r = -EFAULT;
1467                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1468                         goto out;
1469                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1470                                                       cpuid_arg->entries);
1471                 if (r)
1472                         goto out;
1473
1474                 r = -EFAULT;
1475                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1476                         goto out;
1477                 r = 0;
1478                 break;
1479         }
1480         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1481                 u64 mce_cap;
1482
1483                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1484                 r = -EFAULT;
1485                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1486                         goto out;
1487                 r = 0;
1488                 break;
1489         }
1490         default:
1491                 r = -EINVAL;
1492         }
1493 out:
1494         return r;
1495 }
1496
1497 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1498 {
1499         kvm_x86_ops->vcpu_load(vcpu, cpu);
1500         if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1501                 unsigned long khz = cpufreq_quick_get(cpu);
1502                 if (!khz)
1503                         khz = tsc_khz;
1504                 per_cpu(cpu_tsc_khz, cpu) = khz;
1505         }
1506         kvm_request_guest_time_update(vcpu);
1507 }
1508
1509 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1510 {
1511         kvm_x86_ops->vcpu_put(vcpu);
1512         kvm_put_guest_fpu(vcpu);
1513 }
1514
1515 static int is_efer_nx(void)
1516 {
1517         unsigned long long efer = 0;
1518
1519         rdmsrl_safe(MSR_EFER, &efer);
1520         return efer & EFER_NX;
1521 }
1522
1523 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1524 {
1525         int i;
1526         struct kvm_cpuid_entry2 *e, *entry;
1527
1528         entry = NULL;
1529         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1530                 e = &vcpu->arch.cpuid_entries[i];
1531                 if (e->function == 0x80000001) {
1532                         entry = e;
1533                         break;
1534                 }
1535         }
1536         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1537                 entry->edx &= ~(1 << 20);
1538                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1539         }
1540 }
1541
1542 /* when an old userspace process fills a new kernel module */
1543 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1544                                     struct kvm_cpuid *cpuid,
1545                                     struct kvm_cpuid_entry __user *entries)
1546 {
1547         int r, i;
1548         struct kvm_cpuid_entry *cpuid_entries;
1549
1550         r = -E2BIG;
1551         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1552                 goto out;
1553         r = -ENOMEM;
1554         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1555         if (!cpuid_entries)
1556                 goto out;
1557         r = -EFAULT;
1558         if (copy_from_user(cpuid_entries, entries,
1559                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1560                 goto out_free;
1561         for (i = 0; i < cpuid->nent; i++) {
1562                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1563                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1564                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1565                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1566                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1567                 vcpu->arch.cpuid_entries[i].index = 0;
1568                 vcpu->arch.cpuid_entries[i].flags = 0;
1569                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1570                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1571                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1572         }
1573         vcpu->arch.cpuid_nent = cpuid->nent;
1574         cpuid_fix_nx_cap(vcpu);
1575         r = 0;
1576         kvm_apic_set_version(vcpu);
1577
1578 out_free:
1579         vfree(cpuid_entries);
1580 out:
1581         return r;
1582 }
1583
1584 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1585                                      struct kvm_cpuid2 *cpuid,
1586                                      struct kvm_cpuid_entry2 __user *entries)
1587 {
1588         int r;
1589
1590         r = -E2BIG;
1591         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1592                 goto out;
1593         r = -EFAULT;
1594         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1595                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1596                 goto out;
1597         vcpu->arch.cpuid_nent = cpuid->nent;
1598         kvm_apic_set_version(vcpu);
1599         return 0;
1600
1601 out:
1602         return r;
1603 }
1604
1605 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1606                                      struct kvm_cpuid2 *cpuid,
1607                                      struct kvm_cpuid_entry2 __user *entries)
1608 {
1609         int r;
1610
1611         r = -E2BIG;
1612         if (cpuid->nent < vcpu->arch.cpuid_nent)
1613                 goto out;
1614         r = -EFAULT;
1615         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1616                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1617                 goto out;
1618         return 0;
1619
1620 out:
1621         cpuid->nent = vcpu->arch.cpuid_nent;
1622         return r;
1623 }
1624
1625 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1626                            u32 index)
1627 {
1628         entry->function = function;
1629         entry->index = index;
1630         cpuid_count(entry->function, entry->index,
1631                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1632         entry->flags = 0;
1633 }
1634
1635 #define F(x) bit(X86_FEATURE_##x)
1636
1637 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1638                          u32 index, int *nent, int maxnent)
1639 {
1640         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1641         unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1642 #ifdef CONFIG_X86_64
1643         unsigned f_lm = F(LM);
1644 #else
1645         unsigned f_lm = 0;
1646 #endif
1647
1648         /* cpuid 1.edx */
1649         const u32 kvm_supported_word0_x86_features =
1650                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1651                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1652                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1653                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1654                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1655                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1656                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1657                 0 /* HTT, TM, Reserved, PBE */;
1658         /* cpuid 0x80000001.edx */
1659         const u32 kvm_supported_word1_x86_features =
1660                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1661                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1662                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1663                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1664                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1665                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1666                 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1667                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1668         /* cpuid 1.ecx */
1669         const u32 kvm_supported_word4_x86_features =
1670                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1671                 0 /* DS-CPL, VMX, SMX, EST */ |
1672                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1673                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1674                 0 /* Reserved, DCA */ | F(XMM4_1) |
1675                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1676                 0 /* Reserved, XSAVE, OSXSAVE */;
1677         /* cpuid 0x80000001.ecx */
1678         const u32 kvm_supported_word6_x86_features =
1679                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1680                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1681                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1682                 0 /* SKINIT */ | 0 /* WDT */;
1683
1684         /* all calls to cpuid_count() should be made on the same cpu */
1685         get_cpu();
1686         do_cpuid_1_ent(entry, function, index);
1687         ++*nent;
1688
1689         switch (function) {
1690         case 0:
1691                 entry->eax = min(entry->eax, (u32)0xb);
1692                 break;
1693         case 1:
1694                 entry->edx &= kvm_supported_word0_x86_features;
1695                 entry->ecx &= kvm_supported_word4_x86_features;
1696                 /* we support x2apic emulation even if host does not support
1697                  * it since we emulate x2apic in software */
1698                 entry->ecx |= F(X2APIC);
1699                 break;
1700         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1701          * may return different values. This forces us to get_cpu() before
1702          * issuing the first command, and also to emulate this annoying behavior
1703          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1704         case 2: {
1705                 int t, times = entry->eax & 0xff;
1706
1707                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1708                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1709                 for (t = 1; t < times && *nent < maxnent; ++t) {
1710                         do_cpuid_1_ent(&entry[t], function, 0);
1711                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1712                         ++*nent;
1713                 }
1714                 break;
1715         }
1716         /* function 4 and 0xb have additional index. */
1717         case 4: {
1718                 int i, cache_type;
1719
1720                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1721                 /* read more entries until cache_type is zero */
1722                 for (i = 1; *nent < maxnent; ++i) {
1723                         cache_type = entry[i - 1].eax & 0x1f;
1724                         if (!cache_type)
1725                                 break;
1726                         do_cpuid_1_ent(&entry[i], function, i);
1727                         entry[i].flags |=
1728                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1729                         ++*nent;
1730                 }
1731                 break;
1732         }
1733         case 0xb: {
1734                 int i, level_type;
1735
1736                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1737                 /* read more entries until level_type is zero */
1738                 for (i = 1; *nent < maxnent; ++i) {
1739                         level_type = entry[i - 1].ecx & 0xff00;
1740                         if (!level_type)
1741                                 break;
1742                         do_cpuid_1_ent(&entry[i], function, i);
1743                         entry[i].flags |=
1744                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1745                         ++*nent;
1746                 }
1747                 break;
1748         }
1749         case 0x80000000:
1750                 entry->eax = min(entry->eax, 0x8000001a);
1751                 break;
1752         case 0x80000001:
1753                 entry->edx &= kvm_supported_word1_x86_features;
1754                 entry->ecx &= kvm_supported_word6_x86_features;
1755                 break;
1756         }
1757         put_cpu();
1758 }
1759
1760 #undef F
1761
1762 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1763                                      struct kvm_cpuid_entry2 __user *entries)
1764 {
1765         struct kvm_cpuid_entry2 *cpuid_entries;
1766         int limit, nent = 0, r = -E2BIG;
1767         u32 func;
1768
1769         if (cpuid->nent < 1)
1770                 goto out;
1771         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1772                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1773         r = -ENOMEM;
1774         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1775         if (!cpuid_entries)
1776                 goto out;
1777
1778         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1779         limit = cpuid_entries[0].eax;
1780         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1781                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1782                              &nent, cpuid->nent);
1783         r = -E2BIG;
1784         if (nent >= cpuid->nent)
1785                 goto out_free;
1786
1787         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1788         limit = cpuid_entries[nent - 1].eax;
1789         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1790                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1791                              &nent, cpuid->nent);
1792         r = -E2BIG;
1793         if (nent >= cpuid->nent)
1794                 goto out_free;
1795
1796         r = -EFAULT;
1797         if (copy_to_user(entries, cpuid_entries,
1798                          nent * sizeof(struct kvm_cpuid_entry2)))
1799                 goto out_free;
1800         cpuid->nent = nent;
1801         r = 0;
1802
1803 out_free:
1804         vfree(cpuid_entries);
1805 out:
1806         return r;
1807 }
1808
1809 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1810                                     struct kvm_lapic_state *s)
1811 {
1812         vcpu_load(vcpu);
1813         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1814         vcpu_put(vcpu);
1815
1816         return 0;
1817 }
1818
1819 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1820                                     struct kvm_lapic_state *s)
1821 {
1822         vcpu_load(vcpu);
1823         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1824         kvm_apic_post_state_restore(vcpu);
1825         update_cr8_intercept(vcpu);
1826         vcpu_put(vcpu);
1827
1828         return 0;
1829 }
1830
1831 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1832                                     struct kvm_interrupt *irq)
1833 {
1834         if (irq->irq < 0 || irq->irq >= 256)
1835                 return -EINVAL;
1836         if (irqchip_in_kernel(vcpu->kvm))
1837                 return -ENXIO;
1838         vcpu_load(vcpu);
1839
1840         kvm_queue_interrupt(vcpu, irq->irq, false);
1841
1842         vcpu_put(vcpu);
1843
1844         return 0;
1845 }
1846
1847 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1848 {
1849         vcpu_load(vcpu);
1850         kvm_inject_nmi(vcpu);
1851         vcpu_put(vcpu);
1852
1853         return 0;
1854 }
1855
1856 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1857                                            struct kvm_tpr_access_ctl *tac)
1858 {
1859         if (tac->flags)
1860                 return -EINVAL;
1861         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1862         return 0;
1863 }
1864
1865 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1866                                         u64 mcg_cap)
1867 {
1868         int r;
1869         unsigned bank_num = mcg_cap & 0xff, bank;
1870
1871         r = -EINVAL;
1872         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
1873                 goto out;
1874         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1875                 goto out;
1876         r = 0;
1877         vcpu->arch.mcg_cap = mcg_cap;
1878         /* Init IA32_MCG_CTL to all 1s */
1879         if (mcg_cap & MCG_CTL_P)
1880                 vcpu->arch.mcg_ctl = ~(u64)0;
1881         /* Init IA32_MCi_CTL to all 1s */
1882         for (bank = 0; bank < bank_num; bank++)
1883                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1884 out:
1885         return r;
1886 }
1887
1888 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1889                                       struct kvm_x86_mce *mce)
1890 {
1891         u64 mcg_cap = vcpu->arch.mcg_cap;
1892         unsigned bank_num = mcg_cap & 0xff;
1893         u64 *banks = vcpu->arch.mce_banks;
1894
1895         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1896                 return -EINVAL;
1897         /*
1898          * if IA32_MCG_CTL is not all 1s, the uncorrected error
1899          * reporting is disabled
1900          */
1901         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1902             vcpu->arch.mcg_ctl != ~(u64)0)
1903                 return 0;
1904         banks += 4 * mce->bank;
1905         /*
1906          * if IA32_MCi_CTL is not all 1s, the uncorrected error
1907          * reporting is disabled for the bank
1908          */
1909         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1910                 return 0;
1911         if (mce->status & MCI_STATUS_UC) {
1912                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1913                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
1914                         printk(KERN_DEBUG "kvm: set_mce: "
1915                                "injects mce exception while "
1916                                "previous one is in progress!\n");
1917                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1918                         return 0;
1919                 }
1920                 if (banks[1] & MCI_STATUS_VAL)
1921                         mce->status |= MCI_STATUS_OVER;
1922                 banks[2] = mce->addr;
1923                 banks[3] = mce->misc;
1924                 vcpu->arch.mcg_status = mce->mcg_status;
1925                 banks[1] = mce->status;
1926                 kvm_queue_exception(vcpu, MC_VECTOR);
1927         } else if (!(banks[1] & MCI_STATUS_VAL)
1928                    || !(banks[1] & MCI_STATUS_UC)) {
1929                 if (banks[1] & MCI_STATUS_VAL)
1930                         mce->status |= MCI_STATUS_OVER;
1931                 banks[2] = mce->addr;
1932                 banks[3] = mce->misc;
1933                 banks[1] = mce->status;
1934         } else
1935                 banks[1] |= MCI_STATUS_OVER;
1936         return 0;
1937 }
1938
1939 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
1940                                                struct kvm_vcpu_events *events)
1941 {
1942         vcpu_load(vcpu);
1943
1944         events->exception.injected = vcpu->arch.exception.pending;
1945         events->exception.nr = vcpu->arch.exception.nr;
1946         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
1947         events->exception.error_code = vcpu->arch.exception.error_code;
1948
1949         events->interrupt.injected = vcpu->arch.interrupt.pending;
1950         events->interrupt.nr = vcpu->arch.interrupt.nr;
1951         events->interrupt.soft = vcpu->arch.interrupt.soft;
1952
1953         events->nmi.injected = vcpu->arch.nmi_injected;
1954         events->nmi.pending = vcpu->arch.nmi_pending;
1955         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
1956
1957         events->sipi_vector = vcpu->arch.sipi_vector;
1958
1959         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
1960                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR);
1961
1962         vcpu_put(vcpu);
1963 }
1964
1965 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
1966                                               struct kvm_vcpu_events *events)
1967 {
1968         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
1969                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR))
1970                 return -EINVAL;
1971
1972         vcpu_load(vcpu);
1973
1974         vcpu->arch.exception.pending = events->exception.injected;
1975         vcpu->arch.exception.nr = events->exception.nr;
1976         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
1977         vcpu->arch.exception.error_code = events->exception.error_code;
1978
1979         vcpu->arch.interrupt.pending = events->interrupt.injected;
1980         vcpu->arch.interrupt.nr = events->interrupt.nr;
1981         vcpu->arch.interrupt.soft = events->interrupt.soft;
1982         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
1983                 kvm_pic_clear_isr_ack(vcpu->kvm);
1984
1985         vcpu->arch.nmi_injected = events->nmi.injected;
1986         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
1987                 vcpu->arch.nmi_pending = events->nmi.pending;
1988         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
1989
1990         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
1991                 vcpu->arch.sipi_vector = events->sipi_vector;
1992
1993         vcpu_put(vcpu);
1994
1995         return 0;
1996 }
1997
1998 long kvm_arch_vcpu_ioctl(struct file *filp,
1999                          unsigned int ioctl, unsigned long arg)
2000 {
2001         struct kvm_vcpu *vcpu = filp->private_data;
2002         void __user *argp = (void __user *)arg;
2003         int r;
2004         struct kvm_lapic_state *lapic = NULL;
2005
2006         switch (ioctl) {
2007         case KVM_GET_LAPIC: {
2008                 r = -EINVAL;
2009                 if (!vcpu->arch.apic)
2010                         goto out;
2011                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2012
2013                 r = -ENOMEM;
2014                 if (!lapic)
2015                         goto out;
2016                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2017                 if (r)
2018                         goto out;
2019                 r = -EFAULT;
2020                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2021                         goto out;
2022                 r = 0;
2023                 break;
2024         }
2025         case KVM_SET_LAPIC: {
2026                 r = -EINVAL;
2027                 if (!vcpu->arch.apic)
2028                         goto out;
2029                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2030                 r = -ENOMEM;
2031                 if (!lapic)
2032                         goto out;
2033                 r = -EFAULT;
2034                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2035                         goto out;
2036                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2037                 if (r)
2038                         goto out;
2039                 r = 0;
2040                 break;
2041         }
2042         case KVM_INTERRUPT: {
2043                 struct kvm_interrupt irq;
2044
2045                 r = -EFAULT;
2046                 if (copy_from_user(&irq, argp, sizeof irq))
2047                         goto out;
2048                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2049                 if (r)
2050                         goto out;
2051                 r = 0;
2052                 break;
2053         }
2054         case KVM_NMI: {
2055                 r = kvm_vcpu_ioctl_nmi(vcpu);
2056                 if (r)
2057                         goto out;
2058                 r = 0;
2059                 break;
2060         }
2061         case KVM_SET_CPUID: {
2062                 struct kvm_cpuid __user *cpuid_arg = argp;
2063                 struct kvm_cpuid cpuid;
2064
2065                 r = -EFAULT;
2066                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2067                         goto out;
2068                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2069                 if (r)
2070                         goto out;
2071                 break;
2072         }
2073         case KVM_SET_CPUID2: {
2074                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2075                 struct kvm_cpuid2 cpuid;
2076
2077                 r = -EFAULT;
2078                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2079                         goto out;
2080                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2081                                               cpuid_arg->entries);
2082                 if (r)
2083                         goto out;
2084                 break;
2085         }
2086         case KVM_GET_CPUID2: {
2087                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2088                 struct kvm_cpuid2 cpuid;
2089
2090                 r = -EFAULT;
2091                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2092                         goto out;
2093                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2094                                               cpuid_arg->entries);
2095                 if (r)
2096                         goto out;
2097                 r = -EFAULT;
2098                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2099                         goto out;
2100                 r = 0;
2101                 break;
2102         }
2103         case KVM_GET_MSRS:
2104                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2105                 break;
2106         case KVM_SET_MSRS:
2107                 r = msr_io(vcpu, argp, do_set_msr, 0);
2108                 break;
2109         case KVM_TPR_ACCESS_REPORTING: {
2110                 struct kvm_tpr_access_ctl tac;
2111
2112                 r = -EFAULT;
2113                 if (copy_from_user(&tac, argp, sizeof tac))
2114                         goto out;
2115                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2116                 if (r)
2117                         goto out;
2118                 r = -EFAULT;
2119                 if (copy_to_user(argp, &tac, sizeof tac))
2120                         goto out;
2121                 r = 0;
2122                 break;
2123         };
2124         case KVM_SET_VAPIC_ADDR: {
2125                 struct kvm_vapic_addr va;
2126
2127                 r = -EINVAL;
2128                 if (!irqchip_in_kernel(vcpu->kvm))
2129                         goto out;
2130                 r = -EFAULT;
2131                 if (copy_from_user(&va, argp, sizeof va))
2132                         goto out;
2133                 r = 0;
2134                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2135                 break;
2136         }
2137         case KVM_X86_SETUP_MCE: {
2138                 u64 mcg_cap;
2139
2140                 r = -EFAULT;
2141                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2142                         goto out;
2143                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2144                 break;
2145         }
2146         case KVM_X86_SET_MCE: {
2147                 struct kvm_x86_mce mce;
2148
2149                 r = -EFAULT;
2150                 if (copy_from_user(&mce, argp, sizeof mce))
2151                         goto out;
2152                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2153                 break;
2154         }
2155         case KVM_GET_VCPU_EVENTS: {
2156                 struct kvm_vcpu_events events;
2157
2158                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2159
2160                 r = -EFAULT;
2161                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2162                         break;
2163                 r = 0;
2164                 break;
2165         }
2166         case KVM_SET_VCPU_EVENTS: {
2167                 struct kvm_vcpu_events events;
2168
2169                 r = -EFAULT;
2170                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2171                         break;
2172
2173                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2174                 break;
2175         }
2176         default:
2177                 r = -EINVAL;
2178         }
2179 out:
2180         kfree(lapic);
2181         return r;
2182 }
2183
2184 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2185 {
2186         int ret;
2187
2188         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2189                 return -1;
2190         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2191         return ret;
2192 }
2193
2194 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2195                                               u64 ident_addr)
2196 {
2197         kvm->arch.ept_identity_map_addr = ident_addr;
2198         return 0;
2199 }
2200
2201 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2202                                           u32 kvm_nr_mmu_pages)
2203 {
2204         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2205                 return -EINVAL;
2206
2207         down_write(&kvm->slots_lock);
2208         spin_lock(&kvm->mmu_lock);
2209
2210         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2211         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2212
2213         spin_unlock(&kvm->mmu_lock);
2214         up_write(&kvm->slots_lock);
2215         return 0;
2216 }
2217
2218 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2219 {
2220         return kvm->arch.n_alloc_mmu_pages;
2221 }
2222
2223 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2224 {
2225         int i;
2226         struct kvm_mem_alias *alias;
2227
2228         for (i = 0; i < kvm->arch.naliases; ++i) {
2229                 alias = &kvm->arch.aliases[i];
2230                 if (gfn >= alias->base_gfn
2231                     && gfn < alias->base_gfn + alias->npages)
2232                         return alias->target_gfn + gfn - alias->base_gfn;
2233         }
2234         return gfn;
2235 }
2236
2237 /*
2238  * Set a new alias region.  Aliases map a portion of physical memory into
2239  * another portion.  This is useful for memory windows, for example the PC
2240  * VGA region.
2241  */
2242 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2243                                          struct kvm_memory_alias *alias)
2244 {
2245         int r, n;
2246         struct kvm_mem_alias *p;
2247
2248         r = -EINVAL;
2249         /* General sanity checks */
2250         if (alias->memory_size & (PAGE_SIZE - 1))
2251                 goto out;
2252         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2253                 goto out;
2254         if (alias->slot >= KVM_ALIAS_SLOTS)
2255                 goto out;
2256         if (alias->guest_phys_addr + alias->memory_size
2257             < alias->guest_phys_addr)
2258                 goto out;
2259         if (alias->target_phys_addr + alias->memory_size
2260             < alias->target_phys_addr)
2261                 goto out;
2262
2263         down_write(&kvm->slots_lock);
2264         spin_lock(&kvm->mmu_lock);
2265
2266         p = &kvm->arch.aliases[alias->slot];
2267         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2268         p->npages = alias->memory_size >> PAGE_SHIFT;
2269         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2270
2271         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2272                 if (kvm->arch.aliases[n - 1].npages)
2273                         break;
2274         kvm->arch.naliases = n;
2275
2276         spin_unlock(&kvm->mmu_lock);
2277         kvm_mmu_zap_all(kvm);
2278
2279         up_write(&kvm->slots_lock);
2280
2281         return 0;
2282
2283 out:
2284         return r;
2285 }
2286
2287 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2288 {
2289         int r;
2290
2291         r = 0;
2292         switch (chip->chip_id) {
2293         case KVM_IRQCHIP_PIC_MASTER:
2294                 memcpy(&chip->chip.pic,
2295                         &pic_irqchip(kvm)->pics[0],
2296                         sizeof(struct kvm_pic_state));
2297                 break;
2298         case KVM_IRQCHIP_PIC_SLAVE:
2299                 memcpy(&chip->chip.pic,
2300                         &pic_irqchip(kvm)->pics[1],
2301                         sizeof(struct kvm_pic_state));
2302                 break;
2303         case KVM_IRQCHIP_IOAPIC:
2304                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2305                 break;
2306         default:
2307                 r = -EINVAL;
2308                 break;
2309         }
2310         return r;
2311 }
2312
2313 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2314 {
2315         int r;
2316
2317         r = 0;
2318         switch (chip->chip_id) {
2319         case KVM_IRQCHIP_PIC_MASTER:
2320                 spin_lock(&pic_irqchip(kvm)->lock);
2321                 memcpy(&pic_irqchip(kvm)->pics[0],
2322                         &chip->chip.pic,
2323                         sizeof(struct kvm_pic_state));
2324                 spin_unlock(&pic_irqchip(kvm)->lock);
2325                 break;
2326         case KVM_IRQCHIP_PIC_SLAVE:
2327                 spin_lock(&pic_irqchip(kvm)->lock);
2328                 memcpy(&pic_irqchip(kvm)->pics[1],
2329                         &chip->chip.pic,
2330                         sizeof(struct kvm_pic_state));
2331                 spin_unlock(&pic_irqchip(kvm)->lock);
2332                 break;
2333         case KVM_IRQCHIP_IOAPIC:
2334                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2335                 break;
2336         default:
2337                 r = -EINVAL;
2338                 break;
2339         }
2340         kvm_pic_update_irq(pic_irqchip(kvm));
2341         return r;
2342 }
2343
2344 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2345 {
2346         int r = 0;
2347
2348         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2349         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2350         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2351         return r;
2352 }
2353
2354 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2355 {
2356         int r = 0;
2357
2358         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2359         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2360         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2361         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2362         return r;
2363 }
2364
2365 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2366 {
2367         int r = 0;
2368
2369         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2370         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2371                 sizeof(ps->channels));
2372         ps->flags = kvm->arch.vpit->pit_state.flags;
2373         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2374         return r;
2375 }
2376
2377 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2378 {
2379         int r = 0, start = 0;
2380         u32 prev_legacy, cur_legacy;
2381         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2382         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2383         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2384         if (!prev_legacy && cur_legacy)
2385                 start = 1;
2386         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2387                sizeof(kvm->arch.vpit->pit_state.channels));
2388         kvm->arch.vpit->pit_state.flags = ps->flags;
2389         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2390         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2391         return r;
2392 }
2393
2394 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2395                                  struct kvm_reinject_control *control)
2396 {
2397         if (!kvm->arch.vpit)
2398                 return -ENXIO;
2399         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2400         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2401         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2402         return 0;
2403 }
2404
2405 /*
2406  * Get (and clear) the dirty memory log for a memory slot.
2407  */
2408 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2409                                       struct kvm_dirty_log *log)
2410 {
2411         int r;
2412         int n;
2413         struct kvm_memory_slot *memslot;
2414         int is_dirty = 0;
2415
2416         down_write(&kvm->slots_lock);
2417
2418         r = kvm_get_dirty_log(kvm, log, &is_dirty);
2419         if (r)
2420                 goto out;
2421
2422         /* If nothing is dirty, don't bother messing with page tables. */
2423         if (is_dirty) {
2424                 spin_lock(&kvm->mmu_lock);
2425                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2426                 spin_unlock(&kvm->mmu_lock);
2427                 memslot = &kvm->memslots[log->slot];
2428                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2429                 memset(memslot->dirty_bitmap, 0, n);
2430         }
2431         r = 0;
2432 out:
2433         up_write(&kvm->slots_lock);
2434         return r;
2435 }
2436
2437 long kvm_arch_vm_ioctl(struct file *filp,
2438                        unsigned int ioctl, unsigned long arg)
2439 {
2440         struct kvm *kvm = filp->private_data;
2441         void __user *argp = (void __user *)arg;
2442         int r = -ENOTTY;
2443         /*
2444          * This union makes it completely explicit to gcc-3.x
2445          * that these two variables' stack usage should be
2446          * combined, not added together.
2447          */
2448         union {
2449                 struct kvm_pit_state ps;
2450                 struct kvm_pit_state2 ps2;
2451                 struct kvm_memory_alias alias;
2452                 struct kvm_pit_config pit_config;
2453         } u;
2454
2455         switch (ioctl) {
2456         case KVM_SET_TSS_ADDR:
2457                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2458                 if (r < 0)
2459                         goto out;
2460                 break;
2461         case KVM_SET_IDENTITY_MAP_ADDR: {
2462                 u64 ident_addr;
2463
2464                 r = -EFAULT;
2465                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2466                         goto out;
2467                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2468                 if (r < 0)
2469                         goto out;
2470                 break;
2471         }
2472         case KVM_SET_MEMORY_REGION: {
2473                 struct kvm_memory_region kvm_mem;
2474                 struct kvm_userspace_memory_region kvm_userspace_mem;
2475
2476                 r = -EFAULT;
2477                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2478                         goto out;
2479                 kvm_userspace_mem.slot = kvm_mem.slot;
2480                 kvm_userspace_mem.flags = kvm_mem.flags;
2481                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2482                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2483                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2484                 if (r)
2485                         goto out;
2486                 break;
2487         }
2488         case KVM_SET_NR_MMU_PAGES:
2489                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2490                 if (r)
2491                         goto out;
2492                 break;
2493         case KVM_GET_NR_MMU_PAGES:
2494                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2495                 break;
2496         case KVM_SET_MEMORY_ALIAS:
2497                 r = -EFAULT;
2498                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2499                         goto out;
2500                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2501                 if (r)
2502                         goto out;
2503                 break;
2504         case KVM_CREATE_IRQCHIP: {
2505                 struct kvm_pic *vpic;
2506
2507                 mutex_lock(&kvm->lock);
2508                 r = -EEXIST;
2509                 if (kvm->arch.vpic)
2510                         goto create_irqchip_unlock;
2511                 r = -ENOMEM;
2512                 vpic = kvm_create_pic(kvm);
2513                 if (vpic) {
2514                         r = kvm_ioapic_init(kvm);
2515                         if (r) {
2516                                 kfree(vpic);
2517                                 goto create_irqchip_unlock;
2518                         }
2519                 } else
2520                         goto create_irqchip_unlock;
2521                 smp_wmb();
2522                 kvm->arch.vpic = vpic;
2523                 smp_wmb();
2524                 r = kvm_setup_default_irq_routing(kvm);
2525                 if (r) {
2526                         mutex_lock(&kvm->irq_lock);
2527                         kfree(kvm->arch.vpic);
2528                         kfree(kvm->arch.vioapic);
2529                         kvm->arch.vpic = NULL;
2530                         kvm->arch.vioapic = NULL;
2531                         mutex_unlock(&kvm->irq_lock);
2532                 }
2533         create_irqchip_unlock:
2534                 mutex_unlock(&kvm->lock);
2535                 break;
2536         }
2537         case KVM_CREATE_PIT:
2538                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2539                 goto create_pit;
2540         case KVM_CREATE_PIT2:
2541                 r = -EFAULT;
2542                 if (copy_from_user(&u.pit_config, argp,
2543                                    sizeof(struct kvm_pit_config)))
2544                         goto out;
2545         create_pit:
2546                 down_write(&kvm->slots_lock);
2547                 r = -EEXIST;
2548                 if (kvm->arch.vpit)
2549                         goto create_pit_unlock;
2550                 r = -ENOMEM;
2551                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2552                 if (kvm->arch.vpit)
2553                         r = 0;
2554         create_pit_unlock:
2555                 up_write(&kvm->slots_lock);
2556                 break;
2557         case KVM_IRQ_LINE_STATUS:
2558         case KVM_IRQ_LINE: {
2559                 struct kvm_irq_level irq_event;
2560
2561                 r = -EFAULT;
2562                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2563                         goto out;
2564                 if (irqchip_in_kernel(kvm)) {
2565                         __s32 status;
2566                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2567                                         irq_event.irq, irq_event.level);
2568                         if (ioctl == KVM_IRQ_LINE_STATUS) {
2569                                 irq_event.status = status;
2570                                 if (copy_to_user(argp, &irq_event,
2571                                                         sizeof irq_event))
2572                                         goto out;
2573                         }
2574                         r = 0;
2575                 }
2576                 break;
2577         }
2578         case KVM_GET_IRQCHIP: {
2579                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2580                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2581
2582                 r = -ENOMEM;
2583                 if (!chip)
2584                         goto out;
2585                 r = -EFAULT;
2586                 if (copy_from_user(chip, argp, sizeof *chip))
2587                         goto get_irqchip_out;
2588                 r = -ENXIO;
2589                 if (!irqchip_in_kernel(kvm))
2590                         goto get_irqchip_out;
2591                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2592                 if (r)
2593                         goto get_irqchip_out;
2594                 r = -EFAULT;
2595                 if (copy_to_user(argp, chip, sizeof *chip))
2596                         goto get_irqchip_out;
2597                 r = 0;
2598         get_irqchip_out:
2599                 kfree(chip);
2600                 if (r)
2601                         goto out;
2602                 break;
2603         }
2604         case KVM_SET_IRQCHIP: {
2605                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2606                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2607
2608                 r = -ENOMEM;
2609                 if (!chip)
2610                         goto out;
2611                 r = -EFAULT;
2612                 if (copy_from_user(chip, argp, sizeof *chip))
2613                         goto set_irqchip_out;
2614                 r = -ENXIO;
2615                 if (!irqchip_in_kernel(kvm))
2616                         goto set_irqchip_out;
2617                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2618                 if (r)
2619                         goto set_irqchip_out;
2620                 r = 0;
2621         set_irqchip_out:
2622                 kfree(chip);
2623                 if (r)
2624                         goto out;
2625                 break;
2626         }
2627         case KVM_GET_PIT: {
2628                 r = -EFAULT;
2629                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2630                         goto out;
2631                 r = -ENXIO;
2632                 if (!kvm->arch.vpit)
2633                         goto out;
2634                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2635                 if (r)
2636                         goto out;
2637                 r = -EFAULT;
2638                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2639                         goto out;
2640                 r = 0;
2641                 break;
2642         }
2643         case KVM_SET_PIT: {
2644                 r = -EFAULT;
2645                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2646                         goto out;
2647                 r = -ENXIO;
2648                 if (!kvm->arch.vpit)
2649                         goto out;
2650                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2651                 if (r)
2652                         goto out;
2653                 r = 0;
2654                 break;
2655         }
2656         case KVM_GET_PIT2: {
2657                 r = -ENXIO;
2658                 if (!kvm->arch.vpit)
2659                         goto out;
2660                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2661                 if (r)
2662                         goto out;
2663                 r = -EFAULT;
2664                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2665                         goto out;
2666                 r = 0;
2667                 break;
2668         }
2669         case KVM_SET_PIT2: {
2670                 r = -EFAULT;
2671                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2672                         goto out;
2673                 r = -ENXIO;
2674                 if (!kvm->arch.vpit)
2675                         goto out;
2676                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2677                 if (r)
2678                         goto out;
2679                 r = 0;
2680                 break;
2681         }
2682         case KVM_REINJECT_CONTROL: {
2683                 struct kvm_reinject_control control;
2684                 r =  -EFAULT;
2685                 if (copy_from_user(&control, argp, sizeof(control)))
2686                         goto out;
2687                 r = kvm_vm_ioctl_reinject(kvm, &control);
2688                 if (r)
2689                         goto out;
2690                 r = 0;
2691                 break;
2692         }
2693         case KVM_XEN_HVM_CONFIG: {
2694                 r = -EFAULT;
2695                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
2696                                    sizeof(struct kvm_xen_hvm_config)))
2697                         goto out;
2698                 r = -EINVAL;
2699                 if (kvm->arch.xen_hvm_config.flags)
2700                         goto out;
2701                 r = 0;
2702                 break;
2703         }
2704         case KVM_SET_CLOCK: {
2705                 struct timespec now;
2706                 struct kvm_clock_data user_ns;
2707                 u64 now_ns;
2708                 s64 delta;
2709
2710                 r = -EFAULT;
2711                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
2712                         goto out;
2713
2714                 r = -EINVAL;
2715                 if (user_ns.flags)
2716                         goto out;
2717
2718                 r = 0;
2719                 ktime_get_ts(&now);
2720                 now_ns = timespec_to_ns(&now);
2721                 delta = user_ns.clock - now_ns;
2722                 kvm->arch.kvmclock_offset = delta;
2723                 break;
2724         }
2725         case KVM_GET_CLOCK: {
2726                 struct timespec now;
2727                 struct kvm_clock_data user_ns;
2728                 u64 now_ns;
2729
2730                 ktime_get_ts(&now);
2731                 now_ns = timespec_to_ns(&now);
2732                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
2733                 user_ns.flags = 0;
2734
2735                 r = -EFAULT;
2736                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
2737                         goto out;
2738                 r = 0;
2739                 break;
2740         }
2741
2742         default:
2743                 ;
2744         }
2745 out:
2746         return r;
2747 }
2748
2749 static void kvm_init_msr_list(void)
2750 {
2751         u32 dummy[2];
2752         unsigned i, j;
2753
2754         /* skip the first msrs in the list. KVM-specific */
2755         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
2756                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2757                         continue;
2758                 if (j < i)
2759                         msrs_to_save[j] = msrs_to_save[i];
2760                 j++;
2761         }
2762         num_msrs_to_save = j;
2763 }
2764
2765 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2766                            const void *v)
2767 {
2768         if (vcpu->arch.apic &&
2769             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2770                 return 0;
2771
2772         return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2773 }
2774
2775 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2776 {
2777         if (vcpu->arch.apic &&
2778             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2779                 return 0;
2780
2781         return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2782 }
2783
2784 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2785                                struct kvm_vcpu *vcpu)
2786 {
2787         void *data = val;
2788         int r = X86EMUL_CONTINUE;
2789
2790         while (bytes) {
2791                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2792                 unsigned offset = addr & (PAGE_SIZE-1);
2793                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2794                 int ret;
2795
2796                 if (gpa == UNMAPPED_GVA) {
2797                         r = X86EMUL_PROPAGATE_FAULT;
2798                         goto out;
2799                 }
2800                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2801                 if (ret < 0) {
2802                         r = X86EMUL_UNHANDLEABLE;
2803                         goto out;
2804                 }
2805
2806                 bytes -= toread;
2807                 data += toread;
2808                 addr += toread;
2809         }
2810 out:
2811         return r;
2812 }
2813
2814 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2815                                 struct kvm_vcpu *vcpu)
2816 {
2817         void *data = val;
2818         int r = X86EMUL_CONTINUE;
2819
2820         while (bytes) {
2821                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2822                 unsigned offset = addr & (PAGE_SIZE-1);
2823                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2824                 int ret;
2825
2826                 if (gpa == UNMAPPED_GVA) {
2827                         r = X86EMUL_PROPAGATE_FAULT;
2828                         goto out;
2829                 }
2830                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2831                 if (ret < 0) {
2832                         r = X86EMUL_UNHANDLEABLE;
2833                         goto out;
2834                 }
2835
2836                 bytes -= towrite;
2837                 data += towrite;
2838                 addr += towrite;
2839         }
2840 out:
2841         return r;
2842 }
2843
2844
2845 static int emulator_read_emulated(unsigned long addr,
2846                                   void *val,
2847                                   unsigned int bytes,
2848                                   struct kvm_vcpu *vcpu)
2849 {
2850         gpa_t                 gpa;
2851
2852         if (vcpu->mmio_read_completed) {
2853                 memcpy(val, vcpu->mmio_data, bytes);
2854                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2855                                vcpu->mmio_phys_addr, *(u64 *)val);
2856                 vcpu->mmio_read_completed = 0;
2857                 return X86EMUL_CONTINUE;
2858         }
2859
2860         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2861
2862         /* For APIC access vmexit */
2863         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2864                 goto mmio;
2865
2866         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2867                                 == X86EMUL_CONTINUE)
2868                 return X86EMUL_CONTINUE;
2869         if (gpa == UNMAPPED_GVA)
2870                 return X86EMUL_PROPAGATE_FAULT;
2871
2872 mmio:
2873         /*
2874          * Is this MMIO handled locally?
2875          */
2876         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2877                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2878                 return X86EMUL_CONTINUE;
2879         }
2880
2881         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2882
2883         vcpu->mmio_needed = 1;
2884         vcpu->mmio_phys_addr = gpa;
2885         vcpu->mmio_size = bytes;
2886         vcpu->mmio_is_write = 0;
2887
2888         return X86EMUL_UNHANDLEABLE;
2889 }
2890
2891 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2892                           const void *val, int bytes)
2893 {
2894         int ret;
2895
2896         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2897         if (ret < 0)
2898                 return 0;
2899         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2900         return 1;
2901 }
2902
2903 static int emulator_write_emulated_onepage(unsigned long addr,
2904                                            const void *val,
2905                                            unsigned int bytes,
2906                                            struct kvm_vcpu *vcpu)
2907 {
2908         gpa_t                 gpa;
2909
2910         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2911
2912         if (gpa == UNMAPPED_GVA) {
2913                 kvm_inject_page_fault(vcpu, addr, 2);
2914                 return X86EMUL_PROPAGATE_FAULT;
2915         }
2916
2917         /* For APIC access vmexit */
2918         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2919                 goto mmio;
2920
2921         if (emulator_write_phys(vcpu, gpa, val, bytes))
2922                 return X86EMUL_CONTINUE;
2923
2924 mmio:
2925         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2926         /*
2927          * Is this MMIO handled locally?
2928          */
2929         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2930                 return X86EMUL_CONTINUE;
2931
2932         vcpu->mmio_needed = 1;
2933         vcpu->mmio_phys_addr = gpa;
2934         vcpu->mmio_size = bytes;
2935         vcpu->mmio_is_write = 1;
2936         memcpy(vcpu->mmio_data, val, bytes);
2937
2938         return X86EMUL_CONTINUE;
2939 }
2940
2941 int emulator_write_emulated(unsigned long addr,
2942                                    const void *val,
2943                                    unsigned int bytes,
2944                                    struct kvm_vcpu *vcpu)
2945 {
2946         /* Crossing a page boundary? */
2947         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2948                 int rc, now;
2949
2950                 now = -addr & ~PAGE_MASK;
2951                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2952                 if (rc != X86EMUL_CONTINUE)
2953                         return rc;
2954                 addr += now;
2955                 val += now;
2956                 bytes -= now;
2957         }
2958         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2959 }
2960 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2961
2962 static int emulator_cmpxchg_emulated(unsigned long addr,
2963                                      const void *old,
2964                                      const void *new,
2965                                      unsigned int bytes,
2966                                      struct kvm_vcpu *vcpu)
2967 {
2968         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
2969 #ifndef CONFIG_X86_64
2970         /* guests cmpxchg8b have to be emulated atomically */
2971         if (bytes == 8) {
2972                 gpa_t gpa;
2973                 struct page *page;
2974                 char *kaddr;
2975                 u64 val;
2976
2977                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2978
2979                 if (gpa == UNMAPPED_GVA ||
2980                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2981                         goto emul_write;
2982
2983                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2984                         goto emul_write;
2985
2986                 val = *(u64 *)new;
2987
2988                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2989
2990                 kaddr = kmap_atomic(page, KM_USER0);
2991                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2992                 kunmap_atomic(kaddr, KM_USER0);
2993                 kvm_release_page_dirty(page);
2994         }
2995 emul_write:
2996 #endif
2997
2998         return emulator_write_emulated(addr, new, bytes, vcpu);
2999 }
3000
3001 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3002 {
3003         return kvm_x86_ops->get_segment_base(vcpu, seg);
3004 }
3005
3006 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3007 {
3008         kvm_mmu_invlpg(vcpu, address);
3009         return X86EMUL_CONTINUE;
3010 }
3011
3012 int emulate_clts(struct kvm_vcpu *vcpu)
3013 {
3014         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
3015         return X86EMUL_CONTINUE;
3016 }
3017
3018 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3019 {
3020         struct kvm_vcpu *vcpu = ctxt->vcpu;
3021
3022         switch (dr) {
3023         case 0 ... 3:
3024                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
3025                 return X86EMUL_CONTINUE;
3026         default:
3027                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
3028                 return X86EMUL_UNHANDLEABLE;
3029         }
3030 }
3031
3032 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3033 {
3034         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
3035         int exception;
3036
3037         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
3038         if (exception) {
3039                 /* FIXME: better handling */
3040                 return X86EMUL_UNHANDLEABLE;
3041         }
3042         return X86EMUL_CONTINUE;
3043 }
3044
3045 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3046 {
3047         u8 opcodes[4];
3048         unsigned long rip = kvm_rip_read(vcpu);
3049         unsigned long rip_linear;
3050
3051         if (!printk_ratelimit())
3052                 return;
3053
3054         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3055
3056         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
3057
3058         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3059                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3060 }
3061 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3062
3063 static struct x86_emulate_ops emulate_ops = {
3064         .read_std            = kvm_read_guest_virt,
3065         .read_emulated       = emulator_read_emulated,
3066         .write_emulated      = emulator_write_emulated,
3067         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
3068 };
3069
3070 static void cache_all_regs(struct kvm_vcpu *vcpu)
3071 {
3072         kvm_register_read(vcpu, VCPU_REGS_RAX);
3073         kvm_register_read(vcpu, VCPU_REGS_RSP);
3074         kvm_register_read(vcpu, VCPU_REGS_RIP);
3075         vcpu->arch.regs_dirty = ~0;
3076 }
3077
3078 int emulate_instruction(struct kvm_vcpu *vcpu,
3079                         unsigned long cr2,
3080                         u16 error_code,
3081                         int emulation_type)
3082 {
3083         int r, shadow_mask;
3084         struct decode_cache *c;
3085         struct kvm_run *run = vcpu->run;
3086
3087         kvm_clear_exception_queue(vcpu);
3088         vcpu->arch.mmio_fault_cr2 = cr2;
3089         /*
3090          * TODO: fix emulate.c to use guest_read/write_register
3091          * instead of direct ->regs accesses, can save hundred cycles
3092          * on Intel for instructions that don't read/change RSP, for
3093          * for example.
3094          */
3095         cache_all_regs(vcpu);
3096
3097         vcpu->mmio_is_write = 0;
3098         vcpu->arch.pio.string = 0;
3099
3100         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3101                 int cs_db, cs_l;
3102                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3103
3104                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3105                 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
3106                 vcpu->arch.emulate_ctxt.mode =
3107                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3108                         ? X86EMUL_MODE_REAL : cs_l
3109                         ? X86EMUL_MODE_PROT64 : cs_db
3110                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3111
3112                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3113
3114                 /* Only allow emulation of specific instructions on #UD
3115                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
3116                 c = &vcpu->arch.emulate_ctxt.decode;
3117                 if (emulation_type & EMULTYPE_TRAP_UD) {
3118                         if (!c->twobyte)
3119                                 return EMULATE_FAIL;
3120                         switch (c->b) {
3121                         case 0x01: /* VMMCALL */
3122                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3123                                         return EMULATE_FAIL;
3124                                 break;
3125                         case 0x34: /* sysenter */
3126                         case 0x35: /* sysexit */
3127                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3128                                         return EMULATE_FAIL;
3129                                 break;
3130                         case 0x05: /* syscall */
3131                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3132                                         return EMULATE_FAIL;
3133                                 break;
3134                         default:
3135                                 return EMULATE_FAIL;
3136                         }
3137
3138                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3139                                 return EMULATE_FAIL;
3140                 }
3141
3142                 ++vcpu->stat.insn_emulation;
3143                 if (r)  {
3144                         ++vcpu->stat.insn_emulation_fail;
3145                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3146                                 return EMULATE_DONE;
3147                         return EMULATE_FAIL;
3148                 }
3149         }
3150
3151         if (emulation_type & EMULTYPE_SKIP) {
3152                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3153                 return EMULATE_DONE;
3154         }
3155
3156         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3157         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3158
3159         if (r == 0)
3160                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3161
3162         if (vcpu->arch.pio.string)
3163                 return EMULATE_DO_MMIO;
3164
3165         if ((r || vcpu->mmio_is_write) && run) {
3166                 run->exit_reason = KVM_EXIT_MMIO;
3167                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3168                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3169                 run->mmio.len = vcpu->mmio_size;
3170                 run->mmio.is_write = vcpu->mmio_is_write;
3171         }
3172
3173         if (r) {
3174                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3175                         return EMULATE_DONE;
3176                 if (!vcpu->mmio_needed) {
3177                         kvm_report_emulation_failure(vcpu, "mmio");
3178                         return EMULATE_FAIL;
3179                 }
3180                 return EMULATE_DO_MMIO;
3181         }
3182
3183         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3184
3185         if (vcpu->mmio_is_write) {
3186                 vcpu->mmio_needed = 0;
3187                 return EMULATE_DO_MMIO;
3188         }
3189
3190         return EMULATE_DONE;
3191 }
3192 EXPORT_SYMBOL_GPL(emulate_instruction);
3193
3194 static int pio_copy_data(struct kvm_vcpu *vcpu)
3195 {
3196         void *p = vcpu->arch.pio_data;
3197         gva_t q = vcpu->arch.pio.guest_gva;
3198         unsigned bytes;
3199         int ret;
3200
3201         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
3202         if (vcpu->arch.pio.in)
3203                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
3204         else
3205                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
3206         return ret;
3207 }
3208
3209 int complete_pio(struct kvm_vcpu *vcpu)
3210 {
3211         struct kvm_pio_request *io = &vcpu->arch.pio;
3212         long delta;
3213         int r;
3214         unsigned long val;
3215
3216         if (!io->string) {
3217                 if (io->in) {
3218                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3219                         memcpy(&val, vcpu->arch.pio_data, io->size);
3220                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
3221                 }
3222         } else {
3223                 if (io->in) {
3224                         r = pio_copy_data(vcpu);
3225                         if (r)
3226                                 return r;
3227                 }
3228
3229                 delta = 1;
3230                 if (io->rep) {
3231                         delta *= io->cur_count;
3232                         /*
3233                          * The size of the register should really depend on
3234                          * current address size.
3235                          */
3236                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
3237                         val -= delta;
3238                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
3239                 }
3240                 if (io->down)
3241                         delta = -delta;
3242                 delta *= io->size;
3243                 if (io->in) {
3244                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
3245                         val += delta;
3246                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
3247                 } else {
3248                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
3249                         val += delta;
3250                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
3251                 }
3252         }
3253
3254         io->count -= io->cur_count;
3255         io->cur_count = 0;
3256
3257         return 0;
3258 }
3259
3260 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3261 {
3262         /* TODO: String I/O for in kernel device */
3263         int r;
3264
3265         if (vcpu->arch.pio.in)
3266                 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
3267                                     vcpu->arch.pio.size, pd);
3268         else
3269                 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
3270                                      vcpu->arch.pio.size, pd);
3271         return r;
3272 }
3273
3274 static int pio_string_write(struct kvm_vcpu *vcpu)
3275 {
3276         struct kvm_pio_request *io = &vcpu->arch.pio;
3277         void *pd = vcpu->arch.pio_data;
3278         int i, r = 0;
3279
3280         for (i = 0; i < io->cur_count; i++) {
3281                 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
3282                                      io->port, io->size, pd)) {
3283                         r = -EOPNOTSUPP;
3284                         break;
3285                 }
3286                 pd += io->size;
3287         }
3288         return r;
3289 }
3290
3291 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
3292 {
3293         unsigned long val;
3294
3295         vcpu->run->exit_reason = KVM_EXIT_IO;
3296         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3297         vcpu->run->io.size = vcpu->arch.pio.size = size;
3298         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3299         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3300         vcpu->run->io.port = vcpu->arch.pio.port = port;
3301         vcpu->arch.pio.in = in;
3302         vcpu->arch.pio.string = 0;
3303         vcpu->arch.pio.down = 0;
3304         vcpu->arch.pio.rep = 0;
3305
3306         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3307                       size, 1);
3308
3309         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3310         memcpy(vcpu->arch.pio_data, &val, 4);
3311
3312         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3313                 complete_pio(vcpu);
3314                 return 1;
3315         }
3316         return 0;
3317 }
3318 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3319
3320 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3321                   int size, unsigned long count, int down,
3322                   gva_t address, int rep, unsigned port)
3323 {
3324         unsigned now, in_page;
3325         int ret = 0;
3326
3327         vcpu->run->exit_reason = KVM_EXIT_IO;
3328         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3329         vcpu->run->io.size = vcpu->arch.pio.size = size;
3330         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3331         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3332         vcpu->run->io.port = vcpu->arch.pio.port = port;
3333         vcpu->arch.pio.in = in;
3334         vcpu->arch.pio.string = 1;
3335         vcpu->arch.pio.down = down;
3336         vcpu->arch.pio.rep = rep;
3337
3338         trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3339                       size, count);
3340
3341         if (!count) {
3342                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3343                 return 1;
3344         }
3345
3346         if (!down)
3347                 in_page = PAGE_SIZE - offset_in_page(address);
3348         else
3349                 in_page = offset_in_page(address) + size;
3350         now = min(count, (unsigned long)in_page / size);
3351         if (!now)
3352                 now = 1;
3353         if (down) {
3354                 /*
3355                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
3356                  */
3357                 pr_unimpl(vcpu, "guest string pio down\n");
3358                 kvm_inject_gp(vcpu, 0);
3359                 return 1;
3360         }
3361         vcpu->run->io.count = now;
3362         vcpu->arch.pio.cur_count = now;
3363
3364         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3365                 kvm_x86_ops->skip_emulated_instruction(vcpu);
3366
3367         vcpu->arch.pio.guest_gva = address;
3368
3369         if (!vcpu->arch.pio.in) {
3370                 /* string PIO write */
3371                 ret = pio_copy_data(vcpu);
3372                 if (ret == X86EMUL_PROPAGATE_FAULT) {
3373                         kvm_inject_gp(vcpu, 0);
3374                         return 1;
3375                 }
3376                 if (ret == 0 && !pio_string_write(vcpu)) {
3377                         complete_pio(vcpu);
3378                         if (vcpu->arch.pio.count == 0)
3379                                 ret = 1;
3380                 }
3381         }
3382         /* no string PIO read support yet */
3383
3384         return ret;
3385 }
3386 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3387
3388 static void bounce_off(void *info)
3389 {
3390         /* nothing */
3391 }
3392
3393 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3394                                      void *data)
3395 {
3396         struct cpufreq_freqs *freq = data;
3397         struct kvm *kvm;
3398         struct kvm_vcpu *vcpu;
3399         int i, send_ipi = 0;
3400
3401         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3402                 return 0;
3403         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3404                 return 0;
3405         per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3406
3407         spin_lock(&kvm_lock);
3408         list_for_each_entry(kvm, &vm_list, vm_list) {
3409                 kvm_for_each_vcpu(i, vcpu, kvm) {
3410                         if (vcpu->cpu != freq->cpu)
3411                                 continue;
3412                         if (!kvm_request_guest_time_update(vcpu))
3413                                 continue;
3414                         if (vcpu->cpu != smp_processor_id())
3415                                 send_ipi++;
3416                 }
3417         }
3418         spin_unlock(&kvm_lock);
3419
3420         if (freq->old < freq->new && send_ipi) {
3421                 /*
3422                  * We upscale the frequency.  Must make the guest
3423                  * doesn't see old kvmclock values while running with
3424                  * the new frequency, otherwise we risk the guest sees
3425                  * time go backwards.
3426                  *
3427                  * In case we update the frequency for another cpu
3428                  * (which might be in guest context) send an interrupt
3429                  * to kick the cpu out of guest context.  Next time
3430                  * guest context is entered kvmclock will be updated,
3431                  * so the guest will not see stale values.
3432                  */
3433                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3434         }
3435         return 0;
3436 }
3437
3438 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3439         .notifier_call  = kvmclock_cpufreq_notifier
3440 };
3441
3442 static void kvm_timer_init(void)
3443 {
3444         int cpu;
3445
3446         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3447                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3448                                           CPUFREQ_TRANSITION_NOTIFIER);
3449                 for_each_online_cpu(cpu) {
3450                         unsigned long khz = cpufreq_get(cpu);
3451                         if (!khz)
3452                                 khz = tsc_khz;
3453                         per_cpu(cpu_tsc_khz, cpu) = khz;
3454                 }
3455         } else {
3456                 for_each_possible_cpu(cpu)
3457                         per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3458         }
3459 }
3460
3461 int kvm_arch_init(void *opaque)
3462 {
3463         int r;
3464         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3465
3466         if (kvm_x86_ops) {
3467                 printk(KERN_ERR "kvm: already loaded the other module\n");
3468                 r = -EEXIST;
3469                 goto out;
3470         }
3471
3472         if (!ops->cpu_has_kvm_support()) {
3473                 printk(KERN_ERR "kvm: no hardware support\n");
3474                 r = -EOPNOTSUPP;
3475                 goto out;
3476         }
3477         if (ops->disabled_by_bios()) {
3478                 printk(KERN_ERR "kvm: disabled by bios\n");
3479                 r = -EOPNOTSUPP;
3480                 goto out;
3481         }
3482
3483         r = kvm_mmu_module_init();
3484         if (r)
3485                 goto out;
3486
3487         kvm_init_msr_list();
3488
3489         kvm_x86_ops = ops;
3490         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3491         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3492         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3493                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
3494
3495         kvm_timer_init();
3496
3497         return 0;
3498
3499 out:
3500         return r;
3501 }
3502
3503 void kvm_arch_exit(void)
3504 {
3505         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3506                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3507                                             CPUFREQ_TRANSITION_NOTIFIER);
3508         kvm_x86_ops = NULL;
3509         kvm_mmu_module_exit();
3510 }
3511
3512 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3513 {
3514         ++vcpu->stat.halt_exits;
3515         if (irqchip_in_kernel(vcpu->kvm)) {
3516                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3517                 return 1;
3518         } else {
3519                 vcpu->run->exit_reason = KVM_EXIT_HLT;
3520                 return 0;
3521         }
3522 }
3523 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3524
3525 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3526                            unsigned long a1)
3527 {
3528         if (is_long_mode(vcpu))
3529                 return a0;
3530         else
3531                 return a0 | ((gpa_t)a1 << 32);
3532 }
3533
3534 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3535 {
3536         unsigned long nr, a0, a1, a2, a3, ret;
3537         int r = 1;
3538
3539         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3540         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3541         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3542         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3543         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3544
3545         trace_kvm_hypercall(nr, a0, a1, a2, a3);
3546
3547         if (!is_long_mode(vcpu)) {
3548                 nr &= 0xFFFFFFFF;
3549                 a0 &= 0xFFFFFFFF;
3550                 a1 &= 0xFFFFFFFF;
3551                 a2 &= 0xFFFFFFFF;
3552                 a3 &= 0xFFFFFFFF;
3553         }
3554
3555         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3556                 ret = -KVM_EPERM;
3557                 goto out;
3558         }
3559
3560         switch (nr) {
3561         case KVM_HC_VAPIC_POLL_IRQ:
3562                 ret = 0;
3563                 break;
3564         case KVM_HC_MMU_OP:
3565                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3566                 break;
3567         default:
3568                 ret = -KVM_ENOSYS;
3569                 break;
3570         }
3571 out:
3572         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3573         ++vcpu->stat.hypercalls;
3574         return r;
3575 }
3576 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3577
3578 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3579 {
3580         char instruction[3];
3581         int ret = 0;
3582         unsigned long rip = kvm_rip_read(vcpu);
3583
3584
3585         /*
3586          * Blow out the MMU to ensure that no other VCPU has an active mapping
3587          * to ensure that the updated hypercall appears atomically across all
3588          * VCPUs.
3589          */
3590         kvm_mmu_zap_all(vcpu->kvm);
3591
3592         kvm_x86_ops->patch_hypercall(vcpu, instruction);
3593         if (emulator_write_emulated(rip, instruction, 3, vcpu)
3594             != X86EMUL_CONTINUE)
3595                 ret = -EFAULT;
3596
3597         return ret;
3598 }
3599
3600 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3601 {
3602         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3603 }
3604
3605 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3606 {
3607         struct descriptor_table dt = { limit, base };
3608
3609         kvm_x86_ops->set_gdt(vcpu, &dt);
3610 }
3611
3612 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3613 {
3614         struct descriptor_table dt = { limit, base };
3615
3616         kvm_x86_ops->set_idt(vcpu, &dt);
3617 }
3618
3619 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3620                    unsigned long *rflags)
3621 {
3622         kvm_lmsw(vcpu, msw);
3623         *rflags = kvm_get_rflags(vcpu);
3624 }
3625
3626 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3627 {
3628         unsigned long value;
3629
3630         switch (cr) {
3631         case 0:
3632                 value = vcpu->arch.cr0;
3633                 break;
3634         case 2:
3635                 value = vcpu->arch.cr2;
3636                 break;
3637         case 3:
3638                 value = vcpu->arch.cr3;
3639                 break;
3640         case 4:
3641                 value = kvm_read_cr4(vcpu);
3642                 break;
3643         case 8:
3644                 value = kvm_get_cr8(vcpu);
3645                 break;
3646         default:
3647                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3648                 return 0;
3649         }
3650
3651         return value;
3652 }
3653
3654 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3655                      unsigned long *rflags)
3656 {
3657         switch (cr) {
3658         case 0:
3659                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3660                 *rflags = kvm_get_rflags(vcpu);
3661                 break;
3662         case 2:
3663                 vcpu->arch.cr2 = val;
3664                 break;
3665         case 3:
3666                 kvm_set_cr3(vcpu, val);
3667                 break;
3668         case 4:
3669                 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3670                 break;
3671         case 8:
3672                 kvm_set_cr8(vcpu, val & 0xfUL);
3673                 break;
3674         default:
3675                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3676         }
3677 }
3678
3679 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3680 {
3681         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3682         int j, nent = vcpu->arch.cpuid_nent;
3683
3684         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3685         /* when no next entry is found, the current entry[i] is reselected */
3686         for (j = i + 1; ; j = (j + 1) % nent) {
3687                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3688                 if (ej->function == e->function) {
3689                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3690                         return j;
3691                 }
3692         }
3693         return 0; /* silence gcc, even though control never reaches here */
3694 }
3695
3696 /* find an entry with matching function, matching index (if needed), and that
3697  * should be read next (if it's stateful) */
3698 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3699         u32 function, u32 index)
3700 {
3701         if (e->function != function)
3702                 return 0;
3703         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3704                 return 0;
3705         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3706             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3707                 return 0;
3708         return 1;
3709 }
3710
3711 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3712                                               u32 function, u32 index)
3713 {
3714         int i;
3715         struct kvm_cpuid_entry2 *best = NULL;
3716
3717         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3718                 struct kvm_cpuid_entry2 *e;
3719
3720                 e = &vcpu->arch.cpuid_entries[i];
3721                 if (is_matching_cpuid_entry(e, function, index)) {
3722                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3723                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3724                         best = e;
3725                         break;
3726                 }
3727                 /*
3728                  * Both basic or both extended?
3729                  */
3730                 if (((e->function ^ function) & 0x80000000) == 0)
3731                         if (!best || e->function > best->function)
3732                                 best = e;
3733         }
3734         return best;
3735 }
3736
3737 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3738 {
3739         struct kvm_cpuid_entry2 *best;
3740
3741         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3742         if (best)
3743                 return best->eax & 0xff;
3744         return 36;
3745 }
3746
3747 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3748 {
3749         u32 function, index;
3750         struct kvm_cpuid_entry2 *best;
3751
3752         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3753         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3754         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3755         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3756         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3757         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3758         best = kvm_find_cpuid_entry(vcpu, function, index);
3759         if (best) {
3760                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3761                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3762                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3763                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3764         }
3765         kvm_x86_ops->skip_emulated_instruction(vcpu);
3766         trace_kvm_cpuid(function,
3767                         kvm_register_read(vcpu, VCPU_REGS_RAX),
3768                         kvm_register_read(vcpu, VCPU_REGS_RBX),
3769                         kvm_register_read(vcpu, VCPU_REGS_RCX),
3770                         kvm_register_read(vcpu, VCPU_REGS_RDX));
3771 }
3772 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3773
3774 /*
3775  * Check if userspace requested an interrupt window, and that the
3776  * interrupt window is open.
3777  *
3778  * No need to exit to userspace if we already have an interrupt queued.
3779  */
3780 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
3781 {
3782         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3783                 vcpu->run->request_interrupt_window &&
3784                 kvm_arch_interrupt_allowed(vcpu));
3785 }
3786
3787 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
3788 {
3789         struct kvm_run *kvm_run = vcpu->run;
3790
3791         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3792         kvm_run->cr8 = kvm_get_cr8(vcpu);
3793         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3794         if (irqchip_in_kernel(vcpu->kvm))
3795                 kvm_run->ready_for_interrupt_injection = 1;
3796         else
3797                 kvm_run->ready_for_interrupt_injection =
3798                         kvm_arch_interrupt_allowed(vcpu) &&
3799                         !kvm_cpu_has_interrupt(vcpu) &&
3800                         !kvm_event_needs_reinjection(vcpu);
3801 }
3802
3803 static void vapic_enter(struct kvm_vcpu *vcpu)
3804 {
3805         struct kvm_lapic *apic = vcpu->arch.apic;
3806         struct page *page;
3807
3808         if (!apic || !apic->vapic_addr)
3809                 return;
3810
3811         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3812
3813         vcpu->arch.apic->vapic_page = page;
3814 }
3815
3816 static void vapic_exit(struct kvm_vcpu *vcpu)
3817 {
3818         struct kvm_lapic *apic = vcpu->arch.apic;
3819
3820         if (!apic || !apic->vapic_addr)
3821                 return;
3822
3823         down_read(&vcpu->kvm->slots_lock);
3824         kvm_release_page_dirty(apic->vapic_page);
3825         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3826         up_read(&vcpu->kvm->slots_lock);
3827 }
3828
3829 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3830 {
3831         int max_irr, tpr;
3832
3833         if (!kvm_x86_ops->update_cr8_intercept)
3834                 return;
3835
3836         if (!vcpu->arch.apic)
3837                 return;
3838
3839         if (!vcpu->arch.apic->vapic_addr)
3840                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3841         else
3842                 max_irr = -1;
3843
3844         if (max_irr != -1)
3845                 max_irr >>= 4;
3846
3847         tpr = kvm_lapic_get_cr8(vcpu);
3848
3849         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3850 }
3851
3852 static void inject_pending_event(struct kvm_vcpu *vcpu)
3853 {
3854         /* try to reinject previous events if any */
3855         if (vcpu->arch.exception.pending) {
3856                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3857                                           vcpu->arch.exception.has_error_code,
3858                                           vcpu->arch.exception.error_code);
3859                 return;
3860         }
3861
3862         if (vcpu->arch.nmi_injected) {
3863                 kvm_x86_ops->set_nmi(vcpu);
3864                 return;
3865         }
3866
3867         if (vcpu->arch.interrupt.pending) {
3868                 kvm_x86_ops->set_irq(vcpu);
3869                 return;
3870         }
3871
3872         /* try to inject new event if pending */
3873         if (vcpu->arch.nmi_pending) {
3874                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3875                         vcpu->arch.nmi_pending = false;
3876                         vcpu->arch.nmi_injected = true;
3877                         kvm_x86_ops->set_nmi(vcpu);
3878                 }
3879         } else if (kvm_cpu_has_interrupt(vcpu)) {
3880                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3881                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3882                                             false);
3883                         kvm_x86_ops->set_irq(vcpu);
3884                 }
3885         }
3886 }
3887
3888 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
3889 {
3890         int r;
3891         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3892                 vcpu->run->request_interrupt_window;
3893
3894         if (vcpu->requests)
3895                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3896                         kvm_mmu_unload(vcpu);
3897
3898         r = kvm_mmu_reload(vcpu);
3899         if (unlikely(r))
3900                 goto out;
3901
3902         if (vcpu->requests) {
3903                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3904                         __kvm_migrate_timers(vcpu);
3905                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3906                         kvm_write_guest_time(vcpu);
3907                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3908                         kvm_mmu_sync_roots(vcpu);
3909                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3910                         kvm_x86_ops->tlb_flush(vcpu);
3911                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3912                                        &vcpu->requests)) {
3913                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
3914                         r = 0;
3915                         goto out;
3916                 }
3917                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3918                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
3919                         r = 0;
3920                         goto out;
3921                 }
3922         }
3923
3924         preempt_disable();
3925
3926         kvm_x86_ops->prepare_guest_switch(vcpu);
3927         kvm_load_guest_fpu(vcpu);
3928
3929         local_irq_disable();
3930
3931         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3932         smp_mb__after_clear_bit();
3933
3934         if (vcpu->requests || need_resched() || signal_pending(current)) {
3935                 set_bit(KVM_REQ_KICK, &vcpu->requests);
3936                 local_irq_enable();
3937                 preempt_enable();
3938                 r = 1;
3939                 goto out;
3940         }
3941
3942         inject_pending_event(vcpu);
3943
3944         /* enable NMI/IRQ window open exits if needed */
3945         if (vcpu->arch.nmi_pending)
3946                 kvm_x86_ops->enable_nmi_window(vcpu);
3947         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3948                 kvm_x86_ops->enable_irq_window(vcpu);
3949
3950         if (kvm_lapic_enabled(vcpu)) {
3951                 update_cr8_intercept(vcpu);
3952                 kvm_lapic_sync_to_vapic(vcpu);
3953         }
3954
3955         up_read(&vcpu->kvm->slots_lock);
3956
3957         kvm_guest_enter();
3958
3959         if (unlikely(vcpu->arch.switch_db_regs)) {
3960                 set_debugreg(0, 7);
3961                 set_debugreg(vcpu->arch.eff_db[0], 0);
3962                 set_debugreg(vcpu->arch.eff_db[1], 1);
3963                 set_debugreg(vcpu->arch.eff_db[2], 2);
3964                 set_debugreg(vcpu->arch.eff_db[3], 3);
3965         }
3966
3967         trace_kvm_entry(vcpu->vcpu_id);
3968         kvm_x86_ops->run(vcpu);
3969
3970         /*
3971          * If the guest has used debug registers, at least dr7
3972          * will be disabled while returning to the host.
3973          * If we don't have active breakpoints in the host, we don't
3974          * care about the messed up debug address registers. But if
3975          * we have some of them active, restore the old state.
3976          */
3977         if (hw_breakpoint_active())
3978                 hw_breakpoint_restore();
3979
3980         set_bit(KVM_REQ_KICK, &vcpu->requests);
3981         local_irq_enable();
3982
3983         ++vcpu->stat.exits;
3984
3985         /*
3986          * We must have an instruction between local_irq_enable() and
3987          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3988          * the interrupt shadow.  The stat.exits increment will do nicely.
3989          * But we need to prevent reordering, hence this barrier():
3990          */
3991         barrier();
3992
3993         kvm_guest_exit();
3994
3995         preempt_enable();
3996
3997         down_read(&vcpu->kvm->slots_lock);
3998
3999         /*
4000          * Profile KVM exit RIPs:
4001          */
4002         if (unlikely(prof_on == KVM_PROFILING)) {
4003                 unsigned long rip = kvm_rip_read(vcpu);
4004                 profile_hit(KVM_PROFILING, (void *)rip);
4005         }
4006
4007
4008         kvm_lapic_sync_from_vapic(vcpu);
4009
4010         r = kvm_x86_ops->handle_exit(vcpu);
4011 out:
4012         return r;
4013 }
4014
4015
4016 static int __vcpu_run(struct kvm_vcpu *vcpu)
4017 {
4018         int r;
4019
4020         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4021                 pr_debug("vcpu %d received sipi with vector # %x\n",
4022                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
4023                 kvm_lapic_reset(vcpu);
4024                 r = kvm_arch_vcpu_reset(vcpu);
4025                 if (r)
4026                         return r;
4027                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4028         }
4029
4030         down_read(&vcpu->kvm->slots_lock);
4031         vapic_enter(vcpu);
4032
4033         r = 1;
4034         while (r > 0) {
4035                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4036                         r = vcpu_enter_guest(vcpu);
4037                 else {
4038                         up_read(&vcpu->kvm->slots_lock);
4039                         kvm_vcpu_block(vcpu);
4040                         down_read(&vcpu->kvm->slots_lock);
4041                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4042                         {
4043                                 switch(vcpu->arch.mp_state) {
4044                                 case KVM_MP_STATE_HALTED:
4045                                         vcpu->arch.mp_state =
4046                                                 KVM_MP_STATE_RUNNABLE;
4047                                 case KVM_MP_STATE_RUNNABLE:
4048                                         break;
4049                                 case KVM_MP_STATE_SIPI_RECEIVED:
4050                                 default:
4051                                         r = -EINTR;
4052                                         break;
4053                                 }
4054                         }
4055                 }
4056
4057                 if (r <= 0)
4058                         break;
4059
4060                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4061                 if (kvm_cpu_has_pending_timer(vcpu))
4062                         kvm_inject_pending_timer_irqs(vcpu);
4063
4064                 if (dm_request_for_irq_injection(vcpu)) {
4065                         r = -EINTR;
4066                         vcpu->run->exit_reason = KVM_EXIT_INTR;
4067                         ++vcpu->stat.request_irq_exits;
4068                 }
4069                 if (signal_pending(current)) {
4070                         r = -EINTR;
4071                         vcpu->run->exit_reason = KVM_EXIT_INTR;
4072                         ++vcpu->stat.signal_exits;
4073                 }
4074                 if (need_resched()) {
4075                         up_read(&vcpu->kvm->slots_lock);
4076                         kvm_resched(vcpu);
4077                         down_read(&vcpu->kvm->slots_lock);
4078                 }
4079         }
4080
4081         up_read(&vcpu->kvm->slots_lock);
4082         post_kvm_run_save(vcpu);
4083
4084         vapic_exit(vcpu);
4085
4086         return r;
4087 }
4088
4089 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4090 {
4091         int r;
4092         sigset_t sigsaved;
4093
4094         vcpu_load(vcpu);
4095
4096         if (vcpu->sigset_active)
4097                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4098
4099         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4100                 kvm_vcpu_block(vcpu);
4101                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4102                 r = -EAGAIN;
4103                 goto out;
4104         }
4105
4106         /* re-sync apic's tpr */
4107         if (!irqchip_in_kernel(vcpu->kvm))
4108                 kvm_set_cr8(vcpu, kvm_run->cr8);
4109
4110         if (vcpu->arch.pio.cur_count) {
4111                 r = complete_pio(vcpu);
4112                 if (r)
4113                         goto out;
4114         }
4115         if (vcpu->mmio_needed) {
4116                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4117                 vcpu->mmio_read_completed = 1;
4118                 vcpu->mmio_needed = 0;
4119
4120                 down_read(&vcpu->kvm->slots_lock);
4121                 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
4122                                         EMULTYPE_NO_DECODE);
4123                 up_read(&vcpu->kvm->slots_lock);
4124                 if (r == EMULATE_DO_MMIO) {
4125                         /*
4126                          * Read-modify-write.  Back to userspace.
4127                          */
4128                         r = 0;
4129                         goto out;
4130                 }
4131         }
4132         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4133                 kvm_register_write(vcpu, VCPU_REGS_RAX,
4134                                      kvm_run->hypercall.ret);
4135
4136         r = __vcpu_run(vcpu);
4137
4138 out:
4139         if (vcpu->sigset_active)
4140                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4141
4142         vcpu_put(vcpu);
4143         return r;
4144 }
4145
4146 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4147 {
4148         vcpu_load(vcpu);
4149
4150         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4151         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4152         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4153         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4154         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4155         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4156         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4157         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4158 #ifdef CONFIG_X86_64
4159         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4160         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4161         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4162         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4163         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4164         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4165         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4166         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4167 #endif
4168
4169         regs->rip = kvm_rip_read(vcpu);
4170         regs->rflags = kvm_get_rflags(vcpu);
4171
4172         vcpu_put(vcpu);
4173
4174         return 0;
4175 }
4176
4177 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4178 {
4179         vcpu_load(vcpu);
4180
4181         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4182         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4183         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4184         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4185         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4186         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4187         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4188         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4189 #ifdef CONFIG_X86_64
4190         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4191         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4192         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4193         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4194         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4195         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4196         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4197         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4198 #endif
4199
4200         kvm_rip_write(vcpu, regs->rip);
4201         kvm_set_rflags(vcpu, regs->rflags);
4202
4203         vcpu->arch.exception.pending = false;
4204
4205         vcpu_put(vcpu);
4206
4207         return 0;
4208 }
4209
4210 void kvm_get_segment(struct kvm_vcpu *vcpu,
4211                      struct kvm_segment *var, int seg)
4212 {
4213         kvm_x86_ops->get_segment(vcpu, var, seg);
4214 }
4215
4216 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4217 {
4218         struct kvm_segment cs;
4219
4220         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4221         *db = cs.db;
4222         *l = cs.l;
4223 }
4224 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4225
4226 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4227                                   struct kvm_sregs *sregs)
4228 {
4229         struct descriptor_table dt;
4230
4231         vcpu_load(vcpu);
4232
4233         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4234         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4235         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4236         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4237         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4238         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4239
4240         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4241         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4242
4243         kvm_x86_ops->get_idt(vcpu, &dt);
4244         sregs->idt.limit = dt.limit;
4245         sregs->idt.base = dt.base;
4246         kvm_x86_ops->get_gdt(vcpu, &dt);
4247         sregs->gdt.limit = dt.limit;
4248         sregs->gdt.base = dt.base;
4249
4250         sregs->cr0 = vcpu->arch.cr0;
4251         sregs->cr2 = vcpu->arch.cr2;
4252         sregs->cr3 = vcpu->arch.cr3;
4253         sregs->cr4 = kvm_read_cr4(vcpu);
4254         sregs->cr8 = kvm_get_cr8(vcpu);
4255         sregs->efer = vcpu->arch.shadow_efer;
4256         sregs->apic_base = kvm_get_apic_base(vcpu);
4257
4258         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4259
4260         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4261                 set_bit(vcpu->arch.interrupt.nr,
4262                         (unsigned long *)sregs->interrupt_bitmap);
4263
4264         vcpu_put(vcpu);
4265
4266         return 0;
4267 }
4268
4269 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4270                                     struct kvm_mp_state *mp_state)
4271 {
4272         vcpu_load(vcpu);
4273         mp_state->mp_state = vcpu->arch.mp_state;
4274         vcpu_put(vcpu);
4275         return 0;
4276 }
4277
4278 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4279                                     struct kvm_mp_state *mp_state)
4280 {
4281         vcpu_load(vcpu);
4282         vcpu->arch.mp_state = mp_state->mp_state;
4283         vcpu_put(vcpu);
4284         return 0;
4285 }
4286
4287 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4288                         struct kvm_segment *var, int seg)
4289 {
4290         kvm_x86_ops->set_segment(vcpu, var, seg);
4291 }
4292
4293 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
4294                                    struct kvm_segment *kvm_desct)
4295 {
4296         kvm_desct->base = get_desc_base(seg_desc);
4297         kvm_desct->limit = get_desc_limit(seg_desc);
4298         if (seg_desc->g) {
4299                 kvm_desct->limit <<= 12;
4300                 kvm_desct->limit |= 0xfff;
4301         }
4302         kvm_desct->selector = selector;
4303         kvm_desct->type = seg_desc->type;
4304         kvm_desct->present = seg_desc->p;
4305         kvm_desct->dpl = seg_desc->dpl;
4306         kvm_desct->db = seg_desc->d;
4307         kvm_desct->s = seg_desc->s;
4308         kvm_desct->l = seg_desc->l;
4309         kvm_desct->g = seg_desc->g;
4310         kvm_desct->avl = seg_desc->avl;
4311         if (!selector)
4312                 kvm_desct->unusable = 1;
4313         else
4314                 kvm_desct->unusable = 0;
4315         kvm_desct->padding = 0;
4316 }
4317
4318 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4319                                           u16 selector,
4320                                           struct descriptor_table *dtable)
4321 {
4322         if (selector & 1 << 2) {
4323                 struct kvm_segment kvm_seg;
4324
4325                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4326
4327                 if (kvm_seg.unusable)
4328                         dtable->limit = 0;
4329                 else
4330                         dtable->limit = kvm_seg.limit;
4331                 dtable->base = kvm_seg.base;
4332         }
4333         else
4334                 kvm_x86_ops->get_gdt(vcpu, dtable);
4335 }
4336
4337 /* allowed just for 8 bytes segments */
4338 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4339                                          struct desc_struct *seg_desc)
4340 {
4341         struct descriptor_table dtable;
4342         u16 index = selector >> 3;
4343
4344         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4345
4346         if (dtable.limit < index * 8 + 7) {
4347                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4348                 return 1;
4349         }
4350         return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4351 }
4352
4353 /* allowed just for 8 bytes segments */
4354 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4355                                          struct desc_struct *seg_desc)
4356 {
4357         struct descriptor_table dtable;
4358         u16 index = selector >> 3;
4359
4360         get_segment_descriptor_dtable(vcpu, selector, &dtable);
4361
4362         if (dtable.limit < index * 8 + 7)
4363                 return 1;
4364         return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4365 }
4366
4367 static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4368                              struct desc_struct *seg_desc)
4369 {
4370         u32 base_addr = get_desc_base(seg_desc);
4371
4372         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4373 }
4374
4375 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4376 {
4377         struct kvm_segment kvm_seg;
4378
4379         kvm_get_segment(vcpu, &kvm_seg, seg);
4380         return kvm_seg.selector;
4381 }
4382
4383 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4384                                                 u16 selector,
4385                                                 struct kvm_segment *kvm_seg)
4386 {
4387         struct desc_struct seg_desc;
4388
4389         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4390                 return 1;
4391         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4392         return 0;
4393 }
4394
4395 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4396 {
4397         struct kvm_segment segvar = {
4398                 .base = selector << 4,
4399                 .limit = 0xffff,
4400                 .selector = selector,
4401                 .type = 3,
4402                 .present = 1,
4403                 .dpl = 3,
4404                 .db = 0,
4405                 .s = 1,
4406                 .l = 0,
4407                 .g = 0,
4408                 .avl = 0,
4409                 .unusable = 0,
4410         };
4411         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4412         return 0;
4413 }
4414
4415 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4416 {
4417         return (seg != VCPU_SREG_LDTR) &&
4418                 (seg != VCPU_SREG_TR) &&
4419                 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4420 }
4421
4422 static void kvm_check_segment_descriptor(struct kvm_vcpu *vcpu, int seg,
4423                                          u16 selector)
4424 {
4425         /* NULL selector is not valid for CS and SS */
4426         if (seg == VCPU_SREG_CS || seg == VCPU_SREG_SS)
4427                 if (!selector)
4428                         kvm_queue_exception_e(vcpu, TS_VECTOR, selector >> 3);
4429 }
4430
4431 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4432                                 int type_bits, int seg)
4433 {
4434         struct kvm_segment kvm_seg;
4435
4436         if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4437                 return kvm_load_realmode_segment(vcpu, selector, seg);
4438         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4439                 return 1;
4440
4441         kvm_check_segment_descriptor(vcpu, seg, selector);
4442         kvm_seg.type |= type_bits;
4443
4444         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4445             seg != VCPU_SREG_LDTR)
4446                 if (!kvm_seg.s)
4447                         kvm_seg.unusable = 1;
4448
4449         kvm_set_segment(vcpu, &kvm_seg, seg);
4450         return 0;
4451 }
4452
4453 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4454                                 struct tss_segment_32 *tss)
4455 {
4456         tss->cr3 = vcpu->arch.cr3;
4457         tss->eip = kvm_rip_read(vcpu);
4458         tss->eflags = kvm_get_rflags(vcpu);
4459         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4460         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4461         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4462         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4463         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4464         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4465         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4466         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4467         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4468         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4469         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4470         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4471         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4472         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4473         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4474 }
4475
4476 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4477                                   struct tss_segment_32 *tss)
4478 {
4479         kvm_set_cr3(vcpu, tss->cr3);
4480
4481         kvm_rip_write(vcpu, tss->eip);
4482         kvm_set_rflags(vcpu, tss->eflags | 2);
4483
4484         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4485         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4486         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4487         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4488         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4489         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4490         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4491         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4492
4493         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4494                 return 1;
4495
4496         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4497                 return 1;
4498
4499         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4500                 return 1;
4501
4502         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4503                 return 1;
4504
4505         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4506                 return 1;
4507
4508         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4509                 return 1;
4510
4511         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4512                 return 1;
4513         return 0;
4514 }
4515
4516 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4517                                 struct tss_segment_16 *tss)
4518 {
4519         tss->ip = kvm_rip_read(vcpu);
4520         tss->flag = kvm_get_rflags(vcpu);
4521         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4522         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4523         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4524         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4525         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4526         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4527         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4528         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4529
4530         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4531         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4532         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4533         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4534         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4535 }
4536
4537 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4538                                  struct tss_segment_16 *tss)
4539 {
4540         kvm_rip_write(vcpu, tss->ip);
4541         kvm_set_rflags(vcpu, tss->flag | 2);
4542         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4543         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4544         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4545         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4546         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4547         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4548         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4549         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4550
4551         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4552                 return 1;
4553
4554         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4555                 return 1;
4556
4557         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4558                 return 1;
4559
4560         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4561                 return 1;
4562
4563         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4564                 return 1;
4565         return 0;
4566 }
4567
4568 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4569                               u16 old_tss_sel, u32 old_tss_base,
4570                               struct desc_struct *nseg_desc)
4571 {
4572         struct tss_segment_16 tss_segment_16;
4573         int ret = 0;
4574
4575         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4576                            sizeof tss_segment_16))
4577                 goto out;
4578
4579         save_state_to_tss16(vcpu, &tss_segment_16);
4580
4581         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4582                             sizeof tss_segment_16))
4583                 goto out;
4584
4585         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4586                            &tss_segment_16, sizeof tss_segment_16))
4587                 goto out;
4588
4589         if (old_tss_sel != 0xffff) {
4590                 tss_segment_16.prev_task_link = old_tss_sel;
4591
4592                 if (kvm_write_guest(vcpu->kvm,
4593                                     get_tss_base_addr(vcpu, nseg_desc),
4594                                     &tss_segment_16.prev_task_link,
4595                                     sizeof tss_segment_16.prev_task_link))
4596                         goto out;
4597         }
4598
4599         if (load_state_from_tss16(vcpu, &tss_segment_16))
4600                 goto out;
4601
4602         ret = 1;
4603 out:
4604         return ret;
4605 }
4606
4607 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4608                        u16 old_tss_sel, u32 old_tss_base,
4609                        struct desc_struct *nseg_desc)
4610 {
4611         struct tss_segment_32 tss_segment_32;
4612         int ret = 0;
4613
4614         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4615                            sizeof tss_segment_32))
4616                 goto out;
4617
4618         save_state_to_tss32(vcpu, &tss_segment_32);
4619
4620         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4621                             sizeof tss_segment_32))
4622                 goto out;
4623
4624         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4625                            &tss_segment_32, sizeof tss_segment_32))
4626                 goto out;
4627
4628         if (old_tss_sel != 0xffff) {
4629                 tss_segment_32.prev_task_link = old_tss_sel;
4630
4631                 if (kvm_write_guest(vcpu->kvm,
4632                                     get_tss_base_addr(vcpu, nseg_desc),
4633                                     &tss_segment_32.prev_task_link,
4634                                     sizeof tss_segment_32.prev_task_link))
4635                         goto out;
4636         }
4637
4638         if (load_state_from_tss32(vcpu, &tss_segment_32))
4639                 goto out;
4640
4641         ret = 1;
4642 out:
4643         return ret;
4644 }
4645
4646 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4647 {
4648         struct kvm_segment tr_seg;
4649         struct desc_struct cseg_desc;
4650         struct desc_struct nseg_desc;
4651         int ret = 0;
4652         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4653         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4654
4655         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4656
4657         /* FIXME: Handle errors. Failure to read either TSS or their
4658          * descriptors should generate a pagefault.
4659          */
4660         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4661                 goto out;
4662
4663         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4664                 goto out;
4665
4666         if (reason != TASK_SWITCH_IRET) {
4667                 int cpl;
4668
4669                 cpl = kvm_x86_ops->get_cpl(vcpu);
4670                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4671                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4672                         return 1;
4673                 }
4674         }
4675
4676         if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4677                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4678                 return 1;
4679         }
4680
4681         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4682                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4683                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4684         }
4685
4686         if (reason == TASK_SWITCH_IRET) {
4687                 u32 eflags = kvm_get_rflags(vcpu);
4688                 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4689         }
4690
4691         /* set back link to prev task only if NT bit is set in eflags
4692            note that old_tss_sel is not used afetr this point */
4693         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4694                 old_tss_sel = 0xffff;
4695
4696         if (nseg_desc.type & 8)
4697                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4698                                          old_tss_base, &nseg_desc);
4699         else
4700                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4701                                          old_tss_base, &nseg_desc);
4702
4703         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4704                 u32 eflags = kvm_get_rflags(vcpu);
4705                 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4706         }
4707
4708         if (reason != TASK_SWITCH_IRET) {
4709                 nseg_desc.type |= (1 << 1);
4710                 save_guest_segment_descriptor(vcpu, tss_selector,
4711                                               &nseg_desc);
4712         }
4713
4714         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4715         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4716         tr_seg.type = 11;
4717         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4718 out:
4719         return ret;
4720 }
4721 EXPORT_SYMBOL_GPL(kvm_task_switch);
4722
4723 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4724                                   struct kvm_sregs *sregs)
4725 {
4726         int mmu_reset_needed = 0;
4727         int pending_vec, max_bits;
4728         struct descriptor_table dt;
4729
4730         vcpu_load(vcpu);
4731
4732         dt.limit = sregs->idt.limit;
4733         dt.base = sregs->idt.base;
4734         kvm_x86_ops->set_idt(vcpu, &dt);
4735         dt.limit = sregs->gdt.limit;
4736         dt.base = sregs->gdt.base;
4737         kvm_x86_ops->set_gdt(vcpu, &dt);
4738
4739         vcpu->arch.cr2 = sregs->cr2;
4740         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4741         vcpu->arch.cr3 = sregs->cr3;
4742
4743         kvm_set_cr8(vcpu, sregs->cr8);
4744
4745         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4746         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4747         kvm_set_apic_base(vcpu, sregs->apic_base);
4748
4749         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4750         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4751         vcpu->arch.cr0 = sregs->cr0;
4752
4753         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
4754         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4755         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
4756                 load_pdptrs(vcpu, vcpu->arch.cr3);
4757                 mmu_reset_needed = 1;
4758         }
4759
4760         if (mmu_reset_needed)
4761                 kvm_mmu_reset_context(vcpu);
4762
4763         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4764         pending_vec = find_first_bit(
4765                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4766         if (pending_vec < max_bits) {
4767                 kvm_queue_interrupt(vcpu, pending_vec, false);
4768                 pr_debug("Set back pending irq %d\n", pending_vec);
4769                 if (irqchip_in_kernel(vcpu->kvm))
4770                         kvm_pic_clear_isr_ack(vcpu->kvm);
4771         }
4772
4773         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4774         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4775         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4776         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4777         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4778         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4779
4780         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4781         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4782
4783         update_cr8_intercept(vcpu);
4784
4785         /* Older userspace won't unhalt the vcpu on reset. */
4786         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4787             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4788             !(vcpu->arch.cr0 & X86_CR0_PE))
4789                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4790
4791         vcpu_put(vcpu);
4792
4793         return 0;
4794 }
4795
4796 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4797                                         struct kvm_guest_debug *dbg)
4798 {
4799         unsigned long rflags;
4800         int i, r;
4801
4802         vcpu_load(vcpu);
4803
4804         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
4805                 r = -EBUSY;
4806                 if (vcpu->arch.exception.pending)
4807                         goto unlock_out;
4808                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4809                         kvm_queue_exception(vcpu, DB_VECTOR);
4810                 else
4811                         kvm_queue_exception(vcpu, BP_VECTOR);
4812         }
4813
4814         /*
4815          * Read rflags as long as potentially injected trace flags are still
4816          * filtered out.
4817          */
4818         rflags = kvm_get_rflags(vcpu);
4819
4820         vcpu->guest_debug = dbg->control;
4821         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
4822                 vcpu->guest_debug = 0;
4823
4824         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
4825                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4826                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4827                 vcpu->arch.switch_db_regs =
4828                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4829         } else {
4830                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4831                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4832                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4833         }
4834
4835         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
4836                 vcpu->arch.singlestep_cs =
4837                         get_segment_selector(vcpu, VCPU_SREG_CS);
4838                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu);
4839         }
4840
4841         /*
4842          * Trigger an rflags update that will inject or remove the trace
4843          * flags.
4844          */
4845         kvm_set_rflags(vcpu, rflags);
4846
4847         kvm_x86_ops->set_guest_debug(vcpu, dbg);
4848
4849         r = 0;
4850
4851 unlock_out:
4852         vcpu_put(vcpu);
4853
4854         return r;
4855 }
4856
4857 /*
4858  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4859  * we have asm/x86/processor.h
4860  */
4861 struct fxsave {
4862         u16     cwd;
4863         u16     swd;
4864         u16     twd;
4865         u16     fop;
4866         u64     rip;
4867         u64     rdp;
4868         u32     mxcsr;
4869         u32     mxcsr_mask;
4870         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4871 #ifdef CONFIG_X86_64
4872         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4873 #else
4874         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4875 #endif
4876 };
4877
4878 /*
4879  * Translate a guest virtual address to a guest physical address.
4880  */
4881 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4882                                     struct kvm_translation *tr)
4883 {
4884         unsigned long vaddr = tr->linear_address;
4885         gpa_t gpa;
4886
4887         vcpu_load(vcpu);
4888         down_read(&vcpu->kvm->slots_lock);
4889         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4890         up_read(&vcpu->kvm->slots_lock);
4891         tr->physical_address = gpa;
4892         tr->valid = gpa != UNMAPPED_GVA;
4893         tr->writeable = 1;
4894         tr->usermode = 0;
4895         vcpu_put(vcpu);
4896
4897         return 0;
4898 }
4899
4900 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4901 {
4902         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4903
4904         vcpu_load(vcpu);
4905
4906         memcpy(fpu->fpr, fxsave->st_space, 128);
4907         fpu->fcw = fxsave->cwd;
4908         fpu->fsw = fxsave->swd;
4909         fpu->ftwx = fxsave->twd;
4910         fpu->last_opcode = fxsave->fop;
4911         fpu->last_ip = fxsave->rip;
4912         fpu->last_dp = fxsave->rdp;
4913         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4914
4915         vcpu_put(vcpu);
4916
4917         return 0;
4918 }
4919
4920 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4921 {
4922         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4923
4924         vcpu_load(vcpu);
4925
4926         memcpy(fxsave->st_space, fpu->fpr, 128);
4927         fxsave->cwd = fpu->fcw;
4928         fxsave->swd = fpu->fsw;
4929         fxsave->twd = fpu->ftwx;
4930         fxsave->fop = fpu->last_opcode;
4931         fxsave->rip = fpu->last_ip;
4932         fxsave->rdp = fpu->last_dp;
4933         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4934
4935         vcpu_put(vcpu);
4936
4937         return 0;
4938 }
4939
4940 void fx_init(struct kvm_vcpu *vcpu)
4941 {
4942         unsigned after_mxcsr_mask;
4943
4944         /*
4945          * Touch the fpu the first time in non atomic context as if
4946          * this is the first fpu instruction the exception handler
4947          * will fire before the instruction returns and it'll have to
4948          * allocate ram with GFP_KERNEL.
4949          */
4950         if (!used_math())
4951                 kvm_fx_save(&vcpu->arch.host_fx_image);
4952
4953         /* Initialize guest FPU by resetting ours and saving into guest's */
4954         preempt_disable();
4955         kvm_fx_save(&vcpu->arch.host_fx_image);
4956         kvm_fx_finit();
4957         kvm_fx_save(&vcpu->arch.guest_fx_image);
4958         kvm_fx_restore(&vcpu->arch.host_fx_image);
4959         preempt_enable();
4960
4961         vcpu->arch.cr0 |= X86_CR0_ET;
4962         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4963         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4964         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4965                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4966 }
4967 EXPORT_SYMBOL_GPL(fx_init);
4968
4969 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4970 {
4971         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4972                 return;
4973
4974         vcpu->guest_fpu_loaded = 1;
4975         kvm_fx_save(&vcpu->arch.host_fx_image);
4976         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4977 }
4978 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4979
4980 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4981 {
4982         if (!vcpu->guest_fpu_loaded)
4983                 return;
4984
4985         vcpu->guest_fpu_loaded = 0;
4986         kvm_fx_save(&vcpu->arch.guest_fx_image);
4987         kvm_fx_restore(&vcpu->arch.host_fx_image);
4988         ++vcpu->stat.fpu_reload;
4989 }
4990 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4991
4992 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4993 {
4994         if (vcpu->arch.time_page) {
4995                 kvm_release_page_dirty(vcpu->arch.time_page);
4996                 vcpu->arch.time_page = NULL;
4997         }
4998
4999         kvm_x86_ops->vcpu_free(vcpu);
5000 }
5001
5002 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5003                                                 unsigned int id)
5004 {
5005         return kvm_x86_ops->vcpu_create(kvm, id);
5006 }
5007
5008 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5009 {
5010         int r;
5011
5012         /* We do fxsave: this must be aligned. */
5013         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5014
5015         vcpu->arch.mtrr_state.have_fixed = 1;
5016         vcpu_load(vcpu);
5017         r = kvm_arch_vcpu_reset(vcpu);
5018         if (r == 0)
5019                 r = kvm_mmu_setup(vcpu);
5020         vcpu_put(vcpu);
5021         if (r < 0)
5022                 goto free_vcpu;
5023
5024         return 0;
5025 free_vcpu:
5026         kvm_x86_ops->vcpu_free(vcpu);
5027         return r;
5028 }
5029
5030 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5031 {
5032         vcpu_load(vcpu);
5033         kvm_mmu_unload(vcpu);
5034         vcpu_put(vcpu);
5035
5036         kvm_x86_ops->vcpu_free(vcpu);
5037 }
5038
5039 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5040 {
5041         vcpu->arch.nmi_pending = false;
5042         vcpu->arch.nmi_injected = false;
5043
5044         vcpu->arch.switch_db_regs = 0;
5045         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5046         vcpu->arch.dr6 = DR6_FIXED_1;
5047         vcpu->arch.dr7 = DR7_FIXED_1;
5048
5049         return kvm_x86_ops->vcpu_reset(vcpu);
5050 }
5051
5052 int kvm_arch_hardware_enable(void *garbage)
5053 {
5054         /*
5055          * Since this may be called from a hotplug notifcation,
5056          * we can't get the CPU frequency directly.
5057          */
5058         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5059                 int cpu = raw_smp_processor_id();
5060                 per_cpu(cpu_tsc_khz, cpu) = 0;
5061         }
5062
5063         kvm_shared_msr_cpu_online();
5064
5065         return kvm_x86_ops->hardware_enable(garbage);
5066 }
5067
5068 void kvm_arch_hardware_disable(void *garbage)
5069 {
5070         kvm_x86_ops->hardware_disable(garbage);
5071         drop_user_return_notifiers(garbage);
5072 }
5073
5074 int kvm_arch_hardware_setup(void)
5075 {
5076         return kvm_x86_ops->hardware_setup();
5077 }
5078
5079 void kvm_arch_hardware_unsetup(void)
5080 {
5081         kvm_x86_ops->hardware_unsetup();
5082 }
5083
5084 void kvm_arch_check_processor_compat(void *rtn)
5085 {
5086         kvm_x86_ops->check_processor_compatibility(rtn);
5087 }
5088
5089 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5090 {
5091         struct page *page;
5092         struct kvm *kvm;
5093         int r;
5094
5095         BUG_ON(vcpu->kvm == NULL);
5096         kvm = vcpu->kvm;
5097
5098         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5099         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5100                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5101         else
5102                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5103
5104         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5105         if (!page) {
5106                 r = -ENOMEM;
5107                 goto fail;
5108         }
5109         vcpu->arch.pio_data = page_address(page);
5110
5111         r = kvm_mmu_create(vcpu);
5112         if (r < 0)
5113                 goto fail_free_pio_data;
5114
5115         if (irqchip_in_kernel(kvm)) {
5116                 r = kvm_create_lapic(vcpu);
5117                 if (r < 0)
5118                         goto fail_mmu_destroy;
5119         }
5120
5121         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5122                                        GFP_KERNEL);
5123         if (!vcpu->arch.mce_banks) {
5124                 r = -ENOMEM;
5125                 goto fail_free_lapic;
5126         }
5127         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5128
5129         return 0;
5130 fail_free_lapic:
5131         kvm_free_lapic(vcpu);
5132 fail_mmu_destroy:
5133         kvm_mmu_destroy(vcpu);
5134 fail_free_pio_data:
5135         free_page((unsigned long)vcpu->arch.pio_data);
5136 fail:
5137         return r;
5138 }
5139
5140 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5141 {
5142         kfree(vcpu->arch.mce_banks);
5143         kvm_free_lapic(vcpu);
5144         down_read(&vcpu->kvm->slots_lock);
5145         kvm_mmu_destroy(vcpu);
5146         up_read(&vcpu->kvm->slots_lock);
5147         free_page((unsigned long)vcpu->arch.pio_data);
5148 }
5149
5150 struct  kvm *kvm_arch_create_vm(void)
5151 {
5152         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5153
5154         if (!kvm)
5155                 return ERR_PTR(-ENOMEM);
5156
5157         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5158         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5159
5160         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5161         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5162
5163         rdtscll(kvm->arch.vm_init_tsc);
5164
5165         return kvm;
5166 }
5167
5168 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5169 {
5170         vcpu_load(vcpu);
5171         kvm_mmu_unload(vcpu);
5172         vcpu_put(vcpu);
5173 }
5174
5175 static void kvm_free_vcpus(struct kvm *kvm)
5176 {
5177         unsigned int i;
5178         struct kvm_vcpu *vcpu;
5179
5180         /*
5181          * Unpin any mmu pages first.
5182          */
5183         kvm_for_each_vcpu(i, vcpu, kvm)
5184                 kvm_unload_vcpu_mmu(vcpu);
5185         kvm_for_each_vcpu(i, vcpu, kvm)
5186                 kvm_arch_vcpu_free(vcpu);
5187
5188         mutex_lock(&kvm->lock);
5189         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5190                 kvm->vcpus[i] = NULL;
5191
5192         atomic_set(&kvm->online_vcpus, 0);
5193         mutex_unlock(&kvm->lock);
5194 }
5195
5196 void kvm_arch_sync_events(struct kvm *kvm)
5197 {
5198         kvm_free_all_assigned_devices(kvm);
5199 }
5200
5201 void kvm_arch_destroy_vm(struct kvm *kvm)
5202 {
5203         kvm_iommu_unmap_guest(kvm);
5204         kvm_free_pit(kvm);
5205         kfree(kvm->arch.vpic);
5206         kfree(kvm->arch.vioapic);
5207         kvm_free_vcpus(kvm);
5208         kvm_free_physmem(kvm);
5209         if (kvm->arch.apic_access_page)
5210                 put_page(kvm->arch.apic_access_page);
5211         if (kvm->arch.ept_identity_pagetable)
5212                 put_page(kvm->arch.ept_identity_pagetable);
5213         kfree(kvm);
5214 }
5215
5216 int kvm_arch_set_memory_region(struct kvm *kvm,
5217                                 struct kvm_userspace_memory_region *mem,
5218                                 struct kvm_memory_slot old,
5219                                 int user_alloc)
5220 {
5221         int npages = mem->memory_size >> PAGE_SHIFT;
5222         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
5223
5224         /*To keep backward compatibility with older userspace,
5225          *x86 needs to hanlde !user_alloc case.
5226          */
5227         if (!user_alloc) {
5228                 if (npages && !old.rmap) {
5229                         unsigned long userspace_addr;
5230
5231                         down_write(&current->mm->mmap_sem);
5232                         userspace_addr = do_mmap(NULL, 0,
5233                                                  npages * PAGE_SIZE,
5234                                                  PROT_READ | PROT_WRITE,
5235                                                  MAP_PRIVATE | MAP_ANONYMOUS,
5236                                                  0);
5237                         up_write(&current->mm->mmap_sem);
5238
5239                         if (IS_ERR((void *)userspace_addr))
5240                                 return PTR_ERR((void *)userspace_addr);
5241
5242                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
5243                         spin_lock(&kvm->mmu_lock);
5244                         memslot->userspace_addr = userspace_addr;
5245                         spin_unlock(&kvm->mmu_lock);
5246                 } else {
5247                         if (!old.user_alloc && old.rmap) {
5248                                 int ret;
5249
5250                                 down_write(&current->mm->mmap_sem);
5251                                 ret = do_munmap(current->mm, old.userspace_addr,
5252                                                 old.npages * PAGE_SIZE);
5253                                 up_write(&current->mm->mmap_sem);
5254                                 if (ret < 0)
5255                                         printk(KERN_WARNING
5256                                        "kvm_vm_ioctl_set_memory_region: "
5257                                        "failed to munmap memory\n");
5258                         }
5259                 }
5260         }
5261
5262         spin_lock(&kvm->mmu_lock);
5263         if (!kvm->arch.n_requested_mmu_pages) {
5264                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5265                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5266         }
5267
5268         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5269         spin_unlock(&kvm->mmu_lock);
5270
5271         return 0;
5272 }
5273
5274 void kvm_arch_flush_shadow(struct kvm *kvm)
5275 {
5276         kvm_mmu_zap_all(kvm);
5277         kvm_reload_remote_mmus(kvm);
5278 }
5279
5280 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5281 {
5282         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5283                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5284                 || vcpu->arch.nmi_pending ||
5285                 (kvm_arch_interrupt_allowed(vcpu) &&
5286                  kvm_cpu_has_interrupt(vcpu));
5287 }
5288
5289 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5290 {
5291         int me;
5292         int cpu = vcpu->cpu;
5293
5294         if (waitqueue_active(&vcpu->wq)) {
5295                 wake_up_interruptible(&vcpu->wq);
5296                 ++vcpu->stat.halt_wakeup;
5297         }
5298
5299         me = get_cpu();
5300         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5301                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5302                         smp_send_reschedule(cpu);
5303         put_cpu();
5304 }
5305
5306 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5307 {
5308         return kvm_x86_ops->interrupt_allowed(vcpu);
5309 }
5310
5311 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5312 {
5313         unsigned long rflags;
5314
5315         rflags = kvm_x86_ops->get_rflags(vcpu);
5316         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5317                 rflags &= ~(unsigned long)(X86_EFLAGS_TF | X86_EFLAGS_RF);
5318         return rflags;
5319 }
5320 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5321
5322 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5323 {
5324         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5325             vcpu->arch.singlestep_cs ==
5326                         get_segment_selector(vcpu, VCPU_SREG_CS) &&
5327             vcpu->arch.singlestep_rip == kvm_rip_read(vcpu))
5328                 rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
5329         kvm_x86_ops->set_rflags(vcpu, rflags);
5330 }
5331 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5332
5333 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5334 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5335 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5336 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5337 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5338 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5339 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5340 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5341 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5342 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5343 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);