2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/intel-iommu.h>
39 #include <asm/uaccess.h>
44 #define MAX_IO_MSRS 256
45 #define CR0_RESERVED_BITS \
46 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
47 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
48 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
49 #define CR4_RESERVED_BITS \
50 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
51 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
52 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
53 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
55 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
57 * - enable syscall per default because its emulated by KVM
58 * - enable LME and LMA per default on 64 bit KVM
61 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
67 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
69 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
70 struct kvm_cpuid_entry2 __user *entries);
72 struct kvm_x86_ops *kvm_x86_ops;
73 EXPORT_SYMBOL_GPL(kvm_x86_ops);
75 struct kvm_stats_debugfs_item debugfs_entries[] = {
76 { "pf_fixed", VCPU_STAT(pf_fixed) },
77 { "pf_guest", VCPU_STAT(pf_guest) },
78 { "tlb_flush", VCPU_STAT(tlb_flush) },
79 { "invlpg", VCPU_STAT(invlpg) },
80 { "exits", VCPU_STAT(exits) },
81 { "io_exits", VCPU_STAT(io_exits) },
82 { "mmio_exits", VCPU_STAT(mmio_exits) },
83 { "signal_exits", VCPU_STAT(signal_exits) },
84 { "irq_window", VCPU_STAT(irq_window_exits) },
85 { "nmi_window", VCPU_STAT(nmi_window_exits) },
86 { "halt_exits", VCPU_STAT(halt_exits) },
87 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
88 { "hypercalls", VCPU_STAT(hypercalls) },
89 { "request_irq", VCPU_STAT(request_irq_exits) },
90 { "request_nmi", VCPU_STAT(request_nmi_exits) },
91 { "irq_exits", VCPU_STAT(irq_exits) },
92 { "host_state_reload", VCPU_STAT(host_state_reload) },
93 { "efer_reload", VCPU_STAT(efer_reload) },
94 { "fpu_reload", VCPU_STAT(fpu_reload) },
95 { "insn_emulation", VCPU_STAT(insn_emulation) },
96 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
97 { "irq_injections", VCPU_STAT(irq_injections) },
98 { "nmi_injections", VCPU_STAT(nmi_injections) },
99 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
100 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
101 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
102 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
103 { "mmu_flooded", VM_STAT(mmu_flooded) },
104 { "mmu_recycled", VM_STAT(mmu_recycled) },
105 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
106 { "mmu_unsync", VM_STAT(mmu_unsync) },
107 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
108 { "largepages", VM_STAT(lpages) },
112 unsigned long segment_base(u16 selector)
114 struct descriptor_table gdt;
115 struct desc_struct *d;
116 unsigned long table_base;
122 asm("sgdt %0" : "=m"(gdt));
123 table_base = gdt.base;
125 if (selector & 4) { /* from ldt */
128 asm("sldt %0" : "=g"(ldt_selector));
129 table_base = segment_base(ldt_selector);
131 d = (struct desc_struct *)(table_base + (selector & ~7));
132 v = d->base0 | ((unsigned long)d->base1 << 16) |
133 ((unsigned long)d->base2 << 24);
135 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
136 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
140 EXPORT_SYMBOL_GPL(segment_base);
142 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
144 if (irqchip_in_kernel(vcpu->kvm))
145 return vcpu->arch.apic_base;
147 return vcpu->arch.apic_base;
149 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
151 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
153 /* TODO: reserve bits check */
154 if (irqchip_in_kernel(vcpu->kvm))
155 kvm_lapic_set_base(vcpu, data);
157 vcpu->arch.apic_base = data;
159 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
161 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
163 WARN_ON(vcpu->arch.exception.pending);
164 vcpu->arch.exception.pending = true;
165 vcpu->arch.exception.has_error_code = false;
166 vcpu->arch.exception.nr = nr;
168 EXPORT_SYMBOL_GPL(kvm_queue_exception);
170 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
173 ++vcpu->stat.pf_guest;
174 if (vcpu->arch.exception.pending) {
175 if (vcpu->arch.exception.nr == PF_VECTOR) {
176 printk(KERN_DEBUG "kvm: inject_page_fault:"
177 " double fault 0x%lx\n", addr);
178 vcpu->arch.exception.nr = DF_VECTOR;
179 vcpu->arch.exception.error_code = 0;
180 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
181 /* triple fault -> shutdown */
182 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
186 vcpu->arch.cr2 = addr;
187 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
190 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
192 vcpu->arch.nmi_pending = 1;
194 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
196 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
198 WARN_ON(vcpu->arch.exception.pending);
199 vcpu->arch.exception.pending = true;
200 vcpu->arch.exception.has_error_code = true;
201 vcpu->arch.exception.nr = nr;
202 vcpu->arch.exception.error_code = error_code;
204 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
206 static void __queue_exception(struct kvm_vcpu *vcpu)
208 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
209 vcpu->arch.exception.has_error_code,
210 vcpu->arch.exception.error_code);
214 * Load the pae pdptrs. Return true is they are all valid.
216 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
218 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
219 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
222 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
224 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
225 offset * sizeof(u64), sizeof(pdpte));
230 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
231 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
238 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
243 EXPORT_SYMBOL_GPL(load_pdptrs);
245 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
247 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
251 if (is_long_mode(vcpu) || !is_pae(vcpu))
254 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
257 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
263 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
265 if (cr0 & CR0_RESERVED_BITS) {
266 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
267 cr0, vcpu->arch.cr0);
268 kvm_inject_gp(vcpu, 0);
272 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
273 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
274 kvm_inject_gp(vcpu, 0);
278 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
279 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
280 "and a clear PE flag\n");
281 kvm_inject_gp(vcpu, 0);
285 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
287 if ((vcpu->arch.shadow_efer & EFER_LME)) {
291 printk(KERN_DEBUG "set_cr0: #GP, start paging "
292 "in long mode while PAE is disabled\n");
293 kvm_inject_gp(vcpu, 0);
296 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
298 printk(KERN_DEBUG "set_cr0: #GP, start paging "
299 "in long mode while CS.L == 1\n");
300 kvm_inject_gp(vcpu, 0);
306 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
307 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
309 kvm_inject_gp(vcpu, 0);
315 kvm_x86_ops->set_cr0(vcpu, cr0);
316 vcpu->arch.cr0 = cr0;
318 kvm_mmu_reset_context(vcpu);
321 EXPORT_SYMBOL_GPL(kvm_set_cr0);
323 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
325 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
326 KVMTRACE_1D(LMSW, vcpu,
327 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
330 EXPORT_SYMBOL_GPL(kvm_lmsw);
332 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
334 if (cr4 & CR4_RESERVED_BITS) {
335 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
336 kvm_inject_gp(vcpu, 0);
340 if (is_long_mode(vcpu)) {
341 if (!(cr4 & X86_CR4_PAE)) {
342 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
344 kvm_inject_gp(vcpu, 0);
347 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
348 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
349 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
350 kvm_inject_gp(vcpu, 0);
354 if (cr4 & X86_CR4_VMXE) {
355 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
356 kvm_inject_gp(vcpu, 0);
359 kvm_x86_ops->set_cr4(vcpu, cr4);
360 vcpu->arch.cr4 = cr4;
361 kvm_mmu_reset_context(vcpu);
363 EXPORT_SYMBOL_GPL(kvm_set_cr4);
365 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
367 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
368 kvm_mmu_sync_roots(vcpu);
369 kvm_mmu_flush_tlb(vcpu);
373 if (is_long_mode(vcpu)) {
374 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
375 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
376 kvm_inject_gp(vcpu, 0);
381 if (cr3 & CR3_PAE_RESERVED_BITS) {
383 "set_cr3: #GP, reserved bits\n");
384 kvm_inject_gp(vcpu, 0);
387 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
388 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
390 kvm_inject_gp(vcpu, 0);
395 * We don't check reserved bits in nonpae mode, because
396 * this isn't enforced, and VMware depends on this.
401 * Does the new cr3 value map to physical memory? (Note, we
402 * catch an invalid cr3 even in real-mode, because it would
403 * cause trouble later on when we turn on paging anyway.)
405 * A real CPU would silently accept an invalid cr3 and would
406 * attempt to use it - with largely undefined (and often hard
407 * to debug) behavior on the guest side.
409 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
410 kvm_inject_gp(vcpu, 0);
412 vcpu->arch.cr3 = cr3;
413 vcpu->arch.mmu.new_cr3(vcpu);
416 EXPORT_SYMBOL_GPL(kvm_set_cr3);
418 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
420 if (cr8 & CR8_RESERVED_BITS) {
421 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
422 kvm_inject_gp(vcpu, 0);
425 if (irqchip_in_kernel(vcpu->kvm))
426 kvm_lapic_set_tpr(vcpu, cr8);
428 vcpu->arch.cr8 = cr8;
430 EXPORT_SYMBOL_GPL(kvm_set_cr8);
432 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
434 if (irqchip_in_kernel(vcpu->kvm))
435 return kvm_lapic_get_cr8(vcpu);
437 return vcpu->arch.cr8;
439 EXPORT_SYMBOL_GPL(kvm_get_cr8);
442 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
443 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
445 * This list is modified at module load time to reflect the
446 * capabilities of the host cpu.
448 static u32 msrs_to_save[] = {
449 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
452 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
454 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
455 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT
458 static unsigned num_msrs_to_save;
460 static u32 emulated_msrs[] = {
461 MSR_IA32_MISC_ENABLE,
464 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
466 if (efer & efer_reserved_bits) {
467 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
469 kvm_inject_gp(vcpu, 0);
474 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
475 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
476 kvm_inject_gp(vcpu, 0);
480 kvm_x86_ops->set_efer(vcpu, efer);
483 efer |= vcpu->arch.shadow_efer & EFER_LMA;
485 vcpu->arch.shadow_efer = efer;
488 void kvm_enable_efer_bits(u64 mask)
490 efer_reserved_bits &= ~mask;
492 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
496 * Writes msr value into into the appropriate "register".
497 * Returns 0 on success, non-0 otherwise.
498 * Assumes vcpu_load() was already called.
500 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
502 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
506 * Adapt set_msr() to msr_io()'s calling convention
508 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
510 return kvm_set_msr(vcpu, index, *data);
513 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
516 struct pvclock_wall_clock wc;
517 struct timespec now, sys, boot;
524 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
527 * The guest calculates current wall clock time by adding
528 * system time (updated by kvm_write_guest_time below) to the
529 * wall clock specified here. guest system time equals host
530 * system time for us, thus we must fill in host boot time here.
532 now = current_kernel_time();
534 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
536 wc.sec = boot.tv_sec;
537 wc.nsec = boot.tv_nsec;
538 wc.version = version;
540 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
543 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
546 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
548 uint32_t quotient, remainder;
550 /* Don't try to replace with do_div(), this one calculates
551 * "(dividend << 32) / divisor" */
553 : "=a" (quotient), "=d" (remainder)
554 : "0" (0), "1" (dividend), "r" (divisor) );
558 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
560 uint64_t nsecs = 1000000000LL;
565 tps64 = tsc_khz * 1000LL;
566 while (tps64 > nsecs*2) {
571 tps32 = (uint32_t)tps64;
572 while (tps32 <= (uint32_t)nsecs) {
577 hv_clock->tsc_shift = shift;
578 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
580 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
581 __func__, tsc_khz, hv_clock->tsc_shift,
582 hv_clock->tsc_to_system_mul);
585 static void kvm_write_guest_time(struct kvm_vcpu *v)
589 struct kvm_vcpu_arch *vcpu = &v->arch;
592 if ((!vcpu->time_page))
595 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
596 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
597 vcpu->hv_clock_tsc_khz = tsc_khz;
600 /* Keep irq disabled to prevent changes to the clock */
601 local_irq_save(flags);
602 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
603 &vcpu->hv_clock.tsc_timestamp);
605 local_irq_restore(flags);
607 /* With all the info we got, fill in the values */
609 vcpu->hv_clock.system_time = ts.tv_nsec +
610 (NSEC_PER_SEC * (u64)ts.tv_sec);
612 * The interface expects us to write an even number signaling that the
613 * update is finished. Since the guest won't see the intermediate
614 * state, we just increase by 2 at the end.
616 vcpu->hv_clock.version += 2;
618 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
620 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
621 sizeof(vcpu->hv_clock));
623 kunmap_atomic(shared_kaddr, KM_USER0);
625 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
628 static bool msr_mtrr_valid(unsigned msr)
631 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
632 case MSR_MTRRfix64K_00000:
633 case MSR_MTRRfix16K_80000:
634 case MSR_MTRRfix16K_A0000:
635 case MSR_MTRRfix4K_C0000:
636 case MSR_MTRRfix4K_C8000:
637 case MSR_MTRRfix4K_D0000:
638 case MSR_MTRRfix4K_D8000:
639 case MSR_MTRRfix4K_E0000:
640 case MSR_MTRRfix4K_E8000:
641 case MSR_MTRRfix4K_F0000:
642 case MSR_MTRRfix4K_F8000:
643 case MSR_MTRRdefType:
644 case MSR_IA32_CR_PAT:
652 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
654 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
656 if (!msr_mtrr_valid(msr))
659 if (msr == MSR_MTRRdefType) {
660 vcpu->arch.mtrr_state.def_type = data;
661 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
662 } else if (msr == MSR_MTRRfix64K_00000)
664 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
665 p[1 + msr - MSR_MTRRfix16K_80000] = data;
666 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
667 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
668 else if (msr == MSR_IA32_CR_PAT)
669 vcpu->arch.pat = data;
670 else { /* Variable MTRRs */
671 int idx, is_mtrr_mask;
674 idx = (msr - 0x200) / 2;
675 is_mtrr_mask = msr - 0x200 - 2 * idx;
678 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
681 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
685 kvm_mmu_reset_context(vcpu);
689 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
693 set_efer(vcpu, data);
695 case MSR_IA32_MC0_STATUS:
696 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
699 case MSR_IA32_MCG_STATUS:
700 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
703 case MSR_IA32_MCG_CTL:
704 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
707 case MSR_IA32_DEBUGCTLMSR:
709 /* We support the non-activated case already */
711 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
712 /* Values other than LBR and BTF are vendor-specific,
713 thus reserved and should throw a #GP */
716 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
719 case MSR_IA32_UCODE_REV:
720 case MSR_IA32_UCODE_WRITE:
722 case 0x200 ... 0x2ff:
723 return set_msr_mtrr(vcpu, msr, data);
724 case MSR_IA32_APICBASE:
725 kvm_set_apic_base(vcpu, data);
727 case MSR_IA32_MISC_ENABLE:
728 vcpu->arch.ia32_misc_enable_msr = data;
730 case MSR_KVM_WALL_CLOCK:
731 vcpu->kvm->arch.wall_clock = data;
732 kvm_write_wall_clock(vcpu->kvm, data);
734 case MSR_KVM_SYSTEM_TIME: {
735 if (vcpu->arch.time_page) {
736 kvm_release_page_dirty(vcpu->arch.time_page);
737 vcpu->arch.time_page = NULL;
740 vcpu->arch.time = data;
742 /* we verify if the enable bit is set... */
746 /* ...but clean it before doing the actual write */
747 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
749 vcpu->arch.time_page =
750 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
752 if (is_error_page(vcpu->arch.time_page)) {
753 kvm_release_page_clean(vcpu->arch.time_page);
754 vcpu->arch.time_page = NULL;
757 kvm_write_guest_time(vcpu);
761 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
766 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
770 * Reads an msr value (of 'msr_index') into 'pdata'.
771 * Returns 0 on success, non-0 otherwise.
772 * Assumes vcpu_load() was already called.
774 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
776 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
779 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
781 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
783 if (!msr_mtrr_valid(msr))
786 if (msr == MSR_MTRRdefType)
787 *pdata = vcpu->arch.mtrr_state.def_type +
788 (vcpu->arch.mtrr_state.enabled << 10);
789 else if (msr == MSR_MTRRfix64K_00000)
791 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
792 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
793 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
794 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
795 else if (msr == MSR_IA32_CR_PAT)
796 *pdata = vcpu->arch.pat;
797 else { /* Variable MTRRs */
798 int idx, is_mtrr_mask;
801 idx = (msr - 0x200) / 2;
802 is_mtrr_mask = msr - 0x200 - 2 * idx;
805 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
808 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
815 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
820 case 0xc0010010: /* SYSCFG */
821 case 0xc0010015: /* HWCR */
822 case MSR_IA32_PLATFORM_ID:
823 case MSR_IA32_P5_MC_ADDR:
824 case MSR_IA32_P5_MC_TYPE:
825 case MSR_IA32_MC0_CTL:
826 case MSR_IA32_MCG_STATUS:
827 case MSR_IA32_MCG_CAP:
828 case MSR_IA32_MCG_CTL:
829 case MSR_IA32_MC0_MISC:
830 case MSR_IA32_MC0_MISC+4:
831 case MSR_IA32_MC0_MISC+8:
832 case MSR_IA32_MC0_MISC+12:
833 case MSR_IA32_MC0_MISC+16:
834 case MSR_IA32_MC0_MISC+20:
835 case MSR_IA32_UCODE_REV:
836 case MSR_IA32_EBL_CR_POWERON:
837 case MSR_IA32_DEBUGCTLMSR:
838 case MSR_IA32_LASTBRANCHFROMIP:
839 case MSR_IA32_LASTBRANCHTOIP:
840 case MSR_IA32_LASTINTFROMIP:
841 case MSR_IA32_LASTINTTOIP:
845 data = 0x500 | KVM_NR_VAR_MTRR;
847 case 0x200 ... 0x2ff:
848 return get_msr_mtrr(vcpu, msr, pdata);
849 case 0xcd: /* fsb frequency */
852 case MSR_IA32_APICBASE:
853 data = kvm_get_apic_base(vcpu);
855 case MSR_IA32_MISC_ENABLE:
856 data = vcpu->arch.ia32_misc_enable_msr;
858 case MSR_IA32_PERF_STATUS:
859 /* TSC increment by tick */
862 data |= (((uint64_t)4ULL) << 40);
865 data = vcpu->arch.shadow_efer;
867 case MSR_KVM_WALL_CLOCK:
868 data = vcpu->kvm->arch.wall_clock;
870 case MSR_KVM_SYSTEM_TIME:
871 data = vcpu->arch.time;
874 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
880 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
883 * Read or write a bunch of msrs. All parameters are kernel addresses.
885 * @return number of msrs set successfully.
887 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
888 struct kvm_msr_entry *entries,
889 int (*do_msr)(struct kvm_vcpu *vcpu,
890 unsigned index, u64 *data))
896 down_read(&vcpu->kvm->slots_lock);
897 for (i = 0; i < msrs->nmsrs; ++i)
898 if (do_msr(vcpu, entries[i].index, &entries[i].data))
900 up_read(&vcpu->kvm->slots_lock);
908 * Read or write a bunch of msrs. Parameters are user addresses.
910 * @return number of msrs set successfully.
912 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
913 int (*do_msr)(struct kvm_vcpu *vcpu,
914 unsigned index, u64 *data),
917 struct kvm_msrs msrs;
918 struct kvm_msr_entry *entries;
923 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
927 if (msrs.nmsrs >= MAX_IO_MSRS)
931 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
932 entries = vmalloc(size);
937 if (copy_from_user(entries, user_msrs->entries, size))
940 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
945 if (writeback && copy_to_user(user_msrs->entries, entries, size))
956 int kvm_dev_ioctl_check_extension(long ext)
961 case KVM_CAP_IRQCHIP:
963 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
964 case KVM_CAP_USER_MEMORY:
965 case KVM_CAP_SET_TSS_ADDR:
966 case KVM_CAP_EXT_CPUID:
967 case KVM_CAP_CLOCKSOURCE:
969 case KVM_CAP_NOP_IO_DELAY:
970 case KVM_CAP_MP_STATE:
971 case KVM_CAP_SYNC_MMU:
974 case KVM_CAP_COALESCED_MMIO:
975 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
978 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
980 case KVM_CAP_NR_VCPUS:
983 case KVM_CAP_NR_MEMSLOTS:
984 r = KVM_MEMORY_SLOTS;
990 r = intel_iommu_found();
1000 long kvm_arch_dev_ioctl(struct file *filp,
1001 unsigned int ioctl, unsigned long arg)
1003 void __user *argp = (void __user *)arg;
1007 case KVM_GET_MSR_INDEX_LIST: {
1008 struct kvm_msr_list __user *user_msr_list = argp;
1009 struct kvm_msr_list msr_list;
1013 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1016 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1017 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1020 if (n < num_msrs_to_save)
1023 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1024 num_msrs_to_save * sizeof(u32)))
1026 if (copy_to_user(user_msr_list->indices
1027 + num_msrs_to_save * sizeof(u32),
1029 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1034 case KVM_GET_SUPPORTED_CPUID: {
1035 struct kvm_cpuid2 __user *cpuid_arg = argp;
1036 struct kvm_cpuid2 cpuid;
1039 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1041 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1042 cpuid_arg->entries);
1047 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1059 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1061 kvm_x86_ops->vcpu_load(vcpu, cpu);
1062 kvm_write_guest_time(vcpu);
1065 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1067 kvm_x86_ops->vcpu_put(vcpu);
1068 kvm_put_guest_fpu(vcpu);
1071 static int is_efer_nx(void)
1075 rdmsrl(MSR_EFER, efer);
1076 return efer & EFER_NX;
1079 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1082 struct kvm_cpuid_entry2 *e, *entry;
1085 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1086 e = &vcpu->arch.cpuid_entries[i];
1087 if (e->function == 0x80000001) {
1092 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1093 entry->edx &= ~(1 << 20);
1094 printk(KERN_INFO "kvm: guest NX capability removed\n");
1098 /* when an old userspace process fills a new kernel module */
1099 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1100 struct kvm_cpuid *cpuid,
1101 struct kvm_cpuid_entry __user *entries)
1104 struct kvm_cpuid_entry *cpuid_entries;
1107 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1110 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1114 if (copy_from_user(cpuid_entries, entries,
1115 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1117 for (i = 0; i < cpuid->nent; i++) {
1118 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1119 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1120 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1121 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1122 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1123 vcpu->arch.cpuid_entries[i].index = 0;
1124 vcpu->arch.cpuid_entries[i].flags = 0;
1125 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1126 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1127 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1129 vcpu->arch.cpuid_nent = cpuid->nent;
1130 cpuid_fix_nx_cap(vcpu);
1134 vfree(cpuid_entries);
1139 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1140 struct kvm_cpuid2 *cpuid,
1141 struct kvm_cpuid_entry2 __user *entries)
1146 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1149 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1150 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1152 vcpu->arch.cpuid_nent = cpuid->nent;
1159 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1160 struct kvm_cpuid2 *cpuid,
1161 struct kvm_cpuid_entry2 __user *entries)
1166 if (cpuid->nent < vcpu->arch.cpuid_nent)
1169 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1170 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1175 cpuid->nent = vcpu->arch.cpuid_nent;
1179 static inline u32 bit(int bitno)
1181 return 1 << (bitno & 31);
1184 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1187 entry->function = function;
1188 entry->index = index;
1189 cpuid_count(entry->function, entry->index,
1190 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1194 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1195 u32 index, int *nent, int maxnent)
1197 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1198 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1199 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1200 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1201 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1202 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1203 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1204 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1205 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1206 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1207 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1208 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1209 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1210 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1211 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1212 bit(X86_FEATURE_PGE) |
1213 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1214 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1215 bit(X86_FEATURE_SYSCALL) |
1216 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1217 #ifdef CONFIG_X86_64
1218 bit(X86_FEATURE_LM) |
1220 bit(X86_FEATURE_MMXEXT) |
1221 bit(X86_FEATURE_3DNOWEXT) |
1222 bit(X86_FEATURE_3DNOW);
1223 const u32 kvm_supported_word3_x86_features =
1224 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1225 const u32 kvm_supported_word6_x86_features =
1226 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1228 /* all func 2 cpuid_count() should be called on the same cpu */
1230 do_cpuid_1_ent(entry, function, index);
1235 entry->eax = min(entry->eax, (u32)0xb);
1238 entry->edx &= kvm_supported_word0_x86_features;
1239 entry->ecx &= kvm_supported_word3_x86_features;
1241 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1242 * may return different values. This forces us to get_cpu() before
1243 * issuing the first command, and also to emulate this annoying behavior
1244 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1246 int t, times = entry->eax & 0xff;
1248 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1249 for (t = 1; t < times && *nent < maxnent; ++t) {
1250 do_cpuid_1_ent(&entry[t], function, 0);
1251 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1256 /* function 4 and 0xb have additional index. */
1260 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1261 /* read more entries until cache_type is zero */
1262 for (i = 1; *nent < maxnent; ++i) {
1263 cache_type = entry[i - 1].eax & 0x1f;
1266 do_cpuid_1_ent(&entry[i], function, i);
1268 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1276 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1277 /* read more entries until level_type is zero */
1278 for (i = 1; *nent < maxnent; ++i) {
1279 level_type = entry[i - 1].ecx & 0xff00;
1282 do_cpuid_1_ent(&entry[i], function, i);
1284 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1290 entry->eax = min(entry->eax, 0x8000001a);
1293 entry->edx &= kvm_supported_word1_x86_features;
1294 entry->ecx &= kvm_supported_word6_x86_features;
1300 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1301 struct kvm_cpuid_entry2 __user *entries)
1303 struct kvm_cpuid_entry2 *cpuid_entries;
1304 int limit, nent = 0, r = -E2BIG;
1307 if (cpuid->nent < 1)
1310 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1314 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1315 limit = cpuid_entries[0].eax;
1316 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1317 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1318 &nent, cpuid->nent);
1320 if (nent >= cpuid->nent)
1323 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1324 limit = cpuid_entries[nent - 1].eax;
1325 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1326 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1327 &nent, cpuid->nent);
1329 if (copy_to_user(entries, cpuid_entries,
1330 nent * sizeof(struct kvm_cpuid_entry2)))
1336 vfree(cpuid_entries);
1341 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1342 struct kvm_lapic_state *s)
1345 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1351 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1352 struct kvm_lapic_state *s)
1355 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1356 kvm_apic_post_state_restore(vcpu);
1362 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1363 struct kvm_interrupt *irq)
1365 if (irq->irq < 0 || irq->irq >= 256)
1367 if (irqchip_in_kernel(vcpu->kvm))
1371 set_bit(irq->irq, vcpu->arch.irq_pending);
1372 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1379 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1382 kvm_inject_nmi(vcpu);
1388 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1389 struct kvm_tpr_access_ctl *tac)
1393 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1397 long kvm_arch_vcpu_ioctl(struct file *filp,
1398 unsigned int ioctl, unsigned long arg)
1400 struct kvm_vcpu *vcpu = filp->private_data;
1401 void __user *argp = (void __user *)arg;
1403 struct kvm_lapic_state *lapic = NULL;
1406 case KVM_GET_LAPIC: {
1407 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1412 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1416 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1421 case KVM_SET_LAPIC: {
1422 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1427 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1429 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1435 case KVM_INTERRUPT: {
1436 struct kvm_interrupt irq;
1439 if (copy_from_user(&irq, argp, sizeof irq))
1441 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1448 r = kvm_vcpu_ioctl_nmi(vcpu);
1454 case KVM_SET_CPUID: {
1455 struct kvm_cpuid __user *cpuid_arg = argp;
1456 struct kvm_cpuid cpuid;
1459 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1461 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1466 case KVM_SET_CPUID2: {
1467 struct kvm_cpuid2 __user *cpuid_arg = argp;
1468 struct kvm_cpuid2 cpuid;
1471 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1473 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1474 cpuid_arg->entries);
1479 case KVM_GET_CPUID2: {
1480 struct kvm_cpuid2 __user *cpuid_arg = argp;
1481 struct kvm_cpuid2 cpuid;
1484 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1486 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1487 cpuid_arg->entries);
1491 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1497 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1500 r = msr_io(vcpu, argp, do_set_msr, 0);
1502 case KVM_TPR_ACCESS_REPORTING: {
1503 struct kvm_tpr_access_ctl tac;
1506 if (copy_from_user(&tac, argp, sizeof tac))
1508 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1512 if (copy_to_user(argp, &tac, sizeof tac))
1517 case KVM_SET_VAPIC_ADDR: {
1518 struct kvm_vapic_addr va;
1521 if (!irqchip_in_kernel(vcpu->kvm))
1524 if (copy_from_user(&va, argp, sizeof va))
1527 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1539 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1543 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1545 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1549 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1550 u32 kvm_nr_mmu_pages)
1552 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1555 down_write(&kvm->slots_lock);
1557 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1558 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1560 up_write(&kvm->slots_lock);
1564 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1566 return kvm->arch.n_alloc_mmu_pages;
1569 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1572 struct kvm_mem_alias *alias;
1574 for (i = 0; i < kvm->arch.naliases; ++i) {
1575 alias = &kvm->arch.aliases[i];
1576 if (gfn >= alias->base_gfn
1577 && gfn < alias->base_gfn + alias->npages)
1578 return alias->target_gfn + gfn - alias->base_gfn;
1584 * Set a new alias region. Aliases map a portion of physical memory into
1585 * another portion. This is useful for memory windows, for example the PC
1588 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1589 struct kvm_memory_alias *alias)
1592 struct kvm_mem_alias *p;
1595 /* General sanity checks */
1596 if (alias->memory_size & (PAGE_SIZE - 1))
1598 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1600 if (alias->slot >= KVM_ALIAS_SLOTS)
1602 if (alias->guest_phys_addr + alias->memory_size
1603 < alias->guest_phys_addr)
1605 if (alias->target_phys_addr + alias->memory_size
1606 < alias->target_phys_addr)
1609 down_write(&kvm->slots_lock);
1610 spin_lock(&kvm->mmu_lock);
1612 p = &kvm->arch.aliases[alias->slot];
1613 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1614 p->npages = alias->memory_size >> PAGE_SHIFT;
1615 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1617 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1618 if (kvm->arch.aliases[n - 1].npages)
1620 kvm->arch.naliases = n;
1622 spin_unlock(&kvm->mmu_lock);
1623 kvm_mmu_zap_all(kvm);
1625 up_write(&kvm->slots_lock);
1633 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1638 switch (chip->chip_id) {
1639 case KVM_IRQCHIP_PIC_MASTER:
1640 memcpy(&chip->chip.pic,
1641 &pic_irqchip(kvm)->pics[0],
1642 sizeof(struct kvm_pic_state));
1644 case KVM_IRQCHIP_PIC_SLAVE:
1645 memcpy(&chip->chip.pic,
1646 &pic_irqchip(kvm)->pics[1],
1647 sizeof(struct kvm_pic_state));
1649 case KVM_IRQCHIP_IOAPIC:
1650 memcpy(&chip->chip.ioapic,
1651 ioapic_irqchip(kvm),
1652 sizeof(struct kvm_ioapic_state));
1661 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1666 switch (chip->chip_id) {
1667 case KVM_IRQCHIP_PIC_MASTER:
1668 memcpy(&pic_irqchip(kvm)->pics[0],
1670 sizeof(struct kvm_pic_state));
1672 case KVM_IRQCHIP_PIC_SLAVE:
1673 memcpy(&pic_irqchip(kvm)->pics[1],
1675 sizeof(struct kvm_pic_state));
1677 case KVM_IRQCHIP_IOAPIC:
1678 memcpy(ioapic_irqchip(kvm),
1680 sizeof(struct kvm_ioapic_state));
1686 kvm_pic_update_irq(pic_irqchip(kvm));
1690 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1694 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1698 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1702 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1703 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1708 * Get (and clear) the dirty memory log for a memory slot.
1710 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1711 struct kvm_dirty_log *log)
1715 struct kvm_memory_slot *memslot;
1718 down_write(&kvm->slots_lock);
1720 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1724 /* If nothing is dirty, don't bother messing with page tables. */
1726 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1727 kvm_flush_remote_tlbs(kvm);
1728 memslot = &kvm->memslots[log->slot];
1729 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1730 memset(memslot->dirty_bitmap, 0, n);
1734 up_write(&kvm->slots_lock);
1738 long kvm_arch_vm_ioctl(struct file *filp,
1739 unsigned int ioctl, unsigned long arg)
1741 struct kvm *kvm = filp->private_data;
1742 void __user *argp = (void __user *)arg;
1745 * This union makes it completely explicit to gcc-3.x
1746 * that these two variables' stack usage should be
1747 * combined, not added together.
1750 struct kvm_pit_state ps;
1751 struct kvm_memory_alias alias;
1755 case KVM_SET_TSS_ADDR:
1756 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1760 case KVM_SET_MEMORY_REGION: {
1761 struct kvm_memory_region kvm_mem;
1762 struct kvm_userspace_memory_region kvm_userspace_mem;
1765 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1767 kvm_userspace_mem.slot = kvm_mem.slot;
1768 kvm_userspace_mem.flags = kvm_mem.flags;
1769 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1770 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1771 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1776 case KVM_SET_NR_MMU_PAGES:
1777 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1781 case KVM_GET_NR_MMU_PAGES:
1782 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1784 case KVM_SET_MEMORY_ALIAS:
1786 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1788 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1792 case KVM_CREATE_IRQCHIP:
1794 kvm->arch.vpic = kvm_create_pic(kvm);
1795 if (kvm->arch.vpic) {
1796 r = kvm_ioapic_init(kvm);
1798 kfree(kvm->arch.vpic);
1799 kvm->arch.vpic = NULL;
1805 case KVM_CREATE_PIT:
1807 kvm->arch.vpit = kvm_create_pit(kvm);
1811 case KVM_IRQ_LINE: {
1812 struct kvm_irq_level irq_event;
1815 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1817 if (irqchip_in_kernel(kvm)) {
1818 mutex_lock(&kvm->lock);
1819 kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1820 irq_event.irq, irq_event.level);
1821 mutex_unlock(&kvm->lock);
1826 case KVM_GET_IRQCHIP: {
1827 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1828 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1834 if (copy_from_user(chip, argp, sizeof *chip))
1835 goto get_irqchip_out;
1837 if (!irqchip_in_kernel(kvm))
1838 goto get_irqchip_out;
1839 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1841 goto get_irqchip_out;
1843 if (copy_to_user(argp, chip, sizeof *chip))
1844 goto get_irqchip_out;
1852 case KVM_SET_IRQCHIP: {
1853 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1854 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1860 if (copy_from_user(chip, argp, sizeof *chip))
1861 goto set_irqchip_out;
1863 if (!irqchip_in_kernel(kvm))
1864 goto set_irqchip_out;
1865 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1867 goto set_irqchip_out;
1877 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1880 if (!kvm->arch.vpit)
1882 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1886 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1893 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1896 if (!kvm->arch.vpit)
1898 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1911 static void kvm_init_msr_list(void)
1916 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1917 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1920 msrs_to_save[j] = msrs_to_save[i];
1923 num_msrs_to_save = j;
1927 * Only apic need an MMIO device hook, so shortcut now..
1929 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1930 gpa_t addr, int len,
1933 struct kvm_io_device *dev;
1935 if (vcpu->arch.apic) {
1936 dev = &vcpu->arch.apic->dev;
1937 if (dev->in_range(dev, addr, len, is_write))
1944 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1945 gpa_t addr, int len,
1948 struct kvm_io_device *dev;
1950 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
1952 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
1957 int emulator_read_std(unsigned long addr,
1960 struct kvm_vcpu *vcpu)
1963 int r = X86EMUL_CONTINUE;
1966 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1967 unsigned offset = addr & (PAGE_SIZE-1);
1968 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1971 if (gpa == UNMAPPED_GVA) {
1972 r = X86EMUL_PROPAGATE_FAULT;
1975 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1977 r = X86EMUL_UNHANDLEABLE;
1988 EXPORT_SYMBOL_GPL(emulator_read_std);
1990 static int emulator_read_emulated(unsigned long addr,
1993 struct kvm_vcpu *vcpu)
1995 struct kvm_io_device *mmio_dev;
1998 if (vcpu->mmio_read_completed) {
1999 memcpy(val, vcpu->mmio_data, bytes);
2000 vcpu->mmio_read_completed = 0;
2001 return X86EMUL_CONTINUE;
2004 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2006 /* For APIC access vmexit */
2007 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2010 if (emulator_read_std(addr, val, bytes, vcpu)
2011 == X86EMUL_CONTINUE)
2012 return X86EMUL_CONTINUE;
2013 if (gpa == UNMAPPED_GVA)
2014 return X86EMUL_PROPAGATE_FAULT;
2018 * Is this MMIO handled locally?
2020 mutex_lock(&vcpu->kvm->lock);
2021 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2023 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2024 mutex_unlock(&vcpu->kvm->lock);
2025 return X86EMUL_CONTINUE;
2027 mutex_unlock(&vcpu->kvm->lock);
2029 vcpu->mmio_needed = 1;
2030 vcpu->mmio_phys_addr = gpa;
2031 vcpu->mmio_size = bytes;
2032 vcpu->mmio_is_write = 0;
2034 return X86EMUL_UNHANDLEABLE;
2037 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2038 const void *val, int bytes)
2042 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2045 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
2049 static int emulator_write_emulated_onepage(unsigned long addr,
2052 struct kvm_vcpu *vcpu)
2054 struct kvm_io_device *mmio_dev;
2057 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2059 if (gpa == UNMAPPED_GVA) {
2060 kvm_inject_page_fault(vcpu, addr, 2);
2061 return X86EMUL_PROPAGATE_FAULT;
2064 /* For APIC access vmexit */
2065 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2068 if (emulator_write_phys(vcpu, gpa, val, bytes))
2069 return X86EMUL_CONTINUE;
2073 * Is this MMIO handled locally?
2075 mutex_lock(&vcpu->kvm->lock);
2076 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2078 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2079 mutex_unlock(&vcpu->kvm->lock);
2080 return X86EMUL_CONTINUE;
2082 mutex_unlock(&vcpu->kvm->lock);
2084 vcpu->mmio_needed = 1;
2085 vcpu->mmio_phys_addr = gpa;
2086 vcpu->mmio_size = bytes;
2087 vcpu->mmio_is_write = 1;
2088 memcpy(vcpu->mmio_data, val, bytes);
2090 return X86EMUL_CONTINUE;
2093 int emulator_write_emulated(unsigned long addr,
2096 struct kvm_vcpu *vcpu)
2098 /* Crossing a page boundary? */
2099 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2102 now = -addr & ~PAGE_MASK;
2103 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2104 if (rc != X86EMUL_CONTINUE)
2110 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2112 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2114 static int emulator_cmpxchg_emulated(unsigned long addr,
2118 struct kvm_vcpu *vcpu)
2120 static int reported;
2124 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2126 #ifndef CONFIG_X86_64
2127 /* guests cmpxchg8b have to be emulated atomically */
2134 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2136 if (gpa == UNMAPPED_GVA ||
2137 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2140 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2145 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2147 kaddr = kmap_atomic(page, KM_USER0);
2148 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2149 kunmap_atomic(kaddr, KM_USER0);
2150 kvm_release_page_dirty(page);
2155 return emulator_write_emulated(addr, new, bytes, vcpu);
2158 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2160 return kvm_x86_ops->get_segment_base(vcpu, seg);
2163 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2165 kvm_mmu_invlpg(vcpu, address);
2166 return X86EMUL_CONTINUE;
2169 int emulate_clts(struct kvm_vcpu *vcpu)
2171 KVMTRACE_0D(CLTS, vcpu, handler);
2172 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2173 return X86EMUL_CONTINUE;
2176 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2178 struct kvm_vcpu *vcpu = ctxt->vcpu;
2182 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2183 return X86EMUL_CONTINUE;
2185 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2186 return X86EMUL_UNHANDLEABLE;
2190 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2192 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2195 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2197 /* FIXME: better handling */
2198 return X86EMUL_UNHANDLEABLE;
2200 return X86EMUL_CONTINUE;
2203 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2206 unsigned long rip = kvm_rip_read(vcpu);
2207 unsigned long rip_linear;
2209 if (!printk_ratelimit())
2212 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2214 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
2216 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2217 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2219 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2221 static struct x86_emulate_ops emulate_ops = {
2222 .read_std = emulator_read_std,
2223 .read_emulated = emulator_read_emulated,
2224 .write_emulated = emulator_write_emulated,
2225 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2228 static void cache_all_regs(struct kvm_vcpu *vcpu)
2230 kvm_register_read(vcpu, VCPU_REGS_RAX);
2231 kvm_register_read(vcpu, VCPU_REGS_RSP);
2232 kvm_register_read(vcpu, VCPU_REGS_RIP);
2233 vcpu->arch.regs_dirty = ~0;
2236 int emulate_instruction(struct kvm_vcpu *vcpu,
2237 struct kvm_run *run,
2243 struct decode_cache *c;
2245 kvm_clear_exception_queue(vcpu);
2246 vcpu->arch.mmio_fault_cr2 = cr2;
2248 * TODO: fix x86_emulate.c to use guest_read/write_register
2249 * instead of direct ->regs accesses, can save hundred cycles
2250 * on Intel for instructions that don't read/change RSP, for
2253 cache_all_regs(vcpu);
2255 vcpu->mmio_is_write = 0;
2256 vcpu->arch.pio.string = 0;
2258 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2260 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2262 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2263 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2264 vcpu->arch.emulate_ctxt.mode =
2265 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2266 ? X86EMUL_MODE_REAL : cs_l
2267 ? X86EMUL_MODE_PROT64 : cs_db
2268 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2270 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2272 /* Reject the instructions other than VMCALL/VMMCALL when
2273 * try to emulate invalid opcode */
2274 c = &vcpu->arch.emulate_ctxt.decode;
2275 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2276 (!(c->twobyte && c->b == 0x01 &&
2277 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2278 c->modrm_mod == 3 && c->modrm_rm == 1)))
2279 return EMULATE_FAIL;
2281 ++vcpu->stat.insn_emulation;
2283 ++vcpu->stat.insn_emulation_fail;
2284 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2285 return EMULATE_DONE;
2286 return EMULATE_FAIL;
2290 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2292 if (vcpu->arch.pio.string)
2293 return EMULATE_DO_MMIO;
2295 if ((r || vcpu->mmio_is_write) && run) {
2296 run->exit_reason = KVM_EXIT_MMIO;
2297 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2298 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2299 run->mmio.len = vcpu->mmio_size;
2300 run->mmio.is_write = vcpu->mmio_is_write;
2304 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2305 return EMULATE_DONE;
2306 if (!vcpu->mmio_needed) {
2307 kvm_report_emulation_failure(vcpu, "mmio");
2308 return EMULATE_FAIL;
2310 return EMULATE_DO_MMIO;
2313 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2315 if (vcpu->mmio_is_write) {
2316 vcpu->mmio_needed = 0;
2317 return EMULATE_DO_MMIO;
2320 return EMULATE_DONE;
2322 EXPORT_SYMBOL_GPL(emulate_instruction);
2324 static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2328 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2329 if (vcpu->arch.pio.guest_pages[i]) {
2330 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2331 vcpu->arch.pio.guest_pages[i] = NULL;
2335 static int pio_copy_data(struct kvm_vcpu *vcpu)
2337 void *p = vcpu->arch.pio_data;
2340 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
2342 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
2345 free_pio_guest_pages(vcpu);
2348 q += vcpu->arch.pio.guest_page_offset;
2349 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2350 if (vcpu->arch.pio.in)
2351 memcpy(q, p, bytes);
2353 memcpy(p, q, bytes);
2354 q -= vcpu->arch.pio.guest_page_offset;
2356 free_pio_guest_pages(vcpu);
2360 int complete_pio(struct kvm_vcpu *vcpu)
2362 struct kvm_pio_request *io = &vcpu->arch.pio;
2369 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2370 memcpy(&val, vcpu->arch.pio_data, io->size);
2371 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2375 r = pio_copy_data(vcpu);
2382 delta *= io->cur_count;
2384 * The size of the register should really depend on
2385 * current address size.
2387 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2389 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2395 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2397 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2399 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2401 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2405 io->count -= io->cur_count;
2411 static void kernel_pio(struct kvm_io_device *pio_dev,
2412 struct kvm_vcpu *vcpu,
2415 /* TODO: String I/O for in kernel device */
2417 mutex_lock(&vcpu->kvm->lock);
2418 if (vcpu->arch.pio.in)
2419 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2420 vcpu->arch.pio.size,
2423 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2424 vcpu->arch.pio.size,
2426 mutex_unlock(&vcpu->kvm->lock);
2429 static void pio_string_write(struct kvm_io_device *pio_dev,
2430 struct kvm_vcpu *vcpu)
2432 struct kvm_pio_request *io = &vcpu->arch.pio;
2433 void *pd = vcpu->arch.pio_data;
2436 mutex_lock(&vcpu->kvm->lock);
2437 for (i = 0; i < io->cur_count; i++) {
2438 kvm_iodevice_write(pio_dev, io->port,
2443 mutex_unlock(&vcpu->kvm->lock);
2446 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2447 gpa_t addr, int len,
2450 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2453 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2454 int size, unsigned port)
2456 struct kvm_io_device *pio_dev;
2459 vcpu->run->exit_reason = KVM_EXIT_IO;
2460 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2461 vcpu->run->io.size = vcpu->arch.pio.size = size;
2462 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2463 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2464 vcpu->run->io.port = vcpu->arch.pio.port = port;
2465 vcpu->arch.pio.in = in;
2466 vcpu->arch.pio.string = 0;
2467 vcpu->arch.pio.down = 0;
2468 vcpu->arch.pio.guest_page_offset = 0;
2469 vcpu->arch.pio.rep = 0;
2471 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2472 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2475 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2478 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2479 memcpy(vcpu->arch.pio_data, &val, 4);
2481 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2483 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2489 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2491 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2492 int size, unsigned long count, int down,
2493 gva_t address, int rep, unsigned port)
2495 unsigned now, in_page;
2499 struct kvm_io_device *pio_dev;
2501 vcpu->run->exit_reason = KVM_EXIT_IO;
2502 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2503 vcpu->run->io.size = vcpu->arch.pio.size = size;
2504 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2505 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2506 vcpu->run->io.port = vcpu->arch.pio.port = port;
2507 vcpu->arch.pio.in = in;
2508 vcpu->arch.pio.string = 1;
2509 vcpu->arch.pio.down = down;
2510 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2511 vcpu->arch.pio.rep = rep;
2513 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2514 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2517 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2521 kvm_x86_ops->skip_emulated_instruction(vcpu);
2526 in_page = PAGE_SIZE - offset_in_page(address);
2528 in_page = offset_in_page(address) + size;
2529 now = min(count, (unsigned long)in_page / size);
2532 * String I/O straddles page boundary. Pin two guest pages
2533 * so that we satisfy atomicity constraints. Do just one
2534 * transaction to avoid complexity.
2541 * String I/O in reverse. Yuck. Kill the guest, fix later.
2543 pr_unimpl(vcpu, "guest string pio down\n");
2544 kvm_inject_gp(vcpu, 0);
2547 vcpu->run->io.count = now;
2548 vcpu->arch.pio.cur_count = now;
2550 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2551 kvm_x86_ops->skip_emulated_instruction(vcpu);
2553 for (i = 0; i < nr_pages; ++i) {
2554 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
2555 vcpu->arch.pio.guest_pages[i] = page;
2557 kvm_inject_gp(vcpu, 0);
2558 free_pio_guest_pages(vcpu);
2563 pio_dev = vcpu_find_pio_dev(vcpu, port,
2564 vcpu->arch.pio.cur_count,
2565 !vcpu->arch.pio.in);
2566 if (!vcpu->arch.pio.in) {
2567 /* string PIO write */
2568 ret = pio_copy_data(vcpu);
2569 if (ret >= 0 && pio_dev) {
2570 pio_string_write(pio_dev, vcpu);
2572 if (vcpu->arch.pio.count == 0)
2576 pr_unimpl(vcpu, "no string pio read support yet, "
2577 "port %x size %d count %ld\n",
2582 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2584 int kvm_arch_init(void *opaque)
2587 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2590 printk(KERN_ERR "kvm: already loaded the other module\n");
2595 if (!ops->cpu_has_kvm_support()) {
2596 printk(KERN_ERR "kvm: no hardware support\n");
2600 if (ops->disabled_by_bios()) {
2601 printk(KERN_ERR "kvm: disabled by bios\n");
2606 r = kvm_mmu_module_init();
2610 kvm_init_msr_list();
2613 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2614 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2615 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2616 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2623 void kvm_arch_exit(void)
2626 kvm_mmu_module_exit();
2629 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2631 ++vcpu->stat.halt_exits;
2632 KVMTRACE_0D(HLT, vcpu, handler);
2633 if (irqchip_in_kernel(vcpu->kvm)) {
2634 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2637 vcpu->run->exit_reason = KVM_EXIT_HLT;
2641 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2643 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2646 if (is_long_mode(vcpu))
2649 return a0 | ((gpa_t)a1 << 32);
2652 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2654 unsigned long nr, a0, a1, a2, a3, ret;
2657 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2658 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2659 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2660 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2661 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2663 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2665 if (!is_long_mode(vcpu)) {
2674 case KVM_HC_VAPIC_POLL_IRQ:
2678 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2684 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2685 ++vcpu->stat.hypercalls;
2688 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2690 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2692 char instruction[3];
2694 unsigned long rip = kvm_rip_read(vcpu);
2698 * Blow out the MMU to ensure that no other VCPU has an active mapping
2699 * to ensure that the updated hypercall appears atomically across all
2702 kvm_mmu_zap_all(vcpu->kvm);
2704 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2705 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2706 != X86EMUL_CONTINUE)
2712 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2714 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2717 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2719 struct descriptor_table dt = { limit, base };
2721 kvm_x86_ops->set_gdt(vcpu, &dt);
2724 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2726 struct descriptor_table dt = { limit, base };
2728 kvm_x86_ops->set_idt(vcpu, &dt);
2731 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2732 unsigned long *rflags)
2734 kvm_lmsw(vcpu, msw);
2735 *rflags = kvm_x86_ops->get_rflags(vcpu);
2738 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2740 unsigned long value;
2742 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2745 value = vcpu->arch.cr0;
2748 value = vcpu->arch.cr2;
2751 value = vcpu->arch.cr3;
2754 value = vcpu->arch.cr4;
2757 value = kvm_get_cr8(vcpu);
2760 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2763 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2764 (u32)((u64)value >> 32), handler);
2769 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2770 unsigned long *rflags)
2772 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2773 (u32)((u64)val >> 32), handler);
2777 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2778 *rflags = kvm_x86_ops->get_rflags(vcpu);
2781 vcpu->arch.cr2 = val;
2784 kvm_set_cr3(vcpu, val);
2787 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2790 kvm_set_cr8(vcpu, val & 0xfUL);
2793 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2797 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2799 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2800 int j, nent = vcpu->arch.cpuid_nent;
2802 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2803 /* when no next entry is found, the current entry[i] is reselected */
2804 for (j = i + 1; j == i; j = (j + 1) % nent) {
2805 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2806 if (ej->function == e->function) {
2807 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2811 return 0; /* silence gcc, even though control never reaches here */
2814 /* find an entry with matching function, matching index (if needed), and that
2815 * should be read next (if it's stateful) */
2816 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2817 u32 function, u32 index)
2819 if (e->function != function)
2821 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2823 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2824 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2829 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2832 u32 function, index;
2833 struct kvm_cpuid_entry2 *e, *best;
2835 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
2836 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
2837 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
2838 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
2839 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
2840 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
2842 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2843 e = &vcpu->arch.cpuid_entries[i];
2844 if (is_matching_cpuid_entry(e, function, index)) {
2845 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2846 move_to_next_stateful_cpuid_entry(vcpu, i);
2851 * Both basic or both extended?
2853 if (((e->function ^ function) & 0x80000000) == 0)
2854 if (!best || e->function > best->function)
2858 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
2859 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
2860 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
2861 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
2863 kvm_x86_ops->skip_emulated_instruction(vcpu);
2864 KVMTRACE_5D(CPUID, vcpu, function,
2865 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
2866 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
2867 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
2868 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
2870 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
2873 * Check if userspace requested an interrupt window, and that the
2874 * interrupt window is open.
2876 * No need to exit to userspace if we already have an interrupt queued.
2878 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2879 struct kvm_run *kvm_run)
2881 return (!vcpu->arch.irq_summary &&
2882 kvm_run->request_interrupt_window &&
2883 vcpu->arch.interrupt_window_open &&
2884 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2888 * Check if userspace requested a NMI window, and that the NMI window
2891 * No need to exit to userspace if we already have a NMI queued.
2893 static int dm_request_for_nmi_injection(struct kvm_vcpu *vcpu,
2894 struct kvm_run *kvm_run)
2896 return (!vcpu->arch.nmi_pending &&
2897 kvm_run->request_nmi_window &&
2898 vcpu->arch.nmi_window_open);
2901 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2902 struct kvm_run *kvm_run)
2904 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2905 kvm_run->cr8 = kvm_get_cr8(vcpu);
2906 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2907 if (irqchip_in_kernel(vcpu->kvm)) {
2908 kvm_run->ready_for_interrupt_injection = 1;
2909 kvm_run->ready_for_nmi_injection = 1;
2911 kvm_run->ready_for_interrupt_injection =
2912 (vcpu->arch.interrupt_window_open &&
2913 vcpu->arch.irq_summary == 0);
2914 kvm_run->ready_for_nmi_injection =
2915 (vcpu->arch.nmi_window_open &&
2916 vcpu->arch.nmi_pending == 0);
2920 static void vapic_enter(struct kvm_vcpu *vcpu)
2922 struct kvm_lapic *apic = vcpu->arch.apic;
2925 if (!apic || !apic->vapic_addr)
2928 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2930 vcpu->arch.apic->vapic_page = page;
2933 static void vapic_exit(struct kvm_vcpu *vcpu)
2935 struct kvm_lapic *apic = vcpu->arch.apic;
2937 if (!apic || !apic->vapic_addr)
2940 down_read(&vcpu->kvm->slots_lock);
2941 kvm_release_page_dirty(apic->vapic_page);
2942 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2943 up_read(&vcpu->kvm->slots_lock);
2946 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2951 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
2952 kvm_mmu_unload(vcpu);
2954 r = kvm_mmu_reload(vcpu);
2958 if (vcpu->requests) {
2959 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2960 __kvm_migrate_timers(vcpu);
2961 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
2962 kvm_mmu_sync_roots(vcpu);
2963 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2964 kvm_x86_ops->tlb_flush(vcpu);
2965 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
2967 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
2971 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
2972 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
2978 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
2979 kvm_inject_pending_timer_irqs(vcpu);
2983 kvm_x86_ops->prepare_guest_switch(vcpu);
2984 kvm_load_guest_fpu(vcpu);
2986 local_irq_disable();
2988 if (vcpu->requests || need_resched() || signal_pending(current)) {
2995 if (vcpu->guest_debug.enabled)
2996 kvm_x86_ops->guest_debug_pre(vcpu);
2998 vcpu->guest_mode = 1;
3000 * Make sure that guest_mode assignment won't happen after
3001 * testing the pending IRQ vector bitmap.
3005 if (vcpu->arch.exception.pending)
3006 __queue_exception(vcpu);
3007 else if (irqchip_in_kernel(vcpu->kvm))
3008 kvm_x86_ops->inject_pending_irq(vcpu);
3010 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3012 kvm_lapic_sync_to_vapic(vcpu);
3014 up_read(&vcpu->kvm->slots_lock);
3019 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3020 kvm_x86_ops->run(vcpu, kvm_run);
3022 vcpu->guest_mode = 0;
3028 * We must have an instruction between local_irq_enable() and
3029 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3030 * the interrupt shadow. The stat.exits increment will do nicely.
3031 * But we need to prevent reordering, hence this barrier():
3039 down_read(&vcpu->kvm->slots_lock);
3042 * Profile KVM exit RIPs:
3044 if (unlikely(prof_on == KVM_PROFILING)) {
3045 unsigned long rip = kvm_rip_read(vcpu);
3046 profile_hit(KVM_PROFILING, (void *)rip);
3049 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3050 vcpu->arch.exception.pending = false;
3052 kvm_lapic_sync_from_vapic(vcpu);
3054 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3059 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3063 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3064 pr_debug("vcpu %d received sipi with vector # %x\n",
3065 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3066 kvm_lapic_reset(vcpu);
3067 r = kvm_arch_vcpu_reset(vcpu);
3070 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3073 down_read(&vcpu->kvm->slots_lock);
3078 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3079 r = vcpu_enter_guest(vcpu, kvm_run);
3081 up_read(&vcpu->kvm->slots_lock);
3082 kvm_vcpu_block(vcpu);
3083 down_read(&vcpu->kvm->slots_lock);
3084 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3085 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3086 vcpu->arch.mp_state =
3087 KVM_MP_STATE_RUNNABLE;
3088 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3093 if (dm_request_for_nmi_injection(vcpu, kvm_run)) {
3095 kvm_run->exit_reason = KVM_EXIT_NMI;
3096 ++vcpu->stat.request_nmi_exits;
3098 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3100 kvm_run->exit_reason = KVM_EXIT_INTR;
3101 ++vcpu->stat.request_irq_exits;
3103 if (signal_pending(current)) {
3105 kvm_run->exit_reason = KVM_EXIT_INTR;
3106 ++vcpu->stat.signal_exits;
3108 if (need_resched()) {
3109 up_read(&vcpu->kvm->slots_lock);
3111 down_read(&vcpu->kvm->slots_lock);
3116 up_read(&vcpu->kvm->slots_lock);
3117 post_kvm_run_save(vcpu, kvm_run);
3124 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3131 if (vcpu->sigset_active)
3132 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3134 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3135 kvm_vcpu_block(vcpu);
3136 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3141 /* re-sync apic's tpr */
3142 if (!irqchip_in_kernel(vcpu->kvm))
3143 kvm_set_cr8(vcpu, kvm_run->cr8);
3145 if (vcpu->arch.pio.cur_count) {
3146 r = complete_pio(vcpu);
3150 #if CONFIG_HAS_IOMEM
3151 if (vcpu->mmio_needed) {
3152 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3153 vcpu->mmio_read_completed = 1;
3154 vcpu->mmio_needed = 0;
3156 down_read(&vcpu->kvm->slots_lock);
3157 r = emulate_instruction(vcpu, kvm_run,
3158 vcpu->arch.mmio_fault_cr2, 0,
3159 EMULTYPE_NO_DECODE);
3160 up_read(&vcpu->kvm->slots_lock);
3161 if (r == EMULATE_DO_MMIO) {
3163 * Read-modify-write. Back to userspace.
3170 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3171 kvm_register_write(vcpu, VCPU_REGS_RAX,
3172 kvm_run->hypercall.ret);
3174 r = __vcpu_run(vcpu, kvm_run);
3177 if (vcpu->sigset_active)
3178 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3184 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3188 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3189 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3190 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3191 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3192 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3193 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3194 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3195 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3196 #ifdef CONFIG_X86_64
3197 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3198 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3199 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3200 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3201 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3202 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3203 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3204 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3207 regs->rip = kvm_rip_read(vcpu);
3208 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3211 * Don't leak debug flags in case they were set for guest debugging
3213 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
3214 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3221 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3225 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3226 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3227 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3228 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3229 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3230 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3231 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3232 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3233 #ifdef CONFIG_X86_64
3234 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3235 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3236 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3237 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3238 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3239 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3240 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3241 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3245 kvm_rip_write(vcpu, regs->rip);
3246 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3249 vcpu->arch.exception.pending = false;
3256 void kvm_get_segment(struct kvm_vcpu *vcpu,
3257 struct kvm_segment *var, int seg)
3259 kvm_x86_ops->get_segment(vcpu, var, seg);
3262 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3264 struct kvm_segment cs;
3266 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3270 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3272 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3273 struct kvm_sregs *sregs)
3275 struct descriptor_table dt;
3280 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3281 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3282 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3283 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3284 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3285 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3287 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3288 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3290 kvm_x86_ops->get_idt(vcpu, &dt);
3291 sregs->idt.limit = dt.limit;
3292 sregs->idt.base = dt.base;
3293 kvm_x86_ops->get_gdt(vcpu, &dt);
3294 sregs->gdt.limit = dt.limit;
3295 sregs->gdt.base = dt.base;
3297 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3298 sregs->cr0 = vcpu->arch.cr0;
3299 sregs->cr2 = vcpu->arch.cr2;
3300 sregs->cr3 = vcpu->arch.cr3;
3301 sregs->cr4 = vcpu->arch.cr4;
3302 sregs->cr8 = kvm_get_cr8(vcpu);
3303 sregs->efer = vcpu->arch.shadow_efer;
3304 sregs->apic_base = kvm_get_apic_base(vcpu);
3306 if (irqchip_in_kernel(vcpu->kvm)) {
3307 memset(sregs->interrupt_bitmap, 0,
3308 sizeof sregs->interrupt_bitmap);
3309 pending_vec = kvm_x86_ops->get_irq(vcpu);
3310 if (pending_vec >= 0)
3311 set_bit(pending_vec,
3312 (unsigned long *)sregs->interrupt_bitmap);
3314 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3315 sizeof sregs->interrupt_bitmap);
3322 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3323 struct kvm_mp_state *mp_state)
3326 mp_state->mp_state = vcpu->arch.mp_state;
3331 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3332 struct kvm_mp_state *mp_state)
3335 vcpu->arch.mp_state = mp_state->mp_state;
3340 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3341 struct kvm_segment *var, int seg)
3343 kvm_x86_ops->set_segment(vcpu, var, seg);
3346 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3347 struct kvm_segment *kvm_desct)
3349 kvm_desct->base = seg_desc->base0;
3350 kvm_desct->base |= seg_desc->base1 << 16;
3351 kvm_desct->base |= seg_desc->base2 << 24;
3352 kvm_desct->limit = seg_desc->limit0;
3353 kvm_desct->limit |= seg_desc->limit << 16;
3355 kvm_desct->limit <<= 12;
3356 kvm_desct->limit |= 0xfff;
3358 kvm_desct->selector = selector;
3359 kvm_desct->type = seg_desc->type;
3360 kvm_desct->present = seg_desc->p;
3361 kvm_desct->dpl = seg_desc->dpl;
3362 kvm_desct->db = seg_desc->d;
3363 kvm_desct->s = seg_desc->s;
3364 kvm_desct->l = seg_desc->l;
3365 kvm_desct->g = seg_desc->g;
3366 kvm_desct->avl = seg_desc->avl;
3368 kvm_desct->unusable = 1;
3370 kvm_desct->unusable = 0;
3371 kvm_desct->padding = 0;
3374 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3376 struct descriptor_table *dtable)
3378 if (selector & 1 << 2) {
3379 struct kvm_segment kvm_seg;
3381 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3383 if (kvm_seg.unusable)
3386 dtable->limit = kvm_seg.limit;
3387 dtable->base = kvm_seg.base;
3390 kvm_x86_ops->get_gdt(vcpu, dtable);
3393 /* allowed just for 8 bytes segments */
3394 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3395 struct desc_struct *seg_desc)
3398 struct descriptor_table dtable;
3399 u16 index = selector >> 3;
3401 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3403 if (dtable.limit < index * 8 + 7) {
3404 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3407 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3409 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3412 /* allowed just for 8 bytes segments */
3413 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3414 struct desc_struct *seg_desc)
3417 struct descriptor_table dtable;
3418 u16 index = selector >> 3;
3420 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3422 if (dtable.limit < index * 8 + 7)
3424 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3426 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3429 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3430 struct desc_struct *seg_desc)
3434 base_addr = seg_desc->base0;
3435 base_addr |= (seg_desc->base1 << 16);
3436 base_addr |= (seg_desc->base2 << 24);
3438 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3441 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3443 struct kvm_segment kvm_seg;
3445 kvm_get_segment(vcpu, &kvm_seg, seg);
3446 return kvm_seg.selector;
3449 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3451 struct kvm_segment *kvm_seg)
3453 struct desc_struct seg_desc;
3455 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3457 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3461 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3463 struct kvm_segment segvar = {
3464 .base = selector << 4,
3466 .selector = selector,
3477 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3481 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3482 int type_bits, int seg)
3484 struct kvm_segment kvm_seg;
3486 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3487 return kvm_load_realmode_segment(vcpu, selector, seg);
3488 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3490 kvm_seg.type |= type_bits;
3492 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3493 seg != VCPU_SREG_LDTR)
3495 kvm_seg.unusable = 1;
3497 kvm_set_segment(vcpu, &kvm_seg, seg);
3501 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3502 struct tss_segment_32 *tss)
3504 tss->cr3 = vcpu->arch.cr3;
3505 tss->eip = kvm_rip_read(vcpu);
3506 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3507 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3508 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3509 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3510 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3511 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3512 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3513 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3514 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3515 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3516 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3517 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3518 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3519 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3520 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3521 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3522 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3525 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3526 struct tss_segment_32 *tss)
3528 kvm_set_cr3(vcpu, tss->cr3);
3530 kvm_rip_write(vcpu, tss->eip);
3531 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3533 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3534 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3535 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3536 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3537 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3538 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3539 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3540 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3542 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3545 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3548 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3551 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3554 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3557 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3560 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3565 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3566 struct tss_segment_16 *tss)
3568 tss->ip = kvm_rip_read(vcpu);
3569 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3570 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3571 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3572 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3573 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3574 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3575 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3576 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3577 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3579 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3580 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3581 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3582 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3583 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3584 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3587 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3588 struct tss_segment_16 *tss)
3590 kvm_rip_write(vcpu, tss->ip);
3591 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3592 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3593 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3594 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3595 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3596 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3597 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3598 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3599 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3601 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3604 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3607 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3610 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3613 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3618 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3620 struct desc_struct *nseg_desc)
3622 struct tss_segment_16 tss_segment_16;
3625 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3626 sizeof tss_segment_16))
3629 save_state_to_tss16(vcpu, &tss_segment_16);
3631 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3632 sizeof tss_segment_16))
3635 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3636 &tss_segment_16, sizeof tss_segment_16))
3639 if (load_state_from_tss16(vcpu, &tss_segment_16))
3647 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3649 struct desc_struct *nseg_desc)
3651 struct tss_segment_32 tss_segment_32;
3654 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3655 sizeof tss_segment_32))
3658 save_state_to_tss32(vcpu, &tss_segment_32);
3660 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3661 sizeof tss_segment_32))
3664 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3665 &tss_segment_32, sizeof tss_segment_32))
3668 if (load_state_from_tss32(vcpu, &tss_segment_32))
3676 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3678 struct kvm_segment tr_seg;
3679 struct desc_struct cseg_desc;
3680 struct desc_struct nseg_desc;
3682 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3683 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3685 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3687 /* FIXME: Handle errors. Failure to read either TSS or their
3688 * descriptors should generate a pagefault.
3690 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3693 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3696 if (reason != TASK_SWITCH_IRET) {
3699 cpl = kvm_x86_ops->get_cpl(vcpu);
3700 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3701 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3706 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3707 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3711 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3712 cseg_desc.type &= ~(1 << 1); //clear the B flag
3713 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3716 if (reason == TASK_SWITCH_IRET) {
3717 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3718 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3721 kvm_x86_ops->skip_emulated_instruction(vcpu);
3723 if (nseg_desc.type & 8)
3724 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3727 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3730 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3731 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3732 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3735 if (reason != TASK_SWITCH_IRET) {
3736 nseg_desc.type |= (1 << 1);
3737 save_guest_segment_descriptor(vcpu, tss_selector,
3741 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3742 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3744 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3748 EXPORT_SYMBOL_GPL(kvm_task_switch);
3750 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3751 struct kvm_sregs *sregs)
3753 int mmu_reset_needed = 0;
3754 int i, pending_vec, max_bits;
3755 struct descriptor_table dt;
3759 dt.limit = sregs->idt.limit;
3760 dt.base = sregs->idt.base;
3761 kvm_x86_ops->set_idt(vcpu, &dt);
3762 dt.limit = sregs->gdt.limit;
3763 dt.base = sregs->gdt.base;
3764 kvm_x86_ops->set_gdt(vcpu, &dt);
3766 vcpu->arch.cr2 = sregs->cr2;
3767 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3768 vcpu->arch.cr3 = sregs->cr3;
3770 kvm_set_cr8(vcpu, sregs->cr8);
3772 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3773 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3774 kvm_set_apic_base(vcpu, sregs->apic_base);
3776 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3778 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3779 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3780 vcpu->arch.cr0 = sregs->cr0;
3782 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3783 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3784 if (!is_long_mode(vcpu) && is_pae(vcpu))
3785 load_pdptrs(vcpu, vcpu->arch.cr3);
3787 if (mmu_reset_needed)
3788 kvm_mmu_reset_context(vcpu);
3790 if (!irqchip_in_kernel(vcpu->kvm)) {
3791 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3792 sizeof vcpu->arch.irq_pending);
3793 vcpu->arch.irq_summary = 0;
3794 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3795 if (vcpu->arch.irq_pending[i])
3796 __set_bit(i, &vcpu->arch.irq_summary);
3798 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3799 pending_vec = find_first_bit(
3800 (const unsigned long *)sregs->interrupt_bitmap,
3802 /* Only pending external irq is handled here */
3803 if (pending_vec < max_bits) {
3804 kvm_x86_ops->set_irq(vcpu, pending_vec);
3805 pr_debug("Set back pending irq %d\n",
3808 kvm_pic_clear_isr_ack(vcpu->kvm);
3811 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3812 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3813 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3814 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3815 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3816 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3818 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3819 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3821 /* Older userspace won't unhalt the vcpu on reset. */
3822 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
3823 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
3824 !(vcpu->arch.cr0 & X86_CR0_PE))
3825 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3832 int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3833 struct kvm_debug_guest *dbg)
3839 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3847 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3848 * we have asm/x86/processor.h
3859 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3860 #ifdef CONFIG_X86_64
3861 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3863 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3868 * Translate a guest virtual address to a guest physical address.
3870 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3871 struct kvm_translation *tr)
3873 unsigned long vaddr = tr->linear_address;
3877 down_read(&vcpu->kvm->slots_lock);
3878 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
3879 up_read(&vcpu->kvm->slots_lock);
3880 tr->physical_address = gpa;
3881 tr->valid = gpa != UNMAPPED_GVA;
3889 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3891 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3895 memcpy(fpu->fpr, fxsave->st_space, 128);
3896 fpu->fcw = fxsave->cwd;
3897 fpu->fsw = fxsave->swd;
3898 fpu->ftwx = fxsave->twd;
3899 fpu->last_opcode = fxsave->fop;
3900 fpu->last_ip = fxsave->rip;
3901 fpu->last_dp = fxsave->rdp;
3902 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
3909 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3911 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3915 memcpy(fxsave->st_space, fpu->fpr, 128);
3916 fxsave->cwd = fpu->fcw;
3917 fxsave->swd = fpu->fsw;
3918 fxsave->twd = fpu->ftwx;
3919 fxsave->fop = fpu->last_opcode;
3920 fxsave->rip = fpu->last_ip;
3921 fxsave->rdp = fpu->last_dp;
3922 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
3929 void fx_init(struct kvm_vcpu *vcpu)
3931 unsigned after_mxcsr_mask;
3934 * Touch the fpu the first time in non atomic context as if
3935 * this is the first fpu instruction the exception handler
3936 * will fire before the instruction returns and it'll have to
3937 * allocate ram with GFP_KERNEL.
3940 kvm_fx_save(&vcpu->arch.host_fx_image);
3942 /* Initialize guest FPU by resetting ours and saving into guest's */
3944 kvm_fx_save(&vcpu->arch.host_fx_image);
3946 kvm_fx_save(&vcpu->arch.guest_fx_image);
3947 kvm_fx_restore(&vcpu->arch.host_fx_image);
3950 vcpu->arch.cr0 |= X86_CR0_ET;
3951 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
3952 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
3953 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
3954 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
3956 EXPORT_SYMBOL_GPL(fx_init);
3958 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
3960 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
3963 vcpu->guest_fpu_loaded = 1;
3964 kvm_fx_save(&vcpu->arch.host_fx_image);
3965 kvm_fx_restore(&vcpu->arch.guest_fx_image);
3967 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
3969 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
3971 if (!vcpu->guest_fpu_loaded)
3974 vcpu->guest_fpu_loaded = 0;
3975 kvm_fx_save(&vcpu->arch.guest_fx_image);
3976 kvm_fx_restore(&vcpu->arch.host_fx_image);
3977 ++vcpu->stat.fpu_reload;
3979 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
3981 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
3983 kvm_x86_ops->vcpu_free(vcpu);
3986 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
3989 return kvm_x86_ops->vcpu_create(kvm, id);
3992 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
3996 /* We do fxsave: this must be aligned. */
3997 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
3999 vcpu->arch.mtrr_state.have_fixed = 1;
4001 r = kvm_arch_vcpu_reset(vcpu);
4003 r = kvm_mmu_setup(vcpu);
4010 kvm_x86_ops->vcpu_free(vcpu);
4014 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4017 kvm_mmu_unload(vcpu);
4020 kvm_x86_ops->vcpu_free(vcpu);
4023 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4025 vcpu->arch.nmi_pending = false;
4026 vcpu->arch.nmi_injected = false;
4028 return kvm_x86_ops->vcpu_reset(vcpu);
4031 void kvm_arch_hardware_enable(void *garbage)
4033 kvm_x86_ops->hardware_enable(garbage);
4036 void kvm_arch_hardware_disable(void *garbage)
4038 kvm_x86_ops->hardware_disable(garbage);
4041 int kvm_arch_hardware_setup(void)
4043 return kvm_x86_ops->hardware_setup();
4046 void kvm_arch_hardware_unsetup(void)
4048 kvm_x86_ops->hardware_unsetup();
4051 void kvm_arch_check_processor_compat(void *rtn)
4053 kvm_x86_ops->check_processor_compatibility(rtn);
4056 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4062 BUG_ON(vcpu->kvm == NULL);
4065 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4066 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4067 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4069 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4071 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4076 vcpu->arch.pio_data = page_address(page);
4078 r = kvm_mmu_create(vcpu);
4080 goto fail_free_pio_data;
4082 if (irqchip_in_kernel(kvm)) {
4083 r = kvm_create_lapic(vcpu);
4085 goto fail_mmu_destroy;
4091 kvm_mmu_destroy(vcpu);
4093 free_page((unsigned long)vcpu->arch.pio_data);
4098 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4100 kvm_free_lapic(vcpu);
4101 down_read(&vcpu->kvm->slots_lock);
4102 kvm_mmu_destroy(vcpu);
4103 up_read(&vcpu->kvm->slots_lock);
4104 free_page((unsigned long)vcpu->arch.pio_data);
4107 struct kvm *kvm_arch_create_vm(void)
4109 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4112 return ERR_PTR(-ENOMEM);
4114 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4115 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4117 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4118 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4123 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4126 kvm_mmu_unload(vcpu);
4130 static void kvm_free_vcpus(struct kvm *kvm)
4135 * Unpin any mmu pages first.
4137 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4139 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4140 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4141 if (kvm->vcpus[i]) {
4142 kvm_arch_vcpu_free(kvm->vcpus[i]);
4143 kvm->vcpus[i] = NULL;
4149 void kvm_arch_destroy_vm(struct kvm *kvm)
4151 kvm_free_all_assigned_devices(kvm);
4152 kvm_iommu_unmap_guest(kvm);
4154 kfree(kvm->arch.vpic);
4155 kfree(kvm->arch.vioapic);
4156 kvm_free_vcpus(kvm);
4157 kvm_free_physmem(kvm);
4158 if (kvm->arch.apic_access_page)
4159 put_page(kvm->arch.apic_access_page);
4160 if (kvm->arch.ept_identity_pagetable)
4161 put_page(kvm->arch.ept_identity_pagetable);
4165 int kvm_arch_set_memory_region(struct kvm *kvm,
4166 struct kvm_userspace_memory_region *mem,
4167 struct kvm_memory_slot old,
4170 int npages = mem->memory_size >> PAGE_SHIFT;
4171 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4173 /*To keep backward compatibility with older userspace,
4174 *x86 needs to hanlde !user_alloc case.
4177 if (npages && !old.rmap) {
4178 unsigned long userspace_addr;
4180 down_write(¤t->mm->mmap_sem);
4181 userspace_addr = do_mmap(NULL, 0,
4183 PROT_READ | PROT_WRITE,
4184 MAP_PRIVATE | MAP_ANONYMOUS,
4186 up_write(¤t->mm->mmap_sem);
4188 if (IS_ERR((void *)userspace_addr))
4189 return PTR_ERR((void *)userspace_addr);
4191 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4192 spin_lock(&kvm->mmu_lock);
4193 memslot->userspace_addr = userspace_addr;
4194 spin_unlock(&kvm->mmu_lock);
4196 if (!old.user_alloc && old.rmap) {
4199 down_write(¤t->mm->mmap_sem);
4200 ret = do_munmap(current->mm, old.userspace_addr,
4201 old.npages * PAGE_SIZE);
4202 up_write(¤t->mm->mmap_sem);
4205 "kvm_vm_ioctl_set_memory_region: "
4206 "failed to munmap memory\n");
4211 if (!kvm->arch.n_requested_mmu_pages) {
4212 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4213 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4216 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4217 kvm_flush_remote_tlbs(kvm);
4222 void kvm_arch_flush_shadow(struct kvm *kvm)
4224 kvm_mmu_zap_all(kvm);
4227 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4229 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4230 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4231 || vcpu->arch.nmi_pending;
4234 static void vcpu_kick_intr(void *info)
4237 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4238 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4242 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4244 int ipi_pcpu = vcpu->cpu;
4245 int cpu = get_cpu();
4247 if (waitqueue_active(&vcpu->wq)) {
4248 wake_up_interruptible(&vcpu->wq);
4249 ++vcpu->stat.halt_wakeup;
4252 * We may be called synchronously with irqs disabled in guest mode,
4253 * So need not to call smp_call_function_single() in that case.
4255 if (vcpu->guest_mode && vcpu->cpu != cpu)
4256 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);