2 * 8253/8254 interval timer emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2006 Intel Corporation
6 * Copyright (c) 2007 Keir Fraser, XenSource Inc
7 * Copyright (c) 2008 Intel Corporation
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 * Sheng Yang <sheng.yang@intel.com>
29 * Based on QEMU and Xen.
32 #include <linux/kvm_host.h>
38 #define mod_64(x, y) ((x) - (y) * div64_64(x, y))
40 #define mod_64(x, y) ((x) % (y))
43 #define RW_STATE_LSB 1
44 #define RW_STATE_MSB 2
45 #define RW_STATE_WORD0 3
46 #define RW_STATE_WORD1 4
48 /* Compute with 96 bit intermediate result: (a*b)/c */
49 static u64 muldiv64(u64 a, u32 b, u32 c)
60 rl = (u64)u.l.low * (u64)b;
61 rh = (u64)u.l.high * (u64)b;
63 res.l.high = div64_64(rh, c);
64 res.l.low = div64_64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
68 static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
70 struct kvm_kpit_channel_state *c =
71 &kvm->arch.vpit->pit_state.channels[channel];
73 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
79 /* XXX: just disable/enable counting */
85 /* Restart counting on rising edge. */
87 c->count_load_time = ktime_get();
94 int pit_get_gate(struct kvm *kvm, int channel)
96 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
98 return kvm->arch.vpit->pit_state.channels[channel].gate;
101 static int pit_get_count(struct kvm *kvm, int channel)
103 struct kvm_kpit_channel_state *c =
104 &kvm->arch.vpit->pit_state.channels[channel];
108 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
110 t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
111 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
118 counter = (c->count - d) & 0xffff;
121 /* XXX: may be incorrect for odd counts */
122 counter = c->count - (mod_64((2 * d), c->count));
125 counter = c->count - mod_64(d, c->count);
131 static int pit_get_out(struct kvm *kvm, int channel)
133 struct kvm_kpit_channel_state *c =
134 &kvm->arch.vpit->pit_state.channels[channel];
138 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
140 t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
141 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
146 out = (d >= c->count);
149 out = (d < c->count);
152 out = ((mod_64(d, c->count) == 0) && (d != 0));
155 out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
159 out = (d == c->count);
166 static void pit_latch_count(struct kvm *kvm, int channel)
168 struct kvm_kpit_channel_state *c =
169 &kvm->arch.vpit->pit_state.channels[channel];
171 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
173 if (!c->count_latched) {
174 c->latched_count = pit_get_count(kvm, channel);
175 c->count_latched = c->rw_mode;
179 static void pit_latch_status(struct kvm *kvm, int channel)
181 struct kvm_kpit_channel_state *c =
182 &kvm->arch.vpit->pit_state.channels[channel];
184 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
186 if (!c->status_latched) {
187 /* TODO: Return NULL COUNT (bit 6). */
188 c->status = ((pit_get_out(kvm, channel) << 7) |
192 c->status_latched = 1;
196 int __pit_timer_fn(struct kvm_kpit_state *ps)
198 struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0];
199 struct kvm_kpit_timer *pt = &ps->pit_timer;
201 atomic_inc(&pt->pending);
202 smp_mb__after_atomic_inc();
203 /* FIXME: handle case where the guest is in guest mode */
204 if (vcpu0 && waitqueue_active(&vcpu0->wq)) {
205 vcpu0->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
206 wake_up_interruptible(&vcpu0->wq);
209 pt->timer.expires = ktime_add_ns(pt->timer.expires, pt->period);
210 pt->scheduled = ktime_to_ns(pt->timer.expires);
212 return (pt->period == 0 ? 0 : 1);
215 static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
217 struct kvm_kpit_state *ps;
218 int restart_timer = 0;
220 ps = container_of(data, struct kvm_kpit_state, pit_timer.timer);
222 restart_timer = __pit_timer_fn(ps);
225 return HRTIMER_RESTART;
227 return HRTIMER_NORESTART;
230 static void destroy_pit_timer(struct kvm_kpit_timer *pt)
232 pr_debug("pit: execute del timer!\n");
233 hrtimer_cancel(&pt->timer);
236 static void create_pit_timer(struct kvm_kpit_timer *pt, u32 val, int is_period)
240 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
242 pr_debug("pit: create pit timer, interval is %llu nsec\n", interval);
244 /* TODO The new value only affected after the retriggered */
245 hrtimer_cancel(&pt->timer);
246 pt->period = (is_period == 0) ? 0 : interval;
247 pt->timer.function = pit_timer_fn;
248 atomic_set(&pt->pending, 0);
250 hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
254 static void pit_load_count(struct kvm *kvm, int channel, u32 val)
256 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
258 WARN_ON(!mutex_is_locked(&ps->lock));
260 pr_debug("pit: load_count val is %d, channel is %d\n", val, channel);
263 * Though spec said the state of 8254 is undefined after power-up,
264 * seems some tricky OS like Windows XP depends on IRQ0 interrupt
266 * So here setting initialize rate for it, and not a specific number
271 ps->channels[channel].count_load_time = ktime_get();
272 ps->channels[channel].count = val;
277 /* Two types of timer
278 * mode 1 is one shot, mode 2 is period, otherwise del timer */
279 switch (ps->channels[0].mode) {
281 create_pit_timer(&ps->pit_timer, val, 0);
284 create_pit_timer(&ps->pit_timer, val, 1);
287 destroy_pit_timer(&ps->pit_timer);
291 static void pit_ioport_write(struct kvm_io_device *this,
292 gpa_t addr, int len, const void *data)
294 struct kvm_pit *pit = (struct kvm_pit *)this->private;
295 struct kvm_kpit_state *pit_state = &pit->pit_state;
296 struct kvm *kvm = pit->kvm;
298 struct kvm_kpit_channel_state *s;
299 u32 val = *(u32 *) data;
302 addr &= KVM_PIT_CHANNEL_MASK;
304 mutex_lock(&pit_state->lock);
307 pr_debug("pit: write addr is 0x%x, len is %d, val is 0x%x\n",
308 (unsigned int)addr, len, val);
313 /* Read-Back Command. */
314 for (channel = 0; channel < 3; channel++) {
315 s = &pit_state->channels[channel];
316 if (val & (2 << channel)) {
318 pit_latch_count(kvm, channel);
320 pit_latch_status(kvm, channel);
324 /* Select Counter <channel>. */
325 s = &pit_state->channels[channel];
326 access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
328 pit_latch_count(kvm, channel);
331 s->read_state = access;
332 s->write_state = access;
333 s->mode = (val >> 1) & 7;
341 s = &pit_state->channels[addr];
342 switch (s->write_state) {
345 pit_load_count(kvm, addr, val);
348 pit_load_count(kvm, addr, val << 8);
351 s->write_latch = val;
352 s->write_state = RW_STATE_WORD1;
355 pit_load_count(kvm, addr, s->write_latch | (val << 8));
356 s->write_state = RW_STATE_WORD0;
361 mutex_unlock(&pit_state->lock);
364 static void pit_ioport_read(struct kvm_io_device *this,
365 gpa_t addr, int len, void *data)
367 struct kvm_pit *pit = (struct kvm_pit *)this->private;
368 struct kvm_kpit_state *pit_state = &pit->pit_state;
369 struct kvm *kvm = pit->kvm;
371 struct kvm_kpit_channel_state *s;
373 addr &= KVM_PIT_CHANNEL_MASK;
374 s = &pit_state->channels[addr];
376 mutex_lock(&pit_state->lock);
378 if (s->status_latched) {
379 s->status_latched = 0;
381 } else if (s->count_latched) {
382 switch (s->count_latched) {
385 ret = s->latched_count & 0xff;
386 s->count_latched = 0;
389 ret = s->latched_count >> 8;
390 s->count_latched = 0;
393 ret = s->latched_count & 0xff;
394 s->count_latched = RW_STATE_MSB;
398 switch (s->read_state) {
401 count = pit_get_count(kvm, addr);
405 count = pit_get_count(kvm, addr);
406 ret = (count >> 8) & 0xff;
409 count = pit_get_count(kvm, addr);
411 s->read_state = RW_STATE_WORD1;
414 count = pit_get_count(kvm, addr);
415 ret = (count >> 8) & 0xff;
416 s->read_state = RW_STATE_WORD0;
421 if (len > sizeof(ret))
423 memcpy(data, (char *)&ret, len);
425 mutex_unlock(&pit_state->lock);
428 static int pit_in_range(struct kvm_io_device *this, gpa_t addr)
430 return ((addr >= KVM_PIT_BASE_ADDRESS) &&
431 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
434 static void speaker_ioport_write(struct kvm_io_device *this,
435 gpa_t addr, int len, const void *data)
437 struct kvm_pit *pit = (struct kvm_pit *)this->private;
438 struct kvm_kpit_state *pit_state = &pit->pit_state;
439 struct kvm *kvm = pit->kvm;
440 u32 val = *(u32 *) data;
442 mutex_lock(&pit_state->lock);
443 pit_state->speaker_data_on = (val >> 1) & 1;
444 pit_set_gate(kvm, 2, val & 1);
445 mutex_unlock(&pit_state->lock);
448 static void speaker_ioport_read(struct kvm_io_device *this,
449 gpa_t addr, int len, void *data)
451 struct kvm_pit *pit = (struct kvm_pit *)this->private;
452 struct kvm_kpit_state *pit_state = &pit->pit_state;
453 struct kvm *kvm = pit->kvm;
454 unsigned int refresh_clock;
457 /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
458 refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
460 mutex_lock(&pit_state->lock);
461 ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
462 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
463 if (len > sizeof(ret))
465 memcpy(data, (char *)&ret, len);
466 mutex_unlock(&pit_state->lock);
469 static int speaker_in_range(struct kvm_io_device *this, gpa_t addr)
471 return (addr == KVM_SPEAKER_BASE_ADDRESS);
474 struct kvm_pit *kvm_create_pit(struct kvm *kvm)
478 struct kvm_kpit_state *pit_state;
479 struct kvm_kpit_channel_state *c;
481 pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
485 mutex_init(&pit->pit_state.lock);
486 mutex_lock(&pit->pit_state.lock);
488 /* Initialize PIO device */
489 pit->dev.read = pit_ioport_read;
490 pit->dev.write = pit_ioport_write;
491 pit->dev.in_range = pit_in_range;
492 pit->dev.private = pit;
493 kvm_io_bus_register_dev(&kvm->pio_bus, &pit->dev);
495 pit->speaker_dev.read = speaker_ioport_read;
496 pit->speaker_dev.write = speaker_ioport_write;
497 pit->speaker_dev.in_range = speaker_in_range;
498 pit->speaker_dev.private = pit;
499 kvm_io_bus_register_dev(&kvm->pio_bus, &pit->speaker_dev);
501 kvm->arch.vpit = pit;
504 pit_state = &pit->pit_state;
505 pit_state->pit = pit;
506 hrtimer_init(&pit_state->pit_timer.timer,
507 CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
508 atomic_set(&pit_state->pit_timer.pending, 0);
509 for (i = 0; i < 3; i++) {
510 c = &pit_state->channels[i];
513 pit_load_count(kvm, i, 0);
516 mutex_unlock(&pit->pit_state.lock);
518 pit->pit_state.inject_pending = 1;
523 void kvm_free_pit(struct kvm *kvm)
525 struct hrtimer *timer;
527 if (kvm->arch.vpit) {
528 mutex_lock(&kvm->arch.vpit->pit_state.lock);
529 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
530 hrtimer_cancel(timer);
531 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
532 kfree(kvm->arch.vpit);
536 void __inject_pit_timer_intr(struct kvm *kvm)
538 mutex_lock(&kvm->lock);
539 kvm_ioapic_set_irq(kvm->arch.vioapic, 0, 1);
540 kvm_ioapic_set_irq(kvm->arch.vioapic, 0, 0);
541 kvm_pic_set_irq(pic_irqchip(kvm), 0, 1);
542 kvm_pic_set_irq(pic_irqchip(kvm), 0, 0);
543 mutex_unlock(&kvm->lock);
546 void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
548 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
549 struct kvm *kvm = vcpu->kvm;
550 struct kvm_kpit_state *ps;
553 ps = &pit->pit_state;
555 /* Try to inject pending interrupts when:
557 * 2. Last interrupt was accepted or waited for too long time*/
558 if (atomic_read(&ps->pit_timer.pending) &&
559 (ps->inject_pending ||
560 (jiffies - ps->last_injected_time
561 >= KVM_MAX_PIT_INTR_INTERVAL))) {
562 ps->inject_pending = 0;
563 __inject_pit_timer_intr(kvm);
564 ps->last_injected_time = jiffies;
569 void kvm_pit_timer_intr_post(struct kvm_vcpu *vcpu, int vec)
571 struct kvm_arch *arch = &vcpu->kvm->arch;
572 struct kvm_kpit_state *ps;
574 if (vcpu && arch->vpit) {
575 ps = &arch->vpit->pit_state;
576 if (atomic_read(&ps->pit_timer.pending) &&
577 (((arch->vpic->pics[0].imr & 1) == 0 &&
578 arch->vpic->pics[0].irq_base == vec) ||
579 (arch->vioapic->redirtbl[0].fields.vector == vec &&
580 arch->vioapic->redirtbl[0].fields.mask != 1))) {
581 ps->inject_pending = 1;
582 atomic_dec(&ps->pit_timer.pending);
583 ps->channels[0].count_load_time = ktime_get();