Merge branches 'x86/acpi', 'x86/asm', 'x86/cpudetect', 'x86/crashdump', 'x86/debug...
[safe/jmp/linux-2.6] / arch / x86 / kernel / numaq_32.c
1 /*
2  * Written by: Patricia Gaughen, IBM Corporation
3  *
4  * Copyright (C) 2002, IBM Corp.
5  *
6  * All rights reserved.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16  * NON INFRINGEMENT.  See the GNU General Public License for more
17  * details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  *
23  * Send feedback to <gone@us.ibm.com>
24  */
25
26 #include <linux/nodemask.h>
27 #include <linux/bootmem.h>
28 #include <linux/mmzone.h>
29 #include <linux/module.h>
30 #include <linux/mm.h>
31
32 #include <asm/processor.h>
33 #include <asm/topology.h>
34 #include <asm/genapic.h>
35 #include <asm/numaq.h>
36 #include <asm/setup.h>
37 #include <asm/e820.h>
38
39 #define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT))
40
41 /*
42  * Function: smp_dump_qct()
43  *
44  * Description: gets memory layout from the quad config table.  This
45  * function also updates node_online_map with the nodes (quads) present.
46  */
47 static void __init smp_dump_qct(void)
48 {
49         int node;
50         struct eachquadmem *eq;
51         struct sys_cfg_data *scd =
52                 (struct sys_cfg_data *)__va(SYS_CFG_DATA_PRIV_ADDR);
53
54         nodes_clear(node_online_map);
55         for_each_node(node) {
56                 if (scd->quads_present31_0 & (1 << node)) {
57                         node_set_online(node);
58                         eq = &scd->eq[node];
59                         /* Convert to pages */
60                         node_start_pfn[node] = MB_TO_PAGES(
61                                 eq->hi_shrd_mem_start - eq->priv_mem_size);
62                         node_end_pfn[node] = MB_TO_PAGES(
63                                 eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
64
65                         e820_register_active_regions(node, node_start_pfn[node],
66                                                         node_end_pfn[node]);
67                         memory_present(node,
68                                 node_start_pfn[node], node_end_pfn[node]);
69                         node_remap_size[node] = node_memmap_size_bytes(node,
70                                                         node_start_pfn[node],
71                                                         node_end_pfn[node]);
72                 }
73         }
74 }
75
76
77 void __cpuinit numaq_tsc_disable(void)
78 {
79         if (!found_numaq)
80                 return;
81
82         if (num_online_nodes() > 1) {
83                 printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
84                 setup_clear_cpu_cap(X86_FEATURE_TSC);
85         }
86 }
87
88 static int __init numaq_pre_time_init(void)
89 {
90         numaq_tsc_disable();
91         return 0;
92 }
93
94 int found_numaq;
95
96 /*
97  * Have to match translation table entries to main table entries by counter
98  * hence the mpc_record variable .... can't see a less disgusting way of
99  * doing this ....
100  */
101 struct mpc_config_translation {
102         unsigned char           mpc_type;
103         unsigned char           trans_len;
104         unsigned char           trans_type;
105         unsigned char           trans_quad;
106         unsigned char           trans_global;
107         unsigned char           trans_local;
108         unsigned short          trans_reserved;
109 };
110
111 /* x86_quirks member */
112 static int mpc_record;
113 static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY]
114     __cpuinitdata;
115
116 static inline int generate_logical_apicid(int quad, int phys_apicid)
117 {
118         return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
119 }
120
121 /* x86_quirks member */
122 static int mpc_apic_id(struct mpc_cpu *m)
123 {
124         int quad = translation_table[mpc_record]->trans_quad;
125         int logical_apicid = generate_logical_apicid(quad, m->apicid);
126
127         printk(KERN_DEBUG "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
128                m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
129                (m->cpufeature & CPU_MODEL_MASK) >> 4,
130                m->apicver, quad, logical_apicid);
131         return logical_apicid;
132 }
133
134 int mp_bus_id_to_node[MAX_MP_BUSSES];
135
136 int mp_bus_id_to_local[MAX_MP_BUSSES];
137
138 /* x86_quirks member */
139 static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
140 {
141         int quad = translation_table[mpc_record]->trans_quad;
142         int local = translation_table[mpc_record]->trans_local;
143
144         mp_bus_id_to_node[m->busid] = quad;
145         mp_bus_id_to_local[m->busid] = local;
146         printk(KERN_INFO "Bus #%d is %s (node %d)\n",
147                m->busid, name, quad);
148 }
149
150 int quad_local_to_mp_bus_id [NR_CPUS/4][4];
151
152 /* x86_quirks member */
153 static void mpc_oem_pci_bus(struct mpc_bus *m)
154 {
155         int quad = translation_table[mpc_record]->trans_quad;
156         int local = translation_table[mpc_record]->trans_local;
157
158         quad_local_to_mp_bus_id[quad][local] = m->busid;
159 }
160
161 static void __init MP_translation_info(struct mpc_config_translation *m)
162 {
163         printk(KERN_INFO
164                "Translation: record %d, type %d, quad %d, global %d, local %d\n",
165                mpc_record, m->trans_type, m->trans_quad, m->trans_global,
166                m->trans_local);
167
168         if (mpc_record >= MAX_MPC_ENTRY)
169                 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
170         else
171                 translation_table[mpc_record] = m;      /* stash this for later */
172         if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
173                 node_set_online(m->trans_quad);
174 }
175
176 static int __init mpf_checksum(unsigned char *mp, int len)
177 {
178         int sum = 0;
179
180         while (len--)
181                 sum += *mp++;
182
183         return sum & 0xFF;
184 }
185
186 /*
187  * Read/parse the MPC oem tables
188  */
189
190 static void __init smp_read_mpc_oem(struct mpc_oemtable *oemtable,
191                                     unsigned short oemsize)
192 {
193         int count = sizeof(*oemtable);  /* the header size */
194         unsigned char *oemptr = ((unsigned char *)oemtable) + count;
195
196         mpc_record = 0;
197         printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n",
198                oemtable);
199         if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
200                 printk(KERN_WARNING
201                        "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
202                        oemtable->signature[0], oemtable->signature[1],
203                        oemtable->signature[2], oemtable->signature[3]);
204                 return;
205         }
206         if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
207                 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
208                 return;
209         }
210         while (count < oemtable->length) {
211                 switch (*oemptr) {
212                 case MP_TRANSLATION:
213                         {
214                                 struct mpc_config_translation *m =
215                                     (struct mpc_config_translation *)oemptr;
216                                 MP_translation_info(m);
217                                 oemptr += sizeof(*m);
218                                 count += sizeof(*m);
219                                 ++mpc_record;
220                                 break;
221                         }
222                 default:
223                         {
224                                 printk(KERN_WARNING
225                                        "Unrecognised OEM table entry type! - %d\n",
226                                        (int)*oemptr);
227                                 return;
228                         }
229                 }
230         }
231 }
232
233 static int __init numaq_setup_ioapic_ids(void)
234 {
235         /* so can skip it */
236         return 1;
237 }
238
239 static int __init numaq_update_genapic(void)
240 {
241         apic->wakeup_cpu = wakeup_secondary_cpu_via_nmi;
242
243         return 0;
244 }
245
246 static struct x86_quirks numaq_x86_quirks __initdata = {
247         .arch_pre_time_init     = numaq_pre_time_init,
248         .arch_time_init         = NULL,
249         .arch_pre_intr_init     = NULL,
250         .arch_memory_setup      = NULL,
251         .arch_intr_init         = NULL,
252         .arch_trap_init         = NULL,
253         .mach_get_smp_config    = NULL,
254         .mach_find_smp_config   = NULL,
255         .mpc_record             = &mpc_record,
256         .mpc_apic_id            = mpc_apic_id,
257         .mpc_oem_bus_info       = mpc_oem_bus_info,
258         .mpc_oem_pci_bus        = mpc_oem_pci_bus,
259         .smp_read_mpc_oem       = smp_read_mpc_oem,
260         .setup_ioapic_ids       = numaq_setup_ioapic_ids,
261         .update_genapic         = numaq_update_genapic,
262 };
263
264 void numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
265 {
266         if (strncmp(oem, "IBM NUMA", 8))
267                 printk("Warning!  Not a NUMA-Q system!\n");
268         else
269                 found_numaq = 1;
270 }
271
272 static __init void early_check_numaq(void)
273 {
274         /*
275          * Find possible boot-time SMP configuration:
276          */
277         early_find_smp_config();
278         /*
279          * get boot-time SMP configuration:
280          */
281         if (smp_found_config)
282                 early_get_smp_config();
283
284         if (found_numaq)
285                 x86_quirks = &numaq_x86_quirks;
286 }
287
288 int __init get_memcfg_numaq(void)
289 {
290         early_check_numaq();
291         if (!found_numaq)
292                 return 0;
293         smp_dump_qct();
294         return 1;
295 }
296
297 /*
298  * APIC driver for the IBM NUMAQ chipset.
299  */
300 #define APIC_DEFINITION 1
301 #include <linux/threads.h>
302 #include <linux/cpumask.h>
303 #include <asm/mpspec.h>
304 #include <asm/genapic.h>
305 #include <asm/fixmap.h>
306 #include <asm/apicdef.h>
307 #include <asm/ipi.h>
308 #include <linux/kernel.h>
309 #include <linux/string.h>
310 #include <linux/init.h>
311 #include <linux/numa.h>
312 #include <linux/smp.h>
313 #include <asm/numaq.h>
314 #include <asm/io.h>
315 #include <linux/mmzone.h>
316 #include <linux/nodemask.h>
317
318 #define NUMAQ_APIC_DFR_VALUE    (APIC_DFR_CLUSTER)
319
320 static inline unsigned int numaq_get_apic_id(unsigned long x)
321 {
322         return (x >> 24) & 0x0F;
323 }
324
325 static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector)
326 {
327         default_send_IPI_mask_sequence_logical(mask, vector);
328 }
329
330 static inline void numaq_send_IPI_allbutself(int vector)
331 {
332         default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector);
333 }
334
335 static inline void numaq_send_IPI_all(int vector)
336 {
337         numaq_send_IPI_mask(cpu_online_mask, vector);
338 }
339
340 extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
341
342 #define NUMAQ_TRAMPOLINE_PHYS_LOW (0x8)
343 #define NUMAQ_TRAMPOLINE_PHYS_HIGH (0xa)
344
345 /*
346  * Because we use NMIs rather than the INIT-STARTUP sequence to
347  * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
348  */
349 static inline void numaq_smp_callin_clear_local_apic(void)
350 {
351         clear_local_APIC();
352 }
353
354 static inline void
355 numaq_store_NMI_vector(unsigned short *high, unsigned short *low)
356 {
357         printk("Storing NMI vector\n");
358         *high =
359           *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_HIGH));
360         *low =
361           *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_LOW));
362 }
363
364 static inline const cpumask_t *numaq_target_cpus(void)
365 {
366         return &CPU_MASK_ALL;
367 }
368
369 static inline unsigned long
370 numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
371 {
372         return physid_isset(apicid, bitmap);
373 }
374
375 static inline unsigned long numaq_check_apicid_present(int bit)
376 {
377         return physid_isset(bit, phys_cpu_present_map);
378 }
379
380 #define apicid_cluster(apicid) (apicid & 0xF0)
381
382 static inline int numaq_apic_id_registered(void)
383 {
384         return 1;
385 }
386
387 static inline void numaq_init_apic_ldr(void)
388 {
389         /* Already done in NUMA-Q firmware */
390 }
391
392 static inline void numaq_setup_apic_routing(void)
393 {
394         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
395                 "NUMA-Q", nr_ioapics);
396 }
397
398 /*
399  * Skip adding the timer int on secondary nodes, which causes
400  * a small but painful rift in the time-space continuum.
401  */
402 static inline int numaq_multi_timer_check(int apic, int irq)
403 {
404         return apic != 0 && irq == 0;
405 }
406
407 static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map)
408 {
409         /* We don't have a good way to do this yet - hack */
410         return physids_promote(0xFUL);
411 }
412
413 /* Mapping from cpu number to logical apicid */
414 extern u8 cpu_2_logical_apicid[];
415
416 static inline int numaq_cpu_to_logical_apicid(int cpu)
417 {
418         if (cpu >= nr_cpu_ids)
419                 return BAD_APICID;
420         return (int)cpu_2_logical_apicid[cpu];
421 }
422
423 /*
424  * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
425  * cpu to APIC ID relation to properly interact with the intelligent
426  * mode of the cluster controller.
427  */
428 static inline int numaq_cpu_present_to_apicid(int mps_cpu)
429 {
430         if (mps_cpu < 60)
431                 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
432         else
433                 return BAD_APICID;
434 }
435
436 static inline int numaq_apicid_to_node(int logical_apicid) 
437 {
438         return logical_apicid >> 4;
439 }
440
441 static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
442 {
443         int node = numaq_apicid_to_node(logical_apicid);
444         int cpu = __ffs(logical_apicid & 0xf);
445
446         return physid_mask_of_physid(cpu + 4*node);
447 }
448
449 /* Where the IO area was mapped on multiquad, always 0 otherwise */
450 void *xquad_portio;
451
452 static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
453 {
454         return 1;
455 }
456
457 /*
458  * We use physical apicids here, not logical, so just return the default
459  * physical broadcast to stop people from breaking us
460  */
461 static inline unsigned int numaq_cpu_mask_to_apicid(const cpumask_t *cpumask)
462 {
463         return 0x0F;
464 }
465
466 static inline unsigned int
467 numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
468                              const struct cpumask *andmask)
469 {
470         return 0x0F;
471 }
472
473 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
474 static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb)
475 {
476         return cpuid_apic >> index_msb;
477 }
478 static int __numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
479 {
480         numaq_mps_oem_check(mpc, oem, productid);
481         return found_numaq;
482 }
483
484 static int probe_numaq(void)
485 {
486         /* already know from get_memcfg_numaq() */
487         return found_numaq;
488 }
489
490 static void numaq_vector_allocation_domain(int cpu, cpumask_t *retmask)
491 {
492         /* Careful. Some cpus do not strictly honor the set of cpus
493          * specified in the interrupt destination when using lowest
494          * priority interrupt delivery mode.
495          *
496          * In particular there was a hyperthreading cpu observed to
497          * deliver interrupts to the wrong hyperthread when only one
498          * hyperthread was specified in the interrupt desitination.
499          */
500         *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
501 }
502
503 static void numaq_setup_portio_remap(void)
504 {
505         int num_quads = num_online_nodes();
506
507         if (num_quads <= 1)
508                 return;
509
510         printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
511         xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
512         printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
513                 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
514 }
515
516 struct genapic apic_numaq = {
517
518         .name                           = "NUMAQ",
519         .probe                          = probe_numaq,
520         .acpi_madt_oem_check            = NULL,
521         .apic_id_registered             = numaq_apic_id_registered,
522
523         .irq_delivery_mode              = dest_LowestPrio,
524         /* physical delivery on LOCAL quad: */
525         .irq_dest_mode                  = 0,
526
527         .target_cpus                    = numaq_target_cpus,
528         .disable_esr                    = 1,
529         .dest_logical                   = APIC_DEST_LOGICAL,
530         .check_apicid_used              = numaq_check_apicid_used,
531         .check_apicid_present           = numaq_check_apicid_present,
532
533         .vector_allocation_domain       = numaq_vector_allocation_domain,
534         .init_apic_ldr                  = numaq_init_apic_ldr,
535
536         .ioapic_phys_id_map             = numaq_ioapic_phys_id_map,
537         .setup_apic_routing             = numaq_setup_apic_routing,
538         .multi_timer_check              = numaq_multi_timer_check,
539         .apicid_to_node                 = numaq_apicid_to_node,
540         .cpu_to_logical_apicid          = numaq_cpu_to_logical_apicid,
541         .cpu_present_to_apicid          = numaq_cpu_present_to_apicid,
542         .apicid_to_cpu_present          = numaq_apicid_to_cpu_present,
543         .setup_portio_remap             = numaq_setup_portio_remap,
544         .check_phys_apicid_present      = numaq_check_phys_apicid_present,
545         .enable_apic_mode               = NULL,
546         .phys_pkg_id                    = numaq_phys_pkg_id,
547         .mps_oem_check                  = __numaq_mps_oem_check,
548
549         .get_apic_id                    = numaq_get_apic_id,
550         .set_apic_id                    = NULL,
551         .apic_id_mask                   = 0x0F << 24,
552
553         .cpu_mask_to_apicid             = numaq_cpu_mask_to_apicid,
554         .cpu_mask_to_apicid_and         = numaq_cpu_mask_to_apicid_and,
555
556         .send_IPI_mask                  = numaq_send_IPI_mask,
557         .send_IPI_mask_allbutself       = NULL,
558         .send_IPI_allbutself            = numaq_send_IPI_allbutself,
559         .send_IPI_all                   = numaq_send_IPI_all,
560         .send_IPI_self                  = default_send_IPI_self,
561
562         .wakeup_cpu                     = NULL,
563         .trampoline_phys_low            = NUMAQ_TRAMPOLINE_PHYS_LOW,
564         .trampoline_phys_high           = NUMAQ_TRAMPOLINE_PHYS_HIGH,
565
566         /* We don't do anything here because we use NMI's to boot instead */
567         .wait_for_init_deassert         = NULL,
568
569         .smp_callin_clear_local_apic    = numaq_smp_callin_clear_local_apic,
570         .store_NMI_vector               = numaq_store_NMI_vector,
571         .inquire_remote_apic            = NULL,
572 };