SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/x86/kernel/hpet.c

   1 #include <linux/clocksource.h>
   2 #include <linux/clockchips.h>
   3 #include <linux/interrupt.h>
   4 #include <linux/sysdev.h>
   5 #include <linux/delay.h>
   6 #include <linux/errno.h>
   7 #include <linux/hpet.h>
   8 #include <linux/init.h>
   9 #include <linux/cpu.h>
  10 #include <linux/pm.h>
  11 #include <linux/io.h>
  12
  13 #include <asm/fixmap.h>
  14 #include <asm/i8253.h>
  15 #include <asm/hpet.h>
  16
  17 #define HPET_MASK                       CLOCKSOURCE_MASK(32)
  18 #define HPET_SHIFT                      22
  19
  20 /* FSEC = 10^-15
  21    NSEC = 10^-9 */
  22 #define FSEC_PER_NSEC                   1000000L
  23
  24 #define HPET_DEV_USED_BIT               2
  25 #define HPET_DEV_USED                   (1 << HPET_DEV_USED_BIT)
  26 #define HPET_DEV_VALID                  0x8
  27 #define HPET_DEV_FSB_CAP                0x1000
  28 #define HPET_DEV_PERI_CAP               0x2000
  29
  30 #define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
  31
  32 /*
  33  * HPET address is set in acpi/boot.c, when an ACPI entry exists
  34  */
  35 unsigned long                           hpet_address;
  36 u8                                      hpet_blockid; /* OS timer block num */
  37 #ifdef CONFIG_PCI_MSI
  38 static unsigned long                    hpet_num_timers;
  39 #endif
  40 static void __iomem                     *hpet_virt_address;
  41
  42 struct hpet_dev {
  43         struct clock_event_device       evt;
  44         unsigned int                    num;
  45         int                             cpu;
  46         unsigned int                    irq;
  47         unsigned int                    flags;
  48         char                            name[10];
  49 };
  50
  51 inline unsigned int hpet_readl(unsigned int a)
  52 {
  53         return readl(hpet_virt_address + a);
  54 }
  55
  56 static inline void hpet_writel(unsigned int d, unsigned int a)
  57 {
  58         writel(d, hpet_virt_address + a);
  59 }
  60
  61 #ifdef CONFIG_X86_64
  62 #include <asm/pgtable.h>
  63 #endif
  64
  65 static inline void hpet_set_mapping(void)
  66 {
  67         hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
  68 #ifdef CONFIG_X86_64
  69         __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
  70 #endif
  71 }
  72
  73 static inline void hpet_clear_mapping(void)
  74 {
  75         iounmap(hpet_virt_address);
  76         hpet_virt_address = NULL;
  77 }
  78
  79 /*
  80  * HPET command line enable / disable
  81  */
  82 static int boot_hpet_disable;
  83 int hpet_force_user;
  84 static int hpet_verbose;
  85
  86 static int __init hpet_setup(char *str)
  87 {
  88         if (str) {
  89                 if (!strncmp("disable", str, 7))
  90                         boot_hpet_disable = 1;
  91                 if (!strncmp("force", str, 5))
  92                         hpet_force_user = 1;
  93                 if (!strncmp("verbose", str, 7))
  94                         hpet_verbose = 1;
  95         }
  96         return 1;
  97 }
  98 __setup("hpet=", hpet_setup);
  99
 100 static int __init disable_hpet(char *str)
 101 {
 102         boot_hpet_disable = 1;
 103         return 1;
 104 }
 105 __setup("nohpet", disable_hpet);
 106
 107 static inline int is_hpet_capable(void)
 108 {
 109         return !boot_hpet_disable && hpet_address;
 110 }
 111
 112 /*
 113  * HPET timer interrupt enable / disable
 114  */
 115 static int hpet_legacy_int_enabled;
 116
 117 /**
 118  * is_hpet_enabled - check whether the hpet timer interrupt is enabled
 119  */
 120 int is_hpet_enabled(void)
 121 {
 122         return is_hpet_capable() && hpet_legacy_int_enabled;
 123 }
 124 EXPORT_SYMBOL_GPL(is_hpet_enabled);
 125
 126 static void _hpet_print_config(const char *function, int line)
 127 {
 128         u32 i, timers, l, h;
 129         printk(KERN_INFO "hpet: %s(%d):\n", function, line);
 130         l = hpet_readl(HPET_ID);
 131         h = hpet_readl(HPET_PERIOD);
 132         timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
 133         printk(KERN_INFO "hpet: ID: 0x%x, PERIOD: 0x%x\n", l, h);
 134         l = hpet_readl(HPET_CFG);
 135         h = hpet_readl(HPET_STATUS);
 136         printk(KERN_INFO "hpet: CFG: 0x%x, STATUS: 0x%x\n", l, h);
 137         l = hpet_readl(HPET_COUNTER);
 138         h = hpet_readl(HPET_COUNTER+4);
 139         printk(KERN_INFO "hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l, h);
 140
 141         for (i = 0; i < timers; i++) {
 142                 l = hpet_readl(HPET_Tn_CFG(i));
 143                 h = hpet_readl(HPET_Tn_CFG(i)+4);
 144                 printk(KERN_INFO "hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
 145                        i, l, h);
 146                 l = hpet_readl(HPET_Tn_CMP(i));
 147                 h = hpet_readl(HPET_Tn_CMP(i)+4);
 148                 printk(KERN_INFO "hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
 149                        i, l, h);
 150                 l = hpet_readl(HPET_Tn_ROUTE(i));
 151                 h = hpet_readl(HPET_Tn_ROUTE(i)+4);
 152                 printk(KERN_INFO "hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
 153                        i, l, h);
 154         }
 155 }
 156
 157 #define hpet_print_config()                                     \
 158 do {                                                            \
 159         if (hpet_verbose)                                       \
 160                 _hpet_print_config(__FUNCTION__, __LINE__);     \
 161 } while (0)
 162
 163 /*
 164  * When the hpet driver (/dev/hpet) is enabled, we need to reserve
 165  * timer 0 and timer 1 in case of RTC emulation.
 166  */
 167 #ifdef CONFIG_HPET
 168
 169 static void hpet_reserve_msi_timers(struct hpet_data *hd);
 170
 171 static void hpet_reserve_platform_timers(unsigned int id)
 172 {
 173         struct hpet __iomem *hpet = hpet_virt_address;
 174         struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
 175         unsigned int nrtimers, i;
 176         struct hpet_data hd;
 177
 178         nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
 179
 180         memset(&hd, 0, sizeof(hd));
 181         hd.hd_phys_address      = hpet_address;
 182         hd.hd_address           = hpet;
 183         hd.hd_nirqs             = nrtimers;
 184         hpet_reserve_timer(&hd, 0);
 185
 186 #ifdef CONFIG_HPET_EMULATE_RTC
 187         hpet_reserve_timer(&hd, 1);
 188 #endif
 189
 190         /*
 191          * NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
 192          * is wrong for i8259!) not the output IRQ.  Many BIOS writers
 193          * don't bother configuring *any* comparator interrupts.
 194          */
 195         hd.hd_irq[0] = HPET_LEGACY_8254;
 196         hd.hd_irq[1] = HPET_LEGACY_RTC;
 197
 198         for (i = 2; i < nrtimers; timer++, i++) {
 199                 hd.hd_irq[i] = (readl(&timer->hpet_config) &
 200                         Tn_INT_ROUTE_CNF_MASK) >> Tn_INT_ROUTE_CNF_SHIFT;
 201         }
 202
 203         hpet_reserve_msi_timers(&hd);
 204
 205         hpet_alloc(&hd);
 206
 207 }
 208 #else
 209 static void hpet_reserve_platform_timers(unsigned int id) { }
 210 #endif
 211
 212 /*
 213  * Common hpet info
 214  */
 215 static unsigned long hpet_period;
 216
 217 static void hpet_legacy_set_mode(enum clock_event_mode mode,
 218                           struct clock_event_device *evt);
 219 static int hpet_legacy_next_event(unsigned long delta,
 220                            struct clock_event_device *evt);
 221
 222 /*
 223  * The hpet clock event device
 224  */
 225 static struct clock_event_device hpet_clockevent = {
 226         .name           = "hpet",
 227         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 228         .set_mode       = hpet_legacy_set_mode,
 229         .set_next_event = hpet_legacy_next_event,
 230         .shift          = 32,
 231         .irq            = 0,
 232         .rating         = 50,
 233 };
 234
 235 static void hpet_stop_counter(void)
 236 {
 237         unsigned long cfg = hpet_readl(HPET_CFG);
 238         cfg &= ~HPET_CFG_ENABLE;
 239         hpet_writel(cfg, HPET_CFG);
 240 }
 241
 242 static void hpet_reset_counter(void)
 243 {
 244         hpet_writel(0, HPET_COUNTER);
 245         hpet_writel(0, HPET_COUNTER + 4);
 246 }
 247
 248 static void hpet_start_counter(void)
 249 {
 250         unsigned int cfg = hpet_readl(HPET_CFG);
 251         cfg |= HPET_CFG_ENABLE;
 252         hpet_writel(cfg, HPET_CFG);
 253 }
 254
 255 static void hpet_restart_counter(void)
 256 {
 257         hpet_stop_counter();
 258         hpet_reset_counter();
 259         hpet_start_counter();
 260 }
 261
 262 static void hpet_resume_device(void)
 263 {
 264         force_hpet_resume();
 265 }
 266
 267 static void hpet_resume_counter(void)
 268 {
 269         hpet_resume_device();
 270         hpet_restart_counter();
 271 }
 272
 273 static void hpet_enable_legacy_int(void)
 274 {
 275         unsigned int cfg = hpet_readl(HPET_CFG);
 276
 277         cfg |= HPET_CFG_LEGACY;
 278         hpet_writel(cfg, HPET_CFG);
 279         hpet_legacy_int_enabled = 1;
 280 }
 281
 282 static void hpet_legacy_clockevent_register(void)
 283 {
 284         /* Start HPET legacy interrupts */
 285         hpet_enable_legacy_int();
 286
 287         /*
 288          * The mult factor is defined as (include/linux/clockchips.h)
 289          *  mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
 290          * hpet_period is in units of femtoseconds (per cycle), so
 291          *  mult/2^shift = cyc/ns = 10^6/hpet_period
 292          *  mult = (10^6 * 2^shift)/hpet_period
 293          *  mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
 294          */
 295         hpet_clockevent.mult = div_sc((unsigned long) FSEC_PER_NSEC,
 296                                       hpet_period, hpet_clockevent.shift);
 297         /* Calculate the min / max delta */
 298         hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
 299                                                            &hpet_clockevent);
 300         /* 5 usec minimum reprogramming delta. */
 301         hpet_clockevent.min_delta_ns = 5000;
 302
 303         /*
 304          * Start hpet with the boot cpu mask and make it
 305          * global after the IO_APIC has been initialized.
 306          */
 307         hpet_clockevent.cpumask = cpumask_of(smp_processor_id());
 308         clockevents_register_device(&hpet_clockevent);
 309         global_clock_event = &hpet_clockevent;
 310         printk(KERN_DEBUG "hpet clockevent registered\n");
 311 }
 312
 313 static int hpet_setup_msi_irq(unsigned int irq);
 314
 315 static void hpet_set_mode(enum clock_event_mode mode,
 316                           struct clock_event_device *evt, int timer)
 317 {
 318         unsigned int cfg, cmp, now;
 319         uint64_t delta;
 320
 321         switch (mode) {
 322         case CLOCK_EVT_MODE_PERIODIC:
 323                 hpet_stop_counter();
 324                 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
 325                 delta >>= evt->shift;
 326                 now = hpet_readl(HPET_COUNTER);
 327                 cmp = now + (unsigned int) delta;
 328                 cfg = hpet_readl(HPET_Tn_CFG(timer));
 329                 /* Make sure we use edge triggered interrupts */
 330                 cfg &= ~HPET_TN_LEVEL;
 331                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
 332                        HPET_TN_SETVAL | HPET_TN_32BIT;
 333                 hpet_writel(cfg, HPET_Tn_CFG(timer));
 334                 hpet_writel(cmp, HPET_Tn_CMP(timer));
 335                 udelay(1);
 336                 /*
 337                  * HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL
 338                  * cleared) to T0_CMP to set the period. The HPET_TN_SETVAL
 339                  * bit is automatically cleared after the first write.
 340                  * (See AMD-8111 HyperTransport I/O Hub Data Sheet,
 341                  * Publication # 24674)
 342                  */
 343                 hpet_writel((unsigned int) delta, HPET_Tn_CMP(timer));
 344                 hpet_start_counter();
 345                 hpet_print_config();
 346                 break;
 347
 348         case CLOCK_EVT_MODE_ONESHOT:
 349                 cfg = hpet_readl(HPET_Tn_CFG(timer));
 350                 cfg &= ~HPET_TN_PERIODIC;
 351                 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
 352                 hpet_writel(cfg, HPET_Tn_CFG(timer));
 353                 break;
 354
 355         case CLOCK_EVT_MODE_UNUSED:
 356         case CLOCK_EVT_MODE_SHUTDOWN:
 357                 cfg = hpet_readl(HPET_Tn_CFG(timer));
 358                 cfg &= ~HPET_TN_ENABLE;
 359                 hpet_writel(cfg, HPET_Tn_CFG(timer));
 360                 break;
 361
 362         case CLOCK_EVT_MODE_RESUME:
 363                 if (timer == 0) {
 364                         hpet_enable_legacy_int();
 365                 } else {
 366                         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
 367                         hpet_setup_msi_irq(hdev->irq);
 368                         disable_irq(hdev->irq);
 369                         irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
 370                         enable_irq(hdev->irq);
 371                 }
 372                 hpet_print_config();
 373                 break;
 374         }
 375 }
 376
 377 static int hpet_next_event(unsigned long delta,
 378                            struct clock_event_device *evt, int timer)
 379 {
 380         u32 cnt;
 381
 382         cnt = hpet_readl(HPET_COUNTER);
 383         cnt += (u32) delta;
 384         hpet_writel(cnt, HPET_Tn_CMP(timer));
 385
 386         /*
 387          * We need to read back the CMP register to make sure that
 388          * what we wrote hit the chip before we compare it to the
 389          * counter.
 390          */
 391         WARN_ON_ONCE(hpet_readl(HPET_Tn_CMP(timer)) != cnt);
 392
 393         return (s32)(hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
 394 }
 395
 396 static void hpet_legacy_set_mode(enum clock_event_mode mode,
 397                         struct clock_event_device *evt)
 398 {
 399         hpet_set_mode(mode, evt, 0);
 400 }
 401
 402 static int hpet_legacy_next_event(unsigned long delta,
 403                         struct clock_event_device *evt)
 404 {
 405         return hpet_next_event(delta, evt, 0);
 406 }
 407
 408 /*
 409  * HPET MSI Support
 410  */
 411 #ifdef CONFIG_PCI_MSI
 412
 413 static DEFINE_PER_CPU(struct hpet_dev *, cpu_hpet_dev);
 414 static struct hpet_dev  *hpet_devs;
 415
 416 void hpet_msi_unmask(unsigned int irq)
 417 {
 418         struct hpet_dev *hdev = get_irq_data(irq);
 419         unsigned int cfg;
 420
 421         /* unmask it */
 422         cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
 423         cfg |= HPET_TN_FSB;
 424         hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
 425 }
 426
 427 void hpet_msi_mask(unsigned int irq)
 428 {
 429         unsigned int cfg;
 430         struct hpet_dev *hdev = get_irq_data(irq);
 431
 432         /* mask it */
 433         cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
 434         cfg &= ~HPET_TN_FSB;
 435         hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
 436 }
 437
 438 void hpet_msi_write(unsigned int irq, struct msi_msg *msg)
 439 {
 440         struct hpet_dev *hdev = get_irq_data(irq);
 441
 442         hpet_writel(msg->data, HPET_Tn_ROUTE(hdev->num));
 443         hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hdev->num) + 4);
 444 }
 445
 446 void hpet_msi_read(unsigned int irq, struct msi_msg *msg)
 447 {
 448         struct hpet_dev *hdev = get_irq_data(irq);
 449
 450         msg->data = hpet_readl(HPET_Tn_ROUTE(hdev->num));
 451         msg->address_lo = hpet_readl(HPET_Tn_ROUTE(hdev->num) + 4);
 452         msg->address_hi = 0;
 453 }
 454
 455 static void hpet_msi_set_mode(enum clock_event_mode mode,
 456                                 struct clock_event_device *evt)
 457 {
 458         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
 459         hpet_set_mode(mode, evt, hdev->num);
 460 }
 461
 462 static int hpet_msi_next_event(unsigned long delta,
 463                                 struct clock_event_device *evt)
 464 {
 465         struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
 466         return hpet_next_event(delta, evt, hdev->num);
 467 }
 468
 469 static int hpet_setup_msi_irq(unsigned int irq)
 470 {
 471         if (arch_setup_hpet_msi(irq, hpet_blockid)) {
 472                 destroy_irq(irq);
 473                 return -EINVAL;
 474         }
 475         return 0;
 476 }
 477
 478 static int hpet_assign_irq(struct hpet_dev *dev)
 479 {
 480         unsigned int irq;
 481
 482         irq = create_irq();
 483         if (!irq)
 484                 return -EINVAL;
 485
 486         set_irq_data(irq, dev);
 487
 488         if (hpet_setup_msi_irq(irq))
 489                 return -EINVAL;
 490
 491         dev->irq = irq;
 492         return 0;
 493 }
 494
 495 static irqreturn_t hpet_interrupt_handler(int irq, void *data)
 496 {
 497         struct hpet_dev *dev = (struct hpet_dev *)data;
 498         struct clock_event_device *hevt = &dev->evt;
 499
 500         if (!hevt->event_handler) {
 501                 printk(KERN_INFO "Spurious HPET timer interrupt on HPET timer %d\n",
 502                                 dev->num);
 503                 return IRQ_HANDLED;
 504         }
 505
 506         hevt->event_handler(hevt);
 507         return IRQ_HANDLED;
 508 }
 509
 510 static int hpet_setup_irq(struct hpet_dev *dev)
 511 {
 512
 513         if (request_irq(dev->irq, hpet_interrupt_handler,
 514                         IRQF_TIMER | IRQF_DISABLED | IRQF_NOBALANCING,
 515                         dev->name, dev))
 516                 return -1;
 517
 518         disable_irq(dev->irq);
 519         irq_set_affinity(dev->irq, cpumask_of(dev->cpu));
 520         enable_irq(dev->irq);
 521
 522         printk(KERN_DEBUG "hpet: %s irq %d for MSI\n",
 523                          dev->name, dev->irq);
 524
 525         return 0;
 526 }
 527
 528 /* This should be called in specific @cpu */
 529 static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
 530 {
 531         struct clock_event_device *evt = &hdev->evt;
 532         uint64_t hpet_freq;
 533
 534         WARN_ON(cpu != smp_processor_id());
 535         if (!(hdev->flags & HPET_DEV_VALID))
 536                 return;
 537
 538         if (hpet_setup_msi_irq(hdev->irq))
 539                 return;
 540
 541         hdev->cpu = cpu;
 542         per_cpu(cpu_hpet_dev, cpu) = hdev;
 543         evt->name = hdev->name;
 544         hpet_setup_irq(hdev);
 545         evt->irq = hdev->irq;
 546
 547         evt->rating = 110;
 548         evt->features = CLOCK_EVT_FEAT_ONESHOT;
 549         if (hdev->flags & HPET_DEV_PERI_CAP)
 550                 evt->features |= CLOCK_EVT_FEAT_PERIODIC;
 551
 552         evt->set_mode = hpet_msi_set_mode;
 553         evt->set_next_event = hpet_msi_next_event;
 554         evt->shift = 32;
 555
 556         /*
 557          * The period is a femto seconds value. We need to calculate the
 558          * scaled math multiplication factor for nanosecond to hpet tick
 559          * conversion.
 560          */
 561         hpet_freq = 1000000000000000ULL;
 562         do_div(hpet_freq, hpet_period);
 563         evt->mult = div_sc((unsigned long) hpet_freq,
 564                                       NSEC_PER_SEC, evt->shift);
 565         /* Calculate the max delta */
 566         evt->max_delta_ns = clockevent_delta2ns(0x7FFFFFFF, evt);
 567         /* 5 usec minimum reprogramming delta. */
 568         evt->min_delta_ns = 5000;
 569
 570         evt->cpumask = cpumask_of(hdev->cpu);
 571         clockevents_register_device(evt);
 572 }
 573
 574 #ifdef CONFIG_HPET
 575 /* Reserve at least one timer for userspace (/dev/hpet) */
 576 #define RESERVE_TIMERS 1
 577 #else
 578 #define RESERVE_TIMERS 0
 579 #endif
 580
 581 static void hpet_msi_capability_lookup(unsigned int start_timer)
 582 {
 583         unsigned int id;
 584         unsigned int num_timers;
 585         unsigned int num_timers_used = 0;
 586         int i;
 587
 588         if (boot_cpu_has(X86_FEATURE_ARAT))
 589                 return;
 590         id = hpet_readl(HPET_ID);
 591
 592         num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
 593         num_timers++; /* Value read out starts from 0 */
 594         hpet_print_config();
 595
 596         hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);
 597         if (!hpet_devs)
 598                 return;
 599
 600         hpet_num_timers = num_timers;
 601
 602         for (i = start_timer; i < num_timers - RESERVE_TIMERS; i++) {
 603                 struct hpet_dev *hdev = &hpet_devs[num_timers_used];
 604                 unsigned int cfg = hpet_readl(HPET_Tn_CFG(i));
 605
 606                 /* Only consider HPET timer with MSI support */
 607                 if (!(cfg & HPET_TN_FSB_CAP))
 608                         continue;
 609
 610                 hdev->flags = 0;
 611                 if (cfg & HPET_TN_PERIODIC_CAP)
 612                         hdev->flags |= HPET_DEV_PERI_CAP;
 613                 hdev->num = i;
 614
 615                 sprintf(hdev->name, "hpet%d", i);
 616                 if (hpet_assign_irq(hdev))
 617                         continue;
 618
 619                 hdev->flags |= HPET_DEV_FSB_CAP;
 620                 hdev->flags |= HPET_DEV_VALID;
 621                 num_timers_used++;
 622                 if (num_timers_used == num_possible_cpus())
 623                         break;
 624         }
 625
 626         printk(KERN_INFO "HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
 627                 num_timers, num_timers_used);
 628 }
 629
 630 #ifdef CONFIG_HPET
 631 static void hpet_reserve_msi_timers(struct hpet_data *hd)
 632 {
 633         int i;
 634
 635         if (!hpet_devs)
 636                 return;
 637
 638         for (i = 0; i < hpet_num_timers; i++) {
 639                 struct hpet_dev *hdev = &hpet_devs[i];
 640
 641                 if (!(hdev->flags & HPET_DEV_VALID))
 642                         continue;
 643
 644                 hd->hd_irq[hdev->num] = hdev->irq;
 645                 hpet_reserve_timer(hd, hdev->num);
 646         }
 647 }
 648 #endif
 649
 650 static struct hpet_dev *hpet_get_unused_timer(void)
 651 {
 652         int i;
 653
 654         if (!hpet_devs)
 655                 return NULL;
 656
 657         for (i = 0; i < hpet_num_timers; i++) {
 658                 struct hpet_dev *hdev = &hpet_devs[i];
 659
 660                 if (!(hdev->flags & HPET_DEV_VALID))
 661                         continue;
 662                 if (test_and_set_bit(HPET_DEV_USED_BIT,
 663                         (unsigned long *)&hdev->flags))
 664                         continue;
 665                 return hdev;
 666         }
 667         return NULL;
 668 }
 669
 670 struct hpet_work_struct {
 671         struct delayed_work work;
 672         struct completion complete;
 673 };
 674
 675 static void hpet_work(struct work_struct *w)
 676 {
 677         struct hpet_dev *hdev;
 678         int cpu = smp_processor_id();
 679         struct hpet_work_struct *hpet_work;
 680
 681         hpet_work = container_of(w, struct hpet_work_struct, work.work);
 682
 683         hdev = hpet_get_unused_timer();
 684         if (hdev)
 685                 init_one_hpet_msi_clockevent(hdev, cpu);
 686
 687         complete(&hpet_work->complete);
 688 }
 689
 690 static int hpet_cpuhp_notify(struct notifier_block *n,
 691                 unsigned long action, void *hcpu)
 692 {
 693         unsigned long cpu = (unsigned long)hcpu;
 694         struct hpet_work_struct work;
 695         struct hpet_dev *hdev = per_cpu(cpu_hpet_dev, cpu);
 696
 697         switch (action & 0xf) {
 698         case CPU_ONLINE:
 699                 INIT_DELAYED_WORK_ON_STACK(&work.work, hpet_work);
 700                 init_completion(&work.complete);
 701                 /* FIXME: add schedule_work_on() */
 702                 schedule_delayed_work_on(cpu, &work.work, 0);
 703                 wait_for_completion(&work.complete);
 704                 destroy_timer_on_stack(&work.work.timer);
 705                 break;
 706         case CPU_DEAD:
 707                 if (hdev) {
 708                         free_irq(hdev->irq, hdev);
 709                         hdev->flags &= ~HPET_DEV_USED;
 710                         per_cpu(cpu_hpet_dev, cpu) = NULL;
 711                 }
 712                 break;
 713         }
 714         return NOTIFY_OK;
 715 }
 716 #else
 717
 718 static int hpet_setup_msi_irq(unsigned int irq)
 719 {
 720         return 0;
 721 }
 722 static void hpet_msi_capability_lookup(unsigned int start_timer)
 723 {
 724         return;
 725 }
 726
 727 #ifdef CONFIG_HPET
 728 static void hpet_reserve_msi_timers(struct hpet_data *hd)
 729 {
 730         return;
 731 }
 732 #endif
 733
 734 static int hpet_cpuhp_notify(struct notifier_block *n,
 735                 unsigned long action, void *hcpu)
 736 {
 737         return NOTIFY_OK;
 738 }
 739
 740 #endif
 741
 742 /*
 743  * Clock source related code
 744  */
 745 static cycle_t read_hpet(struct clocksource *cs)
 746 {
 747         return (cycle_t)hpet_readl(HPET_COUNTER);
 748 }
 749
 750 #ifdef CONFIG_X86_64
 751 static cycle_t __vsyscall_fn vread_hpet(void)
 752 {
 753         return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
 754 }
 755 #endif
 756
 757 static struct clocksource clocksource_hpet = {
 758         .name           = "hpet",
 759         .rating         = 250,
 760         .read           = read_hpet,
 761         .mask           = HPET_MASK,
 762         .shift          = HPET_SHIFT,
 763         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 764         .resume         = hpet_resume_counter,
 765 #ifdef CONFIG_X86_64
 766         .vread          = vread_hpet,
 767 #endif
 768 };
 769
 770 static int hpet_clocksource_register(void)
 771 {
 772         u64 start, now;
 773         cycle_t t1;
 774
 775         /* Start the counter */
 776         hpet_restart_counter();
 777
 778         /* Verify whether hpet counter works */
 779         t1 = hpet_readl(HPET_COUNTER);
 780         rdtscll(start);
 781
 782         /*
 783          * We don't know the TSC frequency yet, but waiting for
 784          * 200000 TSC cycles is safe:
 785          * 4 GHz == 50us
 786          * 1 GHz == 200us
 787          */
 788         do {
 789                 rep_nop();
 790                 rdtscll(now);
 791         } while ((now - start) < 200000UL);
 792
 793         if (t1 == hpet_readl(HPET_COUNTER)) {
 794                 printk(KERN_WARNING
 795                        "HPET counter not counting. HPET disabled\n");
 796                 return -ENODEV;
 797         }
 798
 799         /*
 800          * The definition of mult is (include/linux/clocksource.h)
 801          * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
 802          * so we first need to convert hpet_period to ns/cyc units:
 803          *  mult/2^shift = ns/cyc = hpet_period/10^6
 804          *  mult = (hpet_period * 2^shift)/10^6
 805          *  mult = (hpet_period << shift)/FSEC_PER_NSEC
 806          */
 807         clocksource_hpet.mult = div_sc(hpet_period, FSEC_PER_NSEC, HPET_SHIFT);
 808
 809         clocksource_register(&clocksource_hpet);
 810
 811         return 0;
 812 }
 813
 814 /**
 815  * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
 816  */
 817 int __init hpet_enable(void)
 818 {
 819         unsigned int id;
 820         int i;
 821
 822         if (!is_hpet_capable())
 823                 return 0;
 824
 825         hpet_set_mapping();
 826
 827         /*
 828          * Read the period and check for a sane value:
 829          */
 830         hpet_period = hpet_readl(HPET_PERIOD);
 831
 832         /*
 833          * AMD SB700 based systems with spread spectrum enabled use a
 834          * SMM based HPET emulation to provide proper frequency
 835          * setting. The SMM code is initialized with the first HPET
 836          * register access and takes some time to complete. During
 837          * this time the config register reads 0xffffffff. We check
 838          * for max. 1000 loops whether the config register reads a non
 839          * 0xffffffff value to make sure that HPET is up and running
 840          * before we go further. A counting loop is safe, as the HPET
 841          * access takes thousands of CPU cycles. On non SB700 based
 842          * machines this check is only done once and has no side
 843          * effects.
 844          */
 845         for (i = 0; hpet_readl(HPET_CFG) == 0xFFFFFFFF; i++) {
 846                 if (i == 1000) {
 847                         printk(KERN_WARNING
 848                                "HPET config register value = 0xFFFFFFFF. "
 849                                "Disabling HPET\n");
 850                         goto out_nohpet;
 851                 }
 852         }
 853
 854         if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
 855                 goto out_nohpet;
 856
 857         /*
 858          * Read the HPET ID register to retrieve the IRQ routing
 859          * information and the number of channels
 860          */
 861         id = hpet_readl(HPET_ID);
 862         hpet_print_config();
 863
 864 #ifdef CONFIG_HPET_EMULATE_RTC
 865         /*
 866          * The legacy routing mode needs at least two channels, tick timer
 867          * and the rtc emulation channel.
 868          */
 869         if (!(id & HPET_ID_NUMBER))
 870                 goto out_nohpet;
 871 #endif
 872
 873         if (hpet_clocksource_register())
 874                 goto out_nohpet;
 875
 876         if (id & HPET_ID_LEGSUP) {
 877                 hpet_legacy_clockevent_register();
 878                 return 1;
 879         }
 880         return 0;
 881
 882 out_nohpet:
 883         hpet_clear_mapping();
 884         hpet_address = 0;
 885         return 0;
 886 }
 887
 888 /*
 889  * Needs to be late, as the reserve_timer code calls kalloc !
 890  *
 891  * Not a problem on i386 as hpet_enable is called from late_time_init,
 892  * but on x86_64 it is necessary !
 893  */
 894 static __init int hpet_late_init(void)
 895 {
 896         int cpu;
 897
 898         if (boot_hpet_disable)
 899                 return -ENODEV;
 900
 901         if (!hpet_address) {
 902                 if (!force_hpet_address)
 903                         return -ENODEV;
 904
 905                 hpet_address = force_hpet_address;
 906                 hpet_enable();
 907         }
 908
 909         if (!hpet_virt_address)
 910                 return -ENODEV;
 911
 912         if (hpet_readl(HPET_ID) & HPET_ID_LEGSUP)
 913                 hpet_msi_capability_lookup(2);
 914         else
 915                 hpet_msi_capability_lookup(0);
 916
 917         hpet_reserve_platform_timers(hpet_readl(HPET_ID));
 918         hpet_print_config();
 919
 920         if (boot_cpu_has(X86_FEATURE_ARAT))
 921                 return 0;
 922
 923         for_each_online_cpu(cpu) {
 924                 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
 925         }
 926
 927         /* This notifier should be called after workqueue is ready */
 928         hotcpu_notifier(hpet_cpuhp_notify, -20);
 929
 930         return 0;
 931 }
 932 fs_initcall(hpet_late_init);
 933
 934 void hpet_disable(void)
 935 {
 936         if (is_hpet_capable()) {
 937                 unsigned int cfg = hpet_readl(HPET_CFG);
 938
 939                 if (hpet_legacy_int_enabled) {
 940                         cfg &= ~HPET_CFG_LEGACY;
 941                         hpet_legacy_int_enabled = 0;
 942                 }
 943                 cfg &= ~HPET_CFG_ENABLE;
 944                 hpet_writel(cfg, HPET_CFG);
 945         }
 946 }
 947
 948 #ifdef CONFIG_HPET_EMULATE_RTC
 949
 950 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
 951  * is enabled, we support RTC interrupt functionality in software.
 952  * RTC has 3 kinds of interrupts:
 953  * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
 954  *    is updated
 955  * 2) Alarm Interrupt - generate an interrupt at a specific time of day
 956  * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
 957  *    2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
 958  * (1) and (2) above are implemented using polling at a frequency of
 959  * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
 960  * overhead. (DEFAULT_RTC_INT_FREQ)
 961  * For (3), we use interrupts at 64Hz or user specified periodic
 962  * frequency, whichever is higher.
 963  */
 964 #include <linux/mc146818rtc.h>
 965 #include <linux/rtc.h>
 966 #include <asm/rtc.h>
 967
 968 #define DEFAULT_RTC_INT_FREQ    64
 969 #define DEFAULT_RTC_SHIFT       6
 970 #define RTC_NUM_INTS            1
 971
 972 static unsigned long hpet_rtc_flags;
 973 static int hpet_prev_update_sec;
 974 static struct rtc_time hpet_alarm_time;
 975 static unsigned long hpet_pie_count;
 976 static u32 hpet_t1_cmp;
 977 static u32 hpet_default_delta;
 978 static u32 hpet_pie_delta;
 979 static unsigned long hpet_pie_limit;
 980
 981 static rtc_irq_handler irq_handler;
 982
 983 /*
 984  * Check that the hpet counter c1 is ahead of the c2
 985  */
 986 static inline int hpet_cnt_ahead(u32 c1, u32 c2)
 987 {
 988         return (s32)(c2 - c1) < 0;
 989 }
 990
 991 /*
 992  * Registers a IRQ handler.
 993  */
 994 int hpet_register_irq_handler(rtc_irq_handler handler)
 995 {
 996         if (!is_hpet_enabled())
 997                 return -ENODEV;
 998         if (irq_handler)
 999                 return -EBUSY;
1000
1001         irq_handler = handler;
1002
1003         return 0;
1004 }
1005 EXPORT_SYMBOL_GPL(hpet_register_irq_handler);
1006
1007 /*
1008  * Deregisters the IRQ handler registered with hpet_register_irq_handler()
1009  * and does cleanup.
1010  */
1011 void hpet_unregister_irq_handler(rtc_irq_handler handler)
1012 {
1013         if (!is_hpet_enabled())
1014                 return;
1015
1016         irq_handler = NULL;
1017         hpet_rtc_flags = 0;
1018 }
1019 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler);
1020
1021 /*
1022  * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
1023  * is not supported by all HPET implementations for timer 1.
1024  *
1025  * hpet_rtc_timer_init() is called when the rtc is initialized.
1026  */
1027 int hpet_rtc_timer_init(void)
1028 {
1029         unsigned int cfg, cnt, delta;
1030         unsigned long flags;
1031
1032         if (!is_hpet_enabled())
1033                 return 0;
1034
1035         if (!hpet_default_delta) {
1036                 uint64_t clc;
1037
1038                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1039                 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
1040                 hpet_default_delta = clc;
1041         }
1042
1043         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1044                 delta = hpet_default_delta;
1045         else
1046                 delta = hpet_pie_delta;
1047
1048         local_irq_save(flags);
1049
1050         cnt = delta + hpet_readl(HPET_COUNTER);
1051         hpet_writel(cnt, HPET_T1_CMP);
1052         hpet_t1_cmp = cnt;
1053
1054         cfg = hpet_readl(HPET_T1_CFG);
1055         cfg &= ~HPET_TN_PERIODIC;
1056         cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1057         hpet_writel(cfg, HPET_T1_CFG);
1058
1059         local_irq_restore(flags);
1060
1061         return 1;
1062 }
1063 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
1064
1065 /*
1066  * The functions below are called from rtc driver.
1067  * Return 0 if HPET is not being used.
1068  * Otherwise do the necessary changes and return 1.
1069  */
1070 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1071 {
1072         if (!is_hpet_enabled())
1073                 return 0;
1074
1075         hpet_rtc_flags &= ~bit_mask;
1076         return 1;
1077 }
1078 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
1079
1080 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1081 {
1082         unsigned long oldbits = hpet_rtc_flags;
1083
1084         if (!is_hpet_enabled())
1085                 return 0;
1086
1087         hpet_rtc_flags |= bit_mask;
1088
1089         if ((bit_mask & RTC_UIE) && !(oldbits & RTC_UIE))
1090                 hpet_prev_update_sec = -1;
1091
1092         if (!oldbits)
1093                 hpet_rtc_timer_init();
1094
1095         return 1;
1096 }
1097 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit);
1098
1099 int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
1100                         unsigned char sec)
1101 {
1102         if (!is_hpet_enabled())
1103                 return 0;
1104
1105         hpet_alarm_time.tm_hour = hrs;
1106         hpet_alarm_time.tm_min = min;
1107         hpet_alarm_time.tm_sec = sec;
1108
1109         return 1;
1110 }
1111 EXPORT_SYMBOL_GPL(hpet_set_alarm_time);
1112
1113 int hpet_set_periodic_freq(unsigned long freq)
1114 {
1115         uint64_t clc;
1116
1117         if (!is_hpet_enabled())
1118                 return 0;
1119
1120         if (freq <= DEFAULT_RTC_INT_FREQ)
1121                 hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
1122         else {
1123                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1124                 do_div(clc, freq);
1125                 clc >>= hpet_clockevent.shift;
1126                 hpet_pie_delta = clc;
1127         }
1128         return 1;
1129 }
1130 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq);
1131
1132 int hpet_rtc_dropped_irq(void)
1133 {
1134         return is_hpet_enabled();
1135 }
1136 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
1137
1138 static void hpet_rtc_timer_reinit(void)
1139 {
1140         unsigned int cfg, delta;
1141         int lost_ints = -1;
1142
1143         if (unlikely(!hpet_rtc_flags)) {
1144                 cfg = hpet_readl(HPET_T1_CFG);
1145                 cfg &= ~HPET_TN_ENABLE;
1146                 hpet_writel(cfg, HPET_T1_CFG);
1147                 return;
1148         }
1149
1150         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1151                 delta = hpet_default_delta;
1152         else
1153                 delta = hpet_pie_delta;
1154
1155         /*
1156          * Increment the comparator value until we are ahead of the
1157          * current count.
1158          */
1159         do {
1160                 hpet_t1_cmp += delta;
1161                 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
1162                 lost_ints++;
1163         } while (!hpet_cnt_ahead(hpet_t1_cmp, hpet_readl(HPET_COUNTER)));
1164
1165         if (lost_ints) {
1166                 if (hpet_rtc_flags & RTC_PIE)
1167                         hpet_pie_count += lost_ints;
1168                 if (printk_ratelimit())
1169                         printk(KERN_WARNING "hpet1: lost %d rtc interrupts\n",
1170                                 lost_ints);
1171         }
1172 }
1173
1174 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
1175 {
1176         struct rtc_time curr_time;
1177         unsigned long rtc_int_flag = 0;
1178
1179         hpet_rtc_timer_reinit();
1180         memset(&curr_time, 0, sizeof(struct rtc_time));
1181
1182         if (hpet_rtc_flags & (RTC_UIE | RTC_AIE))
1183                 get_rtc_time(&curr_time);
1184
1185         if (hpet_rtc_flags & RTC_UIE &&
1186             curr_time.tm_sec != hpet_prev_update_sec) {
1187                 if (hpet_prev_update_sec >= 0)
1188                         rtc_int_flag = RTC_UF;
1189                 hpet_prev_update_sec = curr_time.tm_sec;
1190         }
1191
1192         if (hpet_rtc_flags & RTC_PIE &&
1193             ++hpet_pie_count >= hpet_pie_limit) {
1194                 rtc_int_flag |= RTC_PF;
1195                 hpet_pie_count = 0;
1196         }
1197
1198         if (hpet_rtc_flags & RTC_AIE &&
1199             (curr_time.tm_sec == hpet_alarm_time.tm_sec) &&
1200             (curr_time.tm_min == hpet_alarm_time.tm_min) &&
1201             (curr_time.tm_hour == hpet_alarm_time.tm_hour))
1202                         rtc_int_flag |= RTC_AF;
1203
1204         if (rtc_int_flag) {
1205                 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1206                 if (irq_handler)
1207                         irq_handler(rtc_int_flag, dev_id);
1208         }
1209         return IRQ_HANDLED;
1210 }
1211 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt);
1212 #endif