1 #include <linux/clocksource.h>
2 #include <linux/clockchips.h>
3 #include <linux/interrupt.h>
4 #include <linux/sysdev.h>
5 #include <linux/delay.h>
6 #include <linux/errno.h>
7 #include <linux/hpet.h>
8 #include <linux/init.h>
13 #include <asm/fixmap.h>
14 #include <asm/i8253.h>
17 #define HPET_MASK CLOCKSOURCE_MASK(32)
22 #define FSEC_PER_NSEC 1000000L
24 #define HPET_DEV_USED_BIT 2
25 #define HPET_DEV_USED (1 << HPET_DEV_USED_BIT)
26 #define HPET_DEV_VALID 0x8
27 #define HPET_DEV_FSB_CAP 0x1000
28 #define HPET_DEV_PERI_CAP 0x2000
30 #define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
33 * HPET address is set in acpi/boot.c, when an ACPI entry exists
35 unsigned long hpet_address;
37 static unsigned long hpet_num_timers;
39 static void __iomem *hpet_virt_address;
42 struct clock_event_device evt;
50 unsigned long hpet_readl(unsigned long a)
52 return readl(hpet_virt_address + a);
55 static inline void hpet_writel(unsigned long d, unsigned long a)
57 writel(d, hpet_virt_address + a);
61 #include <asm/pgtable.h>
64 static inline void hpet_set_mapping(void)
66 hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
68 __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
72 static inline void hpet_clear_mapping(void)
74 iounmap(hpet_virt_address);
75 hpet_virt_address = NULL;
79 * HPET command line enable / disable
81 static int boot_hpet_disable;
83 static int hpet_verbose;
85 static int __init hpet_setup(char *str)
88 if (!strncmp("disable", str, 7))
89 boot_hpet_disable = 1;
90 if (!strncmp("force", str, 5))
92 if (!strncmp("verbose", str, 7))
97 __setup("hpet=", hpet_setup);
99 static int __init disable_hpet(char *str)
101 boot_hpet_disable = 1;
104 __setup("nohpet", disable_hpet);
106 static inline int is_hpet_capable(void)
108 return !boot_hpet_disable && hpet_address;
112 * HPET timer interrupt enable / disable
114 static int hpet_legacy_int_enabled;
117 * is_hpet_enabled - check whether the hpet timer interrupt is enabled
119 int is_hpet_enabled(void)
121 return is_hpet_capable() && hpet_legacy_int_enabled;
123 EXPORT_SYMBOL_GPL(is_hpet_enabled);
125 static void _hpet_print_config(const char *function, int line)
128 printk(KERN_INFO "hpet: %s(%d):\n", function, line);
129 l = hpet_readl(HPET_ID);
130 h = hpet_readl(HPET_PERIOD);
131 timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
132 printk(KERN_INFO "hpet: ID: 0x%x, PERIOD: 0x%x\n", l, h);
133 l = hpet_readl(HPET_CFG);
134 h = hpet_readl(HPET_STATUS);
135 printk(KERN_INFO "hpet: CFG: 0x%x, STATUS: 0x%x\n", l, h);
136 l = hpet_readl(HPET_COUNTER);
137 h = hpet_readl(HPET_COUNTER+4);
138 printk(KERN_INFO "hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l, h);
140 for (i = 0; i < timers; i++) {
141 l = hpet_readl(HPET_Tn_CFG(i));
142 h = hpet_readl(HPET_Tn_CFG(i)+4);
143 printk(KERN_INFO "hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
145 l = hpet_readl(HPET_Tn_CMP(i));
146 h = hpet_readl(HPET_Tn_CMP(i)+4);
147 printk(KERN_INFO "hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
149 l = hpet_readl(HPET_Tn_ROUTE(i));
150 h = hpet_readl(HPET_Tn_ROUTE(i)+4);
151 printk(KERN_INFO "hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
156 #define hpet_print_config() \
159 _hpet_print_config(__FUNCTION__, __LINE__); \
163 * When the hpet driver (/dev/hpet) is enabled, we need to reserve
164 * timer 0 and timer 1 in case of RTC emulation.
168 static void hpet_reserve_msi_timers(struct hpet_data *hd);
170 static void hpet_reserve_platform_timers(unsigned long id)
172 struct hpet __iomem *hpet = hpet_virt_address;
173 struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
174 unsigned int nrtimers, i;
177 nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
179 memset(&hd, 0, sizeof(hd));
180 hd.hd_phys_address = hpet_address;
181 hd.hd_address = hpet;
182 hd.hd_nirqs = nrtimers;
183 hpet_reserve_timer(&hd, 0);
185 #ifdef CONFIG_HPET_EMULATE_RTC
186 hpet_reserve_timer(&hd, 1);
190 * NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
191 * is wrong for i8259!) not the output IRQ. Many BIOS writers
192 * don't bother configuring *any* comparator interrupts.
194 hd.hd_irq[0] = HPET_LEGACY_8254;
195 hd.hd_irq[1] = HPET_LEGACY_RTC;
197 for (i = 2; i < nrtimers; timer++, i++) {
198 hd.hd_irq[i] = (readl(&timer->hpet_config) &
199 Tn_INT_ROUTE_CNF_MASK) >> Tn_INT_ROUTE_CNF_SHIFT;
202 hpet_reserve_msi_timers(&hd);
208 static void hpet_reserve_platform_timers(unsigned long id) { }
214 static unsigned long hpet_period;
216 static void hpet_legacy_set_mode(enum clock_event_mode mode,
217 struct clock_event_device *evt);
218 static int hpet_legacy_next_event(unsigned long delta,
219 struct clock_event_device *evt);
222 * The hpet clock event device
224 static struct clock_event_device hpet_clockevent = {
226 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
227 .set_mode = hpet_legacy_set_mode,
228 .set_next_event = hpet_legacy_next_event,
234 static void hpet_stop_counter(void)
236 unsigned long cfg = hpet_readl(HPET_CFG);
237 cfg &= ~HPET_CFG_ENABLE;
238 hpet_writel(cfg, HPET_CFG);
239 hpet_writel(0, HPET_COUNTER);
240 hpet_writel(0, HPET_COUNTER + 4);
243 static void hpet_start_counter(void)
245 unsigned long cfg = hpet_readl(HPET_CFG);
246 cfg |= HPET_CFG_ENABLE;
247 hpet_writel(cfg, HPET_CFG);
250 static void hpet_restart_counter(void)
253 hpet_start_counter();
256 static void hpet_resume_device(void)
261 static void hpet_resume_counter(void)
263 hpet_resume_device();
264 hpet_restart_counter();
267 static void hpet_enable_legacy_int(void)
269 unsigned long cfg = hpet_readl(HPET_CFG);
271 cfg |= HPET_CFG_LEGACY;
272 hpet_writel(cfg, HPET_CFG);
273 hpet_legacy_int_enabled = 1;
276 static void hpet_legacy_clockevent_register(void)
278 /* Start HPET legacy interrupts */
279 hpet_enable_legacy_int();
282 * The mult factor is defined as (include/linux/clockchips.h)
283 * mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
284 * hpet_period is in units of femtoseconds (per cycle), so
285 * mult/2^shift = cyc/ns = 10^6/hpet_period
286 * mult = (10^6 * 2^shift)/hpet_period
287 * mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
289 hpet_clockevent.mult = div_sc((unsigned long) FSEC_PER_NSEC,
290 hpet_period, hpet_clockevent.shift);
291 /* Calculate the min / max delta */
292 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
294 /* 5 usec minimum reprogramming delta. */
295 hpet_clockevent.min_delta_ns = 5000;
298 * Start hpet with the boot cpu mask and make it
299 * global after the IO_APIC has been initialized.
301 hpet_clockevent.cpumask = cpumask_of(smp_processor_id());
302 clockevents_register_device(&hpet_clockevent);
303 global_clock_event = &hpet_clockevent;
304 printk(KERN_DEBUG "hpet clockevent registered\n");
307 static int hpet_setup_msi_irq(unsigned int irq);
309 static void hpet_set_mode(enum clock_event_mode mode,
310 struct clock_event_device *evt, int timer)
312 unsigned long cfg, cmp, now;
316 case CLOCK_EVT_MODE_PERIODIC:
317 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
318 delta >>= evt->shift;
319 now = hpet_readl(HPET_COUNTER);
320 cmp = now + (unsigned long) delta;
321 cfg = hpet_readl(HPET_Tn_CFG(timer));
322 /* Make sure we use edge triggered interrupts */
323 cfg &= ~HPET_TN_LEVEL;
324 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
325 HPET_TN_SETVAL | HPET_TN_32BIT;
326 hpet_writel(cfg, HPET_Tn_CFG(timer));
328 * The first write after writing TN_SETVAL to the
329 * config register sets the counter value, the second
330 * write sets the period.
332 hpet_writel(cmp, HPET_Tn_CMP(timer));
334 hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer));
338 case CLOCK_EVT_MODE_ONESHOT:
339 cfg = hpet_readl(HPET_Tn_CFG(timer));
340 cfg &= ~HPET_TN_PERIODIC;
341 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
342 hpet_writel(cfg, HPET_Tn_CFG(timer));
345 case CLOCK_EVT_MODE_UNUSED:
346 case CLOCK_EVT_MODE_SHUTDOWN:
347 cfg = hpet_readl(HPET_Tn_CFG(timer));
348 cfg &= ~HPET_TN_ENABLE;
349 hpet_writel(cfg, HPET_Tn_CFG(timer));
352 case CLOCK_EVT_MODE_RESUME:
354 hpet_enable_legacy_int();
356 struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
357 hpet_setup_msi_irq(hdev->irq);
358 disable_irq(hdev->irq);
359 irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
360 enable_irq(hdev->irq);
367 static int hpet_next_event(unsigned long delta,
368 struct clock_event_device *evt, int timer)
372 cnt = hpet_readl(HPET_COUNTER);
374 hpet_writel(cnt, HPET_Tn_CMP(timer));
377 * We need to read back the CMP register to make sure that
378 * what we wrote hit the chip before we compare it to the
381 WARN_ON_ONCE((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt);
383 return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
386 static void hpet_legacy_set_mode(enum clock_event_mode mode,
387 struct clock_event_device *evt)
389 hpet_set_mode(mode, evt, 0);
392 static int hpet_legacy_next_event(unsigned long delta,
393 struct clock_event_device *evt)
395 return hpet_next_event(delta, evt, 0);
401 #ifdef CONFIG_PCI_MSI
403 static DEFINE_PER_CPU(struct hpet_dev *, cpu_hpet_dev);
404 static struct hpet_dev *hpet_devs;
406 void hpet_msi_unmask(unsigned int irq)
408 struct hpet_dev *hdev = get_irq_data(irq);
412 cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
414 hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
417 void hpet_msi_mask(unsigned int irq)
420 struct hpet_dev *hdev = get_irq_data(irq);
423 cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
425 hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
428 void hpet_msi_write(unsigned int irq, struct msi_msg *msg)
430 struct hpet_dev *hdev = get_irq_data(irq);
432 hpet_writel(msg->data, HPET_Tn_ROUTE(hdev->num));
433 hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hdev->num) + 4);
436 void hpet_msi_read(unsigned int irq, struct msi_msg *msg)
438 struct hpet_dev *hdev = get_irq_data(irq);
440 msg->data = hpet_readl(HPET_Tn_ROUTE(hdev->num));
441 msg->address_lo = hpet_readl(HPET_Tn_ROUTE(hdev->num) + 4);
445 static void hpet_msi_set_mode(enum clock_event_mode mode,
446 struct clock_event_device *evt)
448 struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
449 hpet_set_mode(mode, evt, hdev->num);
452 static int hpet_msi_next_event(unsigned long delta,
453 struct clock_event_device *evt)
455 struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
456 return hpet_next_event(delta, evt, hdev->num);
459 static int hpet_setup_msi_irq(unsigned int irq)
461 if (arch_setup_hpet_msi(irq)) {
468 static int hpet_assign_irq(struct hpet_dev *dev)
476 set_irq_data(irq, dev);
478 if (hpet_setup_msi_irq(irq))
485 static irqreturn_t hpet_interrupt_handler(int irq, void *data)
487 struct hpet_dev *dev = (struct hpet_dev *)data;
488 struct clock_event_device *hevt = &dev->evt;
490 if (!hevt->event_handler) {
491 printk(KERN_INFO "Spurious HPET timer interrupt on HPET timer %d\n",
496 hevt->event_handler(hevt);
500 static int hpet_setup_irq(struct hpet_dev *dev)
503 if (request_irq(dev->irq, hpet_interrupt_handler,
504 IRQF_DISABLED|IRQF_NOBALANCING, dev->name, dev))
507 disable_irq(dev->irq);
508 irq_set_affinity(dev->irq, cpumask_of(dev->cpu));
509 enable_irq(dev->irq);
511 printk(KERN_DEBUG "hpet: %s irq %d for MSI\n",
512 dev->name, dev->irq);
517 /* This should be called in specific @cpu */
518 static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
520 struct clock_event_device *evt = &hdev->evt;
523 WARN_ON(cpu != smp_processor_id());
524 if (!(hdev->flags & HPET_DEV_VALID))
527 if (hpet_setup_msi_irq(hdev->irq))
531 per_cpu(cpu_hpet_dev, cpu) = hdev;
532 evt->name = hdev->name;
533 hpet_setup_irq(hdev);
534 evt->irq = hdev->irq;
537 evt->features = CLOCK_EVT_FEAT_ONESHOT;
538 if (hdev->flags & HPET_DEV_PERI_CAP)
539 evt->features |= CLOCK_EVT_FEAT_PERIODIC;
541 evt->set_mode = hpet_msi_set_mode;
542 evt->set_next_event = hpet_msi_next_event;
546 * The period is a femto seconds value. We need to calculate the
547 * scaled math multiplication factor for nanosecond to hpet tick
550 hpet_freq = 1000000000000000ULL;
551 do_div(hpet_freq, hpet_period);
552 evt->mult = div_sc((unsigned long) hpet_freq,
553 NSEC_PER_SEC, evt->shift);
554 /* Calculate the max delta */
555 evt->max_delta_ns = clockevent_delta2ns(0x7FFFFFFF, evt);
556 /* 5 usec minimum reprogramming delta. */
557 evt->min_delta_ns = 5000;
559 evt->cpumask = cpumask_of(hdev->cpu);
560 clockevents_register_device(evt);
564 /* Reserve at least one timer for userspace (/dev/hpet) */
565 #define RESERVE_TIMERS 1
567 #define RESERVE_TIMERS 0
570 static void hpet_msi_capability_lookup(unsigned int start_timer)
573 unsigned int num_timers;
574 unsigned int num_timers_used = 0;
577 id = hpet_readl(HPET_ID);
579 num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
580 num_timers++; /* Value read out starts from 0 */
583 hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);
587 hpet_num_timers = num_timers;
589 for (i = start_timer; i < num_timers - RESERVE_TIMERS; i++) {
590 struct hpet_dev *hdev = &hpet_devs[num_timers_used];
591 unsigned long cfg = hpet_readl(HPET_Tn_CFG(i));
593 /* Only consider HPET timer with MSI support */
594 if (!(cfg & HPET_TN_FSB_CAP))
598 if (cfg & HPET_TN_PERIODIC_CAP)
599 hdev->flags |= HPET_DEV_PERI_CAP;
602 sprintf(hdev->name, "hpet%d", i);
603 if (hpet_assign_irq(hdev))
606 hdev->flags |= HPET_DEV_FSB_CAP;
607 hdev->flags |= HPET_DEV_VALID;
609 if (num_timers_used == num_possible_cpus())
613 printk(KERN_INFO "HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
614 num_timers, num_timers_used);
618 static void hpet_reserve_msi_timers(struct hpet_data *hd)
625 for (i = 0; i < hpet_num_timers; i++) {
626 struct hpet_dev *hdev = &hpet_devs[i];
628 if (!(hdev->flags & HPET_DEV_VALID))
631 hd->hd_irq[hdev->num] = hdev->irq;
632 hpet_reserve_timer(hd, hdev->num);
637 static struct hpet_dev *hpet_get_unused_timer(void)
644 for (i = 0; i < hpet_num_timers; i++) {
645 struct hpet_dev *hdev = &hpet_devs[i];
647 if (!(hdev->flags & HPET_DEV_VALID))
649 if (test_and_set_bit(HPET_DEV_USED_BIT,
650 (unsigned long *)&hdev->flags))
657 struct hpet_work_struct {
658 struct delayed_work work;
659 struct completion complete;
662 static void hpet_work(struct work_struct *w)
664 struct hpet_dev *hdev;
665 int cpu = smp_processor_id();
666 struct hpet_work_struct *hpet_work;
668 hpet_work = container_of(w, struct hpet_work_struct, work.work);
670 hdev = hpet_get_unused_timer();
672 init_one_hpet_msi_clockevent(hdev, cpu);
674 complete(&hpet_work->complete);
677 static int hpet_cpuhp_notify(struct notifier_block *n,
678 unsigned long action, void *hcpu)
680 unsigned long cpu = (unsigned long)hcpu;
681 struct hpet_work_struct work;
682 struct hpet_dev *hdev = per_cpu(cpu_hpet_dev, cpu);
684 switch (action & 0xf) {
686 INIT_DELAYED_WORK_ON_STACK(&work.work, hpet_work);
687 init_completion(&work.complete);
688 /* FIXME: add schedule_work_on() */
689 schedule_delayed_work_on(cpu, &work.work, 0);
690 wait_for_completion(&work.complete);
691 destroy_timer_on_stack(&work.work.timer);
695 free_irq(hdev->irq, hdev);
696 hdev->flags &= ~HPET_DEV_USED;
697 per_cpu(cpu_hpet_dev, cpu) = NULL;
705 static int hpet_setup_msi_irq(unsigned int irq)
709 static void hpet_msi_capability_lookup(unsigned int start_timer)
715 static void hpet_reserve_msi_timers(struct hpet_data *hd)
721 static int hpet_cpuhp_notify(struct notifier_block *n,
722 unsigned long action, void *hcpu)
730 * Clock source related code
732 static cycle_t read_hpet(void)
734 return (cycle_t)hpet_readl(HPET_COUNTER);
738 static cycle_t __vsyscall_fn vread_hpet(void)
740 return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
744 static struct clocksource clocksource_hpet = {
750 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
751 .resume = hpet_resume_counter,
757 static int hpet_clocksource_register(void)
762 /* Start the counter */
763 hpet_restart_counter();
765 /* Verify whether hpet counter works */
770 * We don't know the TSC frequency yet, but waiting for
771 * 200000 TSC cycles is safe:
778 } while ((now - start) < 200000UL);
780 if (t1 == read_hpet()) {
782 "HPET counter not counting. HPET disabled\n");
787 * The definition of mult is (include/linux/clocksource.h)
788 * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
789 * so we first need to convert hpet_period to ns/cyc units:
790 * mult/2^shift = ns/cyc = hpet_period/10^6
791 * mult = (hpet_period * 2^shift)/10^6
792 * mult = (hpet_period << shift)/FSEC_PER_NSEC
794 clocksource_hpet.mult = div_sc(hpet_period, FSEC_PER_NSEC, HPET_SHIFT);
796 clocksource_register(&clocksource_hpet);
802 * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
804 int __init hpet_enable(void)
809 if (!is_hpet_capable())
815 * Read the period and check for a sane value:
817 hpet_period = hpet_readl(HPET_PERIOD);
820 * AMD SB700 based systems with spread spectrum enabled use a
821 * SMM based HPET emulation to provide proper frequency
822 * setting. The SMM code is initialized with the first HPET
823 * register access and takes some time to complete. During
824 * this time the config register reads 0xffffffff. We check
825 * for max. 1000 loops whether the config register reads a non
826 * 0xffffffff value to make sure that HPET is up and running
827 * before we go further. A counting loop is safe, as the HPET
828 * access takes thousands of CPU cycles. On non SB700 based
829 * machines this check is only done once and has no side
832 for (i = 0; hpet_readl(HPET_CFG) == 0xFFFFFFFF; i++) {
835 "HPET config register value = 0xFFFFFFFF. "
841 if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
845 * Read the HPET ID register to retrieve the IRQ routing
846 * information and the number of channels
848 id = hpet_readl(HPET_ID);
851 #ifdef CONFIG_HPET_EMULATE_RTC
853 * The legacy routing mode needs at least two channels, tick timer
854 * and the rtc emulation channel.
856 if (!(id & HPET_ID_NUMBER))
860 if (hpet_clocksource_register())
863 if (id & HPET_ID_LEGSUP) {
864 hpet_legacy_clockevent_register();
865 hpet_msi_capability_lookup(2);
868 hpet_msi_capability_lookup(0);
872 hpet_clear_mapping();
878 * Needs to be late, as the reserve_timer code calls kalloc !
880 * Not a problem on i386 as hpet_enable is called from late_time_init,
881 * but on x86_64 it is necessary !
883 static __init int hpet_late_init(void)
887 if (boot_hpet_disable)
891 if (!force_hpet_address)
894 hpet_address = force_hpet_address;
898 if (!hpet_virt_address)
901 hpet_reserve_platform_timers(hpet_readl(HPET_ID));
904 for_each_online_cpu(cpu) {
905 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
908 /* This notifier should be called after workqueue is ready */
909 hotcpu_notifier(hpet_cpuhp_notify, -20);
913 fs_initcall(hpet_late_init);
915 void hpet_disable(void)
917 if (is_hpet_capable()) {
918 unsigned long cfg = hpet_readl(HPET_CFG);
920 if (hpet_legacy_int_enabled) {
921 cfg &= ~HPET_CFG_LEGACY;
922 hpet_legacy_int_enabled = 0;
924 cfg &= ~HPET_CFG_ENABLE;
925 hpet_writel(cfg, HPET_CFG);
929 #ifdef CONFIG_HPET_EMULATE_RTC
931 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
932 * is enabled, we support RTC interrupt functionality in software.
933 * RTC has 3 kinds of interrupts:
934 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
936 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
937 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
938 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
939 * (1) and (2) above are implemented using polling at a frequency of
940 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
941 * overhead. (DEFAULT_RTC_INT_FREQ)
942 * For (3), we use interrupts at 64Hz or user specified periodic
943 * frequency, whichever is higher.
945 #include <linux/mc146818rtc.h>
946 #include <linux/rtc.h>
949 #define DEFAULT_RTC_INT_FREQ 64
950 #define DEFAULT_RTC_SHIFT 6
951 #define RTC_NUM_INTS 1
953 static unsigned long hpet_rtc_flags;
954 static int hpet_prev_update_sec;
955 static struct rtc_time hpet_alarm_time;
956 static unsigned long hpet_pie_count;
957 static u32 hpet_t1_cmp;
958 static unsigned long hpet_default_delta;
959 static unsigned long hpet_pie_delta;
960 static unsigned long hpet_pie_limit;
962 static rtc_irq_handler irq_handler;
965 * Check that the hpet counter c1 is ahead of the c2
967 static inline int hpet_cnt_ahead(u32 c1, u32 c2)
969 return (s32)(c2 - c1) < 0;
973 * Registers a IRQ handler.
975 int hpet_register_irq_handler(rtc_irq_handler handler)
977 if (!is_hpet_enabled())
982 irq_handler = handler;
986 EXPORT_SYMBOL_GPL(hpet_register_irq_handler);
989 * Deregisters the IRQ handler registered with hpet_register_irq_handler()
992 void hpet_unregister_irq_handler(rtc_irq_handler handler)
994 if (!is_hpet_enabled())
1000 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler);
1003 * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
1004 * is not supported by all HPET implementations for timer 1.
1006 * hpet_rtc_timer_init() is called when the rtc is initialized.
1008 int hpet_rtc_timer_init(void)
1010 unsigned long cfg, cnt, delta, flags;
1012 if (!is_hpet_enabled())
1015 if (!hpet_default_delta) {
1018 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1019 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
1020 hpet_default_delta = (unsigned long) clc;
1023 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1024 delta = hpet_default_delta;
1026 delta = hpet_pie_delta;
1028 local_irq_save(flags);
1030 cnt = delta + hpet_readl(HPET_COUNTER);
1031 hpet_writel(cnt, HPET_T1_CMP);
1034 cfg = hpet_readl(HPET_T1_CFG);
1035 cfg &= ~HPET_TN_PERIODIC;
1036 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1037 hpet_writel(cfg, HPET_T1_CFG);
1039 local_irq_restore(flags);
1043 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
1046 * The functions below are called from rtc driver.
1047 * Return 0 if HPET is not being used.
1048 * Otherwise do the necessary changes and return 1.
1050 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1052 if (!is_hpet_enabled())
1055 hpet_rtc_flags &= ~bit_mask;
1058 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
1060 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1062 unsigned long oldbits = hpet_rtc_flags;
1064 if (!is_hpet_enabled())
1067 hpet_rtc_flags |= bit_mask;
1069 if ((bit_mask & RTC_UIE) && !(oldbits & RTC_UIE))
1070 hpet_prev_update_sec = -1;
1073 hpet_rtc_timer_init();
1077 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit);
1079 int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
1082 if (!is_hpet_enabled())
1085 hpet_alarm_time.tm_hour = hrs;
1086 hpet_alarm_time.tm_min = min;
1087 hpet_alarm_time.tm_sec = sec;
1091 EXPORT_SYMBOL_GPL(hpet_set_alarm_time);
1093 int hpet_set_periodic_freq(unsigned long freq)
1097 if (!is_hpet_enabled())
1100 if (freq <= DEFAULT_RTC_INT_FREQ)
1101 hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
1103 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1105 clc >>= hpet_clockevent.shift;
1106 hpet_pie_delta = (unsigned long) clc;
1110 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq);
1112 int hpet_rtc_dropped_irq(void)
1114 return is_hpet_enabled();
1116 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
1118 static void hpet_rtc_timer_reinit(void)
1120 unsigned long cfg, delta;
1123 if (unlikely(!hpet_rtc_flags)) {
1124 cfg = hpet_readl(HPET_T1_CFG);
1125 cfg &= ~HPET_TN_ENABLE;
1126 hpet_writel(cfg, HPET_T1_CFG);
1130 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1131 delta = hpet_default_delta;
1133 delta = hpet_pie_delta;
1136 * Increment the comparator value until we are ahead of the
1140 hpet_t1_cmp += delta;
1141 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
1143 } while (!hpet_cnt_ahead(hpet_t1_cmp, hpet_readl(HPET_COUNTER)));
1146 if (hpet_rtc_flags & RTC_PIE)
1147 hpet_pie_count += lost_ints;
1148 if (printk_ratelimit())
1149 printk(KERN_WARNING "hpet1: lost %d rtc interrupts\n",
1154 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
1156 struct rtc_time curr_time;
1157 unsigned long rtc_int_flag = 0;
1159 hpet_rtc_timer_reinit();
1160 memset(&curr_time, 0, sizeof(struct rtc_time));
1162 if (hpet_rtc_flags & (RTC_UIE | RTC_AIE))
1163 get_rtc_time(&curr_time);
1165 if (hpet_rtc_flags & RTC_UIE &&
1166 curr_time.tm_sec != hpet_prev_update_sec) {
1167 if (hpet_prev_update_sec >= 0)
1168 rtc_int_flag = RTC_UF;
1169 hpet_prev_update_sec = curr_time.tm_sec;
1172 if (hpet_rtc_flags & RTC_PIE &&
1173 ++hpet_pie_count >= hpet_pie_limit) {
1174 rtc_int_flag |= RTC_PF;
1178 if (hpet_rtc_flags & RTC_AIE &&
1179 (curr_time.tm_sec == hpet_alarm_time.tm_sec) &&
1180 (curr_time.tm_min == hpet_alarm_time.tm_min) &&
1181 (curr_time.tm_hour == hpet_alarm_time.tm_hour))
1182 rtc_int_flag |= RTC_AF;
1185 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1187 irq_handler(rtc_int_flag, dev_id);
1191 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt);