x86: Add cpu_mask_to_apicid_and
[safe/jmp/linux-2.6] / arch / x86 / kernel / genapic_flat_64.c
1 /*
2  * Copyright 2004 James Cleverdon, IBM.
3  * Subject to the GNU Public License, v.2
4  *
5  * Flat APIC subarch code.
6  *
7  * Hacked for x86-64 by James Cleverdon from i386 architecture code by
8  * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
9  * James Cleverdon.
10  */
11 #include <linux/errno.h>
12 #include <linux/threads.h>
13 #include <linux/cpumask.h>
14 #include <linux/string.h>
15 #include <linux/kernel.h>
16 #include <linux/ctype.h>
17 #include <linux/init.h>
18 #include <linux/hardirq.h>
19 #include <asm/smp.h>
20 #include <asm/ipi.h>
21 #include <asm/genapic.h>
22 #include <mach_apicdef.h>
23
24 #ifdef CONFIG_ACPI
25 #include <acpi/acpi_bus.h>
26 #endif
27
28 static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
29 {
30         return 1;
31 }
32
33 static const cpumask_t *flat_target_cpus(void)
34 {
35         return &cpu_online_map;
36 }
37
38 static void flat_vector_allocation_domain(int cpu, cpumask_t *retmask)
39 {
40         /* Careful. Some cpus do not strictly honor the set of cpus
41          * specified in the interrupt destination when using lowest
42          * priority interrupt delivery mode.
43          *
44          * In particular there was a hyperthreading cpu observed to
45          * deliver interrupts to the wrong hyperthread when only one
46          * hyperthread was specified in the interrupt desitination.
47          */
48         *retmask = (cpumask_t) { {[0] = APIC_ALL_CPUS, } };
49 }
50
51 /*
52  * Set up the logical destination ID.
53  *
54  * Intel recommends to set DFR, LDR and TPR before enabling
55  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
56  * document number 292116).  So here it goes...
57  */
58 static void flat_init_apic_ldr(void)
59 {
60         unsigned long val;
61         unsigned long num, id;
62
63         num = smp_processor_id();
64         id = 1UL << num;
65         apic_write(APIC_DFR, APIC_DFR_FLAT);
66         val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
67         val |= SET_APIC_LOGICAL_ID(id);
68         apic_write(APIC_LDR, val);
69 }
70
71 static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
72 {
73         unsigned long flags;
74
75         local_irq_save(flags);
76         __send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL);
77         local_irq_restore(flags);
78 }
79
80 static void flat_send_IPI_mask(const cpumask_t *cpumask, int vector)
81 {
82         unsigned long mask = cpus_addr(*cpumask)[0];
83
84         _flat_send_IPI_mask(mask, vector);
85 }
86
87 static void flat_send_IPI_mask_allbutself(const cpumask_t *cpumask, int vector)
88 {
89         unsigned long mask = cpus_addr(*cpumask)[0];
90         int cpu = smp_processor_id();
91
92         if (cpu < BITS_PER_LONG)
93                 clear_bit(cpu, &mask);
94         _flat_send_IPI_mask(mask, vector);
95 }
96
97 static void flat_send_IPI_allbutself(int vector)
98 {
99         int cpu = smp_processor_id();
100 #ifdef  CONFIG_HOTPLUG_CPU
101         int hotplug = 1;
102 #else
103         int hotplug = 0;
104 #endif
105         if (hotplug || vector == NMI_VECTOR) {
106                 if (!cpus_equal(cpu_online_map, cpumask_of_cpu(cpu))) {
107                         unsigned long mask = cpus_addr(cpu_online_map)[0];
108
109                         if (cpu < BITS_PER_LONG)
110                                 clear_bit(cpu, &mask);
111
112                         _flat_send_IPI_mask(mask, vector);
113                 }
114         } else if (num_online_cpus() > 1) {
115                 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);
116         }
117 }
118
119 static void flat_send_IPI_all(int vector)
120 {
121         if (vector == NMI_VECTOR)
122                 flat_send_IPI_mask(&cpu_online_map, vector);
123         else
124                 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);
125 }
126
127 static unsigned int get_apic_id(unsigned long x)
128 {
129         unsigned int id;
130
131         id = (((x)>>24) & 0xFFu);
132         return id;
133 }
134
135 static unsigned long set_apic_id(unsigned int id)
136 {
137         unsigned long x;
138
139         x = ((id & 0xFFu)<<24);
140         return x;
141 }
142
143 static unsigned int read_xapic_id(void)
144 {
145         unsigned int id;
146
147         id = get_apic_id(apic_read(APIC_ID));
148         return id;
149 }
150
151 static int flat_apic_id_registered(void)
152 {
153         return physid_isset(read_xapic_id(), phys_cpu_present_map);
154 }
155
156 static unsigned int flat_cpu_mask_to_apicid(const cpumask_t *cpumask)
157 {
158         return cpus_addr(*cpumask)[0] & APIC_ALL_CPUS;
159 }
160
161 static unsigned int flat_cpu_mask_to_apicid_and(const cpumask_t *cpumask,
162                                                 const cpumask_t *andmask)
163 {
164         unsigned long mask1 = cpus_addr(*cpumask)[0] & APIC_ALL_CPUS;
165         unsigned long mask2 = cpus_addr(*andmask)[0] & APIC_ALL_CPUS;
166
167         return (int)(mask1 & mask2);
168 }
169
170 static unsigned int phys_pkg_id(int index_msb)
171 {
172         return hard_smp_processor_id() >> index_msb;
173 }
174
175 struct genapic apic_flat =  {
176         .name = "flat",
177         .acpi_madt_oem_check = flat_acpi_madt_oem_check,
178         .int_delivery_mode = dest_LowestPrio,
179         .int_dest_mode = (APIC_DEST_LOGICAL != 0),
180         .target_cpus = flat_target_cpus,
181         .vector_allocation_domain = flat_vector_allocation_domain,
182         .apic_id_registered = flat_apic_id_registered,
183         .init_apic_ldr = flat_init_apic_ldr,
184         .send_IPI_all = flat_send_IPI_all,
185         .send_IPI_allbutself = flat_send_IPI_allbutself,
186         .send_IPI_mask = flat_send_IPI_mask,
187         .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
188         .send_IPI_self = apic_send_IPI_self,
189         .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
190         .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and,
191         .phys_pkg_id = phys_pkg_id,
192         .get_apic_id = get_apic_id,
193         .set_apic_id = set_apic_id,
194         .apic_id_mask = (0xFFu<<24),
195 };
196
197 /*
198  * Physflat mode is used when there are more than 8 CPUs on a AMD system.
199  * We cannot use logical delivery in this case because the mask
200  * overflows, so use physical mode.
201  */
202 static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
203 {
204 #ifdef CONFIG_ACPI
205         /*
206          * Quirk: some x86_64 machines can only use physical APIC mode
207          * regardless of how many processors are present (x86_64 ES7000
208          * is an example).
209          */
210         if (acpi_gbl_FADT.header.revision > FADT2_REVISION_ID &&
211                 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
212                 printk(KERN_DEBUG "system APIC only can use physical flat");
213                 return 1;
214         }
215 #endif
216
217         return 0;
218 }
219
220 static const cpumask_t *physflat_target_cpus(void)
221 {
222         return &cpu_online_map;
223 }
224
225 static void physflat_vector_allocation_domain(int cpu, cpumask_t *retmask)
226 {
227         cpus_clear(*retmask);
228         cpu_set(cpu, *retmask);
229 }
230
231 static void physflat_send_IPI_mask(const cpumask_t *cpumask, int vector)
232 {
233         send_IPI_mask_sequence(cpumask, vector);
234 }
235
236 static void physflat_send_IPI_mask_allbutself(const cpumask_t *cpumask,
237                                               int vector)
238 {
239         send_IPI_mask_allbutself(cpumask, vector);
240 }
241
242 static void physflat_send_IPI_allbutself(int vector)
243 {
244         send_IPI_mask_allbutself(&cpu_online_map, vector);
245 }
246
247 static void physflat_send_IPI_all(int vector)
248 {
249         physflat_send_IPI_mask(&cpu_online_map, vector);
250 }
251
252 static unsigned int physflat_cpu_mask_to_apicid(const cpumask_t *cpumask)
253 {
254         int cpu;
255
256         /*
257          * We're using fixed IRQ delivery, can only return one phys APIC ID.
258          * May as well be the first.
259          */
260         cpu = first_cpu(*cpumask);
261         if ((unsigned)cpu < nr_cpu_ids)
262                 return per_cpu(x86_cpu_to_apicid, cpu);
263         else
264                 return BAD_APICID;
265 }
266
267 static unsigned int physflat_cpu_mask_to_apicid_and(const cpumask_t *cpumask,
268                                                     const cpumask_t *andmask)
269 {
270         int cpu;
271
272         /*
273          * We're using fixed IRQ delivery, can only return one phys APIC ID.
274          * May as well be the first.
275          */
276         while ((cpu = next_cpu(-1, *cpumask)) < nr_cpu_ids)
277                 if (cpu_isset(cpu, *andmask))
278                         return per_cpu(x86_cpu_to_apicid, cpu);
279         return BAD_APICID;
280 }
281
282 struct genapic apic_physflat =  {
283         .name = "physical flat",
284         .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
285         .int_delivery_mode = dest_Fixed,
286         .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
287         .target_cpus = physflat_target_cpus,
288         .vector_allocation_domain = physflat_vector_allocation_domain,
289         .apic_id_registered = flat_apic_id_registered,
290         .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/
291         .send_IPI_all = physflat_send_IPI_all,
292         .send_IPI_allbutself = physflat_send_IPI_allbutself,
293         .send_IPI_mask = physflat_send_IPI_mask,
294         .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
295         .send_IPI_self = apic_send_IPI_self,
296         .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
297         .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
298         .phys_pkg_id = phys_pkg_id,
299         .get_apic_id = get_apic_id,
300         .set_apic_id = set_apic_id,
301         .apic_id_mask = (0xFFu<<24),
302 };