SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/x86/kernel/cpu/mcheck/mce_amd_64.c

   1 /*
   2  *  (c) 2005, 2006 Advanced Micro Devices, Inc.
   3  *  Your use of this code is subject to the terms and conditions of the
   4  *  GNU general public license version 2. See "COPYING" or
   5  *  http://www.gnu.org/licenses/gpl.html
   6  *
   7  *  Written by Jacob Shin - AMD, Inc.
   8  *
   9  *  Support : jacob.shin@amd.com
  10  *
  11  *  April 2006
  12  *     - added support for AMD Family 0x10 processors
  13  *
  14  *  All MC4_MISCi registers are shared between multi-cores
  15  */
  16
  17 #include <linux/cpu.h>
  18 #include <linux/errno.h>
  19 #include <linux/init.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/kobject.h>
  22 #include <linux/notifier.h>
  23 #include <linux/sched.h>
  24 #include <linux/smp.h>
  25 #include <linux/sysdev.h>
  26 #include <linux/sysfs.h>
  27 #include <asm/apic.h>
  28 #include <asm/mce.h>
  29 #include <asm/msr.h>
  30 #include <asm/percpu.h>
  31 #include <asm/idle.h>
  32
  33 #define PFX               "mce_threshold: "
  34 #define VERSION           "version 1.1.1"
  35 #define NR_BANKS          6
  36 #define NR_BLOCKS         9
  37 #define THRESHOLD_MAX     0xFFF
  38 #define INT_TYPE_APIC     0x00020000
  39 #define MASK_VALID_HI     0x80000000
  40 #define MASK_CNTP_HI      0x40000000
  41 #define MASK_LOCKED_HI    0x20000000
  42 #define MASK_LVTOFF_HI    0x00F00000
  43 #define MASK_COUNT_EN_HI  0x00080000
  44 #define MASK_INT_TYPE_HI  0x00060000
  45 #define MASK_OVERFLOW_HI  0x00010000
  46 #define MASK_ERR_COUNT_HI 0x00000FFF
  47 #define MASK_BLKPTR_LO    0xFF000000
  48 #define MCG_XBLK_ADDR     0xC0000400
  49
  50 struct threshold_block {
  51         unsigned int block;
  52         unsigned int bank;
  53         unsigned int cpu;
  54         u32 address;
  55         u16 interrupt_enable;
  56         u16 threshold_limit;
  57         struct kobject kobj;
  58         struct list_head miscj;
  59 };
  60
  61 /* defaults used early on boot */
  62 static struct threshold_block threshold_defaults = {
  63         .interrupt_enable = 0,
  64         .threshold_limit = THRESHOLD_MAX,
  65 };
  66
  67 struct threshold_bank {
  68         struct kobject *kobj;
  69         struct threshold_block *blocks;
  70         cpumask_var_t cpus;
  71 };
  72 static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
  73
  74 #ifdef CONFIG_SMP
  75 static unsigned char shared_bank[NR_BANKS] = {
  76         0, 0, 0, 0, 1
  77 };
  78 #endif
  79
  80 static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
  81
  82 static void amd_threshold_interrupt(void);
  83
  84 /*
  85  * CPU Initialization
  86  */
  87
  88 struct thresh_restart {
  89         struct threshold_block *b;
  90         int reset;
  91         u16 old_limit;
  92 };
  93
  94 /* must be called with correct cpu affinity */
  95 static long threshold_restart_bank(void *_tr)
  96 {
  97         struct thresh_restart *tr = _tr;
  98         u32 mci_misc_hi, mci_misc_lo;
  99
 100         rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
 101
 102         if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
 103                 tr->reset = 1;  /* limit cannot be lower than err count */
 104
 105         if (tr->reset) {                /* reset err count and overflow bit */
 106                 mci_misc_hi =
 107                     (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
 108                     (THRESHOLD_MAX - tr->b->threshold_limit);
 109         } else if (tr->old_limit) {     /* change limit w/o reset */
 110                 int new_count = (mci_misc_hi & THRESHOLD_MAX) +
 111                     (tr->old_limit - tr->b->threshold_limit);
 112                 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
 113                     (new_count & THRESHOLD_MAX);
 114         }
 115
 116         tr->b->interrupt_enable ?
 117             (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
 118             (mci_misc_hi &= ~MASK_INT_TYPE_HI);
 119
 120         mci_misc_hi |= MASK_COUNT_EN_HI;
 121         wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
 122         return 0;
 123 }
 124
 125 /* cpu init entry point, called from mce.c with preempt off */
 126 void mce_amd_feature_init(struct cpuinfo_x86 *c)
 127 {
 128         unsigned int bank, block;
 129         unsigned int cpu = smp_processor_id();
 130         u8 lvt_off;
 131         u32 low = 0, high = 0, address = 0;
 132         struct thresh_restart tr;
 133
 134         for (bank = 0; bank < NR_BANKS; ++bank) {
 135                 for (block = 0; block < NR_BLOCKS; ++block) {
 136                         if (block == 0)
 137                                 address = MSR_IA32_MC0_MISC + bank * 4;
 138                         else if (block == 1) {
 139                                 address = (low & MASK_BLKPTR_LO) >> 21;
 140                                 if (!address)
 141                                         break;
 142                                 address += MCG_XBLK_ADDR;
 143                         }
 144                         else
 145                                 ++address;
 146
 147                         if (rdmsr_safe(address, &low, &high))
 148                                 break;
 149
 150                         if (!(high & MASK_VALID_HI)) {
 151                                 if (block)
 152                                         continue;
 153                                 else
 154                                         break;
 155                         }
 156
 157                         if (!(high & MASK_CNTP_HI)  ||
 158                              (high & MASK_LOCKED_HI))
 159                                 continue;
 160
 161                         if (!block)
 162                                 per_cpu(bank_map, cpu) |= (1 << bank);
 163 #ifdef CONFIG_SMP
 164                         if (shared_bank[bank] && c->cpu_core_id)
 165                                 break;
 166 #endif
 167                         lvt_off = setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR,
 168                                                        APIC_EILVT_MSG_FIX, 0);
 169
 170                         high &= ~MASK_LVTOFF_HI;
 171                         high |= lvt_off << 20;
 172                         wrmsr(address, low, high);
 173
 174                         threshold_defaults.address = address;
 175                         tr.b = &threshold_defaults;
 176                         tr.reset = 0;
 177                         tr.old_limit = 0;
 178                         threshold_restart_bank(&tr);
 179
 180                         mce_threshold_vector = amd_threshold_interrupt;
 181                 }
 182         }
 183 }
 184
 185 /*
 186  * APIC Interrupt Handler
 187  */
 188
 189 /*
 190  * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
 191  * the interrupt goes off when error_count reaches threshold_limit.
 192  * the handler will simply log mcelog w/ software defined bank number.
 193  */
 194 static void amd_threshold_interrupt(void)
 195 {
 196         unsigned int bank, block;
 197         struct mce m;
 198         u32 low = 0, high = 0, address = 0;
 199
 200         mce_setup(&m);
 201
 202         /* assume first bank caused it */
 203         for (bank = 0; bank < NR_BANKS; ++bank) {
 204                 if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
 205                         continue;
 206                 for (block = 0; block < NR_BLOCKS; ++block) {
 207                         if (block == 0)
 208                                 address = MSR_IA32_MC0_MISC + bank * 4;
 209                         else if (block == 1) {
 210                                 address = (low & MASK_BLKPTR_LO) >> 21;
 211                                 if (!address)
 212                                         break;
 213                                 address += MCG_XBLK_ADDR;
 214                         }
 215                         else
 216                                 ++address;
 217
 218                         if (rdmsr_safe(address, &low, &high))
 219                                 break;
 220
 221                         if (!(high & MASK_VALID_HI)) {
 222                                 if (block)
 223                                         continue;
 224                                 else
 225                                         break;
 226                         }
 227
 228                         if (!(high & MASK_CNTP_HI)  ||
 229                              (high & MASK_LOCKED_HI))
 230                                 continue;
 231
 232                         /* Log the machine check that caused the threshold
 233                            event. */
 234                         machine_check_poll(MCP_TIMESTAMP,
 235                                         &__get_cpu_var(mce_poll_banks));
 236
 237                         if (high & MASK_OVERFLOW_HI) {
 238                                 rdmsrl(address, m.misc);
 239                                 rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
 240                                        m.status);
 241                                 m.bank = K8_MCE_THRESHOLD_BASE
 242                                        + bank * NR_BLOCKS
 243                                        + block;
 244                                 mce_log(&m);
 245                                 return;
 246                         }
 247                 }
 248         }
 249 }
 250
 251 /*
 252  * Sysfs Interface
 253  */
 254
 255 struct threshold_attr {
 256         struct attribute attr;
 257         ssize_t(*show) (struct threshold_block *, char *);
 258         ssize_t(*store) (struct threshold_block *, const char *, size_t count);
 259 };
 260
 261 #define SHOW_FIELDS(name)                                           \
 262 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
 263 {                                                                   \
 264         return sprintf(buf, "%lx\n", (unsigned long) b->name);      \
 265 }
 266 SHOW_FIELDS(interrupt_enable)
 267 SHOW_FIELDS(threshold_limit)
 268
 269 static ssize_t store_interrupt_enable(struct threshold_block *b,
 270                                       const char *buf, size_t count)
 271 {
 272         char *end;
 273         struct thresh_restart tr;
 274         unsigned long new = simple_strtoul(buf, &end, 0);
 275         if (end == buf)
 276                 return -EINVAL;
 277         b->interrupt_enable = !!new;
 278
 279         tr.b = b;
 280         tr.reset = 0;
 281         tr.old_limit = 0;
 282         work_on_cpu(b->cpu, threshold_restart_bank, &tr);
 283
 284         return end - buf;
 285 }
 286
 287 static ssize_t store_threshold_limit(struct threshold_block *b,
 288                                      const char *buf, size_t count)
 289 {
 290         char *end;
 291         struct thresh_restart tr;
 292         unsigned long new = simple_strtoul(buf, &end, 0);
 293         if (end == buf)
 294                 return -EINVAL;
 295         if (new > THRESHOLD_MAX)
 296                 new = THRESHOLD_MAX;
 297         if (new < 1)
 298                 new = 1;
 299         tr.old_limit = b->threshold_limit;
 300         b->threshold_limit = new;
 301         tr.b = b;
 302         tr.reset = 0;
 303
 304         work_on_cpu(b->cpu, threshold_restart_bank, &tr);
 305
 306         return end - buf;
 307 }
 308
 309 static long local_error_count(void *_b)
 310 {
 311         struct threshold_block *b = _b;
 312         u32 low, high;
 313
 314         rdmsr(b->address, low, high);
 315         return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
 316 }
 317
 318 static ssize_t show_error_count(struct threshold_block *b, char *buf)
 319 {
 320         return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
 321 }
 322
 323 static ssize_t store_error_count(struct threshold_block *b,
 324                                  const char *buf, size_t count)
 325 {
 326         struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
 327
 328         work_on_cpu(b->cpu, threshold_restart_bank, &tr);
 329         return 1;
 330 }
 331
 332 #define THRESHOLD_ATTR(_name,_mode,_show,_store) {            \
 333         .attr = {.name = __stringify(_name), .mode = _mode }, \
 334         .show = _show,                                        \
 335         .store = _store,                                      \
 336 };
 337
 338 #define RW_ATTR(name)                                           \
 339 static struct threshold_attr name =                             \
 340         THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
 341
 342 RW_ATTR(interrupt_enable);
 343 RW_ATTR(threshold_limit);
 344 RW_ATTR(error_count);
 345
 346 static struct attribute *default_attrs[] = {
 347         &interrupt_enable.attr,
 348         &threshold_limit.attr,
 349         &error_count.attr,
 350         NULL
 351 };
 352
 353 #define to_block(k) container_of(k, struct threshold_block, kobj)
 354 #define to_attr(a) container_of(a, struct threshold_attr, attr)
 355
 356 static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
 357 {
 358         struct threshold_block *b = to_block(kobj);
 359         struct threshold_attr *a = to_attr(attr);
 360         ssize_t ret;
 361         ret = a->show ? a->show(b, buf) : -EIO;
 362         return ret;
 363 }
 364
 365 static ssize_t store(struct kobject *kobj, struct attribute *attr,
 366                      const char *buf, size_t count)
 367 {
 368         struct threshold_block *b = to_block(kobj);
 369         struct threshold_attr *a = to_attr(attr);
 370         ssize_t ret;
 371         ret = a->store ? a->store(b, buf, count) : -EIO;
 372         return ret;
 373 }
 374
 375 static struct sysfs_ops threshold_ops = {
 376         .show = show,
 377         .store = store,
 378 };
 379
 380 static struct kobj_type threshold_ktype = {
 381         .sysfs_ops = &threshold_ops,
 382         .default_attrs = default_attrs,
 383 };
 384
 385 static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
 386                                                unsigned int bank,
 387                                                unsigned int block,
 388                                                u32 address)
 389 {
 390         int err;
 391         u32 low, high;
 392         struct threshold_block *b = NULL;
 393
 394         if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
 395                 return 0;
 396
 397         if (rdmsr_safe(address, &low, &high))
 398                 return 0;
 399
 400         if (!(high & MASK_VALID_HI)) {
 401                 if (block)
 402                         goto recurse;
 403                 else
 404                         return 0;
 405         }
 406
 407         if (!(high & MASK_CNTP_HI)  ||
 408              (high & MASK_LOCKED_HI))
 409                 goto recurse;
 410
 411         b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
 412         if (!b)
 413                 return -ENOMEM;
 414
 415         b->block = block;
 416         b->bank = bank;
 417         b->cpu = cpu;
 418         b->address = address;
 419         b->interrupt_enable = 0;
 420         b->threshold_limit = THRESHOLD_MAX;
 421
 422         INIT_LIST_HEAD(&b->miscj);
 423
 424         if (per_cpu(threshold_banks, cpu)[bank]->blocks)
 425                 list_add(&b->miscj,
 426                          &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
 427         else
 428                 per_cpu(threshold_banks, cpu)[bank]->blocks = b;
 429
 430         err = kobject_init_and_add(&b->kobj, &threshold_ktype,
 431                                    per_cpu(threshold_banks, cpu)[bank]->kobj,
 432                                    "misc%i", block);
 433         if (err)
 434                 goto out_free;
 435 recurse:
 436         if (!block) {
 437                 address = (low & MASK_BLKPTR_LO) >> 21;
 438                 if (!address)
 439                         return 0;
 440                 address += MCG_XBLK_ADDR;
 441         } else
 442                 ++address;
 443
 444         err = allocate_threshold_blocks(cpu, bank, ++block, address);
 445         if (err)
 446                 goto out_free;
 447
 448         if (b)
 449                 kobject_uevent(&b->kobj, KOBJ_ADD);
 450
 451         return err;
 452
 453 out_free:
 454         if (b) {
 455                 kobject_put(&b->kobj);
 456                 kfree(b);
 457         }
 458         return err;
 459 }
 460
 461 static __cpuinit long local_allocate_threshold_blocks(void *_bank)
 462 {
 463         unsigned int *bank = _bank;
 464
 465         return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
 466                                          MSR_IA32_MC0_MISC + *bank * 4);
 467 }
 468
 469 /* symlinks sibling shared banks to first core.  first core owns dir/files. */
 470 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 471 {
 472         int i, err = 0;
 473         struct threshold_bank *b = NULL;
 474         char name[32];
 475
 476         sprintf(name, "threshold_bank%i", bank);
 477
 478 #ifdef CONFIG_SMP
 479         if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) {   /* symlink */
 480                 i = cpumask_first(&per_cpu(cpu_core_map, cpu));
 481
 482                 /* first core not up yet */
 483                 if (cpu_data(i).cpu_core_id)
 484                         goto out;
 485
 486                 /* already linked */
 487                 if (per_cpu(threshold_banks, cpu)[bank])
 488                         goto out;
 489
 490                 b = per_cpu(threshold_banks, i)[bank];
 491
 492                 if (!b)
 493                         goto out;
 494
 495                 err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
 496                                         b->kobj, name);
 497                 if (err)
 498                         goto out;
 499
 500                 cpumask_copy(b->cpus, &per_cpu(cpu_core_map, cpu));
 501                 per_cpu(threshold_banks, cpu)[bank] = b;
 502                 goto out;
 503         }
 504 #endif
 505
 506         b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
 507         if (!b) {
 508                 err = -ENOMEM;
 509                 goto out;
 510         }
 511         if (!alloc_cpumask_var(&b->cpus, GFP_KERNEL)) {
 512                 kfree(b);
 513                 err = -ENOMEM;
 514                 goto out;
 515         }
 516
 517         b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
 518         if (!b->kobj)
 519                 goto out_free;
 520
 521 #ifndef CONFIG_SMP
 522         cpumask_setall(b->cpus);
 523 #else
 524         cpumask_copy(b->cpus, &per_cpu(cpu_core_map, cpu));
 525 #endif
 526
 527         per_cpu(threshold_banks, cpu)[bank] = b;
 528
 529         err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
 530         if (err)
 531                 goto out_free;
 532
 533         for_each_cpu(i, b->cpus) {
 534                 if (i == cpu)
 535                         continue;
 536
 537                 err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
 538                                         b->kobj, name);
 539                 if (err)
 540                         goto out;
 541
 542                 per_cpu(threshold_banks, i)[bank] = b;
 543         }
 544
 545         goto out;
 546
 547 out_free:
 548         per_cpu(threshold_banks, cpu)[bank] = NULL;
 549         free_cpumask_var(b->cpus);
 550         kfree(b);
 551 out:
 552         return err;
 553 }
 554
 555 /* create dir/files for all valid threshold banks */
 556 static __cpuinit int threshold_create_device(unsigned int cpu)
 557 {
 558         unsigned int bank;
 559         int err = 0;
 560
 561         for (bank = 0; bank < NR_BANKS; ++bank) {
 562                 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
 563                         continue;
 564                 err = threshold_create_bank(cpu, bank);
 565                 if (err)
 566                         goto out;
 567         }
 568 out:
 569         return err;
 570 }
 571
 572 /*
 573  * let's be hotplug friendly.
 574  * in case of multiple core processors, the first core always takes ownership
 575  *   of shared sysfs dir/files, and rest of the cores will be symlinked to it.
 576  */
 577
 578 static void deallocate_threshold_block(unsigned int cpu,
 579                                                  unsigned int bank)
 580 {
 581         struct threshold_block *pos = NULL;
 582         struct threshold_block *tmp = NULL;
 583         struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
 584
 585         if (!head)
 586                 return;
 587
 588         list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
 589                 kobject_put(&pos->kobj);
 590                 list_del(&pos->miscj);
 591                 kfree(pos);
 592         }
 593
 594         kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
 595         per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
 596 }
 597
 598 static void threshold_remove_bank(unsigned int cpu, int bank)
 599 {
 600         int i = 0;
 601         struct threshold_bank *b;
 602         char name[32];
 603
 604         b = per_cpu(threshold_banks, cpu)[bank];
 605
 606         if (!b)
 607                 return;
 608
 609         if (!b->blocks)
 610                 goto free_out;
 611
 612         sprintf(name, "threshold_bank%i", bank);
 613
 614 #ifdef CONFIG_SMP
 615         /* sibling symlink */
 616         if (shared_bank[bank] && b->blocks->cpu != cpu) {
 617                 sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
 618                 per_cpu(threshold_banks, cpu)[bank] = NULL;
 619                 return;
 620         }
 621 #endif
 622
 623         /* remove all sibling symlinks before unregistering */
 624         for_each_cpu(i, b->cpus) {
 625                 if (i == cpu)
 626                         continue;
 627
 628                 sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
 629                 per_cpu(threshold_banks, i)[bank] = NULL;
 630         }
 631
 632         deallocate_threshold_block(cpu, bank);
 633
 634 free_out:
 635         kobject_del(b->kobj);
 636         kobject_put(b->kobj);
 637         free_cpumask_var(b->cpus);
 638         kfree(b);
 639         per_cpu(threshold_banks, cpu)[bank] = NULL;
 640 }
 641
 642 static void threshold_remove_device(unsigned int cpu)
 643 {
 644         unsigned int bank;
 645
 646         for (bank = 0; bank < NR_BANKS; ++bank) {
 647                 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
 648                         continue;
 649                 threshold_remove_bank(cpu, bank);
 650         }
 651 }
 652
 653 /* get notified when a cpu comes on/off */
 654 static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
 655                                                      unsigned int cpu)
 656 {
 657         if (cpu >= NR_CPUS)
 658                 return;
 659
 660         switch (action) {
 661         case CPU_ONLINE:
 662         case CPU_ONLINE_FROZEN:
 663                 threshold_create_device(cpu);
 664                 break;
 665         case CPU_DEAD:
 666         case CPU_DEAD_FROZEN:
 667                 threshold_remove_device(cpu);
 668                 break;
 669         default:
 670                 break;
 671         }
 672 }
 673
 674 static __init int threshold_init_device(void)
 675 {
 676         unsigned lcpu = 0;
 677
 678         /* to hit CPUs online before the notifier is up */
 679         for_each_online_cpu(lcpu) {
 680                 int err = threshold_create_device(lcpu);
 681                 if (err)
 682                         return err;
 683         }
 684         threshold_cpu_callback = amd_64_threshold_cpu_callback;
 685         return 0;
 686 }
 687
 688 device_initcall(threshold_init_device);