1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
7 #include <asm/pgtable_types.h>
10 #include <asm/paravirt_types.h>
13 #include <linux/types.h>
14 #include <linux/cpumask.h>
16 static inline int paravirt_enabled(void)
18 return pv_info.paravirt_enabled;
21 static inline void load_sp0(struct tss_struct *tss,
22 struct thread_struct *thread)
24 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
27 static inline unsigned long get_wallclock(void)
29 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
32 static inline int set_wallclock(unsigned long nowtime)
34 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
37 /* The paravirtualized CPUID instruction. */
38 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
39 unsigned int *ecx, unsigned int *edx)
41 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
45 * These special macros can be used to get or set a debugging register
47 static inline unsigned long paravirt_get_debugreg(int reg)
49 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
51 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
52 static inline void set_debugreg(unsigned long val, int reg)
54 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
57 static inline void clts(void)
59 PVOP_VCALL0(pv_cpu_ops.clts);
62 static inline unsigned long read_cr0(void)
64 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
67 static inline void write_cr0(unsigned long x)
69 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
72 static inline unsigned long read_cr2(void)
74 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
77 static inline void write_cr2(unsigned long x)
79 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
82 static inline unsigned long read_cr3(void)
84 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
87 static inline void write_cr3(unsigned long x)
89 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
92 static inline unsigned long read_cr4(void)
94 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
96 static inline unsigned long read_cr4_safe(void)
98 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
101 static inline void write_cr4(unsigned long x)
103 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
107 static inline unsigned long read_cr8(void)
109 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
112 static inline void write_cr8(unsigned long x)
114 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
118 static inline void raw_safe_halt(void)
120 PVOP_VCALL0(pv_irq_ops.safe_halt);
123 static inline void halt(void)
125 PVOP_VCALL0(pv_irq_ops.safe_halt);
128 static inline void wbinvd(void)
130 PVOP_VCALL0(pv_cpu_ops.wbinvd);
133 #define get_kernel_rpl() (pv_info.kernel_rpl)
135 static inline u64 paravirt_read_msr(unsigned msr, int *err)
137 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
139 static inline u64 paravirt_read_msr_amd(unsigned msr, int *err)
141 return PVOP_CALL2(u64, pv_cpu_ops.read_msr_amd, msr, err);
143 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
145 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
148 /* These should all do BUG_ON(_err), but our headers are too tangled. */
149 #define rdmsr(msr, val1, val2) \
152 u64 _l = paravirt_read_msr(msr, &_err); \
157 #define wrmsr(msr, val1, val2) \
159 paravirt_write_msr(msr, val1, val2); \
162 #define rdmsrl(msr, val) \
165 val = paravirt_read_msr(msr, &_err); \
168 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
169 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
171 /* rdmsr with exception handling */
172 #define rdmsr_safe(msr, a, b) \
175 u64 _l = paravirt_read_msr(msr, &_err); \
181 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
185 *p = paravirt_read_msr(msr, &err);
188 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
192 *p = paravirt_read_msr_amd(msr, &err);
196 static inline u64 paravirt_read_tsc(void)
198 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
201 #define rdtscl(low) \
203 u64 _l = paravirt_read_tsc(); \
207 #define rdtscll(val) (val = paravirt_read_tsc())
209 static inline unsigned long long paravirt_sched_clock(void)
211 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
214 static inline unsigned long long paravirt_read_pmc(int counter)
216 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
219 #define rdpmc(counter, low, high) \
221 u64 _l = paravirt_read_pmc(counter); \
226 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
228 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
231 #define rdtscp(low, high, aux) \
234 unsigned long __val = paravirt_rdtscp(&__aux); \
235 (low) = (u32)__val; \
236 (high) = (u32)(__val >> 32); \
240 #define rdtscpll(val, aux) \
242 unsigned long __aux; \
243 val = paravirt_rdtscp(&__aux); \
247 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
249 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
252 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
254 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
257 static inline void load_TR_desc(void)
259 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
261 static inline void load_gdt(const struct desc_ptr *dtr)
263 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
265 static inline void load_idt(const struct desc_ptr *dtr)
267 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
269 static inline void set_ldt(const void *addr, unsigned entries)
271 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
273 static inline void store_gdt(struct desc_ptr *dtr)
275 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
277 static inline void store_idt(struct desc_ptr *dtr)
279 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
281 static inline unsigned long paravirt_store_tr(void)
283 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
285 #define store_tr(tr) ((tr) = paravirt_store_tr())
286 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
288 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
292 static inline void load_gs_index(unsigned int gs)
294 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
298 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
301 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
304 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
305 void *desc, int type)
307 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
310 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
312 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
314 static inline void set_iopl_mask(unsigned mask)
316 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
319 /* The paravirtualized I/O functions */
320 static inline void slow_down_io(void)
322 pv_cpu_ops.io_delay();
323 #ifdef REALLY_SLOW_IO
324 pv_cpu_ops.io_delay();
325 pv_cpu_ops.io_delay();
326 pv_cpu_ops.io_delay();
331 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
332 unsigned long start_esp)
334 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
335 phys_apicid, start_eip, start_esp);
339 static inline void paravirt_activate_mm(struct mm_struct *prev,
340 struct mm_struct *next)
342 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
345 static inline void arch_dup_mmap(struct mm_struct *oldmm,
346 struct mm_struct *mm)
348 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
351 static inline void arch_exit_mmap(struct mm_struct *mm)
353 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
356 static inline void __flush_tlb(void)
358 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
360 static inline void __flush_tlb_global(void)
362 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
364 static inline void __flush_tlb_single(unsigned long addr)
366 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
369 static inline void flush_tlb_others(const struct cpumask *cpumask,
370 struct mm_struct *mm,
373 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
376 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
378 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
381 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
383 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
386 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
388 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
390 static inline void paravirt_release_pte(unsigned long pfn)
392 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
395 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
397 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
400 static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
401 unsigned long start, unsigned long count)
403 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
405 static inline void paravirt_release_pmd(unsigned long pfn)
407 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
410 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
412 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
414 static inline void paravirt_release_pud(unsigned long pfn)
416 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
419 #ifdef CONFIG_HIGHPTE
420 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
423 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
428 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
431 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
434 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
437 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
440 static inline pte_t __pte(pteval_t val)
444 if (sizeof(pteval_t) > sizeof(long))
445 ret = PVOP_CALLEE2(pteval_t,
447 val, (u64)val >> 32);
449 ret = PVOP_CALLEE1(pteval_t,
453 return (pte_t) { .pte = ret };
456 static inline pteval_t pte_val(pte_t pte)
460 if (sizeof(pteval_t) > sizeof(long))
461 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
462 pte.pte, (u64)pte.pte >> 32);
464 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
470 static inline pgd_t __pgd(pgdval_t val)
474 if (sizeof(pgdval_t) > sizeof(long))
475 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
476 val, (u64)val >> 32);
478 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
481 return (pgd_t) { ret };
484 static inline pgdval_t pgd_val(pgd_t pgd)
488 if (sizeof(pgdval_t) > sizeof(long))
489 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
490 pgd.pgd, (u64)pgd.pgd >> 32);
492 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
498 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
499 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
504 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
507 return (pte_t) { .pte = ret };
510 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
511 pte_t *ptep, pte_t pte)
513 if (sizeof(pteval_t) > sizeof(long))
515 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
517 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
518 mm, addr, ptep, pte.pte);
521 static inline void set_pte(pte_t *ptep, pte_t pte)
523 if (sizeof(pteval_t) > sizeof(long))
524 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
525 pte.pte, (u64)pte.pte >> 32);
527 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
531 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
532 pte_t *ptep, pte_t pte)
534 if (sizeof(pteval_t) > sizeof(long))
536 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
538 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
541 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
543 pmdval_t val = native_pmd_val(pmd);
545 if (sizeof(pmdval_t) > sizeof(long))
546 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
548 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
551 #if PAGETABLE_LEVELS >= 3
552 static inline pmd_t __pmd(pmdval_t val)
556 if (sizeof(pmdval_t) > sizeof(long))
557 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
558 val, (u64)val >> 32);
560 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
563 return (pmd_t) { ret };
566 static inline pmdval_t pmd_val(pmd_t pmd)
570 if (sizeof(pmdval_t) > sizeof(long))
571 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
572 pmd.pmd, (u64)pmd.pmd >> 32);
574 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
580 static inline void set_pud(pud_t *pudp, pud_t pud)
582 pudval_t val = native_pud_val(pud);
584 if (sizeof(pudval_t) > sizeof(long))
585 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
586 val, (u64)val >> 32);
588 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
591 #if PAGETABLE_LEVELS == 4
592 static inline pud_t __pud(pudval_t val)
596 if (sizeof(pudval_t) > sizeof(long))
597 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
598 val, (u64)val >> 32);
600 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
603 return (pud_t) { ret };
606 static inline pudval_t pud_val(pud_t pud)
610 if (sizeof(pudval_t) > sizeof(long))
611 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
612 pud.pud, (u64)pud.pud >> 32);
614 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
620 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
622 pgdval_t val = native_pgd_val(pgd);
624 if (sizeof(pgdval_t) > sizeof(long))
625 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
626 val, (u64)val >> 32);
628 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
632 static inline void pgd_clear(pgd_t *pgdp)
634 set_pgd(pgdp, __pgd(0));
637 static inline void pud_clear(pud_t *pudp)
639 set_pud(pudp, __pud(0));
642 #endif /* PAGETABLE_LEVELS == 4 */
644 #endif /* PAGETABLE_LEVELS >= 3 */
646 #ifdef CONFIG_X86_PAE
647 /* Special-case pte-setting operations for PAE, which can't update a
648 64-bit pte atomically */
649 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
651 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
652 pte.pte, pte.pte >> 32);
655 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
658 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
661 static inline void pmd_clear(pmd_t *pmdp)
663 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
665 #else /* !CONFIG_X86_PAE */
666 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
671 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
674 set_pte_at(mm, addr, ptep, __pte(0));
677 static inline void pmd_clear(pmd_t *pmdp)
679 set_pmd(pmdp, __pmd(0));
681 #endif /* CONFIG_X86_PAE */
683 #define __HAVE_ARCH_START_CONTEXT_SWITCH
684 static inline void arch_start_context_switch(struct task_struct *prev)
686 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
689 static inline void arch_end_context_switch(struct task_struct *next)
691 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
694 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
695 static inline void arch_enter_lazy_mmu_mode(void)
697 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
700 static inline void arch_leave_lazy_mmu_mode(void)
702 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
705 void arch_flush_lazy_mmu_mode(void);
707 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
708 phys_addr_t phys, pgprot_t flags)
710 pv_mmu_ops.set_fixmap(idx, phys, flags);
713 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
715 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
717 return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
720 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
722 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
724 #define __raw_spin_is_contended __raw_spin_is_contended
726 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
728 PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
731 static __always_inline void __raw_spin_lock_flags(struct raw_spinlock *lock,
734 PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
737 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
739 return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
742 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
744 PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
750 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
751 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
753 /* save and restore all caller-save registers, except return value */
754 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
755 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
757 #define PV_FLAGS_ARG "0"
758 #define PV_EXTRA_CLOBBERS
759 #define PV_VEXTRA_CLOBBERS
761 /* save and restore all caller-save registers, except return value */
762 #define PV_SAVE_ALL_CALLER_REGS \
771 #define PV_RESTORE_ALL_CALLER_REGS \
781 /* We save some registers, but all of them, that's too much. We clobber all
782 * caller saved registers but the argument parameter */
783 #define PV_SAVE_REGS "pushq %%rdi;"
784 #define PV_RESTORE_REGS "popq %%rdi;"
785 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
786 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
787 #define PV_FLAGS_ARG "D"
791 * Generate a thunk around a function which saves all caller-save
792 * registers except for the return value. This allows C functions to
793 * be called from assembler code where fewer than normal registers are
794 * available. It may also help code generation around calls from C
795 * code if the common case doesn't use many registers.
797 * When a callee is wrapped in a thunk, the caller can assume that all
798 * arg regs and all scratch registers are preserved across the
799 * call. The return value in rax/eax will not be saved, even for void
802 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
803 extern typeof(func) __raw_callee_save_##func; \
804 static void *__##func##__ __used = func; \
806 asm(".pushsection .text;" \
807 "__raw_callee_save_" #func ": " \
808 PV_SAVE_ALL_CALLER_REGS \
810 PV_RESTORE_ALL_CALLER_REGS \
814 /* Get a reference to a callee-save function */
815 #define PV_CALLEE_SAVE(func) \
816 ((struct paravirt_callee_save) { __raw_callee_save_##func })
818 /* Promise that "func" already uses the right calling convention */
819 #define __PV_IS_CALLEE_SAVE(func) \
820 ((struct paravirt_callee_save) { func })
822 static inline unsigned long __raw_local_save_flags(void)
826 asm volatile(paravirt_alt(PARAVIRT_CALL)
828 : paravirt_type(pv_irq_ops.save_fl),
829 paravirt_clobber(CLBR_EAX)
834 static inline void raw_local_irq_restore(unsigned long f)
836 asm volatile(paravirt_alt(PARAVIRT_CALL)
839 paravirt_type(pv_irq_ops.restore_fl),
840 paravirt_clobber(CLBR_EAX)
844 static inline void raw_local_irq_disable(void)
846 asm volatile(paravirt_alt(PARAVIRT_CALL)
848 : paravirt_type(pv_irq_ops.irq_disable),
849 paravirt_clobber(CLBR_EAX)
850 : "memory", "eax", "cc");
853 static inline void raw_local_irq_enable(void)
855 asm volatile(paravirt_alt(PARAVIRT_CALL)
857 : paravirt_type(pv_irq_ops.irq_enable),
858 paravirt_clobber(CLBR_EAX)
859 : "memory", "eax", "cc");
862 static inline unsigned long __raw_local_irq_save(void)
866 f = __raw_local_save_flags();
867 raw_local_irq_disable();
872 /* Make sure as little as possible of this mess escapes. */
887 extern void default_banner(void);
889 #else /* __ASSEMBLY__ */
891 #define _PVSITE(ptype, clobbers, ops, word, algn) \
895 .pushsection .parainstructions,"a"; \
904 #define COND_PUSH(set, mask, reg) \
905 .if ((~(set)) & mask); push %reg; .endif
906 #define COND_POP(set, mask, reg) \
907 .if ((~(set)) & mask); pop %reg; .endif
911 #define PV_SAVE_REGS(set) \
912 COND_PUSH(set, CLBR_RAX, rax); \
913 COND_PUSH(set, CLBR_RCX, rcx); \
914 COND_PUSH(set, CLBR_RDX, rdx); \
915 COND_PUSH(set, CLBR_RSI, rsi); \
916 COND_PUSH(set, CLBR_RDI, rdi); \
917 COND_PUSH(set, CLBR_R8, r8); \
918 COND_PUSH(set, CLBR_R9, r9); \
919 COND_PUSH(set, CLBR_R10, r10); \
920 COND_PUSH(set, CLBR_R11, r11)
921 #define PV_RESTORE_REGS(set) \
922 COND_POP(set, CLBR_R11, r11); \
923 COND_POP(set, CLBR_R10, r10); \
924 COND_POP(set, CLBR_R9, r9); \
925 COND_POP(set, CLBR_R8, r8); \
926 COND_POP(set, CLBR_RDI, rdi); \
927 COND_POP(set, CLBR_RSI, rsi); \
928 COND_POP(set, CLBR_RDX, rdx); \
929 COND_POP(set, CLBR_RCX, rcx); \
930 COND_POP(set, CLBR_RAX, rax)
932 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
933 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
934 #define PARA_INDIRECT(addr) *addr(%rip)
936 #define PV_SAVE_REGS(set) \
937 COND_PUSH(set, CLBR_EAX, eax); \
938 COND_PUSH(set, CLBR_EDI, edi); \
939 COND_PUSH(set, CLBR_ECX, ecx); \
940 COND_PUSH(set, CLBR_EDX, edx)
941 #define PV_RESTORE_REGS(set) \
942 COND_POP(set, CLBR_EDX, edx); \
943 COND_POP(set, CLBR_ECX, ecx); \
944 COND_POP(set, CLBR_EDI, edi); \
945 COND_POP(set, CLBR_EAX, eax)
947 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
948 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
949 #define PARA_INDIRECT(addr) *%cs:addr
952 #define INTERRUPT_RETURN \
953 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
954 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
956 #define DISABLE_INTERRUPTS(clobbers) \
957 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
958 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
959 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
960 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
962 #define ENABLE_INTERRUPTS(clobbers) \
963 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
964 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
965 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
966 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
968 #define USERGS_SYSRET32 \
969 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
971 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
974 #define GET_CR0_INTO_EAX \
975 push %ecx; push %edx; \
976 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
979 #define ENABLE_INTERRUPTS_SYSEXIT \
980 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
982 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
985 #else /* !CONFIG_X86_32 */
988 * If swapgs is used while the userspace stack is still current,
989 * there's no way to call a pvop. The PV replacement *must* be
990 * inlined, or the swapgs instruction must be trapped and emulated.
992 #define SWAPGS_UNSAFE_STACK \
993 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
997 * Note: swapgs is very special, and in practise is either going to be
998 * implemented with a single "swapgs" instruction or something very
999 * special. Either way, we don't need to save any registers for
1003 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1004 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
1007 #define GET_CR2_INTO_RCX \
1008 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1012 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1013 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1015 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1017 #define USERGS_SYSRET64 \
1018 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1020 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1022 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1023 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1025 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1026 #endif /* CONFIG_X86_32 */
1028 #endif /* __ASSEMBLY__ */
1029 #else /* CONFIG_PARAVIRT */
1030 # define default_banner x86_init_noop
1031 #endif /* !CONFIG_PARAVIRT */
1032 #endif /* _ASM_X86_PARAVIRT_H */