4 #include <asm/msr-index.h>
9 #include <linux/types.h>
11 #include <asm/errno.h>
12 #include <asm/cpumask.h>
24 static inline unsigned long long native_read_tscp(unsigned int *aux)
26 unsigned long low, high;
27 asm volatile(".byte 0x0f,0x01,0xf9"
28 : "=a" (low), "=d" (high), "=c" (*aux));
29 return low | ((u64)high << 32);
33 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
34 * constraint has different meanings. For i386, "A" means exactly
35 * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
36 * it means rax *or* rdx.
39 #define DECLARE_ARGS(val, low, high) unsigned low, high
40 #define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
41 #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
42 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
44 #define DECLARE_ARGS(val, low, high) unsigned long long val
45 #define EAX_EDX_VAL(val, low, high) (val)
46 #define EAX_EDX_ARGS(val, low, high) "A" (val)
47 #define EAX_EDX_RET(val, low, high) "=A" (val)
50 static inline unsigned long long native_read_msr(unsigned int msr)
52 DECLARE_ARGS(val, low, high);
54 asm volatile("rdmsr" : EAX_EDX_RET(val, low, high) : "c" (msr));
55 return EAX_EDX_VAL(val, low, high);
58 static inline unsigned long long native_read_msr_safe(unsigned int msr,
61 DECLARE_ARGS(val, low, high);
63 asm volatile("2: rdmsr ; xor %[err],%[err]\n"
65 ".section .fixup,\"ax\"\n\t"
66 "3: mov %[fault],%[err] ; jmp 1b\n\t"
69 : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
70 : "c" (msr), [fault] "i" (-EIO));
71 return EAX_EDX_VAL(val, low, high);
74 static inline void native_write_msr(unsigned int msr,
75 unsigned low, unsigned high)
77 asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory");
80 /* Can be uninlined because referenced by paravirt */
81 notrace static inline int native_write_msr_safe(unsigned int msr,
82 unsigned low, unsigned high)
85 asm volatile("2: wrmsr ; xor %[err],%[err]\n"
87 ".section .fixup,\"ax\"\n\t"
88 "3: mov %[fault],%[err] ; jmp 1b\n\t"
92 : "c" (msr), "0" (low), "d" (high),
98 extern unsigned long long native_read_tsc(void);
100 extern int native_rdmsr_safe_regs(u32 regs[8]);
101 extern int native_wrmsr_safe_regs(u32 regs[8]);
103 static __always_inline unsigned long long __native_read_tsc(void)
105 DECLARE_ARGS(val, low, high);
107 asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
109 return EAX_EDX_VAL(val, low, high);
112 static inline unsigned long long native_read_pmc(int counter)
114 DECLARE_ARGS(val, low, high);
116 asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
117 return EAX_EDX_VAL(val, low, high);
120 #ifdef CONFIG_PARAVIRT
121 #include <asm/paravirt.h>
123 #include <linux/errno.h>
125 * Access to machine-specific registers (available on 586 and better only)
126 * Note: the rd* operations modify the parameters directly (without using
127 * pointer indirection), this allows gcc to optimize better
130 #define rdmsr(msr, val1, val2) \
132 u64 __val = native_read_msr((msr)); \
133 (val1) = (u32)__val; \
134 (val2) = (u32)(__val >> 32); \
137 static inline void wrmsr(unsigned msr, unsigned low, unsigned high)
139 native_write_msr(msr, low, high);
142 #define rdmsrl(msr, val) \
143 ((val) = native_read_msr((msr)))
145 #define wrmsrl(msr, val) \
146 native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32))
148 /* wrmsr with exception handling */
149 static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
151 return native_write_msr_safe(msr, low, high);
154 /* rdmsr with exception handling */
155 #define rdmsr_safe(msr, p1, p2) \
158 u64 __val = native_read_msr_safe((msr), &__err); \
159 (*p1) = (u32)__val; \
160 (*p2) = (u32)(__val >> 32); \
164 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
168 *p = native_read_msr_safe(msr, &err);
172 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
178 gprs[7] = 0x9c5a203a;
180 err = native_rdmsr_safe_regs(gprs);
182 *p = gprs[0] | ((u64)gprs[2] << 32);
187 static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
194 gprs[7] = 0x9c5a203a;
196 return native_wrmsr_safe_regs(gprs);
199 static inline int rdmsr_safe_regs(u32 regs[8])
201 return native_rdmsr_safe_regs(regs);
204 static inline int wrmsr_safe_regs(u32 regs[8])
206 return native_wrmsr_safe_regs(regs);
209 #define rdtscl(low) \
210 ((low) = (u32)__native_read_tsc())
212 #define rdtscll(val) \
213 ((val) = __native_read_tsc())
215 #define rdpmc(counter, low, high) \
217 u64 _l = native_read_pmc((counter)); \
219 (high) = (u32)(_l >> 32); \
222 #define rdtscp(low, high, aux) \
224 unsigned long long _val = native_read_tscp(&(aux)); \
226 (high) = (u32)(_val >> 32); \
229 #define rdtscpll(val, aux) (val) = native_read_tscp(&(aux))
231 #endif /* !CONFIG_PARAVIRT */
234 #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \
237 #define write_tsc(val1, val2) wrmsr(0x10, (val1), (val2))
239 #define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0)
242 int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
243 int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
244 void rdmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);
245 void wrmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);
246 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
247 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
248 int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
249 int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
250 #else /* CONFIG_SMP */
251 static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
253 rdmsr(msr_no, *l, *h);
256 static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
261 static inline void rdmsr_on_cpus(const cpumask_t *m, u32 msr_no,
264 rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h));
266 static inline void wrmsr_on_cpus(const cpumask_t *m, u32 msr_no,
269 wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h);
271 static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
274 return rdmsr_safe(msr_no, l, h);
276 static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
278 return wrmsr_safe(msr_no, l, h);
280 static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
282 return rdmsr_safe_regs(regs);
284 static inline int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
286 return wrmsr_safe_regs(regs);
288 #endif /* CONFIG_SMP */
289 #endif /* __ASSEMBLY__ */
290 #endif /* __KERNEL__ */
291 #endif /* _ASM_X86_MSR_H */