5 * KVM x86 specific structures and definitions
9 #include <linux/types.h>
10 #include <linux/ioctl.h>
12 /* Select x86 specific features in <linux/kvm.h> */
13 #define __KVM_HAVE_PIT
14 #define __KVM_HAVE_IOAPIC
15 #define __KVM_HAVE_DEVICE_ASSIGNMENT
16 #define __KVM_HAVE_MSI
17 #define __KVM_HAVE_USER_NMI
18 #define __KVM_HAVE_GUEST_DEBUG
19 #define __KVM_HAVE_MSIX
20 #define __KVM_HAVE_MCE
22 /* Architectural interrupt line count. */
23 #define KVM_NR_INTERRUPTS 256
25 struct kvm_memory_alias {
26 __u32 slot; /* this has a different namespace than memory slots */
28 __u64 guest_phys_addr;
30 __u64 target_phys_addr;
33 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
34 struct kvm_pic_state {
35 __u8 last_irr; /* edge detection */
36 __u8 irr; /* interrupt request register */
37 __u8 imr; /* interrupt mask register */
38 __u8 isr; /* interrupt service register */
39 __u8 priority_add; /* highest irq priority */
46 __u8 rotate_on_auto_eoi;
47 __u8 special_fully_nested_mode;
48 __u8 init4; /* true if 4 byte init */
49 __u8 elcr; /* PIIX edge/trigger selection */
53 #define KVM_IOAPIC_NUM_PINS 24
54 struct kvm_ioapic_state {
66 __u8 delivery_status:1;
75 } redirtbl[KVM_IOAPIC_NUM_PINS];
78 #define KVM_IRQCHIP_PIC_MASTER 0
79 #define KVM_IRQCHIP_PIC_SLAVE 1
80 #define KVM_IRQCHIP_IOAPIC 2
82 /* for KVM_GET_REGS and KVM_SET_REGS */
84 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
85 __u64 rax, rbx, rcx, rdx;
86 __u64 rsi, rdi, rsp, rbp;
87 __u64 r8, r9, r10, r11;
88 __u64 r12, r13, r14, r15;
92 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
93 #define KVM_APIC_REG_SIZE 0x400
94 struct kvm_lapic_state {
95 char regs[KVM_APIC_REG_SIZE];
103 __u8 present, dpl, db, s, l, g, avl;
115 /* for KVM_GET_SREGS and KVM_SET_SREGS */
117 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
118 struct kvm_segment cs, ds, es, fs, gs, ss;
119 struct kvm_segment tr, ldt;
120 struct kvm_dtable gdt, idt;
121 __u64 cr0, cr2, cr3, cr4, cr8;
124 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
127 /* for KVM_GET_FPU and KVM_SET_FPU */
132 __u8 ftwx; /* in fxsave format */
142 struct kvm_msr_entry {
148 /* for KVM_GET_MSRS and KVM_SET_MSRS */
150 __u32 nmsrs; /* number of msrs in entries */
153 struct kvm_msr_entry entries[0];
156 /* for KVM_GET_MSR_INDEX_LIST */
157 struct kvm_msr_list {
158 __u32 nmsrs; /* number of msrs in entries */
163 struct kvm_cpuid_entry {
172 /* for KVM_SET_CPUID */
176 struct kvm_cpuid_entry entries[0];
179 struct kvm_cpuid_entry2 {
190 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1
191 #define KVM_CPUID_FLAG_STATEFUL_FUNC 2
192 #define KVM_CPUID_FLAG_STATE_READ_NEXT 4
194 /* for KVM_SET_CPUID2 */
198 struct kvm_cpuid_entry2 entries[0];
201 /* for KVM_GET_PIT and KVM_SET_PIT */
202 struct kvm_pit_channel_state {
203 __u32 count; /* can be 65536 */
215 __s64 count_load_time;
218 struct kvm_debug_exit_arch {
226 #define KVM_GUESTDBG_USE_SW_BP 0x00010000
227 #define KVM_GUESTDBG_USE_HW_BP 0x00020000
228 #define KVM_GUESTDBG_INJECT_DB 0x00040000
229 #define KVM_GUESTDBG_INJECT_BP 0x00080000
231 /* for KVM_SET_GUEST_DEBUG */
232 struct kvm_guest_debug_arch {
236 struct kvm_pit_state {
237 struct kvm_pit_channel_state channels[3];
240 struct kvm_reinject_control {
244 #endif /* _ASM_X86_KVM_H */