4 #ifdef CONFIG_X86_LOCAL_APIC
7 * Copyright 2004 James Cleverdon, IBM.
8 * Subject to the GNU Public License, v.2
10 * Generic APIC InterProcessor Interrupt code.
12 * Moved to include file by James Cleverdon from
13 * arch/x86-64/kernel/smp.c
15 * Copyrights from kernel/smp.c:
17 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
18 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
19 * (c) 2002,2003 Andi Kleen, SuSE Labs.
20 * Subject to the GNU Public License, v.2
23 #include <asm/hw_irq.h>
28 * the following functions deal with sending IPIs between CPUs.
30 * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
33 static inline unsigned int __prepare_ICR(unsigned int shortcut, int vector,
36 unsigned int icr = shortcut | dest;
40 icr |= APIC_DM_FIXED | vector;
49 static inline int __prepare_ICR2(unsigned int mask)
51 return SET_APIC_DEST_FIELD(mask);
54 static inline void __xapic_wait_icr_idle(void)
56 while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
61 __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest)
64 * Subtle. In the case of the 'never do double writes' workaround
65 * we have to lock out interrupts to be safe. As we don't care
66 * of the value read we use an atomic rmw access to avoid costly
67 * cli/sti. Otherwise we use an even cheaper single atomic write
75 __xapic_wait_icr_idle();
78 * No need to touch the target chip field
80 cfg = __prepare_ICR(shortcut, vector, dest);
83 * Send the IPI. The write to APIC_ICR fires this off.
85 native_apic_mem_write(APIC_ICR, cfg);
89 * This is used to send an IPI with no shorthand notation (the destination is
90 * specified in bits 56 to 63 of the ICR).
93 __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
100 if (unlikely(vector == NMI_VECTOR))
101 safe_apic_wait_icr_idle();
103 __xapic_wait_icr_idle();
106 * prepare target chip field
108 cfg = __prepare_ICR2(mask);
109 native_apic_mem_write(APIC_ICR2, cfg);
114 cfg = __prepare_ICR(0, vector, dest);
117 * Send the IPI. The write to APIC_ICR fires this off.
119 native_apic_mem_write(APIC_ICR, cfg);
123 default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector)
125 unsigned long query_cpu;
129 * Hack. The clustered APIC addressing mode doesn't allow us to send
130 * to an arbitrary mask, so I do a unicast to each CPU instead.
133 local_irq_save(flags);
134 for_each_cpu(query_cpu, mask) {
135 __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
136 query_cpu), vector, APIC_DEST_PHYSICAL);
138 local_irq_restore(flags);
142 default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, int vector)
144 unsigned int this_cpu = smp_processor_id();
145 unsigned int query_cpu;
148 /* See Hack comment above */
150 local_irq_save(flags);
151 for_each_cpu(query_cpu, mask) {
152 if (query_cpu == this_cpu)
154 __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
155 query_cpu), vector, APIC_DEST_PHYSICAL);
157 local_irq_restore(flags);
160 #include <asm/genapic.h>
163 default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int vector)
166 unsigned int query_cpu;
169 * Hack. The clustered APIC addressing mode doesn't allow us to send
170 * to an arbitrary mask, so I do a unicasts to each CPU instead. This
171 * should be modified to do 1 message per cluster ID - mbligh
174 local_irq_save(flags);
175 for_each_cpu(query_cpu, mask)
176 __default_send_IPI_dest_field(
177 apic->cpu_to_logical_apicid(query_cpu), vector,
179 local_irq_restore(flags);
183 default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int vector)
186 unsigned int query_cpu;
187 unsigned int this_cpu = smp_processor_id();
189 /* See Hack comment above */
191 local_irq_save(flags);
192 for_each_cpu(query_cpu, mask) {
193 if (query_cpu == this_cpu)
195 __default_send_IPI_dest_field(
196 apic->cpu_to_logical_apicid(query_cpu), vector,
199 local_irq_restore(flags);
202 /* Avoid include hell */
203 #define NMI_VECTOR 0x02
205 extern int no_broadcast;
207 #ifndef CONFIG_X86_64
209 * This is only used on smaller machines.
211 static inline void default_send_IPI_mask_bitmask_logical(const struct cpumask *cpumask, int vector)
213 unsigned long mask = cpumask_bits(cpumask)[0];
216 local_irq_save(flags);
217 WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]);
218 __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
219 local_irq_restore(flags);
222 static inline void default_send_IPI_mask_logical(const struct cpumask *mask, int vector)
224 default_send_IPI_mask_bitmask_logical(mask, vector);
228 static inline void __default_local_send_IPI_allbutself(int vector)
230 if (no_broadcast || vector == NMI_VECTOR)
231 apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
233 __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->dest_logical);
236 static inline void __default_local_send_IPI_all(int vector)
238 if (no_broadcast || vector == NMI_VECTOR)
239 apic->send_IPI_mask(cpu_online_mask, vector);
241 __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->dest_logical);
245 static inline void default_send_IPI_allbutself(int vector)
248 * if there are no other CPUs in the system then we get an APIC send
249 * error if we try to broadcast, thus avoid sending IPIs in this case.
251 if (!(num_online_cpus() > 1))
254 __default_local_send_IPI_allbutself(vector);
257 static inline void default_send_IPI_all(int vector)
259 __default_local_send_IPI_all(vector);
265 #endif /* _ASM_X86_IPI_H */