1 #ifndef _ASM_X86_GENAPIC_H
2 #define _ASM_X86_GENAPIC_H
4 #include <linux/cpumask.h>
6 #include <asm/mpspec.h>
7 #include <asm/atomic.h>
11 * Copyright 2004 James Cleverdon, IBM.
12 * Subject to the GNU Public License, v.2
14 * Generic APIC sub-arch data struct.
16 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
17 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
24 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
25 int (*apic_id_registered)(void);
27 u32 irq_delivery_mode;
30 const struct cpumask *(*target_cpus)(void);
35 unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
36 unsigned long (*check_apicid_present)(int apicid);
38 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
39 void (*init_apic_ldr)(void);
41 physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
43 void (*setup_apic_routing)(void);
44 int (*multi_timer_check)(int apic, int irq);
45 int (*apicid_to_node)(int logical_apicid);
46 int (*cpu_to_logical_apicid)(int cpu);
47 int (*cpu_present_to_apicid)(int mps_cpu);
48 physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
49 void (*setup_portio_remap)(void);
50 int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
51 void (*enable_apic_mode)(void);
52 int (*phys_pkg_id)(int cpuid_apic, int index_msb);
55 * When one of the next two hooks returns 1 the genapic
56 * is switched to this. Essentially they are additional
59 int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
61 unsigned int (*get_apic_id)(unsigned long x);
62 unsigned long (*set_apic_id)(unsigned int id);
63 unsigned long apic_id_mask;
65 unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
66 unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
67 const struct cpumask *andmask);
70 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
71 void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
73 void (*send_IPI_allbutself)(int vector);
74 void (*send_IPI_all)(int vector);
75 void (*send_IPI_self)(int vector);
77 /* wakeup_secondary_cpu */
78 int (*wakeup_cpu)(int apicid, unsigned long start_eip);
80 int trampoline_phys_low;
81 int trampoline_phys_high;
83 void (*wait_for_init_deassert)(atomic_t *deassert);
84 void (*smp_callin_clear_local_apic)(void);
85 void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
86 void (*inquire_remote_apic)(int apicid);
90 void (*write)(u32 reg, u32 v);
91 u64 (*icr_read)(void);
92 void (*icr_write)(u32 low, u32 high);
93 void (*wait_icr_idle)(void);
94 u32 (*safe_wait_icr_idle)(void);
97 extern struct genapic *apic;
99 static inline u32 apic_read(u32 reg)
101 return apic->read(reg);
104 static inline void apic_write(u32 reg, u32 val)
106 apic->write(reg, val);
109 static inline u64 apic_icr_read(void)
111 return apic->icr_read();
114 static inline void apic_icr_write(u32 low, u32 high)
116 apic->icr_write(low, high);
119 static inline void apic_wait_icr_idle(void)
121 apic->wait_icr_idle();
124 static inline u32 safe_apic_wait_icr_idle(void)
126 return apic->safe_wait_icr_idle();
130 static inline void ack_APIC_irq(void)
133 * ack_APIC_irq() actually gets compiled as a single instruction
137 /* Docs say use 0 for future compatibility */
138 apic_write(APIC_EOI, 0);
141 static inline unsigned default_get_apic_id(unsigned long x)
143 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
146 return (x >> 24) & 0xFF;
148 return (x >> 24) & 0x0F;
152 * Warm reset vector default position:
154 #define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467
155 #define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469
158 extern void es7000_update_genapic_to_cluster(void);
160 extern struct genapic apic_flat;
161 extern struct genapic apic_physflat;
162 extern struct genapic apic_x2apic_cluster;
163 extern struct genapic apic_x2apic_phys;
164 extern int default_acpi_madt_oem_check(char *, char *);
166 extern void apic_send_IPI_self(int vector);
168 extern struct genapic apic_x2apic_uv_x;
169 DECLARE_PER_CPU(int, x2apic_extra_bits);
171 extern void default_setup_apic_routing(void);
173 extern int default_cpu_present_to_apicid(int mps_cpu);
174 extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
177 static inline void default_wait_for_init_deassert(atomic_t *deassert)
179 while (!atomic_read(deassert))
184 extern void generic_bigsmp_probe(void);
187 #ifdef CONFIG_X86_LOCAL_APIC
191 #define APIC_DFR_VALUE (APIC_DFR_FLAT)
193 static inline const struct cpumask *default_target_cpus(void)
196 return cpu_online_mask;
198 return cpumask_of(0);
202 DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
205 static inline unsigned int read_apic_id(void)
209 reg = apic_read(APIC_ID);
211 return apic->get_apic_id(reg);
215 extern void default_setup_apic_routing(void);
219 * Set up the logical destination ID.
221 * Intel recommends to set DFR, LDR and TPR before enabling
222 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
223 * document number 292116). So here it goes...
225 extern void default_init_apic_ldr(void);
227 static inline int default_apic_id_registered(void)
229 return physid_isset(read_apic_id(), phys_cpu_present_map);
232 static inline unsigned int
233 default_cpu_mask_to_apicid(const struct cpumask *cpumask)
235 return cpumask_bits(cpumask)[0];
238 static inline unsigned int
239 default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
240 const struct cpumask *andmask)
242 unsigned long mask1 = cpumask_bits(cpumask)[0];
243 unsigned long mask2 = cpumask_bits(andmask)[0];
244 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
246 return (unsigned int)(mask1 & mask2 & mask3);
249 static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
251 return cpuid_apic >> index_msb;
254 static inline void default_setup_apic_routing(void)
256 #ifdef CONFIG_X86_IO_APIC
257 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
262 extern int default_apicid_to_node(int logical_apicid);
266 static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
268 return physid_isset(apicid, bitmap);
271 static inline unsigned long default_check_apicid_present(int bit)
273 return physid_isset(bit, phys_cpu_present_map);
276 static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
281 /* Mapping from cpu number to logical apicid */
282 static inline int default_cpu_to_logical_apicid(int cpu)
287 static inline int __default_cpu_present_to_apicid(int mps_cpu)
289 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
290 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
296 __default_check_phys_apicid_present(int boot_cpu_physical_apicid)
298 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
302 static inline int default_cpu_present_to_apicid(int mps_cpu)
304 return __default_cpu_present_to_apicid(mps_cpu);
308 default_check_phys_apicid_present(int boot_cpu_physical_apicid)
310 return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
313 extern int default_cpu_present_to_apicid(int mps_cpu);
314 extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
317 static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
319 return physid_mask_of_physid(phys_apicid);
322 #endif /* CONFIG_X86_LOCAL_APIC */
324 #endif /* _ASM_X86_GENAPIC_64_H */