[SPARC64]: Virtualize IRQ numbers.
[safe/jmp/linux-2.6] / arch / sparc64 / kernel / irq.c
1 /* $Id: irq.c,v 1.114 2002/01/11 08:45:38 davem Exp $
2  * irq.c: UltraSparc IRQ handling/init/registry.
3  *
4  * Copyright (C) 1997  David S. Miller  (davem@caip.rutgers.edu)
5  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
6  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
7  */
8
9 #include <linux/config.h>
10 #include <linux/module.h>
11 #include <linux/sched.h>
12 #include <linux/ptrace.h>
13 #include <linux/errno.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/signal.h>
16 #include <linux/mm.h>
17 #include <linux/interrupt.h>
18 #include <linux/slab.h>
19 #include <linux/random.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/proc_fs.h>
23 #include <linux/seq_file.h>
24 #include <linux/bootmem.h>
25
26 #include <asm/ptrace.h>
27 #include <asm/processor.h>
28 #include <asm/atomic.h>
29 #include <asm/system.h>
30 #include <asm/irq.h>
31 #include <asm/io.h>
32 #include <asm/sbus.h>
33 #include <asm/iommu.h>
34 #include <asm/upa.h>
35 #include <asm/oplib.h>
36 #include <asm/timer.h>
37 #include <asm/smp.h>
38 #include <asm/starfire.h>
39 #include <asm/uaccess.h>
40 #include <asm/cache.h>
41 #include <asm/cpudata.h>
42 #include <asm/auxio.h>
43 #include <asm/head.h>
44
45 #ifdef CONFIG_SMP
46 static void distribute_irqs(void);
47 #endif
48
49 /* UPA nodes send interrupt packet to UltraSparc with first data reg
50  * value low 5 (7 on Starfire) bits holding the IRQ identifier being
51  * delivered.  We must translate this into a non-vector IRQ so we can
52  * set the softint on this cpu.
53  *
54  * To make processing these packets efficient and race free we use
55  * an array of irq buckets below.  The interrupt vector handler in
56  * entry.S feeds incoming packets into per-cpu pil-indexed lists.
57  * The IVEC handler does not need to act atomically, the PIL dispatch
58  * code uses CAS to get an atomic snapshot of the list and clear it
59  * at the same time.
60  */
61
62 struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
63
64 /* This has to be in the main kernel image, it cannot be
65  * turned into per-cpu data.  The reason is that the main
66  * kernel image is locked into the TLB and this structure
67  * is accessed from the vectored interrupt trap handler.  If
68  * access to this structure takes a TLB miss it could cause
69  * the 5-level sparc v9 trap stack to overflow.
70  */
71 #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
72
73 static struct irqaction timer_irq_action = {
74         .name = "timer",
75 };
76 static struct irqaction *irq_action[NR_IRQS] = { &timer_irq_action, };
77
78 /* This only synchronizes entities which modify IRQ handler
79  * state and some selected user-level spots that want to
80  * read things in the table.  IRQ handler processing orders
81  * its' accesses such that no locking is needed.
82  */
83 static DEFINE_SPINLOCK(irq_action_lock);
84
85 static unsigned int virt_to_real_irq_table[NR_IRQS];
86 static unsigned char virt_irq_cur = 1;
87
88 static unsigned char virt_irq_alloc(unsigned int real_irq)
89 {
90         unsigned char ent;
91
92         BUILD_BUG_ON(NR_IRQS >= 256);
93
94         ent = virt_irq_cur;
95         if (ent >= NR_IRQS) {
96                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
97                 return 0;
98         }
99
100         virt_irq_cur = ent + 1;
101         virt_to_real_irq_table[ent] = real_irq;
102
103         return ent;
104 }
105
106 #if 0 /* Currently unused. */
107 static unsigned char real_to_virt_irq(unsigned int real_irq)
108 {
109         struct ino_bucket *bucket = __bucket(real_irq);
110
111         return bucket->virt_irq;
112 }
113 #endif
114
115 static unsigned int virt_to_real_irq(unsigned char virt_irq)
116 {
117         return virt_to_real_irq_table[virt_irq];
118 }
119
120 void irq_install_pre_handler(int virt_irq,
121                              void (*func)(struct ino_bucket *, void *, void *),
122                              void *arg1, void *arg2)
123 {
124         unsigned int real_irq = virt_to_real_irq(virt_irq);
125         struct ino_bucket *bucket;
126         struct irq_desc *d;
127
128         if (unlikely(!real_irq))
129                 return;
130
131         bucket = __bucket(real_irq);
132         d = bucket->irq_info;
133         d->pre_handler = func;
134         d->pre_handler_arg1 = arg1;
135         d->pre_handler_arg2 = arg2;
136 }
137
138 static void register_irq_proc (unsigned int irq);
139
140 /*
141  * Upper 2b of irqaction->flags holds the ino.
142  * irqaction->mask holds the smp affinity information.
143  */
144 #define put_ino_in_irqaction(action, irq) \
145         action->flags &= 0xffffffffffffUL; \
146         action->flags |= __irq_ino(irq) << 48;
147
148 #define get_ino_in_irqaction(action)    (action->flags >> 48)
149
150 #define put_smpaff_in_irqaction(action, smpaff) (action)->mask = (smpaff)
151 #define get_smpaff_in_irqaction(action)         ((action)->mask)
152
153 int show_interrupts(struct seq_file *p, void *v)
154 {
155         unsigned long flags;
156         int i = *(loff_t *) v;
157         struct irqaction *action;
158 #ifdef CONFIG_SMP
159         int j;
160 #endif
161
162         spin_lock_irqsave(&irq_action_lock, flags);
163         if (i <= NR_IRQS) {
164                 if (!(action = *(i + irq_action)))
165                         goto out_unlock;
166                 seq_printf(p, "%3d: ", i);
167 #ifndef CONFIG_SMP
168                 seq_printf(p, "%10u ", kstat_irqs(i));
169 #else
170                 for_each_online_cpu(j) {
171                         seq_printf(p, "%10u ",
172                                    kstat_cpu(j).irqs[i]);
173                 }
174 #endif
175                 seq_printf(p, " %s", action->name);
176                 for (action = action->next; action; action = action->next)
177                         seq_printf(p, ", %s", action->name);
178                 seq_putc(p, '\n');
179         }
180 out_unlock:
181         spin_unlock_irqrestore(&irq_action_lock, flags);
182
183         return 0;
184 }
185
186 extern unsigned long real_hard_smp_processor_id(void);
187
188 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
189 {
190         unsigned int tid;
191
192         if (this_is_starfire) {
193                 tid = starfire_translate(imap, cpuid);
194                 tid <<= IMAP_TID_SHIFT;
195                 tid &= IMAP_TID_UPA;
196         } else {
197                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
198                         unsigned long ver;
199
200                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
201                         if ((ver >> 32UL) == __JALAPENO_ID ||
202                             (ver >> 32UL) == __SERRANO_ID) {
203                                 tid = cpuid << IMAP_TID_SHIFT;
204                                 tid &= IMAP_TID_JBUS;
205                         } else {
206                                 unsigned int a = cpuid & 0x1f;
207                                 unsigned int n = (cpuid >> 5) & 0x1f;
208
209                                 tid = ((a << IMAP_AID_SHIFT) |
210                                        (n << IMAP_NID_SHIFT));
211                                 tid &= (IMAP_AID_SAFARI |
212                                         IMAP_NID_SAFARI);;
213                         }
214                 } else {
215                         tid = cpuid << IMAP_TID_SHIFT;
216                         tid &= IMAP_TID_UPA;
217                 }
218         }
219
220         return tid;
221 }
222
223 void enable_irq(unsigned int virt_irq)
224 {
225         unsigned int real_irq = virt_to_real_irq(virt_irq);
226         struct ino_bucket *bucket;
227         unsigned long imap, cpuid;
228
229         if (unlikely(!real_irq))
230                 return;
231
232         bucket = __bucket(real_irq);
233         imap = bucket->imap;
234         if (unlikely(imap == 0UL))
235                 return;
236
237         preempt_disable();
238
239         /* This gets the physical processor ID, even on uniprocessor,
240          * so we can always program the interrupt target correctly.
241          */
242         cpuid = real_hard_smp_processor_id();
243
244         if (tlb_type == hypervisor) {
245                 unsigned int ino = __irq_ino(real_irq);
246                 int err;
247
248                 err = sun4v_intr_settarget(ino, cpuid);
249                 if (err != HV_EOK)
250                         printk("sun4v_intr_settarget(%x,%lu): err(%d)\n",
251                                ino, cpuid, err);
252                 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
253                 if (err != HV_EOK)
254                         printk("sun4v_intr_setenabled(%x): err(%d)\n",
255                                ino, err);
256         } else {
257                 unsigned int tid = sun4u_compute_tid(imap, cpuid);
258
259                 /* NOTE NOTE NOTE, IGN and INO are read-only, IGN is a product
260                  * of this SYSIO's preconfigured IGN in the SYSIO Control
261                  * Register, the hardware just mirrors that value here.
262                  * However for Graphics and UPA Slave devices the full
263                  * IMAP_INR field can be set by the programmer here.
264                  *
265                  * Things like FFB can now be handled via the new IRQ
266                  * mechanism.
267                  */
268                 upa_writel(tid | IMAP_VALID, imap);
269         }
270
271         preempt_enable();
272 }
273
274 void disable_irq(unsigned int virt_irq)
275 {
276         unsigned int real_irq = virt_to_real_irq(virt_irq);
277         struct ino_bucket *bucket;
278         unsigned long imap;
279
280         if (unlikely(!real_irq))
281                 return;
282
283         bucket = __bucket(real_irq);
284         imap = bucket->imap;
285         if (unlikely(imap == 0UL))
286                 return;
287
288         if (tlb_type == hypervisor) {
289                 unsigned int ino = __irq_ino(real_irq);
290                 int err;
291
292                 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
293                 if (err != HV_EOK)
294                         printk("sun4v_intr_setenabled(%x): "
295                                "err(%d)\n", ino, err);
296         } else {
297                 u32 tmp;
298
299                 /* NOTE: We do not want to futz with the IRQ clear registers
300                  *       and move the state to IDLE, the SCSI code does call
301                  *       disable_irq() to assure atomicity in the queue cmd
302                  *       SCSI adapter driver code.  Thus we'd lose interrupts.
303                  */
304                 tmp = upa_readl(imap);
305                 tmp &= ~IMAP_VALID;
306                 upa_writel(tmp, imap);
307         }
308 }
309
310 static void build_irq_error(const char *msg, unsigned int ino, int inofixup,
311                             unsigned long iclr, unsigned long imap,
312                             struct ino_bucket *bucket)
313 {
314         prom_printf("IRQ: INO %04x (%016lx:%016lx) --> "
315                     "(%d:%016lx:%016lx), halting...\n",
316                     ino, bucket->iclr, bucket->imap,
317                     inofixup, iclr, imap);
318         prom_halt();
319 }
320
321 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap, unsigned char flags)
322 {
323         struct ino_bucket *bucket;
324         int ino;
325
326         BUG_ON(tlb_type == hypervisor);
327
328         /* RULE: Both must be specified. */
329         if (iclr == 0UL || imap == 0UL) {
330                 prom_printf("Invalid build_irq %d %016lx %016lx\n",
331                             inofixup, iclr, imap);
332                 prom_halt();
333         }
334         
335         ino = (upa_readl(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
336         if (ino > NUM_IVECS) {
337                 prom_printf("Invalid INO %04x (%d:%016lx:%016lx)\n",
338                             ino, inofixup, iclr, imap);
339                 prom_halt();
340         }
341
342         bucket = &ivector_table[ino];
343         if (bucket->flags & IBF_ACTIVE)
344                 build_irq_error("IRQ: Trying to build active INO bucket.\n",
345                                 ino, inofixup, iclr, imap, bucket);
346
347         if (bucket->irq_info) {
348                 if (bucket->imap != imap || bucket->iclr != iclr)
349                         build_irq_error("IRQ: Trying to reinit INO bucket.\n",
350                                         ino, inofixup, iclr, imap, bucket);
351
352                 goto out;
353         }
354
355         bucket->irq_info = kzalloc(sizeof(struct irq_desc), GFP_ATOMIC);
356         if (!bucket->irq_info) {
357                 prom_printf("IRQ: Error, kmalloc(irq_desc) failed.\n");
358                 prom_halt();
359         }
360
361         /* Ok, looks good, set it up.  Don't touch the irq_chain or
362          * the pending flag.
363          */
364         bucket->imap  = imap;
365         bucket->iclr  = iclr;
366         if (!bucket->virt_irq)
367                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
368         bucket->flags = flags;
369
370 out:
371         return bucket->virt_irq;
372 }
373
374 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, unsigned char flags)
375 {
376         struct ino_bucket *bucket;
377         unsigned long sysino;
378
379         sysino = sun4v_devino_to_sysino(devhandle, devino);
380
381         bucket = &ivector_table[sysino];
382
383         /* Catch accidental accesses to these things.  IMAP/ICLR handling
384          * is done by hypervisor calls on sun4v platforms, not by direct
385          * register accesses.
386          *
387          * But we need to make them look unique for the disable_irq() logic
388          * in free_irq().
389          */
390         bucket->imap = ~0UL - sysino;
391         bucket->iclr = ~0UL - sysino;
392         if (!bucket->virt_irq)
393                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
394         bucket->flags = flags;
395
396         bucket->irq_info = kzalloc(sizeof(struct irq_desc), GFP_ATOMIC);
397         if (!bucket->irq_info) {
398                 prom_printf("IRQ: Error, kmalloc(irq_desc) failed.\n");
399                 prom_halt();
400         }
401
402         return bucket->virt_irq;
403 }
404
405 static void atomic_bucket_insert(struct ino_bucket *bucket)
406 {
407         unsigned long pstate;
408         unsigned int *ent;
409
410         __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
411         __asm__ __volatile__("wrpr %0, %1, %%pstate"
412                              : : "r" (pstate), "i" (PSTATE_IE));
413         ent = irq_work(smp_processor_id());
414         bucket->irq_chain = *ent;
415         *ent = __irq(bucket);
416         __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
417 }
418
419 static int check_irq_sharing(int pil, unsigned long irqflags)
420 {
421         struct irqaction *action;
422
423         action = *(irq_action + pil);
424         if (action) {
425                 if (!(action->flags & SA_SHIRQ) || !(irqflags & SA_SHIRQ))
426                         return -EBUSY;
427         }
428         return 0;
429 }
430
431 static void append_irq_action(int pil, struct irqaction *action)
432 {
433         struct irqaction **pp = irq_action + pil;
434
435         while (*pp)
436                 pp = &((*pp)->next);
437         *pp = action;
438 }
439
440 static struct irqaction *get_action_slot(struct ino_bucket *bucket)
441 {
442         struct irq_desc *desc = bucket->irq_info;
443         int max_irq, i;
444
445         max_irq = 1;
446         if (bucket->flags & IBF_PCI)
447                 max_irq = MAX_IRQ_DESC_ACTION;
448         for (i = 0; i < max_irq; i++) {
449                 struct irqaction *p = &desc->action[i];
450                 u32 mask = (1 << i);
451
452                 if (desc->action_active_mask & mask)
453                         continue;
454
455                 desc->action_active_mask |= mask;
456                 return p;
457         }
458         return NULL;
459 }
460
461 int request_irq(unsigned int virt_irq,
462                 irqreturn_t (*handler)(int, void *, struct pt_regs *),
463                 unsigned long irqflags, const char *name, void *dev_id)
464 {
465         struct irqaction *action;
466         struct ino_bucket *bucket;
467         unsigned long flags;
468         unsigned int real_irq;
469         int pending = 0;
470
471         real_irq = virt_to_real_irq(virt_irq);
472         if (unlikely(!real_irq))
473                 return -EINVAL;
474
475         if (unlikely(!handler))
476                 return -EINVAL;
477
478         bucket = __bucket(real_irq);
479         if (unlikely(!bucket->irq_info))
480                 return -ENODEV;
481
482         if (irqflags & SA_SAMPLE_RANDOM) {
483                 /*
484                  * This function might sleep, we want to call it first,
485                  * outside of the atomic block.
486                  * Yes, this might clear the entropy pool if the wrong
487                  * driver is attempted to be loaded, without actually
488                  * installing a new handler, but is this really a problem,
489                  * only the sysadmin is able to do this.
490                  */
491                 rand_initialize_irq(virt_irq);
492         }
493
494         spin_lock_irqsave(&irq_action_lock, flags);
495
496         if (check_irq_sharing(virt_irq, irqflags)) {
497                 spin_unlock_irqrestore(&irq_action_lock, flags);
498                 return -EBUSY;
499         }
500
501         action = get_action_slot(bucket);
502         if (!action) { 
503                 spin_unlock_irqrestore(&irq_action_lock, flags);
504                 return -ENOMEM;
505         }
506
507         bucket->flags |= IBF_ACTIVE;
508         pending = bucket->pending;
509         if (pending)
510                 bucket->pending = 0;
511
512         action->handler = handler;
513         action->flags = irqflags;
514         action->name = name;
515         action->next = NULL;
516         action->dev_id = dev_id;
517         put_ino_in_irqaction(action, __irq_ino(real_irq));
518         put_smpaff_in_irqaction(action, CPU_MASK_NONE);
519
520         append_irq_action(virt_irq, action);
521
522         enable_irq(virt_irq);
523
524         /* We ate the IVEC already, this makes sure it does not get lost. */
525         if (pending) {
526                 atomic_bucket_insert(bucket);
527                 set_softint(1 << PIL_DEVICE_IRQ);
528         }
529
530         spin_unlock_irqrestore(&irq_action_lock, flags);
531
532         register_irq_proc(virt_irq);
533
534 #ifdef CONFIG_SMP
535         distribute_irqs();
536 #endif
537         return 0;
538 }
539
540 EXPORT_SYMBOL(request_irq);
541
542 static struct irqaction *unlink_irq_action(unsigned int virt_irq, void *dev_id)
543 {
544         struct irqaction *action, **pp;
545
546         pp = irq_action + virt_irq;
547         action = *pp;
548         if (unlikely(!action))
549                 return NULL;
550
551         if (unlikely(!action->handler)) {
552                 printk("Freeing free IRQ %d\n", virt_irq);
553                 return NULL;
554         }
555
556         while (action && action->dev_id != dev_id) {
557                 pp = &action->next;
558                 action = *pp;
559         }
560
561         if (likely(action))
562                 *pp = action->next;
563
564         return action;
565 }
566
567 void free_irq(unsigned int virt_irq, void *dev_id)
568 {
569         struct irqaction *action;
570         struct ino_bucket *bucket;
571         struct irq_desc *desc;
572         unsigned long flags;
573         unsigned int real_irq;
574         int ent, i;
575
576         real_irq = virt_to_real_irq(virt_irq);
577         if (unlikely(!real_irq))
578                 return;
579
580         spin_lock_irqsave(&irq_action_lock, flags);
581
582         action = unlink_irq_action(virt_irq, dev_id);
583
584         spin_unlock_irqrestore(&irq_action_lock, flags);
585
586         if (unlikely(!action))
587                 return;
588
589         synchronize_irq(virt_irq);
590
591         spin_lock_irqsave(&irq_action_lock, flags);
592
593         bucket = __bucket(real_irq);
594         desc = bucket->irq_info;
595
596         for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) {
597                 struct irqaction *p = &desc->action[i];
598
599                 if (p == action) {
600                         desc->action_active_mask &= ~(1 << i);
601                         break;
602                 }
603         }
604
605         if (!desc->action_active_mask) {
606                 unsigned long imap = bucket->imap;
607
608                 /* This unique interrupt source is now inactive. */
609                 bucket->flags &= ~IBF_ACTIVE;
610
611                 /* See if any other buckets share this bucket's IMAP
612                  * and are still active.
613                  */
614                 for (ent = 0; ent < NUM_IVECS; ent++) {
615                         struct ino_bucket *bp = &ivector_table[ent];
616                         if (bp != bucket        &&
617                             bp->imap == imap    &&
618                             (bp->flags & IBF_ACTIVE) != 0)
619                                 break;
620                 }
621
622                 /* Only disable when no other sub-irq levels of
623                  * the same IMAP are active.
624                  */
625                 if (ent == NUM_IVECS)
626                         disable_irq(virt_irq);
627         }
628
629         spin_unlock_irqrestore(&irq_action_lock, flags);
630 }
631
632 EXPORT_SYMBOL(free_irq);
633
634 #ifdef CONFIG_SMP
635 void synchronize_irq(unsigned int virt_irq)
636 {
637         unsigned int real_irq = virt_to_real_irq(virt_irq);
638         struct ino_bucket *bucket;
639
640         if (unlikely(!real_irq))
641                 return;
642
643         bucket = __bucket(real_irq);
644 #if 0
645         /* The following is how I wish I could implement this.
646          * Unfortunately the ICLR registers are read-only, you can
647          * only write ICLR_foo values to them.  To get the current
648          * IRQ status you would need to get at the IRQ diag registers
649          * in the PCI/SBUS controller and the layout of those vary
650          * from one controller to the next, sigh... -DaveM
651          */
652         unsigned long iclr = bucket->iclr;
653
654         while (1) {
655                 u32 tmp = upa_readl(iclr);
656                 
657                 if (tmp == ICLR_TRANSMIT ||
658                     tmp == ICLR_PENDING) {
659                         cpu_relax();
660                         continue;
661                 }
662                 break;
663         }
664 #else
665         /* So we have to do this with a INPROGRESS bit just like x86.  */
666         while (bucket->flags & IBF_INPROGRESS)
667                 cpu_relax();
668 #endif
669 }
670 #endif /* CONFIG_SMP */
671
672 static void process_bucket(struct ino_bucket *bp, struct pt_regs *regs)
673 {
674         struct irq_desc *desc = bp->irq_info;
675         unsigned char flags = bp->flags;
676         u32 action_mask, i;
677         int random;
678
679         bp->flags |= IBF_INPROGRESS;
680
681         if (unlikely(!(flags & IBF_ACTIVE))) {
682                 bp->pending = 1;
683                 goto out;
684         }
685
686         if (desc->pre_handler)
687                 desc->pre_handler(bp,
688                                   desc->pre_handler_arg1,
689                                   desc->pre_handler_arg2);
690
691         action_mask = desc->action_active_mask;
692         random = 0;
693         for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) {
694                 struct irqaction *p = &desc->action[i];
695                 u32 mask = (1 << i);
696
697                 if (!(action_mask & mask))
698                         continue;
699
700                 action_mask &= ~mask;
701
702                 if (p->handler(bp->virt_irq, p->dev_id, regs) == IRQ_HANDLED)
703                         random |= p->flags;
704
705                 if (!action_mask)
706                         break;
707         }
708
709         if (tlb_type == hypervisor) {
710                 unsigned int ino = __irq_ino(bp);
711                 int err;
712
713                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
714                 if (err != HV_EOK)
715                         printk("sun4v_intr_setstate(%x): "
716                                "err(%d)\n", ino, err);
717         } else {
718                 upa_writel(ICLR_IDLE, bp->iclr);
719         }
720
721         /* Test and add entropy */
722         if (random & SA_SAMPLE_RANDOM)
723                 add_interrupt_randomness(bp->virt_irq);
724 out:
725         bp->flags &= ~IBF_INPROGRESS;
726 }
727
728 #ifndef CONFIG_SMP
729 extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *);
730
731 void timer_irq(int irq, struct pt_regs *regs)
732 {
733         unsigned long clr_mask = 1 << irq;
734         unsigned long tick_mask = tick_ops->softint_mask;
735
736         if (get_softint() & tick_mask) {
737                 irq = 0;
738                 clr_mask = tick_mask;
739         }
740         clear_softint(clr_mask);
741
742         irq_enter();
743         kstat_this_cpu.irqs[0]++;
744         timer_interrupt(irq, NULL, regs);
745         irq_exit();
746 }
747 #endif
748
749 void handler_irq(int irq, struct pt_regs *regs)
750 {
751         struct ino_bucket *bp;
752         int cpu = smp_processor_id();
753
754         /* XXX at this point we should be able to assert that
755          * XXX irq is PIL_DEVICE_IRQ...
756          */
757         clear_softint(1 << irq);
758
759         irq_enter();
760
761         /* Sliiiick... */
762         bp = __bucket(xchg32(irq_work(cpu), 0));
763         while (bp) {
764                 struct ino_bucket *nbp = __bucket(bp->irq_chain);
765
766                 kstat_this_cpu.irqs[bp->virt_irq]++;
767
768                 bp->irq_chain = 0;
769                 process_bucket(bp, regs);
770                 bp = nbp;
771         }
772         irq_exit();
773 }
774
775 #ifdef CONFIG_BLK_DEV_FD
776 extern irqreturn_t floppy_interrupt(int, void *, struct pt_regs *);
777
778 /* XXX No easy way to include asm/floppy.h XXX */
779 extern unsigned char *pdma_vaddr;
780 extern unsigned long pdma_size;
781 extern volatile int doing_pdma;
782 extern unsigned long fdc_status;
783
784 irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie, struct pt_regs *regs)
785 {
786         if (likely(doing_pdma)) {
787                 void __iomem *stat = (void __iomem *) fdc_status;
788                 unsigned char *vaddr = pdma_vaddr;
789                 unsigned long size = pdma_size;
790                 u8 val;
791
792                 while (size) {
793                         val = readb(stat);
794                         if (unlikely(!(val & 0x80))) {
795                                 pdma_vaddr = vaddr;
796                                 pdma_size = size;
797                                 return IRQ_HANDLED;
798                         }
799                         if (unlikely(!(val & 0x20))) {
800                                 pdma_vaddr = vaddr;
801                                 pdma_size = size;
802                                 doing_pdma = 0;
803                                 goto main_interrupt;
804                         }
805                         if (val & 0x40) {
806                                 /* read */
807                                 *vaddr++ = readb(stat + 1);
808                         } else {
809                                 unsigned char data = *vaddr++;
810
811                                 /* write */
812                                 writeb(data, stat + 1);
813                         }
814                         size--;
815                 }
816
817                 pdma_vaddr = vaddr;
818                 pdma_size = size;
819
820                 /* Send Terminal Count pulse to floppy controller. */
821                 val = readb(auxio_register);
822                 val |= AUXIO_AUX1_FTCNT;
823                 writeb(val, auxio_register);
824                 val &= ~AUXIO_AUX1_FTCNT;
825                 writeb(val, auxio_register);
826
827                 doing_pdma = 0;
828         }
829
830 main_interrupt:
831         return floppy_interrupt(irq, dev_cookie, regs);
832 }
833 EXPORT_SYMBOL(sparc_floppy_irq);
834 #endif
835
836 /* We really don't need these at all on the Sparc.  We only have
837  * stubs here because they are exported to modules.
838  */
839 unsigned long probe_irq_on(void)
840 {
841         return 0;
842 }
843
844 EXPORT_SYMBOL(probe_irq_on);
845
846 int probe_irq_off(unsigned long mask)
847 {
848         return 0;
849 }
850
851 EXPORT_SYMBOL(probe_irq_off);
852
853 #ifdef CONFIG_SMP
854 static int retarget_one_irq(struct irqaction *p, int goal_cpu)
855 {
856         struct ino_bucket *bucket = get_ino_in_irqaction(p) + ivector_table;
857
858         while (!cpu_online(goal_cpu)) {
859                 if (++goal_cpu >= NR_CPUS)
860                         goal_cpu = 0;
861         }
862
863         if (tlb_type == hypervisor) {
864                 unsigned int ino = __irq_ino(bucket);
865
866                 sun4v_intr_settarget(ino, goal_cpu);
867                 sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
868         } else {
869                 unsigned long imap = bucket->imap;
870                 unsigned int tid = sun4u_compute_tid(imap, goal_cpu);
871
872                 upa_writel(tid | IMAP_VALID, imap);
873         }
874
875         do {
876                 if (++goal_cpu >= NR_CPUS)
877                         goal_cpu = 0;
878         } while (!cpu_online(goal_cpu));
879
880         return goal_cpu;
881 }
882
883 /* Called from request_irq. */
884 static void distribute_irqs(void)
885 {
886         unsigned long flags;
887         int cpu, level;
888
889         spin_lock_irqsave(&irq_action_lock, flags);
890         cpu = 0;
891
892         for (level = 1; level < NR_IRQS; level++) {
893                 struct irqaction *p = irq_action[level];
894
895                 while(p) {
896                         cpu = retarget_one_irq(p, cpu);
897                         p = p->next;
898                 }
899         }
900         spin_unlock_irqrestore(&irq_action_lock, flags);
901 }
902 #endif
903
904 struct sun5_timer {
905         u64     count0;
906         u64     limit0;
907         u64     count1;
908         u64     limit1;
909 };
910
911 static struct sun5_timer *prom_timers;
912 static u64 prom_limit0, prom_limit1;
913
914 static void map_prom_timers(void)
915 {
916         unsigned int addr[3];
917         int tnode, err;
918
919         /* PROM timer node hangs out in the top level of device siblings... */
920         tnode = prom_finddevice("/counter-timer");
921
922         /* Assume if node is not present, PROM uses different tick mechanism
923          * which we should not care about.
924          */
925         if (tnode == 0 || tnode == -1) {
926                 prom_timers = (struct sun5_timer *) 0;
927                 return;
928         }
929
930         /* If PROM is really using this, it must be mapped by him. */
931         err = prom_getproperty(tnode, "address", (char *)addr, sizeof(addr));
932         if (err == -1) {
933                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
934                 prom_timers = (struct sun5_timer *) 0;
935                 return;
936         }
937         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
938 }
939
940 static void kill_prom_timer(void)
941 {
942         if (!prom_timers)
943                 return;
944
945         /* Save them away for later. */
946         prom_limit0 = prom_timers->limit0;
947         prom_limit1 = prom_timers->limit1;
948
949         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
950          * We turn both off here just to be paranoid.
951          */
952         prom_timers->limit0 = 0;
953         prom_timers->limit1 = 0;
954
955         /* Wheee, eat the interrupt packet too... */
956         __asm__ __volatile__(
957 "       mov     0x40, %%g2\n"
958 "       ldxa    [%%g0] %0, %%g1\n"
959 "       ldxa    [%%g2] %1, %%g1\n"
960 "       stxa    %%g0, [%%g0] %0\n"
961 "       membar  #Sync\n"
962         : /* no outputs */
963         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
964         : "g1", "g2");
965 }
966
967 void init_irqwork_curcpu(void)
968 {
969         int cpu = hard_smp_processor_id();
970
971         trap_block[cpu].irq_worklist = 0;
972 }
973
974 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type)
975 {
976         unsigned long num_entries = 128;
977         unsigned long status;
978
979         status = sun4v_cpu_qconf(type, paddr, num_entries);
980         if (status != HV_EOK) {
981                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
982                             "err %lu\n", type, paddr, num_entries, status);
983                 prom_halt();
984         }
985 }
986
987 static void __cpuinit sun4v_register_mondo_queues(int this_cpu)
988 {
989         struct trap_per_cpu *tb = &trap_block[this_cpu];
990
991         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO);
992         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO);
993         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR);
994         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR);
995 }
996
997 static void __cpuinit alloc_one_mondo(unsigned long *pa_ptr, int use_bootmem)
998 {
999         void *page;
1000
1001         if (use_bootmem)
1002                 page = alloc_bootmem_low_pages(PAGE_SIZE);
1003         else
1004                 page = (void *) get_zeroed_page(GFP_ATOMIC);
1005
1006         if (!page) {
1007                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
1008                 prom_halt();
1009         }
1010
1011         *pa_ptr = __pa(page);
1012 }
1013
1014 static void __cpuinit alloc_one_kbuf(unsigned long *pa_ptr, int use_bootmem)
1015 {
1016         void *page;
1017
1018         if (use_bootmem)
1019                 page = alloc_bootmem_low_pages(PAGE_SIZE);
1020         else
1021                 page = (void *) get_zeroed_page(GFP_ATOMIC);
1022
1023         if (!page) {
1024                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
1025                 prom_halt();
1026         }
1027
1028         *pa_ptr = __pa(page);
1029 }
1030
1031 static void __cpuinit init_cpu_send_mondo_info(struct trap_per_cpu *tb, int use_bootmem)
1032 {
1033 #ifdef CONFIG_SMP
1034         void *page;
1035
1036         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
1037
1038         if (use_bootmem)
1039                 page = alloc_bootmem_low_pages(PAGE_SIZE);
1040         else
1041                 page = (void *) get_zeroed_page(GFP_ATOMIC);
1042
1043         if (!page) {
1044                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
1045                 prom_halt();
1046         }
1047
1048         tb->cpu_mondo_block_pa = __pa(page);
1049         tb->cpu_list_pa = __pa(page + 64);
1050 #endif
1051 }
1052
1053 /* Allocate and register the mondo and error queues for this cpu.  */
1054 void __cpuinit sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int load)
1055 {
1056         struct trap_per_cpu *tb = &trap_block[cpu];
1057
1058         if (alloc) {
1059                 alloc_one_mondo(&tb->cpu_mondo_pa, use_bootmem);
1060                 alloc_one_mondo(&tb->dev_mondo_pa, use_bootmem);
1061                 alloc_one_mondo(&tb->resum_mondo_pa, use_bootmem);
1062                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, use_bootmem);
1063                 alloc_one_mondo(&tb->nonresum_mondo_pa, use_bootmem);
1064                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa, use_bootmem);
1065
1066                 init_cpu_send_mondo_info(tb, use_bootmem);
1067         }
1068
1069         if (load) {
1070                 if (cpu != hard_smp_processor_id()) {
1071                         prom_printf("SUN4V: init mondo on cpu %d not %d\n",
1072                                     cpu, hard_smp_processor_id());
1073                         prom_halt();
1074                 }
1075                 sun4v_register_mondo_queues(cpu);
1076         }
1077 }
1078
1079 /* Only invoked on boot processor. */
1080 void __init init_IRQ(void)
1081 {
1082         map_prom_timers();
1083         kill_prom_timer();
1084         memset(&ivector_table[0], 0, sizeof(ivector_table));
1085
1086         if (tlb_type == hypervisor)
1087                 sun4v_init_mondo_queues(1, hard_smp_processor_id(), 1, 1);
1088
1089         /* We need to clear any IRQ's pending in the soft interrupt
1090          * registers, a spurious one could be left around from the
1091          * PROM timer which we just disabled.
1092          */
1093         clear_softint(get_softint());
1094
1095         /* Now that ivector table is initialized, it is safe
1096          * to receive IRQ vector traps.  We will normally take
1097          * one or two right now, in case some device PROM used
1098          * to boot us wants to speak to us.  We just ignore them.
1099          */
1100         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
1101                              "or        %%g1, %0, %%g1\n\t"
1102                              "wrpr      %%g1, 0x0, %%pstate"
1103                              : /* No outputs */
1104                              : "i" (PSTATE_IE)
1105                              : "g1");
1106 }
1107
1108 static struct proc_dir_entry *root_irq_dir;
1109 static struct proc_dir_entry *irq_dir[NR_IRQS];
1110
1111 #ifdef CONFIG_SMP
1112
1113 static int irq_affinity_read_proc(char *page, char **start, off_t off,
1114                                   int count, int *eof, void *data)
1115 {
1116         struct ino_bucket *bp = ivector_table + (long)data;
1117         struct irq_desc *desc = bp->irq_info;
1118         struct irqaction *ap = desc->action;
1119         cpumask_t mask;
1120         int len;
1121
1122         mask = get_smpaff_in_irqaction(ap);
1123         if (cpus_empty(mask))
1124                 mask = cpu_online_map;
1125
1126         len = cpumask_scnprintf(page, count, mask);
1127         if (count - len < 2)
1128                 return -EINVAL;
1129         len += sprintf(page + len, "\n");
1130         return len;
1131 }
1132
1133 static inline void set_intr_affinity(int virt_irq, cpumask_t hw_aff)
1134 {
1135         struct ino_bucket *bp;
1136         struct irq_desc *desc;
1137         struct irqaction *ap;
1138         unsigned int real_irq;
1139
1140         real_irq = virt_to_real_irq(virt_irq);
1141         if (unlikely(!real_irq))
1142                 return;
1143
1144         bp = __bucket(real_irq);
1145         desc = bp->irq_info;
1146         ap = desc->action;
1147
1148         /* Users specify affinity in terms of hw cpu ids.
1149          * As soon as we do this, handler_irq() might see and take action.
1150          */
1151         put_smpaff_in_irqaction(ap, hw_aff);
1152
1153         /* Migration is simply done by the next cpu to service this
1154          * interrupt.
1155          *
1156          * XXX Broken, this doesn't happen anymore...
1157          */
1158 }
1159
1160 static int irq_affinity_write_proc(struct file *file,
1161                                    const char __user *buffer,
1162                                    unsigned long count, void *data)
1163 {
1164         int virt_irq = (long) data, full_count = count, err;
1165         cpumask_t new_value;
1166
1167         err = cpumask_parse(buffer, count, new_value);
1168
1169         /*
1170          * Do not allow disabling IRQs completely - it's a too easy
1171          * way to make the system unusable accidentally :-) At least
1172          * one online CPU still has to be targeted.
1173          */
1174         cpus_and(new_value, new_value, cpu_online_map);
1175         if (cpus_empty(new_value))
1176                 return -EINVAL;
1177
1178         set_intr_affinity(virt_irq, new_value);
1179
1180         return full_count;
1181 }
1182
1183 #endif
1184
1185 #define MAX_NAMELEN 10
1186
1187 static void register_irq_proc(unsigned int virt_irq)
1188 {
1189         char name [MAX_NAMELEN];
1190
1191         if (!root_irq_dir || irq_dir[virt_irq])
1192                 return;
1193
1194         memset(name, 0, MAX_NAMELEN);
1195         sprintf(name, "%d", virt_irq);
1196
1197         /* create /proc/irq/1234 */
1198         irq_dir[virt_irq] = proc_mkdir(name, root_irq_dir);
1199
1200 #ifdef CONFIG_SMP
1201         /* XXX SMP affinity not supported on starfire yet. */
1202         if (this_is_starfire == 0) {
1203                 struct proc_dir_entry *entry;
1204
1205                 /* create /proc/irq/1234/smp_affinity */
1206                 entry = create_proc_entry("smp_affinity", 0600, irq_dir[irq]);
1207
1208                 if (entry) {
1209                         entry->nlink = 1;
1210                         entry->data = (void *)(long)virt_irq;
1211                         entry->read_proc = irq_affinity_read_proc;
1212                         entry->write_proc = irq_affinity_write_proc;
1213                 }
1214         }
1215 #endif
1216 }
1217
1218 void init_irq_proc(void)
1219 {
1220         /* create /proc/irq */
1221         root_irq_dir = proc_mkdir("irq", NULL);
1222 }
1223