4 * Privileged Space Mapping Buffer (PMB) Support.
6 * Copyright (C) 2005 - 2010 Paul Mundt
7 * Copyright (C) 2010 Matt Fleming
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/sysdev.h>
16 #include <linux/cpu.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <linux/bitops.h>
20 #include <linux/debugfs.h>
22 #include <linux/seq_file.h>
23 #include <linux/err.h>
25 #include <linux/spinlock.h>
26 #include <linux/rwlock.h>
27 #include <asm/sizes.h>
28 #include <asm/system.h>
29 #include <asm/uaccess.h>
30 #include <asm/pgtable.h>
33 #include <asm/mmu_context.h>
46 * 0 .. NR_PMB_ENTRIES for specific entry selection, or
47 * PMB_NO_ENTRY to search for a free one
51 /* Adjacent entry link for contiguous multi-entry mappings */
52 struct pmb_entry *link;
55 static void pmb_unmap_entry(struct pmb_entry *);
57 static DEFINE_RWLOCK(pmb_rwlock);
58 static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES];
59 static DECLARE_BITMAP(pmb_map, NR_PMB_ENTRIES);
61 static __always_inline unsigned long mk_pmb_entry(unsigned int entry)
63 return (entry & PMB_E_MASK) << PMB_E_SHIFT;
66 static __always_inline unsigned long mk_pmb_addr(unsigned int entry)
68 return mk_pmb_entry(entry) | PMB_ADDR;
71 static __always_inline unsigned long mk_pmb_data(unsigned int entry)
73 return mk_pmb_entry(entry) | PMB_DATA;
76 static int pmb_alloc_entry(void)
80 pos = find_first_zero_bit(pmb_map, NR_PMB_ENTRIES);
81 if (pos >= 0 && pos < NR_PMB_ENTRIES)
82 __set_bit(pos, pmb_map);
89 static struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
90 unsigned long flags, int entry)
92 struct pmb_entry *pmbe;
93 unsigned long irqflags;
97 write_lock_irqsave(&pmb_rwlock, irqflags);
99 if (entry == PMB_NO_ENTRY) {
100 pos = pmb_alloc_entry();
101 if (unlikely(pos < 0)) {
106 if (__test_and_set_bit(entry, pmb_map)) {
107 ret = ERR_PTR(-ENOSPC);
114 write_unlock_irqrestore(&pmb_rwlock, irqflags);
116 pmbe = &pmb_entry_list[pos];
118 spin_lock_init(&pmbe->lock);
129 write_unlock_irqrestore(&pmb_rwlock, irqflags);
133 static void pmb_free(struct pmb_entry *pmbe)
135 __clear_bit(pmbe->entry, pmb_map);
136 pmbe->entry = PMB_NO_ENTRY;
140 * Ensure that the PMB entries match our cache configuration.
142 * When we are in 32-bit address extended mode, CCR.CB becomes
143 * invalid, so care must be taken to manually adjust cacheable
146 static __always_inline unsigned long pmb_cache_flags(void)
148 unsigned long flags = 0;
150 #if defined(CONFIG_CACHE_WRITETHROUGH)
151 flags |= PMB_C | PMB_WT | PMB_UB;
152 #elif defined(CONFIG_CACHE_WRITEBACK)
160 * Must be run uncached.
162 static void __set_pmb_entry(struct pmb_entry *pmbe)
164 pmbe->flags &= ~PMB_CACHE_MASK;
165 pmbe->flags |= pmb_cache_flags();
167 writel_uncached(pmbe->vpn | PMB_V, mk_pmb_addr(pmbe->entry));
168 writel_uncached(pmbe->ppn | pmbe->flags | PMB_V,
169 mk_pmb_data(pmbe->entry));
172 static void __clear_pmb_entry(struct pmb_entry *pmbe)
174 unsigned long addr, data;
175 unsigned long addr_val, data_val;
177 addr = mk_pmb_addr(pmbe->entry);
178 data = mk_pmb_data(pmbe->entry);
180 addr_val = __raw_readl(addr);
181 data_val = __raw_readl(data);
184 writel_uncached(addr_val & ~PMB_V, addr);
185 writel_uncached(data_val & ~PMB_V, data);
188 static void set_pmb_entry(struct pmb_entry *pmbe)
192 spin_lock_irqsave(&pmbe->lock, flags);
193 __set_pmb_entry(pmbe);
194 spin_unlock_irqrestore(&pmbe->lock, flags);
201 { .size = SZ_512M, .flag = PMB_SZ_512M, },
202 { .size = SZ_128M, .flag = PMB_SZ_128M, },
203 { .size = SZ_64M, .flag = PMB_SZ_64M, },
204 { .size = SZ_16M, .flag = PMB_SZ_16M, },
207 long pmb_remap(unsigned long vaddr, unsigned long phys,
208 unsigned long size, pgprot_t prot)
210 struct pmb_entry *pmbp, *pmbe;
211 unsigned long wanted;
216 flags = pgprot_val(prot);
218 pmb_flags = PMB_WT | PMB_UB;
220 /* Convert typical pgprot value to the PMB equivalent */
221 if (flags & _PAGE_CACHABLE) {
224 if ((flags & _PAGE_WT) == 0)
225 pmb_flags &= ~(PMB_WT | PMB_UB);
232 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
235 if (size < pmb_sizes[i].size)
238 pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag,
245 spin_lock_irqsave(&pmbe->lock, flags);
247 __set_pmb_entry(pmbe);
249 phys += pmb_sizes[i].size;
250 vaddr += pmb_sizes[i].size;
251 size -= pmb_sizes[i].size;
253 pmbe->size = pmb_sizes[i].size;
256 * Link adjacent entries that span multiple PMB entries
257 * for easier tear-down.
260 spin_lock(&pmbp->lock);
262 spin_unlock(&pmbp->lock);
268 * Instead of trying smaller sizes on every iteration
269 * (even if we succeed in allocating space), try using
270 * pmb_sizes[i].size again.
274 spin_unlock_irqrestore(&pmbe->lock, flags);
280 return wanted - size;
283 pmb_unmap_entry(pmbp);
288 void pmb_unmap(unsigned long addr)
290 struct pmb_entry *pmbe = NULL;
293 read_lock(&pmb_rwlock);
295 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
296 if (test_bit(i, pmb_map)) {
297 pmbe = &pmb_entry_list[i];
298 if (pmbe->vpn == addr)
303 read_unlock(&pmb_rwlock);
305 pmb_unmap_entry(pmbe);
308 static void pmb_unmap_entry(struct pmb_entry *pmbe)
315 write_lock_irqsave(&pmb_rwlock, flags);
318 struct pmb_entry *pmblink = pmbe;
321 * We may be called before this pmb_entry has been
322 * entered into the PMB table via set_pmb_entry(), but
323 * that's OK because we've allocated a unique slot for
324 * this entry in pmb_alloc() (even if we haven't filled
327 * Therefore, calling __clear_pmb_entry() is safe as no
328 * other mapping can be using that slot.
330 __clear_pmb_entry(pmbe);
332 pmbe = pmblink->link;
337 write_unlock_irqrestore(&pmb_rwlock, flags);
340 static __always_inline unsigned int pmb_ppn_in_range(unsigned long ppn)
342 return ppn >= __pa(memory_start) && ppn < __pa(memory_end);
345 static int pmb_synchronize_mappings(void)
347 unsigned int applied = 0;
348 struct pmb_entry *pmbp = NULL;
351 pr_info("PMB: boot mappings:\n");
354 * Run through the initial boot mappings, log the established
355 * ones, and blow away anything that falls outside of the valid
356 * PPN range. Specifically, we only care about existing mappings
357 * that impact the cached/uncached sections.
359 * Note that touching these can be a bit of a minefield; the boot
360 * loader can establish multi-page mappings with the same caching
361 * attributes, so we need to ensure that we aren't modifying a
362 * mapping that we're presently executing from, or may execute
363 * from in the case of straddling page boundaries.
365 * In the future we will have to tidy up after the boot loader by
366 * jumping between the cached and uncached mappings and tearing
367 * down alternating mappings while executing from the other.
369 for (i = 0; i < NR_PMB_ENTRIES; i++) {
370 unsigned long addr, data;
371 unsigned long addr_val, data_val;
372 unsigned long ppn, vpn, flags;
373 unsigned long irqflags;
375 struct pmb_entry *pmbe;
377 addr = mk_pmb_addr(i);
378 data = mk_pmb_data(i);
380 addr_val = __raw_readl(addr);
381 data_val = __raw_readl(data);
384 * Skip over any bogus entries
386 if (!(data_val & PMB_V) || !(addr_val & PMB_V))
389 ppn = data_val & PMB_PFN_MASK;
390 vpn = addr_val & PMB_PFN_MASK;
393 * Only preserve in-range mappings.
395 if (!pmb_ppn_in_range(ppn)) {
397 * Invalidate anything out of bounds.
399 writel_uncached(addr_val & ~PMB_V, addr);
400 writel_uncached(data_val & ~PMB_V, data);
405 * Update the caching attributes if necessary
407 if (data_val & PMB_C) {
408 data_val &= ~PMB_CACHE_MASK;
409 data_val |= pmb_cache_flags();
411 writel_uncached(data_val, data);
414 size = data_val & PMB_SZ_MASK;
415 flags = size | (data_val & PMB_CACHE_MASK);
417 pmbe = pmb_alloc(vpn, ppn, flags, i);
423 spin_lock_irqsave(&pmbe->lock, irqflags);
425 for (j = 0; j < ARRAY_SIZE(pmb_sizes); j++)
426 if (pmb_sizes[j].flag == size)
427 pmbe->size = pmb_sizes[j].size;
430 spin_lock(&pmbp->lock);
433 * Compare the previous entry against the current one to
434 * see if the entries span a contiguous mapping. If so,
435 * setup the entry links accordingly.
437 if ((pmbe->vpn == (pmbp->vpn + pmbp->size)) &&
438 (pmbe->ppn == (pmbp->ppn + pmbp->size)))
441 spin_unlock(&pmbp->lock);
446 spin_unlock_irqrestore(&pmbe->lock, irqflags);
448 pr_info("\t0x%08lx -> 0x%08lx [ %ldMB %scached ]\n",
449 vpn >> PAGE_SHIFT, ppn >> PAGE_SHIFT, pmbe->size >> 20,
450 (data_val & PMB_C) ? "" : "un");
455 return (applied == 0);
463 * Sync our software copy of the PMB mappings with those in
464 * hardware. The mappings in the hardware PMB were either set up
465 * by the bootloader or very early on by the kernel.
467 ret = pmb_synchronize_mappings();
468 if (unlikely(ret == 0))
471 writel_uncached(0, PMB_IRMCR);
473 /* Flush out the TLB */
474 __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR);
480 bool __in_29bit_mode(void)
482 return (__raw_readl(PMB_PASCR) & PASCR_SE) == 0;
485 static int pmb_seq_show(struct seq_file *file, void *iter)
489 seq_printf(file, "V: Valid, C: Cacheable, WT: Write-Through\n"
490 "CB: Copy-Back, B: Buffered, UB: Unbuffered\n");
491 seq_printf(file, "ety vpn ppn size flags\n");
493 for (i = 0; i < NR_PMB_ENTRIES; i++) {
494 unsigned long addr, data;
498 addr = __raw_readl(mk_pmb_addr(i));
499 data = __raw_readl(mk_pmb_data(i));
501 size = data & PMB_SZ_MASK;
502 sz_str = (size == PMB_SZ_16M) ? " 16MB":
503 (size == PMB_SZ_64M) ? " 64MB":
504 (size == PMB_SZ_128M) ? "128MB":
507 /* 02: V 0x88 0x08 128MB C CB B */
508 seq_printf(file, "%02d: %c 0x%02lx 0x%02lx %s %c %s %s\n",
509 i, ((addr & PMB_V) && (data & PMB_V)) ? 'V' : ' ',
510 (addr >> 24) & 0xff, (data >> 24) & 0xff,
511 sz_str, (data & PMB_C) ? 'C' : ' ',
512 (data & PMB_WT) ? "WT" : "CB",
513 (data & PMB_UB) ? "UB" : " B");
519 static int pmb_debugfs_open(struct inode *inode, struct file *file)
521 return single_open(file, pmb_seq_show, NULL);
524 static const struct file_operations pmb_debugfs_fops = {
525 .owner = THIS_MODULE,
526 .open = pmb_debugfs_open,
529 .release = single_release,
532 static int __init pmb_debugfs_init(void)
534 struct dentry *dentry;
536 dentry = debugfs_create_file("pmb", S_IFREG | S_IRUGO,
537 sh_debugfs_root, NULL, &pmb_debugfs_fops);
541 return PTR_ERR(dentry);
545 postcore_initcall(pmb_debugfs_init);
548 static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
550 static pm_message_t prev_state;
553 /* Restore the PMB after a resume from hibernation */
554 if (state.event == PM_EVENT_ON &&
555 prev_state.event == PM_EVENT_FREEZE) {
556 struct pmb_entry *pmbe;
558 read_lock(&pmb_rwlock);
560 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
561 if (test_bit(i, pmb_map)) {
562 pmbe = &pmb_entry_list[i];
567 read_unlock(&pmb_rwlock);
575 static int pmb_sysdev_resume(struct sys_device *dev)
577 return pmb_sysdev_suspend(dev, PMSG_ON);
580 static struct sysdev_driver pmb_sysdev_driver = {
581 .suspend = pmb_sysdev_suspend,
582 .resume = pmb_sysdev_resume,
585 static int __init pmb_sysdev_init(void)
587 return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver);
589 subsys_initcall(pmb_sysdev_init);