2 * Renesas System Solutions Asia Pte. Ltd - Migo-R
4 * Copyright (C) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/interrupt.h>
13 #include <linux/input.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/mtd/nand.h>
16 #include <linux/i2c.h>
17 #include <linux/smc91x.h>
18 #include <linux/delay.h>
19 #include <linux/clk.h>
20 #include <linux/gpio.h>
21 #include <media/soc_camera_platform.h>
22 #include <media/sh_mobile_ceu.h>
23 #include <media/ov772x.h>
24 #include <video/sh_mobile_lcdc.h>
25 #include <asm/clock.h>
26 #include <asm/machvec.h>
28 #include <asm/sh_keysc.h>
29 #include <mach/migor.h>
30 #include <cpu/sh7722.h>
32 /* Address IRQ Size Bus Description
33 * 0x00000000 64MB 16 NOR Flash (SP29PL256N)
34 * 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
35 * 0x10000000 IRQ0 16 Ethernet (SMC91C111)
36 * 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
37 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
40 static struct smc91x_platdata smc91x_info = {
41 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
44 static struct resource smc91x_eth_resources[] = {
49 .flags = IORESOURCE_MEM,
52 .start = 32, /* IRQ0 */
53 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
57 static struct platform_device smc91x_eth_device = {
59 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
60 .resource = smc91x_eth_resources,
62 .platform_data = &smc91x_info,
66 static struct sh_keysc_info sh_keysc_info = {
67 .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
71 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
72 0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
73 0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
74 0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
75 0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
79 static struct resource sh_keysc_resources[] = {
83 .flags = IORESOURCE_MEM,
87 .flags = IORESOURCE_IRQ,
91 static struct platform_device sh_keysc_device = {
93 .id = 0, /* "keysc0" clock */
94 .num_resources = ARRAY_SIZE(sh_keysc_resources),
95 .resource = sh_keysc_resources,
97 .platform_data = &sh_keysc_info,
101 static struct mtd_partition migor_nor_flash_partitions[] =
106 .size = (1 * 1024 * 1024),
107 .mask_flags = MTD_WRITEABLE, /* Read-only */
111 .offset = MTDPART_OFS_APPEND,
112 .size = (15 * 1024 * 1024),
116 .offset = MTDPART_OFS_APPEND,
117 .size = MTDPART_SIZ_FULL,
121 static struct physmap_flash_data migor_nor_flash_data = {
123 .parts = migor_nor_flash_partitions,
124 .nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
127 static struct resource migor_nor_flash_resources[] = {
132 .flags = IORESOURCE_MEM,
136 static struct platform_device migor_nor_flash_device = {
137 .name = "physmap-flash",
138 .resource = migor_nor_flash_resources,
139 .num_resources = ARRAY_SIZE(migor_nor_flash_resources),
141 .platform_data = &migor_nor_flash_data,
145 static struct mtd_partition migor_nand_flash_partitions[] = {
149 .size = 512 * 1024 * 1024,
153 .offset = MTDPART_OFS_APPEND,
154 .size = 512 * 1024 * 1024,
158 static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
161 struct nand_chip *chip = mtd->priv;
163 if (cmd == NAND_CMD_NONE)
167 writeb(cmd, chip->IO_ADDR_W + 0x00400000);
168 else if (ctrl & NAND_ALE)
169 writeb(cmd, chip->IO_ADDR_W + 0x00800000);
171 writeb(cmd, chip->IO_ADDR_W);
174 static int migor_nand_flash_ready(struct mtd_info *mtd)
176 return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
179 struct platform_nand_data migor_nand_flash_data = {
182 .partitions = migor_nand_flash_partitions,
183 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
185 .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
188 .dev_ready = migor_nand_flash_ready,
189 .cmd_ctrl = migor_nand_flash_cmd_ctl,
193 static struct resource migor_nand_flash_resources[] = {
195 .name = "NAND Flash",
198 .flags = IORESOURCE_MEM,
202 static struct platform_device migor_nand_flash_device = {
204 .resource = migor_nand_flash_resources,
205 .num_resources = ARRAY_SIZE(migor_nand_flash_resources),
207 .platform_data = &migor_nand_flash_data,
211 static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
212 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
213 .clock_source = LCDC_CLK_BUS,
215 .chan = LCDC_CHAN_MAINLCD,
217 .interface_type = RGB16,
231 .lcd_size_cfg = { /* 7.0 inch */
237 #ifdef CONFIG_SH_MIGOR_QVGA
238 .clock_source = LCDC_CLK_PERIPHERAL,
240 .chan = LCDC_CHAN_MAINLCD,
242 .interface_type = SYS16A,
254 .sync = FB_SYNC_HOR_HIGH_ACT,
256 .lcd_size_cfg = { /* 2.4 inch */
261 .setup_sys = migor_lcd_qvga_setup,
264 .ldmt2r = 0x06000a09,
265 .ldmt3r = 0x180e3418,
266 /* set 1s delay to encourage fsync() */
267 .deferred_io_msec = 1000,
273 static struct resource migor_lcdc_resources[] = {
276 .start = 0xfe940000, /* P4-only space */
278 .flags = IORESOURCE_MEM,
282 .flags = IORESOURCE_IRQ,
286 static struct platform_device migor_lcdc_device = {
287 .name = "sh_mobile_lcdc_fb",
288 .num_resources = ARRAY_SIZE(migor_lcdc_resources),
289 .resource = migor_lcdc_resources,
291 .platform_data = &sh_mobile_lcdc_info,
295 static struct clk *camera_clk;
297 static void camera_power_on(void)
299 /* Use 10 MHz VIO_CKO instead of 24 MHz to work
300 * around signal quality issues on Panel Board V2.1.
302 camera_clk = clk_get(NULL, "video_clk");
303 clk_set_rate(camera_clk, 10000000);
304 clk_enable(camera_clk); /* start VIO_CKO */
306 /* use VIO_RST to take camera out of reset */
308 gpio_set_value(GPIO_PTT3, 0);
310 gpio_set_value(GPIO_PTT3, 1);
311 mdelay(10); /* wait to let chip come out of reset */
314 static void camera_power_off(void)
316 clk_disable(camera_clk); /* stop VIO_CKO */
319 gpio_set_value(GPIO_PTT3, 0);
322 static void camera_power(int mode)
330 static int ov7725_power(struct device *dev, int mode)
341 static unsigned char camera_ov772x_magic[] =
343 0x09, 0x01, 0x0c, 0x20, 0x0d, 0x41, 0x0e, 0x01,
344 0x12, 0x00, 0x13, 0x8F, 0x14, 0x4A, 0x15, 0x00,
345 0x16, 0x00, 0x17, 0x23, 0x18, 0xa0, 0x19, 0x07,
346 0x1a, 0xf0, 0x1b, 0x40, 0x1f, 0x00, 0x20, 0x10,
347 0x22, 0xff, 0x23, 0x01, 0x28, 0x00, 0x29, 0xa0,
348 0x2a, 0x00, 0x2b, 0x00, 0x2c, 0xf0, 0x2d, 0x00,
349 0x2e, 0x00, 0x30, 0x80, 0x31, 0x60, 0x32, 0x00,
350 0x33, 0x00, 0x34, 0x00, 0x3d, 0x80, 0x3e, 0xe2,
351 0x3f, 0x1f, 0x42, 0x80, 0x43, 0x80, 0x44, 0x80,
352 0x45, 0x80, 0x46, 0x00, 0x47, 0x00, 0x48, 0x00,
353 0x49, 0x50, 0x4a, 0x30, 0x4b, 0x50, 0x4c, 0x50,
354 0x4d, 0x00, 0x4e, 0xef, 0x4f, 0x10, 0x50, 0x60,
355 0x51, 0x00, 0x52, 0x00, 0x53, 0x24, 0x54, 0x7a,
356 0x55, 0xfc, 0x62, 0xff, 0x63, 0xf0, 0x64, 0x1f,
357 0x65, 0x00, 0x66, 0x10, 0x67, 0x00, 0x68, 0x00,
358 0x69, 0x5c, 0x6a, 0x11, 0x6b, 0xa2, 0x6c, 0x01,
359 0x6d, 0x50, 0x6e, 0x80, 0x6f, 0x80, 0x70, 0x0f,
360 0x71, 0x00, 0x72, 0x00, 0x73, 0x0f, 0x74, 0x0f,
361 0x75, 0xff, 0x78, 0x10, 0x79, 0x70, 0x7a, 0x70,
362 0x7b, 0xf0, 0x7c, 0xf0, 0x7d, 0xf0, 0x7e, 0x0e,
363 0x7f, 0x1a, 0x80, 0x31, 0x81, 0x5a, 0x82, 0x69,
364 0x83, 0x75, 0x84, 0x7e, 0x85, 0x88, 0x86, 0x8f,
365 0x87, 0x96, 0x88, 0xa3, 0x89, 0xaf, 0x8a, 0xc4,
366 0x8b, 0xd7, 0x8c, 0xe8, 0x8d, 0x20, 0x8e, 0x00,
367 0x8f, 0x00, 0x90, 0x08, 0x91, 0x10, 0x92, 0x1f,
368 0x93, 0x01, 0x94, 0x2c, 0x95, 0x24, 0x96, 0x08,
369 0x97, 0x14, 0x98, 0x24, 0x99, 0x38, 0x9a, 0x9e,
370 0x9b, 0x00, 0x9c, 0x40, 0x9e, 0x11, 0x9f, 0x02,
371 0xa0, 0x00, 0xa1, 0x40, 0xa2, 0x40, 0xa3, 0x06,
372 0xa4, 0x00, 0xa6, 0x00, 0xa7, 0x40, 0xa8, 0x40,
373 0xa9, 0x80, 0xaa, 0x80, 0xab, 0x06, 0xac, 0xff,
374 0x12, 0x06, 0x64, 0x3f, 0x12, 0x46, 0x17, 0x3f,
375 0x18, 0x50, 0x19, 0x03, 0x1a, 0x78, 0x29, 0x50,
379 static int ov772x_set_capture(struct soc_camera_platform_info *info,
382 struct i2c_adapter *a = i2c_get_adapter(0);
388 return 0; /* camera_power_off() is enough */
390 for (i = 0; i < ARRAY_SIZE(camera_ov772x_magic); i += 2) {
398 buf[0] = camera_ov772x_magic[i];
399 buf[1] = camera_ov772x_magic[i + 1];
401 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
407 static struct soc_camera_platform_info ov772x_info = {
409 .format_name = "RGB565",
412 .pixelformat = V4L2_PIX_FMT_RGB565,
413 .colorspace = V4L2_COLORSPACE_SRGB,
417 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
418 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
419 .power = camera_power,
420 .set_capture = ov772x_set_capture,
423 static struct platform_device migor_camera_device = {
424 .name = "soc_camera_platform",
426 .platform_data = &ov772x_info,
429 #endif /* CONFIG_I2C */
431 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
432 .flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \
433 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH,
436 static struct resource migor_ceu_resources[] = {
441 .flags = IORESOURCE_MEM,
445 .flags = IORESOURCE_IRQ,
448 /* place holder for contiguous memory */
452 static struct platform_device migor_ceu_device = {
453 .name = "sh_mobile_ceu",
454 .id = 0, /* "ceu0" clock */
455 .num_resources = ARRAY_SIZE(migor_ceu_resources),
456 .resource = migor_ceu_resources,
458 .platform_data = &sh_mobile_ceu_info,
462 static struct ov772x_camera_info ov7725_info = {
463 .buswidth = SOCAM_DATAWIDTH_8,
465 .power = ov7725_power,
469 static struct platform_device *migor_devices[] __initdata = {
475 &migor_camera_device,
477 &migor_nor_flash_device,
478 &migor_nand_flash_device,
481 static struct i2c_board_info migor_i2c_devices[] = {
483 I2C_BOARD_INFO("rs5c372b", 0x32),
486 I2C_BOARD_INFO("migor_ts", 0x51),
487 .irq = 38, /* IRQ6 */
490 I2C_BOARD_INFO("ov772x", 0x21),
491 .platform_data = &ov7725_info,
495 static int __init migor_devices_setup(void)
498 gpio_request(GPIO_PTJ7, NULL);
499 gpio_direction_output(GPIO_PTJ7, 1);
500 gpio_export(GPIO_PTJ7, 0);
503 gpio_request(GPIO_PTJ5, NULL);
504 gpio_direction_output(GPIO_PTJ5, 1);
505 gpio_export(GPIO_PTJ5, 0);
507 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
508 gpio_request(GPIO_FN_IRQ0, NULL);
509 ctrl_outl(0x00003400, BSC_CS4BCR);
510 ctrl_outl(0x00110080, BSC_CS4WCR);
513 gpio_request(GPIO_FN_KEYOUT0, NULL);
514 gpio_request(GPIO_FN_KEYOUT1, NULL);
515 gpio_request(GPIO_FN_KEYOUT2, NULL);
516 gpio_request(GPIO_FN_KEYOUT3, NULL);
517 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
518 gpio_request(GPIO_FN_KEYIN1, NULL);
519 gpio_request(GPIO_FN_KEYIN2, NULL);
520 gpio_request(GPIO_FN_KEYIN3, NULL);
521 gpio_request(GPIO_FN_KEYIN4, NULL);
522 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
525 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
526 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
527 gpio_request(GPIO_PTA1, NULL);
528 gpio_direction_input(GPIO_PTA1);
531 gpio_request(GPIO_FN_IRQ6, NULL);
534 #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
535 gpio_request(GPIO_FN_LCDD17, NULL);
536 gpio_request(GPIO_FN_LCDD16, NULL);
537 gpio_request(GPIO_FN_LCDD15, NULL);
538 gpio_request(GPIO_FN_LCDD14, NULL);
539 gpio_request(GPIO_FN_LCDD13, NULL);
540 gpio_request(GPIO_FN_LCDD12, NULL);
541 gpio_request(GPIO_FN_LCDD11, NULL);
542 gpio_request(GPIO_FN_LCDD10, NULL);
543 gpio_request(GPIO_FN_LCDD8, NULL);
544 gpio_request(GPIO_FN_LCDD7, NULL);
545 gpio_request(GPIO_FN_LCDD6, NULL);
546 gpio_request(GPIO_FN_LCDD5, NULL);
547 gpio_request(GPIO_FN_LCDD4, NULL);
548 gpio_request(GPIO_FN_LCDD3, NULL);
549 gpio_request(GPIO_FN_LCDD2, NULL);
550 gpio_request(GPIO_FN_LCDD1, NULL);
551 gpio_request(GPIO_FN_LCDRS, NULL);
552 gpio_request(GPIO_FN_LCDCS, NULL);
553 gpio_request(GPIO_FN_LCDRD, NULL);
554 gpio_request(GPIO_FN_LCDWR, NULL);
555 gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
556 gpio_direction_output(GPIO_PTH2, 1);
558 #ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
559 gpio_request(GPIO_FN_LCDD15, NULL);
560 gpio_request(GPIO_FN_LCDD14, NULL);
561 gpio_request(GPIO_FN_LCDD13, NULL);
562 gpio_request(GPIO_FN_LCDD12, NULL);
563 gpio_request(GPIO_FN_LCDD11, NULL);
564 gpio_request(GPIO_FN_LCDD10, NULL);
565 gpio_request(GPIO_FN_LCDD9, NULL);
566 gpio_request(GPIO_FN_LCDD8, NULL);
567 gpio_request(GPIO_FN_LCDD7, NULL);
568 gpio_request(GPIO_FN_LCDD6, NULL);
569 gpio_request(GPIO_FN_LCDD5, NULL);
570 gpio_request(GPIO_FN_LCDD4, NULL);
571 gpio_request(GPIO_FN_LCDD3, NULL);
572 gpio_request(GPIO_FN_LCDD2, NULL);
573 gpio_request(GPIO_FN_LCDD1, NULL);
574 gpio_request(GPIO_FN_LCDD0, NULL);
575 gpio_request(GPIO_FN_LCDLCLK, NULL);
576 gpio_request(GPIO_FN_LCDDCK, NULL);
577 gpio_request(GPIO_FN_LCDVEPWC, NULL);
578 gpio_request(GPIO_FN_LCDVCPWC, NULL);
579 gpio_request(GPIO_FN_LCDVSYN, NULL);
580 gpio_request(GPIO_FN_LCDHSYN, NULL);
581 gpio_request(GPIO_FN_LCDDISP, NULL);
582 gpio_request(GPIO_FN_LCDDON, NULL);
586 gpio_request(GPIO_FN_VIO_CLK2, NULL);
587 gpio_request(GPIO_FN_VIO_VD2, NULL);
588 gpio_request(GPIO_FN_VIO_HD2, NULL);
589 gpio_request(GPIO_FN_VIO_FLD, NULL);
590 gpio_request(GPIO_FN_VIO_CKO, NULL);
591 gpio_request(GPIO_FN_VIO_D15, NULL);
592 gpio_request(GPIO_FN_VIO_D14, NULL);
593 gpio_request(GPIO_FN_VIO_D13, NULL);
594 gpio_request(GPIO_FN_VIO_D12, NULL);
595 gpio_request(GPIO_FN_VIO_D11, NULL);
596 gpio_request(GPIO_FN_VIO_D10, NULL);
597 gpio_request(GPIO_FN_VIO_D9, NULL);
598 gpio_request(GPIO_FN_VIO_D8, NULL);
600 gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
601 gpio_direction_output(GPIO_PTT3, 0);
602 gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
603 gpio_direction_output(GPIO_PTT2, 1);
604 gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
605 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
606 gpio_direction_output(GPIO_PTT0, 0);
608 gpio_direction_output(GPIO_PTT0, 1);
610 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
612 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
614 i2c_register_board_info(0, migor_i2c_devices,
615 ARRAY_SIZE(migor_i2c_devices));
617 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
619 __initcall(migor_devices_setup);