3 * (Compatible with Algo System ., LTD. - AP-320A)
5 * Copyright (C) 2008 Renesas Solutions Corp.
6 * Author : Yusuke Goda <goda.yuske@renesas.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/mtd/sh_flctl.h>
19 #include <linux/delay.h>
20 #include <linux/i2c.h>
21 #include <linux/smsc911x.h>
22 #include <linux/gpio.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/spi_gpio.h>
25 #include <media/ov772x.h>
26 #include <media/soc_camera.h>
27 #include <media/soc_camera_platform.h>
28 #include <media/sh_mobile_ceu.h>
29 #include <video/sh_mobile_lcdc.h>
31 #include <asm/clock.h>
32 #include <cpu/sh7723.h>
34 static struct smsc911x_platform_config smsc911x_config = {
35 .phy_interface = PHY_INTERFACE_MODE_MII,
36 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
37 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
38 .flags = SMSC911X_USE_32BIT,
41 static struct resource smsc9118_resources[] = {
45 .flags = IORESOURCE_MEM,
50 .flags = IORESOURCE_IRQ,
54 static struct platform_device smsc9118_device = {
57 .num_resources = ARRAY_SIZE(smsc9118_resources),
58 .resource = smsc9118_resources,
60 .platform_data = &smsc911x_config,
65 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
66 * If this area erased, this board can not boot.
68 static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
72 .size = (1 * 1024 * 1024),
73 .mask_flags = MTD_WRITEABLE, /* Read-only */
76 .offset = MTDPART_OFS_APPEND,
77 .size = (2 * 1024 * 1024),
80 .offset = MTDPART_OFS_APPEND,
81 .size = ((7 * 1024 * 1024) + (512 * 1024)),
84 .offset = MTDPART_OFS_APPEND,
85 .mask_flags = MTD_WRITEABLE, /* Read-only */
86 .size = (1024 * 128 * 2),
89 .offset = MTDPART_OFS_APPEND,
90 .size = MTDPART_SIZ_FULL,
94 static struct physmap_flash_data ap325rxa_nor_flash_data = {
96 .parts = ap325rxa_nor_flash_partitions,
97 .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
100 static struct resource ap325rxa_nor_flash_resources[] = {
105 .flags = IORESOURCE_MEM,
109 static struct platform_device ap325rxa_nor_flash_device = {
110 .name = "physmap-flash",
111 .resource = ap325rxa_nor_flash_resources,
112 .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
114 .platform_data = &ap325rxa_nor_flash_data,
118 static struct mtd_partition nand_partition_info[] = {
122 .size = MTDPART_SIZ_FULL,
126 static struct resource nand_flash_resources[] = {
130 .flags = IORESOURCE_MEM,
134 static struct sh_flctl_platform_data nand_flash_data = {
135 .parts = nand_partition_info,
136 .nr_parts = ARRAY_SIZE(nand_partition_info),
137 .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
141 static struct platform_device nand_flash_device = {
143 .resource = nand_flash_resources,
144 .num_resources = ARRAY_SIZE(nand_flash_resources),
146 .platform_data = &nand_flash_data,
150 #define FPGA_LCDREG 0xB4100180
151 #define FPGA_BKLREG 0xB4100212
152 #define FPGA_LCDREG_VAL 0x0018
153 #define PORT_MSELCRB 0xA4050182
154 #define PORT_HIZCRC 0xA405015C
155 #define PORT_DRVCRA 0xA405018A
156 #define PORT_DRVCRB 0xA405018C
158 static void ap320_wvga_power_on(void *board_data)
162 /* ASD AP-320/325 LCD ON */
163 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
166 gpio_set_value(GPIO_PTS3, 0);
167 ctrl_outw(0x100, FPGA_BKLREG);
170 static void ap320_wvga_power_off(void *board_data)
173 ctrl_outw(0, FPGA_BKLREG);
174 gpio_set_value(GPIO_PTS3, 1);
176 /* ASD AP-320/325 LCD OFF */
177 ctrl_outw(0, FPGA_LCDREG);
180 static struct sh_mobile_lcdc_info lcdc_info = {
181 .clock_source = LCDC_CLK_EXTERNAL,
183 .chan = LCDC_CHAN_MAINLCD,
185 .interface_type = RGB18,
197 .sync = 0, /* hsync and vsync are active low */
199 .lcd_size_cfg = { /* 7.0 inch */
204 .display_on = ap320_wvga_power_on,
205 .display_off = ap320_wvga_power_off,
210 static struct resource lcdc_resources[] = {
213 .start = 0xfe940000, /* P4-only space */
215 .flags = IORESOURCE_MEM,
219 .flags = IORESOURCE_IRQ,
223 static struct platform_device lcdc_device = {
224 .name = "sh_mobile_lcdc_fb",
225 .num_resources = ARRAY_SIZE(lcdc_resources),
226 .resource = lcdc_resources,
228 .platform_data = &lcdc_info,
231 .hwblk_id = HWBLK_LCDC,
235 static void camera_power(int val)
237 gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
242 /* support for the old ncm03j camera */
243 static unsigned char camera_ncm03j_magic[] =
245 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
246 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
247 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
248 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
249 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
250 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
251 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
252 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
253 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
254 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
255 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
256 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
257 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
258 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
259 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
260 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
263 static int camera_probe(void)
265 struct i2c_adapter *a = i2c_get_adapter(0);
274 msg.buf = camera_ncm03j_magic;
277 ret = i2c_transfer(a, &msg, 1);
283 static int camera_set_capture(struct soc_camera_platform_info *info,
286 struct i2c_adapter *a = i2c_get_adapter(0);
293 return 0; /* no disable for now */
296 for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
304 buf[0] = camera_ncm03j_magic[i];
305 buf[1] = camera_ncm03j_magic[i + 1];
307 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
313 static struct soc_camera_platform_info camera_info = {
315 .format_name = "UYVY",
318 .pixelformat = V4L2_PIX_FMT_UYVY,
319 .colorspace = V4L2_COLORSPACE_SMPTE170M,
323 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
324 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
325 .set_capture = camera_set_capture,
328 static struct platform_device camera_device = {
329 .name = "soc_camera_platform",
331 .platform_data = &camera_info,
335 static int __init camera_setup(void)
337 if (camera_probe() > 0)
338 platform_device_register(&camera_device);
342 late_initcall(camera_setup);
344 #endif /* CONFIG_I2C */
346 static int ov7725_power(struct device *dev, int mode)
355 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
356 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
359 static struct resource ceu_resources[] = {
364 .flags = IORESOURCE_MEM,
368 .flags = IORESOURCE_IRQ,
371 /* place holder for contiguous memory */
375 static struct platform_device ceu_device = {
376 .name = "sh_mobile_ceu",
377 .id = 0, /* "ceu0" clock */
378 .num_resources = ARRAY_SIZE(ceu_resources),
379 .resource = ceu_resources,
381 .platform_data = &sh_mobile_ceu_info,
384 .hwblk_id = HWBLK_CEU,
388 struct spi_gpio_platform_data sdcard_cn3_platform_data = {
395 static struct platform_device sdcard_cn3_device = {
398 .platform_data = &sdcard_cn3_platform_data,
402 static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
404 I2C_BOARD_INFO("pcf8563", 0x51),
408 static struct i2c_board_info ap325rxa_i2c_camera[] = {
410 I2C_BOARD_INFO("ov772x", 0x21),
414 static struct ov772x_camera_info ov7725_info = {
415 .buswidth = SOCAM_DATAWIDTH_8,
416 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
417 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
419 .power = ov7725_power,
420 .board_info = &ap325rxa_i2c_camera[0],
422 .module_name = "ov772x",
426 static struct platform_device ap325rxa_camera = {
427 .name = "soc-camera-pdrv",
430 .platform_data = &ov7725_info.link,
434 static struct platform_device *ap325rxa_devices[] __initdata = {
436 &ap325rxa_nor_flash_device,
444 static struct spi_board_info ap325rxa_spi_devices[] = {
446 .modalias = "mmc_spi",
447 .max_speed_hz = 5000000,
449 .controller_data = (void *) GPIO_PTD5,
453 static int __init ap325rxa_devices_setup(void)
455 /* LD3 and LD4 LEDs */
456 gpio_request(GPIO_PTX5, NULL); /* RUN */
457 gpio_direction_output(GPIO_PTX5, 1);
458 gpio_export(GPIO_PTX5, 0);
460 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
461 gpio_direction_output(GPIO_PTX4, 0);
462 gpio_export(GPIO_PTX4, 0);
465 gpio_request(GPIO_PTF7, NULL); /* MODE */
466 gpio_direction_input(GPIO_PTF7);
467 gpio_export(GPIO_PTF7, 0);
470 gpio_request(GPIO_FN_LCDD15, NULL);
471 gpio_request(GPIO_FN_LCDD14, NULL);
472 gpio_request(GPIO_FN_LCDD13, NULL);
473 gpio_request(GPIO_FN_LCDD12, NULL);
474 gpio_request(GPIO_FN_LCDD11, NULL);
475 gpio_request(GPIO_FN_LCDD10, NULL);
476 gpio_request(GPIO_FN_LCDD9, NULL);
477 gpio_request(GPIO_FN_LCDD8, NULL);
478 gpio_request(GPIO_FN_LCDD7, NULL);
479 gpio_request(GPIO_FN_LCDD6, NULL);
480 gpio_request(GPIO_FN_LCDD5, NULL);
481 gpio_request(GPIO_FN_LCDD4, NULL);
482 gpio_request(GPIO_FN_LCDD3, NULL);
483 gpio_request(GPIO_FN_LCDD2, NULL);
484 gpio_request(GPIO_FN_LCDD1, NULL);
485 gpio_request(GPIO_FN_LCDD0, NULL);
486 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
487 gpio_request(GPIO_FN_LCDDCK, NULL);
488 gpio_request(GPIO_FN_LCDVEPWC, NULL);
489 gpio_request(GPIO_FN_LCDVCPWC, NULL);
490 gpio_request(GPIO_FN_LCDVSYN, NULL);
491 gpio_request(GPIO_FN_LCDHSYN, NULL);
492 gpio_request(GPIO_FN_LCDDISP, NULL);
493 gpio_request(GPIO_FN_LCDDON, NULL);
496 gpio_request(GPIO_PTS3, NULL);
497 gpio_direction_output(GPIO_PTS3, 1);
500 gpio_request(GPIO_FN_VIO_CLK2, NULL);
501 gpio_request(GPIO_FN_VIO_VD2, NULL);
502 gpio_request(GPIO_FN_VIO_HD2, NULL);
503 gpio_request(GPIO_FN_VIO_FLD, NULL);
504 gpio_request(GPIO_FN_VIO_CKO, NULL);
505 gpio_request(GPIO_FN_VIO_D15, NULL);
506 gpio_request(GPIO_FN_VIO_D14, NULL);
507 gpio_request(GPIO_FN_VIO_D13, NULL);
508 gpio_request(GPIO_FN_VIO_D12, NULL);
509 gpio_request(GPIO_FN_VIO_D11, NULL);
510 gpio_request(GPIO_FN_VIO_D10, NULL);
511 gpio_request(GPIO_FN_VIO_D9, NULL);
512 gpio_request(GPIO_FN_VIO_D8, NULL);
514 gpio_request(GPIO_PTZ7, NULL);
515 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
516 gpio_request(GPIO_PTZ6, NULL);
517 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
518 gpio_request(GPIO_PTZ5, NULL);
519 gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
520 gpio_request(GPIO_PTZ4, NULL);
521 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
523 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
526 gpio_request(GPIO_FN_FCE, NULL);
527 gpio_request(GPIO_FN_NAF7, NULL);
528 gpio_request(GPIO_FN_NAF6, NULL);
529 gpio_request(GPIO_FN_NAF5, NULL);
530 gpio_request(GPIO_FN_NAF4, NULL);
531 gpio_request(GPIO_FN_NAF3, NULL);
532 gpio_request(GPIO_FN_NAF2, NULL);
533 gpio_request(GPIO_FN_NAF1, NULL);
534 gpio_request(GPIO_FN_NAF0, NULL);
535 gpio_request(GPIO_FN_FCDE, NULL);
536 gpio_request(GPIO_FN_FOE, NULL);
537 gpio_request(GPIO_FN_FSC, NULL);
538 gpio_request(GPIO_FN_FWE, NULL);
539 gpio_request(GPIO_FN_FRB, NULL);
541 ctrl_outw(0, PORT_HIZCRC);
542 ctrl_outw(0xFFFF, PORT_DRVCRA);
543 ctrl_outw(0xFFFF, PORT_DRVCRB);
545 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
547 i2c_register_board_info(0, ap325rxa_i2c_devices,
548 ARRAY_SIZE(ap325rxa_i2c_devices));
550 spi_register_board_info(ap325rxa_spi_devices,
551 ARRAY_SIZE(ap325rxa_spi_devices));
553 return platform_add_devices(ap325rxa_devices,
554 ARRAY_SIZE(ap325rxa_devices));
556 arch_initcall(ap325rxa_devices_setup);
558 /* Return the board specific boot mode pin configuration */
559 static int ap325rxa_mode_pins(void)
561 /* MD0=0, MD1=0, MD2=0: Clock Mode 0
562 * MD3=0: 16-bit Area0 Bus Width
563 * MD5=1: Little Endian
564 * TSTMD=1, MD8=1: Test Mode Disabled
566 return MODE_PIN5 | MODE_PIN8;
569 static struct sh_machine_vector mv_ap325rxa __initmv = {
570 .mv_name = "AP-325RXA",
571 .mv_mode_pins = ap325rxa_mode_pins,